1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
29 #include "frame-unwind.h"
30 #include "frame-base.h"
31 #include "trad-frame.h"
33 #include "gdb_assert.h"
34 #include "sim-regno.h"
35 #include "gdb/sim-frv.h"
36 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
38 extern void _initialize_frv_tdep (void);
40 static gdbarch_init_ftype frv_gdbarch_init
;
42 static gdbarch_register_name_ftype frv_register_name
;
43 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc
;
44 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address
;
45 static gdbarch_skip_prologue_ftype frv_skip_prologue
;
46 static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation
;
47 static gdbarch_deprecated_push_arguments_ftype frv_push_arguments
;
48 static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call
;
50 /* Register numbers. The order in which these appear define the
51 remote protocol, so take care in changing them. */
53 /* Register numbers 0 -- 63 are always reserved for general-purpose
54 registers. The chip at hand may have less. */
58 struct_return_regnum
= 3,
61 /* Register numbers 64 -- 127 are always reserved for floating-point
62 registers. The chip at hand may have less. */
63 first_fpr_regnum
= 64,
64 last_fpr_regnum
= 127,
66 /* The PC register. */
69 /* Register numbers 129 on up are always reserved for special-purpose
71 first_spr_regnum
= 129,
85 last_spr_regnum
= 148,
87 /* The total number of registers we know exist. */
88 frv_num_regs
= last_spr_regnum
+ 1
91 static LONGEST frv_call_dummy_words
[] =
95 struct frv_unwind_cache
/* was struct frame_extra_info */
97 /* The previous frame's inner-most stack address. Used as this
98 frame ID's stack_addr. */
101 /* The frame's base, optionally used by the high-level debug info. */
104 /* Table indicating the location of each and every register. */
105 struct trad_frame_saved_reg
*saved_regs
;
109 /* A structure describing a particular variant of the FRV.
110 We allocate and initialize one of these structures when we create
111 the gdbarch object for a variant.
113 At the moment, all the FR variants we support differ only in which
114 registers are present; the portable code of GDB knows that
115 registers whose names are the empty string don't exist, so the
116 `register_names' array captures all the per-variant information we
119 in the future, if we need to have per-variant maps for raw size,
120 virtual type, etc., we should replace register_names with an array
121 of structures, each of which gives all the necessary info for one
122 register. Don't stick parallel arrays in here --- that's so
126 /* How many general-purpose registers does this variant have? */
129 /* How many floating-point registers does this variant have? */
132 /* How many hardware watchpoints can it support? */
133 int num_hw_watchpoints
;
135 /* How many hardware breakpoints can it support? */
136 int num_hw_breakpoints
;
138 /* Register names. */
139 char **register_names
;
142 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
145 /* Allocate a new variant structure, and set up default values for all
147 static struct gdbarch_tdep
*
150 struct gdbarch_tdep
*var
;
154 var
= xmalloc (sizeof (*var
));
155 memset (var
, 0, sizeof (*var
));
159 var
->num_hw_watchpoints
= 0;
160 var
->num_hw_breakpoints
= 0;
162 /* By default, don't supply any general-purpose or floating-point
164 var
->register_names
= (char **) xmalloc (frv_num_regs
* sizeof (char *));
165 for (r
= 0; r
< frv_num_regs
; r
++)
166 var
->register_names
[r
] = "";
168 /* Do, however, supply default names for the known special-purpose
171 var
->register_names
[pc_regnum
] = "pc";
172 var
->register_names
[lr_regnum
] = "lr";
173 var
->register_names
[lcr_regnum
] = "lcr";
175 var
->register_names
[psr_regnum
] = "psr";
176 var
->register_names
[ccr_regnum
] = "ccr";
177 var
->register_names
[cccr_regnum
] = "cccr";
178 var
->register_names
[tbr_regnum
] = "tbr";
180 /* Debug registers. */
181 var
->register_names
[brr_regnum
] = "brr";
182 var
->register_names
[dbar0_regnum
] = "dbar0";
183 var
->register_names
[dbar1_regnum
] = "dbar1";
184 var
->register_names
[dbar2_regnum
] = "dbar2";
185 var
->register_names
[dbar3_regnum
] = "dbar3";
187 /* iacc0 (Only found on MB93405.) */
188 var
->register_names
[iacc0h_regnum
] = "iacc0h";
189 var
->register_names
[iacc0l_regnum
] = "iacc0l";
195 /* Indicate that the variant VAR has NUM_GPRS general-purpose
196 registers, and fill in the names array appropriately. */
198 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
202 var
->num_gprs
= num_gprs
;
204 for (r
= 0; r
< num_gprs
; ++r
)
208 sprintf (buf
, "gr%d", r
);
209 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
214 /* Indicate that the variant VAR has NUM_FPRS floating-point
215 registers, and fill in the names array appropriately. */
217 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
221 var
->num_fprs
= num_fprs
;
223 for (r
= 0; r
< num_fprs
; ++r
)
227 sprintf (buf
, "fr%d", r
);
228 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
234 frv_register_name (int reg
)
238 if (reg
>= frv_num_regs
)
241 return CURRENT_VARIANT
->register_names
[reg
];
246 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
248 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
249 return builtin_type_float
;
251 return builtin_type_int32
;
255 frv_register_sim_regno (int reg
)
257 static const int spr_map
[] =
259 H_SPR_PSR
, /* psr_regnum */
260 H_SPR_CCR
, /* ccr_regnum */
261 H_SPR_CCCR
, /* cccr_regnum */
265 H_SPR_TBR
, /* tbr_regnum */
266 H_SPR_BRR
, /* brr_regnum */
267 H_SPR_DBAR0
, /* dbar0_regnum */
268 H_SPR_DBAR1
, /* dbar1_regnum */
269 H_SPR_DBAR2
, /* dbar2_regnum */
270 H_SPR_DBAR3
, /* dbar3_regnum */
275 H_SPR_LR
, /* lr_regnum */
276 H_SPR_LCR
, /* lcr_regnum */
277 H_SPR_IACC0H
, /* iacc0h_regnum */
278 H_SPR_IACC0L
/* iacc0l_regnum */
281 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
283 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
284 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
285 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
286 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
287 else if (pc_regnum
== reg
)
288 return SIM_FRV_PC_REGNUM
;
289 else if (reg
>= first_spr_regnum
290 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
292 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
294 if (spr_reg_offset
< 0)
295 return SIM_REGNO_DOES_NOT_EXIST
;
297 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
300 internal_error (__FILE__
, __LINE__
, "Bad register number %d", reg
);
303 static const unsigned char *
304 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
306 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
307 *lenp
= sizeof (breakpoint
);
311 /* Define the maximum number of instructions which may be packed into a
312 bundle (VLIW instruction). */
313 static const int max_instrs_per_bundle
= 8;
315 /* Define the size (in bytes) of an FR-V instruction. */
316 static const int frv_instr_size
= 4;
318 /* Adjust a breakpoint's address to account for the FR-V architecture's
319 constraint that a break instruction must not appear as any but the
320 first instruction in the bundle. */
322 frv_gdbarch_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
324 int count
= max_instrs_per_bundle
;
325 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
326 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
328 /* Find the end of the previous packing sequence. This will be indicated
329 by either attempting to access some inaccessible memory or by finding
330 an instruction word whose packing bit is set to one. */
331 while (count
-- > 0 && addr
>= func_start
)
333 char instr
[frv_instr_size
];
336 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
341 /* This is a big endian architecture, so byte zero will have most
342 significant byte. The most significant bit of this byte is the
347 addr
-= frv_instr_size
;
351 bpaddr
= addr
+ frv_instr_size
;
357 /* Return true if REG is a caller-saves ("scratch") register,
360 is_caller_saves_reg (int reg
)
362 return ((4 <= reg
&& reg
<= 7)
363 || (14 <= reg
&& reg
<= 15)
364 || (32 <= reg
&& reg
<= 47));
368 /* Return true if REG is a callee-saves register, false otherwise. */
370 is_callee_saves_reg (int reg
)
372 return ((16 <= reg
&& reg
<= 31)
373 || (48 <= reg
&& reg
<= 63));
377 /* Return true if REG is an argument register, false otherwise. */
379 is_argument_reg (int reg
)
381 return (8 <= reg
&& reg
<= 13);
385 /* Scan an FR-V prologue, starting at PC, until frame->PC.
386 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
387 We assume FRAME's saved_regs array has already been allocated and cleared.
388 Return the first PC value after the prologue.
390 Note that, for unoptimized code, we almost don't need this function
391 at all; all arguments and locals live on the stack, so we just need
392 the FP to find everything. The catch: structures passed by value
393 have their addresses living in registers; they're never spilled to
394 the stack. So if you ever want to be able to get to these
395 arguments in any frame but the top, you'll need to do this serious
396 prologue analysis. */
398 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
399 struct frv_unwind_cache
*info
)
401 /* When writing out instruction bitpatterns, we use the following
402 letters to label instruction fields:
403 P - The parallel bit. We don't use this.
404 J - The register number of GRj in the instruction description.
405 K - The register number of GRk in the instruction description.
406 I - The register number of GRi.
407 S - a signed imediate offset.
408 U - an unsigned immediate offset.
410 The dots below the numbers indicate where hex digit boundaries
411 fall, to make it easier to check the numbers. */
413 /* Non-zero iff we've seen the instruction that initializes the
414 frame pointer for this function's frame. */
417 /* If fp_set is non_zero, then this is the distance from
418 the stack pointer to frame pointer: fp = sp + fp_offset. */
421 /* Total size of frame prior to any alloca operations. */
424 /* Flag indicating if lr has been saved on the stack. */
425 int lr_saved_on_stack
= 0;
427 /* The number of the general-purpose register we saved the return
428 address ("link register") in, or -1 if we haven't moved it yet. */
429 int lr_save_reg
= -1;
431 /* Offset (from sp) at which lr has been saved on the stack. */
433 int lr_sp_offset
= 0;
435 /* If gr_saved[i] is non-zero, then we've noticed that general
436 register i has been saved at gr_sp_offset[i] from the stack
439 int gr_sp_offset
[64];
441 memset (gr_saved
, 0, sizeof (gr_saved
));
443 while (! next_frame
|| pc
< frame_pc_unwind (next_frame
))
445 LONGEST op
= read_memory_integer (pc
, 4);
447 /* The tests in this chain of ifs should be in order of
448 decreasing selectivity, so that more particular patterns get
449 to fire before less particular patterns. */
451 /* Setting the FP from the SP:
453 P 000010 0100010 000001 000000000000 = 0x04881000
454 0 111111 1111111 111111 111111111111 = 0x7fffffff
456 We treat this as part of the prologue. */
457 if ((op
& 0x7fffffff) == 0x04881000)
463 /* Move the link register to the scratch register grJ, before saving:
465 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
466 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
468 We treat this as part of the prologue. */
469 else if ((op
& 0x7fffffc0) == 0x080d01c0)
471 int gr_j
= op
& 0x3f;
473 /* If we're moving it to a scratch register, that's fine. */
474 if (is_caller_saves_reg (gr_j
))
476 /* Otherwise it's not a prologue instruction that we
482 /* To save multiple callee-saves registers on the stack, at
486 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
487 0 000000 1111111 111111 111111 111111 = 0x01ffffff
490 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
491 0 000000 1111111 111111 111111 111111 = 0x01ffffff
493 We treat this as part of the prologue, and record the register's
494 saved address in the frame structure. */
495 else if ((op
& 0x01ffffff) == 0x000c10c0
496 || (op
& 0x01ffffff) == 0x000c1100)
498 int gr_k
= ((op
>> 25) & 0x3f);
499 int ope
= ((op
>> 6) & 0x3f);
503 /* Is it an std or an stq? */
509 /* Is it really a callee-saves register? */
510 if (is_callee_saves_reg (gr_k
))
512 for (i
= 0; i
< count
; i
++)
514 gr_saved
[gr_k
+ i
] = 1;
515 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
519 /* It's not a prologue instruction. */
523 /* Adjusting the stack pointer. (The stack pointer is GR1.)
525 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
526 0 111111 1111111 111111 000000000000 = 0x7ffff000
528 We treat this as part of the prologue. */
529 else if ((op
& 0x7ffff000) == 0x02401000)
531 /* Sign-extend the twelve-bit field.
532 (Isn't there a better way to do this?) */
533 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
538 /* Setting the FP to a constant distance from the SP:
540 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
541 0 111111 1111111 111111 000000000000 = 0x7ffff000
543 We treat this as part of the prologue. */
544 else if ((op
& 0x7ffff000) == 0x04401000)
546 /* Sign-extend the twelve-bit field.
547 (Isn't there a better way to do this?) */
548 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
553 /* To spill an argument register to a scratch register:
555 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
556 0 000000 1111111 000000 111111111111 = 0x01fc0fff
558 For the time being, we treat this as a prologue instruction,
559 assuming that GRi is an argument register. This one's kind
560 of suspicious, because it seems like it could be part of a
561 legitimate body instruction. But we only come here when the
562 source info wasn't helpful, so we have to do the best we can.
563 Hopefully once GCC and GDB agree on how to emit line number
564 info for prologues, then this code will never come into play. */
565 else if ((op
& 0x01fc0fff) == 0x00880000)
567 int gr_i
= ((op
>> 12) & 0x3f);
569 /* If the source isn't an arg register, then this isn't a
570 prologue instruction. */
571 if (! is_argument_reg (gr_i
))
575 /* To spill 16-bit values to the stack:
577 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
578 0 000000 1111111 111111 000000000000 = 0x01fff000
580 And for 8-bit values, we use STB instructions.
582 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
583 0 000000 1111111 111111 000000000000 = 0x01fff000
585 We check that GRk is really an argument register, and treat
586 all such as part of the prologue. */
587 else if ( (op
& 0x01fff000) == 0x01442000
588 || (op
& 0x01fff000) == 0x01402000)
590 int gr_k
= ((op
>> 25) & 0x3f);
592 if (! is_argument_reg (gr_k
))
593 break; /* Source isn't an arg register. */
596 /* To save multiple callee-saves register on the stack, at a
600 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
601 0 000000 1111111 111111 000000000000 = 0x01fff000
604 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
605 0 000000 1111111 111111 000000000000 = 0x01fff000
607 We treat this as part of the prologue, and record the register's
608 saved address in the frame structure. */
609 else if ((op
& 0x01fff000) == 0x014c1000
610 || (op
& 0x01fff000) == 0x01501000)
612 int gr_k
= ((op
>> 25) & 0x3f);
616 /* Is it a stdi or a stqi? */
617 if ((op
& 0x01fff000) == 0x014c1000)
622 /* Is it really a callee-saves register? */
623 if (is_callee_saves_reg (gr_k
))
625 /* Sign-extend the twelve-bit field.
626 (Isn't there a better way to do this?) */
627 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
629 for (i
= 0; i
< count
; i
++)
631 gr_saved
[gr_k
+ i
] = 1;
632 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
636 /* It's not a prologue instruction. */
640 /* Storing any kind of integer register at any constant offset
641 from any other register.
644 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
645 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
648 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
649 0 000000 1111111 000000 000000000000 = 0x01fc0000
651 These could be almost anything, but a lot of prologue
652 instructions fall into this pattern, so let's decode the
653 instruction once, and then work at a higher level. */
654 else if (((op
& 0x01fc0fff) == 0x000c0080)
655 || ((op
& 0x01fc0000) == 0x01480000))
657 int gr_k
= ((op
>> 25) & 0x3f);
658 int gr_i
= ((op
>> 12) & 0x3f);
661 /* Are we storing with gr0 as an offset, or using an
663 if ((op
& 0x01fc0fff) == 0x000c0080)
666 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
668 /* If the address isn't relative to the SP or FP, it's not a
669 prologue instruction. */
670 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
673 /* Saving the old FP in the new frame (relative to the SP). */
674 if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
676 gr_saved
[fp_regnum
] = 1;
677 gr_sp_offset
[fp_regnum
] = offset
;
680 /* Saving callee-saves register(s) on the stack, relative to
682 else if (gr_i
== sp_regnum
683 && is_callee_saves_reg (gr_k
))
686 if (gr_i
== sp_regnum
)
687 gr_sp_offset
[gr_k
] = offset
;
689 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
692 /* Saving the scratch register holding the return address. */
693 else if (lr_save_reg
!= -1
694 && gr_k
== lr_save_reg
)
696 lr_saved_on_stack
= 1;
697 if (gr_i
== sp_regnum
)
698 lr_sp_offset
= offset
;
700 lr_sp_offset
= offset
+ fp_offset
;
703 /* Spilling int-sized arguments to the stack. */
704 else if (is_argument_reg (gr_k
))
707 /* It's not a store instruction we recognize, so this must
708 be the end of the prologue. */
713 /* It's not any instruction we recognize, so this must be the end
721 if (next_frame
&& info
)
726 /* If we know the relationship between the stack and frame
727 pointers, record the addresses of the registers we noticed.
728 Note that we have to do this as a separate step at the end,
729 because instructions may save relative to the SP, but we need
730 their addresses relative to the FP. */
732 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
734 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
736 for (i
= 0; i
< 64; i
++)
738 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
740 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
741 info
->base
= this_base
;
743 /* If LR was saved on the stack, record its location. */
744 if (lr_saved_on_stack
)
745 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
747 /* The call instruction moves the caller's PC in the callee's LR.
748 Since this is an unwind, do the reverse. Copy the location of LR
749 into PC (the address / regnum) so that a request for PC will be
750 converted into a request for the LR. */
751 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
753 /* Save the previous frame's computed SP value. */
754 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
762 frv_skip_prologue (CORE_ADDR pc
)
764 CORE_ADDR func_addr
, func_end
, new_pc
;
768 /* If the line table has entry for a line *within* the function
769 (i.e., not in the prologue, and not past the end), then that's
771 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
773 struct symtab_and_line sal
;
775 sal
= find_pc_line (func_addr
, 0);
777 if (sal
.line
!= 0 && sal
.end
< func_end
)
783 /* The FR-V prologue is at least five instructions long (twenty bytes).
784 If we didn't find a real source location past that, then
785 do a full analysis of the prologue. */
786 if (new_pc
< pc
+ 20)
787 new_pc
= frv_analyze_prologue (pc
, 0, 0);
793 static struct frv_unwind_cache
*
794 frv_frame_unwind_cache (struct frame_info
*next_frame
,
795 void **this_prologue_cache
)
797 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
801 struct frv_unwind_cache
*info
;
803 if ((*this_prologue_cache
))
804 return (*this_prologue_cache
);
806 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
807 (*this_prologue_cache
) = info
;
808 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
810 /* Prologue analysis does the rest... */
811 frv_analyze_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
817 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
820 int len
= TYPE_LENGTH (type
);
825 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
826 store_unsigned_integer (valbuf
, len
, gpr8_val
);
831 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
832 store_unsigned_integer (valbuf
, 4, regval
);
833 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
834 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
837 internal_error (__FILE__
, __LINE__
, "Illegal return value length: %d", len
);
841 frv_extract_struct_value_address (struct regcache
*regcache
)
844 regcache_cooked_read_unsigned (regcache
, struct_return_regnum
, &addr
);
849 frv_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
851 write_register (struct_return_regnum
, addr
);
855 frv_frameless_function_invocation (struct frame_info
*frame
)
857 return frameless_look_for_prologue (frame
);
861 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
863 /* Require dword alignment. */
864 return align_down (sp
, 8);
868 frv_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
869 struct regcache
*regcache
, CORE_ADDR bp_addr
,
870 int nargs
, struct value
**args
, CORE_ADDR sp
,
871 int struct_return
, CORE_ADDR struct_addr
)
878 struct type
*arg_type
;
880 enum type_code typecode
;
886 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
887 nargs
, (int) sp
, struct_return
, struct_addr
);
891 for (argnum
= 0; argnum
< nargs
; ++argnum
)
892 stack_space
+= align_up (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])), 4);
894 stack_space
-= (6 * 4);
898 /* Make sure stack is dword aligned. */
899 sp
= align_down (sp
, 8);
906 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
909 for (argnum
= 0; argnum
< nargs
; ++argnum
)
912 arg_type
= check_typedef (VALUE_TYPE (arg
));
913 len
= TYPE_LENGTH (arg_type
);
914 typecode
= TYPE_CODE (arg_type
);
916 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
918 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
919 typecode
= TYPE_CODE_PTR
;
925 val
= (char *) VALUE_CONTENTS (arg
);
930 int partial_len
= (len
< 4 ? len
: 4);
934 regval
= extract_unsigned_integer (val
, partial_len
);
936 printf(" Argnum %d data %x -> reg %d\n",
937 argnum
, (int) regval
, argreg
);
939 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
945 printf(" Argnum %d data %x -> offset %d (%x)\n",
946 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
948 write_memory (sp
+ stack_offset
, val
, partial_len
);
949 stack_offset
+= align_up (partial_len
, 4);
956 /* Set the return address. For the frv, the return breakpoint is
957 always at BP_ADDR. */
958 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
960 /* Finally, update the SP register. */
961 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
967 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
970 int len
= TYPE_LENGTH (type
);
975 memset (val
, 0, sizeof (val
));
976 memcpy (val
+ (4 - len
), valbuf
, len
);
977 regcache_cooked_write (regcache
, 8, val
);
981 regcache_cooked_write (regcache
, 8, valbuf
);
982 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
985 internal_error (__FILE__
, __LINE__
,
986 "Don't know how to return a %d-byte value.", len
);
990 /* Hardware watchpoint / breakpoint support for the FR500
994 frv_check_watch_resources (int type
, int cnt
, int ot
)
996 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
998 /* Watchpoints not supported on simulator. */
999 if (strcmp (target_shortname
, "sim") == 0)
1002 if (type
== bp_hardware_breakpoint
)
1004 if (var
->num_hw_breakpoints
== 0)
1006 else if (cnt
<= var
->num_hw_breakpoints
)
1011 if (var
->num_hw_watchpoints
== 0)
1015 else if (cnt
<= var
->num_hw_watchpoints
)
1023 frv_stopped_data_address (void)
1025 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1027 brr
= read_register (brr_regnum
);
1028 dbar0
= read_register (dbar0_regnum
);
1029 dbar1
= read_register (dbar1_regnum
);
1030 dbar2
= read_register (dbar2_regnum
);
1031 dbar3
= read_register (dbar3_regnum
);
1035 else if (brr
& (1<<10))
1037 else if (brr
& (1<<9))
1039 else if (brr
& (1<<8))
1046 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1048 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1051 /* Given a GDB frame, determine the address of the calling function's
1052 frame. This will be used to create a new GDB frame struct. */
1055 frv_frame_this_id (struct frame_info
*next_frame
,
1056 void **this_prologue_cache
, struct frame_id
*this_id
)
1058 struct frv_unwind_cache
*info
1059 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1062 struct minimal_symbol
*msym_stack
;
1065 /* The FUNC is easy. */
1066 func
= frame_func_unwind (next_frame
);
1068 /* This is meant to halt the backtrace at "_start". Make sure we
1069 don't halt it at a generic dummy frame. */
1070 if (inside_entry_func (func
))
1073 /* Check if the stack is empty. */
1074 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1075 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1078 /* Hopefully the prologue analysis either correctly determined the
1079 frame's base (which is the SP from the previous frame), or set
1080 that base to "NULL". */
1081 base
= info
->prev_sp
;
1085 id
= frame_id_build (base
, func
);
1087 /* Check that we're not going round in circles with the same frame
1088 ID (but avoid applying the test to sentinel frames which do go
1089 round in circles). Can't use frame_id_eq() as that doesn't yet
1090 compare the frame's PC value. */
1091 if (frame_relative_level (next_frame
) >= 0
1092 && get_frame_type (next_frame
) != DUMMY_FRAME
1093 && frame_id_eq (get_frame_id (next_frame
), id
))
1100 frv_frame_prev_register (struct frame_info
*next_frame
,
1101 void **this_prologue_cache
,
1102 int regnum
, int *optimizedp
,
1103 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1104 int *realnump
, void *bufferp
)
1106 struct frv_unwind_cache
*info
1107 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1108 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
1109 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1112 static const struct frame_unwind frv_frame_unwind
= {
1115 frv_frame_prev_register
1118 static const struct frame_unwind
*
1119 frv_frame_sniffer (struct frame_info
*next_frame
)
1121 return &frv_frame_unwind
;
1125 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1127 struct frv_unwind_cache
*info
1128 = frv_frame_unwind_cache (next_frame
, this_cache
);
1132 static const struct frame_base frv_frame_base
= {
1134 frv_frame_base_address
,
1135 frv_frame_base_address
,
1136 frv_frame_base_address
1140 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1142 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1146 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1147 dummy frame. The frame ID's base needs to match the TOS value
1148 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1151 static struct frame_id
1152 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1154 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1155 frame_pc_unwind (next_frame
));
1159 static struct gdbarch
*
1160 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1162 struct gdbarch
*gdbarch
;
1163 struct gdbarch_tdep
*var
;
1165 /* Check to see if we've already built an appropriate architecture
1166 object for this executable. */
1167 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1169 return arches
->gdbarch
;
1171 /* Select the right tdep structure for this variant. */
1172 var
= new_variant ();
1173 switch (info
.bfd_arch_info
->mach
)
1176 case bfd_mach_frvsimple
:
1177 case bfd_mach_fr500
:
1178 case bfd_mach_frvtomcat
:
1179 set_variant_num_gprs (var
, 64);
1180 set_variant_num_fprs (var
, 64);
1183 case bfd_mach_fr400
:
1184 set_variant_num_gprs (var
, 32);
1185 set_variant_num_fprs (var
, 32);
1189 /* Never heard of this variant. */
1193 gdbarch
= gdbarch_alloc (&info
, var
);
1195 set_gdbarch_short_bit (gdbarch
, 16);
1196 set_gdbarch_int_bit (gdbarch
, 32);
1197 set_gdbarch_long_bit (gdbarch
, 32);
1198 set_gdbarch_long_long_bit (gdbarch
, 64);
1199 set_gdbarch_float_bit (gdbarch
, 32);
1200 set_gdbarch_double_bit (gdbarch
, 64);
1201 set_gdbarch_long_double_bit (gdbarch
, 64);
1202 set_gdbarch_ptr_bit (gdbarch
, 32);
1204 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1205 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1206 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1207 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1209 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1210 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1211 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1213 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1214 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1215 set_gdbarch_adjust_breakpoint_address (gdbarch
, frv_gdbarch_adjust_breakpoint_address
);
1217 set_gdbarch_frame_args_skip (gdbarch
, 0);
1218 set_gdbarch_frameless_function_invocation (gdbarch
, frv_frameless_function_invocation
);
1220 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
1221 set_gdbarch_extract_return_value (gdbarch
, frv_extract_return_value
);
1223 set_gdbarch_deprecated_store_struct_return (gdbarch
, frv_store_struct_return
);
1224 set_gdbarch_store_return_value (gdbarch
, frv_store_return_value
);
1225 set_gdbarch_extract_struct_value_address (gdbarch
, frv_extract_struct_value_address
);
1228 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1229 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1230 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1231 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1232 frame_base_set_default (gdbarch
, &frv_frame_base
);
1234 /* Settings for calling functions in the inferior. */
1235 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1236 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1238 /* Settings that should be unnecessary. */
1239 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1241 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1243 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1244 set_gdbarch_function_start_offset (gdbarch
, 0);
1246 set_gdbarch_remote_translate_xfer_address
1247 (gdbarch
, generic_remote_translate_xfer_address
);
1249 /* Hardware watchpoint / breakpoint support. */
1250 switch (info
.bfd_arch_info
->mach
)
1253 case bfd_mach_frvsimple
:
1254 case bfd_mach_fr500
:
1255 case bfd_mach_frvtomcat
:
1256 /* fr500-style hardware debugging support. */
1257 var
->num_hw_watchpoints
= 4;
1258 var
->num_hw_breakpoints
= 4;
1261 case bfd_mach_fr400
:
1262 /* fr400-style hardware debugging support. */
1263 var
->num_hw_watchpoints
= 2;
1264 var
->num_hw_breakpoints
= 4;
1268 /* Otherwise, assume we don't have hardware debugging support. */
1269 var
->num_hw_watchpoints
= 0;
1270 var
->num_hw_breakpoints
= 0;
1274 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1280 _initialize_frv_tdep (void)
1282 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);