1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
25 #include "arch-utils.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
32 #include "gdb_assert.h"
33 #include "sim-regno.h"
34 #include "gdb/sim-frv.h"
35 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
42 extern void _initialize_frv_tdep (void);
44 static gdbarch_init_ftype frv_gdbarch_init
;
46 static gdbarch_register_name_ftype frv_register_name
;
47 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc
;
48 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address
;
49 static gdbarch_skip_prologue_ftype frv_skip_prologue
;
52 struct frv_unwind_cache
/* was struct frame_extra_info */
54 /* The previous frame's inner-most stack address. Used as this
55 frame ID's stack_addr. */
58 /* The frame's base, optionally used by the high-level debug info. */
61 /* Table indicating the location of each and every register. */
62 struct trad_frame_saved_reg
*saved_regs
;
65 /* A structure describing a particular variant of the FRV.
66 We allocate and initialize one of these structures when we create
67 the gdbarch object for a variant.
69 At the moment, all the FR variants we support differ only in which
70 registers are present; the portable code of GDB knows that
71 registers whose names are the empty string don't exist, so the
72 `register_names' array captures all the per-variant information we
75 in the future, if we need to have per-variant maps for raw size,
76 virtual type, etc., we should replace register_names with an array
77 of structures, each of which gives all the necessary info for one
78 register. Don't stick parallel arrays in here --- that's so
82 /* Which ABI is in use? */
85 /* How many general-purpose registers does this variant have? */
88 /* How many floating-point registers does this variant have? */
91 /* How many hardware watchpoints can it support? */
92 int num_hw_watchpoints
;
94 /* How many hardware breakpoints can it support? */
95 int num_hw_breakpoints
;
98 char **register_names
;
100 /* Given NEXT_FRAME, determine the address of register REGNO saved in
101 the calling sigtramp frame. */
102 CORE_ADDR (*sigcontext_reg_addr
) (struct frame_info
*next_frame
, int regno
,
106 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
108 /* Return the FR-V ABI associated with GDBARCH. */
110 frv_abi (struct gdbarch
*gdbarch
)
112 return gdbarch_tdep (gdbarch
)->frv_abi
;
115 /* Set sigcontext_reg_addr. */
117 frv_set_sigcontext_reg_addr (struct gdbarch
*gdbarch
,
118 CORE_ADDR (*sigcontext_reg_addr
)
119 (struct frame_info
*, int, CORE_ADDR
*))
121 gdbarch_tdep (gdbarch
)->sigcontext_reg_addr
= sigcontext_reg_addr
;
124 /* Fetch the interpreter and executable loadmap addresses (for shared
125 library support) for the FDPIC ABI. Return 0 if successful, -1 if
126 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
128 frv_fdpic_loadmap_addresses (struct gdbarch
*gdbarch
, CORE_ADDR
*interp_addr
,
129 CORE_ADDR
*exec_addr
)
131 if (frv_abi (gdbarch
) != FRV_ABI_FDPIC
)
135 if (interp_addr
!= NULL
)
138 regcache_cooked_read_unsigned (current_regcache
,
139 fdpic_loadmap_interp_regnum
, &val
);
142 if (exec_addr
!= NULL
)
145 regcache_cooked_read_unsigned (current_regcache
,
146 fdpic_loadmap_exec_regnum
, &val
);
153 /* Allocate a new variant structure, and set up default values for all
155 static struct gdbarch_tdep
*
158 struct gdbarch_tdep
*var
;
162 var
= xmalloc (sizeof (*var
));
163 memset (var
, 0, sizeof (*var
));
165 var
->frv_abi
= FRV_ABI_EABI
;
168 var
->num_hw_watchpoints
= 0;
169 var
->num_hw_breakpoints
= 0;
171 /* By default, don't supply any general-purpose or floating-point
174 = (char **) xmalloc ((frv_num_regs
+ frv_num_pseudo_regs
)
176 for (r
= 0; r
< frv_num_regs
+ frv_num_pseudo_regs
; r
++)
177 var
->register_names
[r
] = "";
179 /* Do, however, supply default names for the known special-purpose
182 var
->register_names
[pc_regnum
] = "pc";
183 var
->register_names
[lr_regnum
] = "lr";
184 var
->register_names
[lcr_regnum
] = "lcr";
186 var
->register_names
[psr_regnum
] = "psr";
187 var
->register_names
[ccr_regnum
] = "ccr";
188 var
->register_names
[cccr_regnum
] = "cccr";
189 var
->register_names
[tbr_regnum
] = "tbr";
191 /* Debug registers. */
192 var
->register_names
[brr_regnum
] = "brr";
193 var
->register_names
[dbar0_regnum
] = "dbar0";
194 var
->register_names
[dbar1_regnum
] = "dbar1";
195 var
->register_names
[dbar2_regnum
] = "dbar2";
196 var
->register_names
[dbar3_regnum
] = "dbar3";
198 /* iacc0 (Only found on MB93405.) */
199 var
->register_names
[iacc0h_regnum
] = "iacc0h";
200 var
->register_names
[iacc0l_regnum
] = "iacc0l";
201 var
->register_names
[iacc0_regnum
] = "iacc0";
203 /* fsr0 (Found on FR555 and FR501.) */
204 var
->register_names
[fsr0_regnum
] = "fsr0";
206 /* acc0 - acc7. The architecture provides for the possibility of many
207 more (up to 64 total), but we don't want to make that big of a hole
208 in the G packet. If we need more in the future, we'll add them
210 for (r
= acc0_regnum
; r
<= acc7_regnum
; r
++)
213 xasprintf (&buf
, "acc%d", r
- acc0_regnum
);
214 var
->register_names
[r
] = buf
;
217 /* accg0 - accg7: These are one byte registers. The remote protocol
218 provides the raw values packed four into a slot. accg0123 and
219 accg4567 correspond to accg0 - accg3 and accg4-accg7 respectively.
220 We don't provide names for accg0123 and accg4567 since the user will
221 likely not want to see these raw values. */
223 for (r
= accg0_regnum
; r
<= accg7_regnum
; r
++)
226 xasprintf (&buf
, "accg%d", r
- accg0_regnum
);
227 var
->register_names
[r
] = buf
;
232 var
->register_names
[msr0_regnum
] = "msr0";
233 var
->register_names
[msr1_regnum
] = "msr1";
235 /* gner and fner registers. */
236 var
->register_names
[gner0_regnum
] = "gner0";
237 var
->register_names
[gner1_regnum
] = "gner1";
238 var
->register_names
[fner0_regnum
] = "fner0";
239 var
->register_names
[fner1_regnum
] = "fner1";
245 /* Indicate that the variant VAR has NUM_GPRS general-purpose
246 registers, and fill in the names array appropriately. */
248 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
252 var
->num_gprs
= num_gprs
;
254 for (r
= 0; r
< num_gprs
; ++r
)
258 sprintf (buf
, "gr%d", r
);
259 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
264 /* Indicate that the variant VAR has NUM_FPRS floating-point
265 registers, and fill in the names array appropriately. */
267 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
271 var
->num_fprs
= num_fprs
;
273 for (r
= 0; r
< num_fprs
; ++r
)
277 sprintf (buf
, "fr%d", r
);
278 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
283 set_variant_abi_fdpic (struct gdbarch_tdep
*var
)
285 var
->frv_abi
= FRV_ABI_FDPIC
;
286 var
->register_names
[fdpic_loadmap_exec_regnum
] = xstrdup ("loadmap_exec");
287 var
->register_names
[fdpic_loadmap_interp_regnum
] = xstrdup ("loadmap_interp");
291 set_variant_scratch_registers (struct gdbarch_tdep
*var
)
293 var
->register_names
[scr0_regnum
] = xstrdup ("scr0");
294 var
->register_names
[scr1_regnum
] = xstrdup ("scr1");
295 var
->register_names
[scr2_regnum
] = xstrdup ("scr2");
296 var
->register_names
[scr3_regnum
] = xstrdup ("scr3");
300 frv_register_name (int reg
)
304 if (reg
>= frv_num_regs
+ frv_num_pseudo_regs
)
307 return CURRENT_VARIANT
->register_names
[reg
];
312 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
314 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
315 return builtin_type_float
;
316 else if (reg
== iacc0_regnum
)
317 return builtin_type_int64
;
319 return builtin_type_int32
;
323 frv_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
324 int reg
, void *buffer
)
326 if (reg
== iacc0_regnum
)
328 regcache_raw_read (regcache
, iacc0h_regnum
, buffer
);
329 regcache_raw_read (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
331 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
333 /* The accg raw registers have four values in each slot with the
334 lowest register number occupying the first byte. */
336 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
337 int byte_num
= (reg
- accg0_regnum
) % 4;
340 regcache_raw_read (regcache
, raw_regnum
, buf
);
341 memset (buffer
, 0, 4);
342 /* FR-V is big endian, so put the requested byte in the first byte
343 of the buffer allocated to hold the pseudo-register. */
344 ((bfd_byte
*) buffer
)[0] = buf
[byte_num
];
349 frv_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
350 int reg
, const void *buffer
)
352 if (reg
== iacc0_regnum
)
354 regcache_raw_write (regcache
, iacc0h_regnum
, buffer
);
355 regcache_raw_write (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
357 else if (accg0_regnum
<= reg
&& reg
<= accg7_regnum
)
359 /* The accg raw registers have four values in each slot with the
360 lowest register number occupying the first byte. */
362 int raw_regnum
= accg0123_regnum
+ (reg
- accg0_regnum
) / 4;
363 int byte_num
= (reg
- accg0_regnum
) % 4;
366 regcache_raw_read (regcache
, raw_regnum
, buf
);
367 buf
[byte_num
] = ((bfd_byte
*) buffer
)[0];
368 regcache_raw_write (regcache
, raw_regnum
, buf
);
373 frv_register_sim_regno (int reg
)
375 static const int spr_map
[] =
377 H_SPR_PSR
, /* psr_regnum */
378 H_SPR_CCR
, /* ccr_regnum */
379 H_SPR_CCCR
, /* cccr_regnum */
380 -1, /* fdpic_loadmap_exec_regnum */
381 -1, /* fdpic_loadmap_interp_regnum */
383 H_SPR_TBR
, /* tbr_regnum */
384 H_SPR_BRR
, /* brr_regnum */
385 H_SPR_DBAR0
, /* dbar0_regnum */
386 H_SPR_DBAR1
, /* dbar1_regnum */
387 H_SPR_DBAR2
, /* dbar2_regnum */
388 H_SPR_DBAR3
, /* dbar3_regnum */
389 H_SPR_SCR0
, /* scr0_regnum */
390 H_SPR_SCR1
, /* scr1_regnum */
391 H_SPR_SCR2
, /* scr2_regnum */
392 H_SPR_SCR3
, /* scr3_regnum */
393 H_SPR_LR
, /* lr_regnum */
394 H_SPR_LCR
, /* lcr_regnum */
395 H_SPR_IACC0H
, /* iacc0h_regnum */
396 H_SPR_IACC0L
, /* iacc0l_regnum */
397 H_SPR_FSR0
, /* fsr0_regnum */
398 /* FIXME: Add infrastructure for fetching/setting ACC and ACCG regs. */
399 -1, /* acc0_regnum */
400 -1, /* acc1_regnum */
401 -1, /* acc2_regnum */
402 -1, /* acc3_regnum */
403 -1, /* acc4_regnum */
404 -1, /* acc5_regnum */
405 -1, /* acc6_regnum */
406 -1, /* acc7_regnum */
407 -1, /* acc0123_regnum */
408 -1, /* acc4567_regnum */
409 H_SPR_MSR0
, /* msr0_regnum */
410 H_SPR_MSR1
, /* msr1_regnum */
411 H_SPR_GNER0
, /* gner0_regnum */
412 H_SPR_GNER1
, /* gner1_regnum */
413 H_SPR_FNER0
, /* fner0_regnum */
414 H_SPR_FNER1
, /* fner1_regnum */
417 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
419 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
420 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
421 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
422 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
423 else if (pc_regnum
== reg
)
424 return SIM_FRV_PC_REGNUM
;
425 else if (reg
>= first_spr_regnum
426 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
428 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
430 if (spr_reg_offset
< 0)
431 return SIM_REGNO_DOES_NOT_EXIST
;
433 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
436 internal_error (__FILE__
, __LINE__
, "Bad register number %d", reg
);
439 static const unsigned char *
440 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
442 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
443 *lenp
= sizeof (breakpoint
);
447 /* Define the maximum number of instructions which may be packed into a
448 bundle (VLIW instruction). */
449 static const int max_instrs_per_bundle
= 8;
451 /* Define the size (in bytes) of an FR-V instruction. */
452 static const int frv_instr_size
= 4;
454 /* Adjust a breakpoint's address to account for the FR-V architecture's
455 constraint that a break instruction must not appear as any but the
456 first instruction in the bundle. */
458 frv_gdbarch_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
460 int count
= max_instrs_per_bundle
;
461 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
462 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
464 /* Find the end of the previous packing sequence. This will be indicated
465 by either attempting to access some inaccessible memory or by finding
466 an instruction word whose packing bit is set to one. */
467 while (count
-- > 0 && addr
>= func_start
)
469 char instr
[frv_instr_size
];
472 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
477 /* This is a big endian architecture, so byte zero will have most
478 significant byte. The most significant bit of this byte is the
483 addr
-= frv_instr_size
;
487 bpaddr
= addr
+ frv_instr_size
;
493 /* Return true if REG is a caller-saves ("scratch") register,
496 is_caller_saves_reg (int reg
)
498 return ((4 <= reg
&& reg
<= 7)
499 || (14 <= reg
&& reg
<= 15)
500 || (32 <= reg
&& reg
<= 47));
504 /* Return true if REG is a callee-saves register, false otherwise. */
506 is_callee_saves_reg (int reg
)
508 return ((16 <= reg
&& reg
<= 31)
509 || (48 <= reg
&& reg
<= 63));
513 /* Return true if REG is an argument register, false otherwise. */
515 is_argument_reg (int reg
)
517 return (8 <= reg
&& reg
<= 13);
520 /* Scan an FR-V prologue, starting at PC, until frame->PC.
521 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
522 We assume FRAME's saved_regs array has already been allocated and cleared.
523 Return the first PC value after the prologue.
525 Note that, for unoptimized code, we almost don't need this function
526 at all; all arguments and locals live on the stack, so we just need
527 the FP to find everything. The catch: structures passed by value
528 have their addresses living in registers; they're never spilled to
529 the stack. So if you ever want to be able to get to these
530 arguments in any frame but the top, you'll need to do this serious
531 prologue analysis. */
533 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
534 struct frv_unwind_cache
*info
)
536 /* When writing out instruction bitpatterns, we use the following
537 letters to label instruction fields:
538 P - The parallel bit. We don't use this.
539 J - The register number of GRj in the instruction description.
540 K - The register number of GRk in the instruction description.
541 I - The register number of GRi.
542 S - a signed imediate offset.
543 U - an unsigned immediate offset.
545 The dots below the numbers indicate where hex digit boundaries
546 fall, to make it easier to check the numbers. */
548 /* Non-zero iff we've seen the instruction that initializes the
549 frame pointer for this function's frame. */
552 /* If fp_set is non_zero, then this is the distance from
553 the stack pointer to frame pointer: fp = sp + fp_offset. */
556 /* Total size of frame prior to any alloca operations. */
559 /* Flag indicating if lr has been saved on the stack. */
560 int lr_saved_on_stack
= 0;
562 /* The number of the general-purpose register we saved the return
563 address ("link register") in, or -1 if we haven't moved it yet. */
564 int lr_save_reg
= -1;
566 /* Offset (from sp) at which lr has been saved on the stack. */
568 int lr_sp_offset
= 0;
570 /* If gr_saved[i] is non-zero, then we've noticed that general
571 register i has been saved at gr_sp_offset[i] from the stack
574 int gr_sp_offset
[64];
576 /* The address of the most recently scanned prologue instruction. */
577 CORE_ADDR last_prologue_pc
;
579 /* The address of the next instruction. */
582 /* The upper bound to of the pc values to scan. */
585 memset (gr_saved
, 0, sizeof (gr_saved
));
587 last_prologue_pc
= pc
;
589 /* Try to compute an upper limit (on how far to scan) based on the
591 lim_pc
= skip_prologue_using_sal (pc
);
592 /* If there's no line number info, lim_pc will be 0. In that case,
593 set the limit to be 100 instructions away from pc. Hopefully, this
594 will be far enough away to account for the entire prologue. Don't
595 worry about overshooting the end of the function. The scan loop
596 below contains some checks to avoid scanning unreasonably far. */
600 /* If we have a frame, we don't want to scan past the frame's pc. This
601 will catch those cases where the pc is in the prologue. */
604 CORE_ADDR frame_pc
= frame_pc_unwind (next_frame
);
605 if (frame_pc
< lim_pc
)
609 /* Scan the prologue. */
612 char buf
[frv_instr_size
];
615 if (target_read_memory (pc
, buf
, sizeof buf
) != 0)
617 op
= extract_signed_integer (buf
, sizeof buf
);
621 /* The tests in this chain of ifs should be in order of
622 decreasing selectivity, so that more particular patterns get
623 to fire before less particular patterns. */
625 /* Some sort of control transfer instruction: stop scanning prologue.
626 Integer Conditional Branch:
627 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
628 Floating-point / media Conditional Branch:
629 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
630 LCR Conditional Branch to LR
631 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
632 Integer conditional Branches to LR
633 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
634 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
635 Floating-point/Media Branches to LR
636 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
637 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
639 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
640 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
642 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
644 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
645 Integer Conditional Trap
646 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
647 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
648 Floating-point /media Conditional Trap
649 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
650 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
652 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
654 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
655 if ((op
& 0x01d80000) == 0x00180000 /* Conditional branches and Call */
656 || (op
& 0x01f80000) == 0x00300000 /* Jump and Link */
657 || (op
& 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
658 || (op
& 0x01f80000) == 0x00700000) /* Trap immediate */
660 /* Stop scanning; not in prologue any longer. */
664 /* Loading something from memory into fp probably means that
665 we're in the epilogue. Stop scanning the prologue.
667 X 000010 0000010 XXXXXX 000100 XXXXXX
669 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
670 else if ((op
& 0x7ffc0fc0) == 0x04080100
671 || (op
& 0x7ffc0000) == 0x04c80000)
676 /* Setting the FP from the SP:
678 P 000010 0100010 000001 000000000000 = 0x04881000
679 0 111111 1111111 111111 111111111111 = 0x7fffffff
681 We treat this as part of the prologue. */
682 else if ((op
& 0x7fffffff) == 0x04881000)
686 last_prologue_pc
= next_pc
;
689 /* Move the link register to the scratch register grJ, before saving:
691 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
692 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
694 We treat this as part of the prologue. */
695 else if ((op
& 0x7fffffc0) == 0x080d01c0)
697 int gr_j
= op
& 0x3f;
699 /* If we're moving it to a scratch register, that's fine. */
700 if (is_caller_saves_reg (gr_j
))
703 last_prologue_pc
= next_pc
;
707 /* To save multiple callee-saves registers on the stack, at
711 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
712 0 000000 1111111 111111 111111 111111 = 0x01ffffff
715 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
716 0 000000 1111111 111111 111111 111111 = 0x01ffffff
718 We treat this as part of the prologue, and record the register's
719 saved address in the frame structure. */
720 else if ((op
& 0x01ffffff) == 0x000c10c0
721 || (op
& 0x01ffffff) == 0x000c1100)
723 int gr_k
= ((op
>> 25) & 0x3f);
724 int ope
= ((op
>> 6) & 0x3f);
728 /* Is it an std or an stq? */
734 /* Is it really a callee-saves register? */
735 if (is_callee_saves_reg (gr_k
))
737 for (i
= 0; i
< count
; i
++)
739 gr_saved
[gr_k
+ i
] = 1;
740 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
742 last_prologue_pc
= next_pc
;
746 /* Adjusting the stack pointer. (The stack pointer is GR1.)
748 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
749 0 111111 1111111 111111 000000000000 = 0x7ffff000
751 We treat this as part of the prologue. */
752 else if ((op
& 0x7ffff000) == 0x02401000)
756 /* Sign-extend the twelve-bit field.
757 (Isn't there a better way to do this?) */
758 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
761 last_prologue_pc
= pc
;
765 /* If the prologue is being adjusted again, we've
766 likely gone too far; i.e. we're probably in the
772 /* Setting the FP to a constant distance from the SP:
774 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
775 0 111111 1111111 111111 000000000000 = 0x7ffff000
777 We treat this as part of the prologue. */
778 else if ((op
& 0x7ffff000) == 0x04401000)
780 /* Sign-extend the twelve-bit field.
781 (Isn't there a better way to do this?) */
782 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
785 last_prologue_pc
= pc
;
788 /* To spill an argument register to a scratch register:
790 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
791 0 000000 1111111 000000 111111111111 = 0x01fc0fff
793 For the time being, we treat this as a prologue instruction,
794 assuming that GRi is an argument register. This one's kind
795 of suspicious, because it seems like it could be part of a
796 legitimate body instruction. But we only come here when the
797 source info wasn't helpful, so we have to do the best we can.
798 Hopefully once GCC and GDB agree on how to emit line number
799 info for prologues, then this code will never come into play. */
800 else if ((op
& 0x01fc0fff) == 0x00880000)
802 int gr_i
= ((op
>> 12) & 0x3f);
804 /* Make sure that the source is an arg register; if it is, we'll
805 treat it as a prologue instruction. */
806 if (is_argument_reg (gr_i
))
807 last_prologue_pc
= next_pc
;
810 /* To spill 16-bit values to the stack:
812 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
813 0 000000 1111111 111111 000000000000 = 0x01fff000
815 And for 8-bit values, we use STB instructions.
817 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
818 0 000000 1111111 111111 000000000000 = 0x01fff000
820 We check that GRk is really an argument register, and treat
821 all such as part of the prologue. */
822 else if ( (op
& 0x01fff000) == 0x01442000
823 || (op
& 0x01fff000) == 0x01402000)
825 int gr_k
= ((op
>> 25) & 0x3f);
827 /* Make sure that GRk is really an argument register; treat
828 it as a prologue instruction if so. */
829 if (is_argument_reg (gr_k
))
830 last_prologue_pc
= next_pc
;
833 /* To save multiple callee-saves register on the stack, at a
837 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
838 0 000000 1111111 111111 000000000000 = 0x01fff000
841 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
842 0 000000 1111111 111111 000000000000 = 0x01fff000
844 We treat this as part of the prologue, and record the register's
845 saved address in the frame structure. */
846 else if ((op
& 0x01fff000) == 0x014c1000
847 || (op
& 0x01fff000) == 0x01501000)
849 int gr_k
= ((op
>> 25) & 0x3f);
853 /* Is it a stdi or a stqi? */
854 if ((op
& 0x01fff000) == 0x014c1000)
859 /* Is it really a callee-saves register? */
860 if (is_callee_saves_reg (gr_k
))
862 /* Sign-extend the twelve-bit field.
863 (Isn't there a better way to do this?) */
864 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
866 for (i
= 0; i
< count
; i
++)
868 gr_saved
[gr_k
+ i
] = 1;
869 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
871 last_prologue_pc
= next_pc
;
875 /* Storing any kind of integer register at any constant offset
876 from any other register.
879 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
880 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
883 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
884 0 000000 1111111 000000 000000000000 = 0x01fc0000
886 These could be almost anything, but a lot of prologue
887 instructions fall into this pattern, so let's decode the
888 instruction once, and then work at a higher level. */
889 else if (((op
& 0x01fc0fff) == 0x000c0080)
890 || ((op
& 0x01fc0000) == 0x01480000))
892 int gr_k
= ((op
>> 25) & 0x3f);
893 int gr_i
= ((op
>> 12) & 0x3f);
896 /* Are we storing with gr0 as an offset, or using an
898 if ((op
& 0x01fc0fff) == 0x000c0080)
901 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
903 /* If the address isn't relative to the SP or FP, it's not a
904 prologue instruction. */
905 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
907 /* Do nothing; not a prologue instruction. */
910 /* Saving the old FP in the new frame (relative to the SP). */
911 else if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
913 gr_saved
[fp_regnum
] = 1;
914 gr_sp_offset
[fp_regnum
] = offset
;
915 last_prologue_pc
= next_pc
;
918 /* Saving callee-saves register(s) on the stack, relative to
920 else if (gr_i
== sp_regnum
921 && is_callee_saves_reg (gr_k
))
924 if (gr_i
== sp_regnum
)
925 gr_sp_offset
[gr_k
] = offset
;
927 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
928 last_prologue_pc
= next_pc
;
931 /* Saving the scratch register holding the return address. */
932 else if (lr_save_reg
!= -1
933 && gr_k
== lr_save_reg
)
935 lr_saved_on_stack
= 1;
936 if (gr_i
== sp_regnum
)
937 lr_sp_offset
= offset
;
939 lr_sp_offset
= offset
+ fp_offset
;
940 last_prologue_pc
= next_pc
;
943 /* Spilling int-sized arguments to the stack. */
944 else if (is_argument_reg (gr_k
))
945 last_prologue_pc
= next_pc
;
950 if (next_frame
&& info
)
955 /* If we know the relationship between the stack and frame
956 pointers, record the addresses of the registers we noticed.
957 Note that we have to do this as a separate step at the end,
958 because instructions may save relative to the SP, but we need
959 their addresses relative to the FP. */
961 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
963 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
965 for (i
= 0; i
< 64; i
++)
967 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
969 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
970 info
->base
= this_base
;
972 /* If LR was saved on the stack, record its location. */
973 if (lr_saved_on_stack
)
974 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
976 /* The call instruction moves the caller's PC in the callee's LR.
977 Since this is an unwind, do the reverse. Copy the location of LR
978 into PC (the address / regnum) so that a request for PC will be
979 converted into a request for the LR. */
980 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
982 /* Save the previous frame's computed SP value. */
983 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
986 return last_prologue_pc
;
991 frv_skip_prologue (CORE_ADDR pc
)
993 CORE_ADDR func_addr
, func_end
, new_pc
;
997 /* If the line table has entry for a line *within* the function
998 (i.e., not in the prologue, and not past the end), then that's
1000 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
1002 struct symtab_and_line sal
;
1004 sal
= find_pc_line (func_addr
, 0);
1006 if (sal
.line
!= 0 && sal
.end
< func_end
)
1012 /* The FR-V prologue is at least five instructions long (twenty bytes).
1013 If we didn't find a real source location past that, then
1014 do a full analysis of the prologue. */
1015 if (new_pc
< pc
+ 20)
1016 new_pc
= frv_analyze_prologue (pc
, 0, 0);
1022 static struct frv_unwind_cache
*
1023 frv_frame_unwind_cache (struct frame_info
*next_frame
,
1024 void **this_prologue_cache
)
1026 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
1029 struct frv_unwind_cache
*info
;
1031 if ((*this_prologue_cache
))
1032 return (*this_prologue_cache
);
1034 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
1035 (*this_prologue_cache
) = info
;
1036 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
1038 /* Prologue analysis does the rest... */
1039 frv_analyze_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
1045 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1048 int len
= TYPE_LENGTH (type
);
1053 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
1054 store_unsigned_integer (valbuf
, len
, gpr8_val
);
1059 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
1060 store_unsigned_integer (valbuf
, 4, regval
);
1061 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
1062 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
1065 internal_error (__FILE__
, __LINE__
, "Illegal return value length: %d", len
);
1069 frv_extract_struct_value_address (struct regcache
*regcache
)
1072 regcache_cooked_read_unsigned (regcache
, struct_return_regnum
, &addr
);
1077 frv_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1079 write_register (struct_return_regnum
, addr
);
1083 frv_frameless_function_invocation (struct frame_info
*frame
)
1085 return legacy_frameless_look_for_prologue (frame
);
1089 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1091 /* Require dword alignment. */
1092 return align_down (sp
, 8);
1096 find_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR entry_point
)
1101 descr
= frv_fdpic_find_canonical_descriptor (entry_point
);
1106 /* Construct a non-canonical descriptor from space allocated on
1109 descr
= value_as_long (value_allocate_space_in_inferior (8));
1110 store_unsigned_integer (valbuf
, 4, entry_point
);
1111 write_memory (descr
, valbuf
, 4);
1112 store_unsigned_integer (valbuf
, 4,
1113 frv_fdpic_find_global_pointer (entry_point
));
1114 write_memory (descr
+ 4, valbuf
, 4);
1119 frv_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
1120 struct target_ops
*targ
)
1122 CORE_ADDR entry_point
;
1123 CORE_ADDR got_address
;
1125 entry_point
= get_target_memory_unsigned (targ
, addr
, 4);
1126 got_address
= get_target_memory_unsigned (targ
, addr
+ 4, 4);
1128 if (got_address
== frv_fdpic_find_global_pointer (entry_point
))
1135 frv_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1136 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1137 int nargs
, struct value
**args
, CORE_ADDR sp
,
1138 int struct_return
, CORE_ADDR struct_addr
)
1145 struct type
*arg_type
;
1147 enum type_code typecode
;
1151 enum frv_abi abi
= frv_abi (gdbarch
);
1154 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1155 nargs
, (int) sp
, struct_return
, struct_addr
);
1159 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1160 stack_space
+= align_up (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])), 4);
1162 stack_space
-= (6 * 4);
1163 if (stack_space
> 0)
1166 /* Make sure stack is dword aligned. */
1167 sp
= align_down (sp
, 8);
1174 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
1177 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1180 arg_type
= check_typedef (VALUE_TYPE (arg
));
1181 len
= TYPE_LENGTH (arg_type
);
1182 typecode
= TYPE_CODE (arg_type
);
1184 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
1186 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
1187 typecode
= TYPE_CODE_PTR
;
1191 else if (abi
== FRV_ABI_FDPIC
1193 && typecode
== TYPE_CODE_PTR
1194 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type
)) == TYPE_CODE_FUNC
)
1196 /* The FDPIC ABI requires function descriptors to be passed instead
1198 store_unsigned_integer
1200 find_func_descr (gdbarch
,
1201 extract_unsigned_integer (VALUE_CONTENTS (arg
),
1203 typecode
= TYPE_CODE_PTR
;
1209 val
= (char *) VALUE_CONTENTS (arg
);
1214 int partial_len
= (len
< 4 ? len
: 4);
1218 regval
= extract_unsigned_integer (val
, partial_len
);
1220 printf(" Argnum %d data %x -> reg %d\n",
1221 argnum
, (int) regval
, argreg
);
1223 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1229 printf(" Argnum %d data %x -> offset %d (%x)\n",
1230 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
1232 write_memory (sp
+ stack_offset
, val
, partial_len
);
1233 stack_offset
+= align_up (partial_len
, 4);
1240 /* Set the return address. For the frv, the return breakpoint is
1241 always at BP_ADDR. */
1242 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
1244 if (abi
== FRV_ABI_FDPIC
)
1246 /* Set the GOT register for the FDPIC ABI. */
1247 regcache_cooked_write_unsigned
1248 (regcache
, first_gpr_regnum
+ 15,
1249 frv_fdpic_find_global_pointer (func_addr
));
1252 /* Finally, update the SP register. */
1253 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
1259 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
1262 int len
= TYPE_LENGTH (type
);
1267 memset (val
, 0, sizeof (val
));
1268 memcpy (val
+ (4 - len
), valbuf
, len
);
1269 regcache_cooked_write (regcache
, 8, val
);
1273 regcache_cooked_write (regcache
, 8, valbuf
);
1274 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
1277 internal_error (__FILE__
, __LINE__
,
1278 "Don't know how to return a %d-byte value.", len
);
1282 /* Hardware watchpoint / breakpoint support for the FR500
1286 frv_check_watch_resources (int type
, int cnt
, int ot
)
1288 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
1290 /* Watchpoints not supported on simulator. */
1291 if (strcmp (target_shortname
, "sim") == 0)
1294 if (type
== bp_hardware_breakpoint
)
1296 if (var
->num_hw_breakpoints
== 0)
1298 else if (cnt
<= var
->num_hw_breakpoints
)
1303 if (var
->num_hw_watchpoints
== 0)
1307 else if (cnt
<= var
->num_hw_watchpoints
)
1315 frv_stopped_data_address (void)
1317 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1319 brr
= read_register (brr_regnum
);
1320 dbar0
= read_register (dbar0_regnum
);
1321 dbar1
= read_register (dbar1_regnum
);
1322 dbar2
= read_register (dbar2_regnum
);
1323 dbar3
= read_register (dbar3_regnum
);
1327 else if (brr
& (1<<10))
1329 else if (brr
& (1<<9))
1331 else if (brr
& (1<<8))
1338 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1340 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1343 /* Given a GDB frame, determine the address of the calling function's
1344 frame. This will be used to create a new GDB frame struct. */
1347 frv_frame_this_id (struct frame_info
*next_frame
,
1348 void **this_prologue_cache
, struct frame_id
*this_id
)
1350 struct frv_unwind_cache
*info
1351 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1354 struct minimal_symbol
*msym_stack
;
1357 /* The FUNC is easy. */
1358 func
= frame_func_unwind (next_frame
);
1360 /* Check if the stack is empty. */
1361 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1362 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1365 /* Hopefully the prologue analysis either correctly determined the
1366 frame's base (which is the SP from the previous frame), or set
1367 that base to "NULL". */
1368 base
= info
->prev_sp
;
1372 id
= frame_id_build (base
, func
);
1377 frv_frame_prev_register (struct frame_info
*next_frame
,
1378 void **this_prologue_cache
,
1379 int regnum
, int *optimizedp
,
1380 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1381 int *realnump
, void *bufferp
)
1383 struct frv_unwind_cache
*info
1384 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1385 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
1386 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1389 static const struct frame_unwind frv_frame_unwind
= {
1392 frv_frame_prev_register
1395 static const struct frame_unwind
*
1396 frv_frame_sniffer (struct frame_info
*next_frame
)
1398 return &frv_frame_unwind
;
1402 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1404 struct frv_unwind_cache
*info
1405 = frv_frame_unwind_cache (next_frame
, this_cache
);
1409 static const struct frame_base frv_frame_base
= {
1411 frv_frame_base_address
,
1412 frv_frame_base_address
,
1413 frv_frame_base_address
1417 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1419 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1423 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1424 dummy frame. The frame ID's base needs to match the TOS value
1425 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1428 static struct frame_id
1429 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1431 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1432 frame_pc_unwind (next_frame
));
1435 /* Signal trampolines. */
1437 static struct frv_unwind_cache
*
1438 frv_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1440 struct frv_unwind_cache
*cache
;
1441 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1445 CORE_ADDR sc_addr_cache_val
= 0;
1450 cache
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
1451 cache
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
1453 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1454 cache
->base
= extract_unsigned_integer (buf
, sizeof buf
);
1456 for (regno
= 0; regno
< frv_num_regs
; regno
++)
1458 cache
->saved_regs
[regno
].addr
1459 = tdep
->sigcontext_reg_addr (next_frame
, regno
, &sc_addr_cache_val
);
1463 if (cache
->saved_regs
[sp_regnum
].addr
!= -1
1464 && target_read_memory (cache
->saved_regs
[sp_regnum
].addr
,
1465 buf
, sizeof buf
) == 0)
1467 cache
->prev_sp
= extract_unsigned_integer (buf
, sizeof buf
);
1469 /* Now that we've bothered to read it out of memory, save the
1470 prev frame's SP value in the cache. */
1471 trad_frame_set_value (cache
->saved_regs
, sp_regnum
, cache
->prev_sp
);
1475 warning ("Can't read SP value from sigtramp frame");
1478 *this_cache
= cache
;
1483 frv_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1484 struct frame_id
*this_id
)
1486 struct frv_unwind_cache
*cache
=
1487 frv_sigtramp_frame_cache (next_frame
, this_cache
);
1489 (*this_id
) = frame_id_build (cache
->base
, frame_pc_unwind (next_frame
));
1493 frv_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1495 int regnum
, int *optimizedp
,
1496 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1497 int *realnump
, void *valuep
)
1499 /* Make sure we've initialized the cache. */
1500 frv_sigtramp_frame_cache (next_frame
, this_cache
);
1502 frv_frame_prev_register (next_frame
, this_cache
, regnum
,
1503 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1506 static const struct frame_unwind frv_sigtramp_frame_unwind
=
1509 frv_sigtramp_frame_this_id
,
1510 frv_sigtramp_frame_prev_register
1513 static const struct frame_unwind
*
1514 frv_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1516 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1519 /* We shouldn't even bother to try if the OSABI didn't register
1520 a sigcontext_reg_addr handler. */
1521 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_reg_addr
)
1524 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1525 if (DEPRECATED_PC_IN_SIGTRAMP (pc
, name
))
1526 return &frv_sigtramp_frame_unwind
;
1531 static struct gdbarch
*
1532 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1534 struct gdbarch
*gdbarch
;
1535 struct gdbarch_tdep
*var
;
1538 /* Check to see if we've already built an appropriate architecture
1539 object for this executable. */
1540 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1542 return arches
->gdbarch
;
1544 /* Select the right tdep structure for this variant. */
1545 var
= new_variant ();
1546 switch (info
.bfd_arch_info
->mach
)
1549 case bfd_mach_frvsimple
:
1550 case bfd_mach_fr500
:
1551 case bfd_mach_frvtomcat
:
1552 case bfd_mach_fr550
:
1553 set_variant_num_gprs (var
, 64);
1554 set_variant_num_fprs (var
, 64);
1557 case bfd_mach_fr400
:
1558 case bfd_mach_fr450
:
1559 set_variant_num_gprs (var
, 32);
1560 set_variant_num_fprs (var
, 32);
1564 /* Never heard of this variant. */
1568 /* Extract the ELF flags, if available. */
1569 if (info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1570 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1572 if (elf_flags
& EF_FRV_FDPIC
)
1573 set_variant_abi_fdpic (var
);
1575 if (elf_flags
& EF_FRV_CPU_FR450
)
1576 set_variant_scratch_registers (var
);
1578 gdbarch
= gdbarch_alloc (&info
, var
);
1580 set_gdbarch_short_bit (gdbarch
, 16);
1581 set_gdbarch_int_bit (gdbarch
, 32);
1582 set_gdbarch_long_bit (gdbarch
, 32);
1583 set_gdbarch_long_long_bit (gdbarch
, 64);
1584 set_gdbarch_float_bit (gdbarch
, 32);
1585 set_gdbarch_double_bit (gdbarch
, 64);
1586 set_gdbarch_long_double_bit (gdbarch
, 64);
1587 set_gdbarch_ptr_bit (gdbarch
, 32);
1589 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1590 set_gdbarch_num_pseudo_regs (gdbarch
, frv_num_pseudo_regs
);
1592 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1593 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1594 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1596 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1597 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1598 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1600 set_gdbarch_pseudo_register_read (gdbarch
, frv_pseudo_register_read
);
1601 set_gdbarch_pseudo_register_write (gdbarch
, frv_pseudo_register_write
);
1603 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1604 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1605 set_gdbarch_adjust_breakpoint_address (gdbarch
, frv_gdbarch_adjust_breakpoint_address
);
1607 set_gdbarch_deprecated_frameless_function_invocation (gdbarch
, frv_frameless_function_invocation
);
1609 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
1610 set_gdbarch_extract_return_value (gdbarch
, frv_extract_return_value
);
1612 set_gdbarch_deprecated_store_struct_return (gdbarch
, frv_store_struct_return
);
1613 set_gdbarch_store_return_value (gdbarch
, frv_store_return_value
);
1614 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, frv_extract_struct_value_address
);
1617 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1618 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1619 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1620 frame_base_set_default (gdbarch
, &frv_frame_base
);
1621 /* We set the sniffer lower down after the OSABI hooks have been
1624 /* Settings for calling functions in the inferior. */
1625 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1626 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1628 /* Settings that should be unnecessary. */
1629 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1631 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1633 set_gdbarch_remote_translate_xfer_address
1634 (gdbarch
, generic_remote_translate_xfer_address
);
1636 /* Hardware watchpoint / breakpoint support. */
1637 switch (info
.bfd_arch_info
->mach
)
1640 case bfd_mach_frvsimple
:
1641 case bfd_mach_fr500
:
1642 case bfd_mach_frvtomcat
:
1643 /* fr500-style hardware debugging support. */
1644 var
->num_hw_watchpoints
= 4;
1645 var
->num_hw_breakpoints
= 4;
1648 case bfd_mach_fr400
:
1649 case bfd_mach_fr450
:
1650 /* fr400-style hardware debugging support. */
1651 var
->num_hw_watchpoints
= 2;
1652 var
->num_hw_breakpoints
= 4;
1656 /* Otherwise, assume we don't have hardware debugging support. */
1657 var
->num_hw_watchpoints
= 0;
1658 var
->num_hw_breakpoints
= 0;
1662 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1663 if (frv_abi (gdbarch
) == FRV_ABI_FDPIC
)
1664 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
1665 frv_convert_from_func_ptr_addr
);
1667 /* Hook in ABI-specific overrides, if they have been registered. */
1668 gdbarch_init_osabi (info
, gdbarch
);
1670 /* Set the sigtramp frame sniffer. */
1671 frame_unwind_append_sniffer (gdbarch
, frv_sigtramp_frame_sniffer
);
1673 /* Set the fallback (prologue based) frame sniffer. */
1674 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1680 _initialize_frv_tdep (void)
1682 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);