testsuite: tcl exec& -> 'kill -9 $pid' is racy (attach-many-short-lived-thread.exp...
[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-arm-low.c
1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2015 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "linux-low.h"
21 #include "arch/arm.h"
22
23 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
24 On Bionic elf.h and linux/elf.h have conflicting definitions. */
25 #ifndef ELFMAG0
26 #include <elf.h>
27 #endif
28 #include "nat/gdb_ptrace.h"
29 #include <signal.h>
30
31 /* Defined in auto-generated files. */
32 void init_registers_arm (void);
33 extern const struct target_desc *tdesc_arm;
34
35 void init_registers_arm_with_iwmmxt (void);
36 extern const struct target_desc *tdesc_arm_with_iwmmxt;
37
38 void init_registers_arm_with_vfpv2 (void);
39 extern const struct target_desc *tdesc_arm_with_vfpv2;
40
41 void init_registers_arm_with_vfpv3 (void);
42 extern const struct target_desc *tdesc_arm_with_vfpv3;
43
44 void init_registers_arm_with_neon (void);
45 extern const struct target_desc *tdesc_arm_with_neon;
46
47 #ifndef PTRACE_GET_THREAD_AREA
48 #define PTRACE_GET_THREAD_AREA 22
49 #endif
50
51 #ifndef PTRACE_GETWMMXREGS
52 # define PTRACE_GETWMMXREGS 18
53 # define PTRACE_SETWMMXREGS 19
54 #endif
55
56 #ifndef PTRACE_GETVFPREGS
57 # define PTRACE_GETVFPREGS 27
58 # define PTRACE_SETVFPREGS 28
59 #endif
60
61 #ifndef PTRACE_GETHBPREGS
62 #define PTRACE_GETHBPREGS 29
63 #define PTRACE_SETHBPREGS 30
64 #endif
65
66 /* Information describing the hardware breakpoint capabilities. */
67 static struct
68 {
69 unsigned char arch;
70 unsigned char max_wp_length;
71 unsigned char wp_count;
72 unsigned char bp_count;
73 } arm_linux_hwbp_cap;
74
75 /* Enum describing the different types of ARM hardware break-/watch-points. */
76 typedef enum
77 {
78 arm_hwbp_break = 0,
79 arm_hwbp_load = 1,
80 arm_hwbp_store = 2,
81 arm_hwbp_access = 3
82 } arm_hwbp_type;
83
84 /* Type describing an ARM Hardware Breakpoint Control register value. */
85 typedef unsigned int arm_hwbp_control_t;
86
87 /* Structure used to keep track of hardware break-/watch-points. */
88 struct arm_linux_hw_breakpoint
89 {
90 /* Address to break on, or being watched. */
91 unsigned int address;
92 /* Control register for break-/watch- point. */
93 arm_hwbp_control_t control;
94 };
95
96 /* Since we cannot dynamically allocate subfields of arch_process_info,
97 assume a maximum number of supported break-/watchpoints. */
98 #define MAX_BPTS 32
99 #define MAX_WPTS 32
100
101 /* Per-process arch-specific data we want to keep. */
102 struct arch_process_info
103 {
104 /* Hardware breakpoints for this process. */
105 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
106 /* Hardware watchpoints for this process. */
107 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
108 };
109
110 /* Per-thread arch-specific data we want to keep. */
111 struct arch_lwp_info
112 {
113 /* Non-zero if our copy differs from what's recorded in the thread. */
114 char bpts_changed[MAX_BPTS];
115 char wpts_changed[MAX_WPTS];
116 /* Cached stopped data address. */
117 CORE_ADDR stopped_data_address;
118 };
119
120 /* These are in <asm/elf.h> in current kernels. */
121 #define HWCAP_VFP 64
122 #define HWCAP_IWMMXT 512
123 #define HWCAP_NEON 4096
124 #define HWCAP_VFPv3 8192
125 #define HWCAP_VFPv3D16 16384
126
127 #ifdef HAVE_SYS_REG_H
128 #include <sys/reg.h>
129 #endif
130
131 #define arm_num_regs 26
132
133 static int arm_regmap[] = {
134 0, 4, 8, 12, 16, 20, 24, 28,
135 32, 36, 40, 44, 48, 52, 56, 60,
136 -1, -1, -1, -1, -1, -1, -1, -1, -1,
137 64
138 };
139
140 static int
141 arm_cannot_store_register (int regno)
142 {
143 return (regno >= arm_num_regs);
144 }
145
146 static int
147 arm_cannot_fetch_register (int regno)
148 {
149 return (regno >= arm_num_regs);
150 }
151
152 static void
153 arm_fill_gregset (struct regcache *regcache, void *buf)
154 {
155 int i;
156 uint32_t *regs = buf;
157
158 for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
159 collect_register (regcache, i, &regs[i]);
160
161 collect_register (regcache, ARM_PS_REGNUM, &regs[16]);
162 }
163
164 static void
165 arm_store_gregset (struct regcache *regcache, const void *buf)
166 {
167 int i;
168 char zerobuf[8];
169 const uint32_t *regs = buf;
170
171 memset (zerobuf, 0, 8);
172 for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
173 supply_register (regcache, i, &regs[i]);
174
175 for (; i < ARM_PS_REGNUM; i++)
176 supply_register (regcache, i, zerobuf);
177
178 supply_register (regcache, ARM_PS_REGNUM, &regs[16]);
179 }
180
181 static void
182 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
183 {
184 int i;
185
186 if (regcache->tdesc != tdesc_arm_with_iwmmxt)
187 return;
188
189 for (i = 0; i < 16; i++)
190 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
191
192 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
193 for (i = 0; i < 6; i++)
194 collect_register (regcache, arm_num_regs + i + 16,
195 (char *) buf + 16 * 8 + i * 4);
196 }
197
198 static void
199 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
200 {
201 int i;
202
203 if (regcache->tdesc != tdesc_arm_with_iwmmxt)
204 return;
205
206 for (i = 0; i < 16; i++)
207 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
208
209 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
210 for (i = 0; i < 6; i++)
211 supply_register (regcache, arm_num_regs + i + 16,
212 (char *) buf + 16 * 8 + i * 4);
213 }
214
215 static void
216 arm_fill_vfpregset (struct regcache *regcache, void *buf)
217 {
218 int i, num, base;
219
220 if (regcache->tdesc == tdesc_arm_with_neon
221 || regcache->tdesc == tdesc_arm_with_vfpv3)
222 num = 32;
223 else if (regcache->tdesc == tdesc_arm_with_vfpv2)
224 num = 16;
225 else
226 return;
227
228 base = find_regno (regcache->tdesc, "d0");
229 for (i = 0; i < num; i++)
230 collect_register (regcache, base + i, (char *) buf + i * 8);
231
232 collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
233 }
234
235 static void
236 arm_store_vfpregset (struct regcache *regcache, const void *buf)
237 {
238 int i, num, base;
239
240 if (regcache->tdesc == tdesc_arm_with_neon
241 || regcache->tdesc == tdesc_arm_with_vfpv3)
242 num = 32;
243 else if (regcache->tdesc == tdesc_arm_with_vfpv2)
244 num = 16;
245 else
246 return;
247
248 base = find_regno (regcache->tdesc, "d0");
249 for (i = 0; i < num; i++)
250 supply_register (regcache, base + i, (char *) buf + i * 8);
251
252 supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
253 }
254
255 extern int debug_threads;
256
257 static CORE_ADDR
258 arm_get_pc (struct regcache *regcache)
259 {
260 unsigned long pc;
261 collect_register_by_name (regcache, "pc", &pc);
262 if (debug_threads)
263 debug_printf ("stop pc is %08lx\n", pc);
264 return pc;
265 }
266
267 static void
268 arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
269 {
270 unsigned long newpc = pc;
271 supply_register_by_name (regcache, "pc", &newpc);
272 }
273
274 /* Correct in either endianness. */
275 static const unsigned long arm_breakpoint = 0xef9f0001;
276 #define arm_breakpoint_len 4
277 static const unsigned short thumb_breakpoint = 0xde01;
278 static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
279
280 /* For new EABI binaries. We recognize it regardless of which ABI
281 is used for gdbserver, so single threaded debugging should work
282 OK, but for multi-threaded debugging we only insert the current
283 ABI's breakpoint instruction. For now at least. */
284 static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
285
286 static int
287 arm_breakpoint_at (CORE_ADDR where)
288 {
289 struct regcache *regcache = get_thread_regcache (current_thread, 1);
290 unsigned long cpsr;
291
292 collect_register_by_name (regcache, "cpsr", &cpsr);
293
294 if (cpsr & 0x20)
295 {
296 /* Thumb mode. */
297 unsigned short insn;
298
299 (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
300 if (insn == thumb_breakpoint)
301 return 1;
302
303 if (insn == thumb2_breakpoint[0])
304 {
305 (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
306 if (insn == thumb2_breakpoint[1])
307 return 1;
308 }
309 }
310 else
311 {
312 /* ARM mode. */
313 unsigned long insn;
314
315 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
316 if (insn == arm_breakpoint)
317 return 1;
318
319 if (insn == arm_eabi_breakpoint)
320 return 1;
321 }
322
323 return 0;
324 }
325
326 /* We only place breakpoints in empty marker functions, and thread locking
327 is outside of the function. So rather than importing software single-step,
328 we can just run until exit. */
329 static CORE_ADDR
330 arm_reinsert_addr (void)
331 {
332 struct regcache *regcache = get_thread_regcache (current_thread, 1);
333 unsigned long pc;
334 collect_register_by_name (regcache, "lr", &pc);
335 return pc;
336 }
337
338 /* Fetch the thread-local storage pointer for libthread_db. */
339
340 ps_err_e
341 ps_get_thread_area (const struct ps_prochandle *ph,
342 lwpid_t lwpid, int idx, void **base)
343 {
344 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
345 return PS_ERR;
346
347 /* IDX is the bias from the thread pointer to the beginning of the
348 thread descriptor. It has to be subtracted due to implementation
349 quirks in libthread_db. */
350 *base = (void *) ((char *)*base - idx);
351
352 return PS_OK;
353 }
354
355
356 /* Query Hardware Breakpoint information for the target we are attached to
357 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
358 static void
359 arm_linux_init_hwbp_cap (int pid)
360 {
361 unsigned int val;
362
363 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
364 return;
365
366 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
367 if (arm_linux_hwbp_cap.arch == 0)
368 return;
369
370 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
371 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
372 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
373
374 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
375 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
376 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
377 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
378 }
379
380 /* How many hardware breakpoints are available? */
381 static int
382 arm_linux_get_hw_breakpoint_count (void)
383 {
384 return arm_linux_hwbp_cap.bp_count;
385 }
386
387 /* How many hardware watchpoints are available? */
388 static int
389 arm_linux_get_hw_watchpoint_count (void)
390 {
391 return arm_linux_hwbp_cap.wp_count;
392 }
393
394 /* Maximum length of area watched by hardware watchpoint. */
395 static int
396 arm_linux_get_hw_watchpoint_max_length (void)
397 {
398 return arm_linux_hwbp_cap.max_wp_length;
399 }
400
401 /* Initialize an ARM hardware break-/watch-point control register value.
402 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
403 type of break-/watch-point; ENABLE indicates whether the point is enabled.
404 */
405 static arm_hwbp_control_t
406 arm_hwbp_control_initialize (unsigned byte_address_select,
407 arm_hwbp_type hwbp_type,
408 int enable)
409 {
410 gdb_assert ((byte_address_select & ~0xffU) == 0);
411 gdb_assert (hwbp_type != arm_hwbp_break
412 || ((byte_address_select & 0xfU) != 0));
413
414 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
415 }
416
417 /* Does the breakpoint control value CONTROL have the enable bit set? */
418 static int
419 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
420 {
421 return control & 0x1;
422 }
423
424 /* Is the breakpoint control value CONTROL initialized? */
425 static int
426 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
427 {
428 return control != 0;
429 }
430
431 /* Change a breakpoint control word so that it is in the disabled state. */
432 static arm_hwbp_control_t
433 arm_hwbp_control_disable (arm_hwbp_control_t control)
434 {
435 return control & ~0x1;
436 }
437
438 /* Are two break-/watch-points equal? */
439 static int
440 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
441 const struct arm_linux_hw_breakpoint *p2)
442 {
443 return p1->address == p2->address && p1->control == p2->control;
444 }
445
446 /* Convert a raw breakpoint type to an enum arm_hwbp_type. */
447
448 static int
449 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
450 {
451 switch (raw_type)
452 {
453 case raw_bkpt_type_hw:
454 return arm_hwbp_break;
455 case raw_bkpt_type_write_wp:
456 return arm_hwbp_store;
457 case raw_bkpt_type_read_wp:
458 return arm_hwbp_load;
459 case raw_bkpt_type_access_wp:
460 return arm_hwbp_access;
461 default:
462 gdb_assert_not_reached ("unhandled raw type");
463 }
464 }
465
466 /* Initialize the hardware breakpoint structure P for a breakpoint or
467 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
468 Returns -1 if TYPE is unsupported, or -2 if the particular combination
469 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
470 represents a breakpoint and 1 if type represents a watchpoint. */
471 static int
472 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
473 int len, struct arm_linux_hw_breakpoint *p)
474 {
475 arm_hwbp_type hwbp_type;
476 unsigned mask;
477
478 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
479
480 if (hwbp_type == arm_hwbp_break)
481 {
482 /* For breakpoints, the length field encodes the mode. */
483 switch (len)
484 {
485 case 2: /* 16-bit Thumb mode breakpoint */
486 case 3: /* 32-bit Thumb mode breakpoint */
487 mask = 0x3;
488 addr &= ~1;
489 break;
490 case 4: /* 32-bit ARM mode breakpoint */
491 mask = 0xf;
492 addr &= ~3;
493 break;
494 default:
495 /* Unsupported. */
496 return -2;
497 }
498 }
499 else
500 {
501 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
502 CORE_ADDR aligned_addr;
503
504 /* Can not set watchpoints for zero or negative lengths. */
505 if (len <= 0)
506 return -2;
507 /* The current ptrace interface can only handle watchpoints that are a
508 power of 2. */
509 if ((len & (len - 1)) != 0)
510 return -2;
511
512 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
513 range covered by a watchpoint. */
514 aligned_addr = addr & ~(max_wp_length - 1);
515 if (aligned_addr + max_wp_length < addr + len)
516 return -2;
517
518 mask = (1 << len) - 1;
519 }
520
521 p->address = (unsigned int) addr;
522 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
523
524 return hwbp_type != arm_hwbp_break;
525 }
526
527 /* Callback to mark a watch-/breakpoint to be updated in all threads of
528 the current process. */
529
530 struct update_registers_data
531 {
532 int watch;
533 int i;
534 };
535
536 static int
537 update_registers_callback (struct inferior_list_entry *entry, void *arg)
538 {
539 struct thread_info *thread = (struct thread_info *) entry;
540 struct lwp_info *lwp = get_thread_lwp (thread);
541 struct update_registers_data *data = (struct update_registers_data *) arg;
542
543 /* Only update the threads of the current process. */
544 if (pid_of (thread) == pid_of (current_thread))
545 {
546 /* The actual update is done later just before resuming the lwp,
547 we just mark that the registers need updating. */
548 if (data->watch)
549 lwp->arch_private->wpts_changed[data->i] = 1;
550 else
551 lwp->arch_private->bpts_changed[data->i] = 1;
552
553 /* If the lwp isn't stopped, force it to momentarily pause, so
554 we can update its breakpoint registers. */
555 if (!lwp->stopped)
556 linux_stop_lwp (lwp);
557 }
558
559 return 0;
560 }
561
562 static int
563 arm_supports_z_point_type (char z_type)
564 {
565 switch (z_type)
566 {
567 case Z_PACKET_HW_BP:
568 case Z_PACKET_WRITE_WP:
569 case Z_PACKET_READ_WP:
570 case Z_PACKET_ACCESS_WP:
571 return 1;
572 default:
573 /* Leave the handling of sw breakpoints with the gdb client. */
574 return 0;
575 }
576 }
577
578 /* Insert hardware break-/watchpoint. */
579 static int
580 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
581 int len, struct raw_breakpoint *bp)
582 {
583 struct process_info *proc = current_process ();
584 struct arm_linux_hw_breakpoint p, *pts;
585 int watch, i, count;
586
587 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
588 if (watch < 0)
589 {
590 /* Unsupported. */
591 return watch == -1 ? 1 : -1;
592 }
593
594 if (watch)
595 {
596 count = arm_linux_get_hw_watchpoint_count ();
597 pts = proc->priv->arch_private->wpts;
598 }
599 else
600 {
601 count = arm_linux_get_hw_breakpoint_count ();
602 pts = proc->priv->arch_private->bpts;
603 }
604
605 for (i = 0; i < count; i++)
606 if (!arm_hwbp_control_is_enabled (pts[i].control))
607 {
608 struct update_registers_data data = { watch, i };
609 pts[i] = p;
610 find_inferior (&all_threads, update_registers_callback, &data);
611 return 0;
612 }
613
614 /* We're out of watchpoints. */
615 return -1;
616 }
617
618 /* Remove hardware break-/watchpoint. */
619 static int
620 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
621 int len, struct raw_breakpoint *bp)
622 {
623 struct process_info *proc = current_process ();
624 struct arm_linux_hw_breakpoint p, *pts;
625 int watch, i, count;
626
627 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
628 if (watch < 0)
629 {
630 /* Unsupported. */
631 return -1;
632 }
633
634 if (watch)
635 {
636 count = arm_linux_get_hw_watchpoint_count ();
637 pts = proc->priv->arch_private->wpts;
638 }
639 else
640 {
641 count = arm_linux_get_hw_breakpoint_count ();
642 pts = proc->priv->arch_private->bpts;
643 }
644
645 for (i = 0; i < count; i++)
646 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
647 {
648 struct update_registers_data data = { watch, i };
649 pts[i].control = arm_hwbp_control_disable (pts[i].control);
650 find_inferior (&all_threads, update_registers_callback, &data);
651 return 0;
652 }
653
654 /* No watchpoint matched. */
655 return -1;
656 }
657
658 /* Return whether current thread is stopped due to a watchpoint. */
659 static int
660 arm_stopped_by_watchpoint (void)
661 {
662 struct lwp_info *lwp = get_thread_lwp (current_thread);
663 siginfo_t siginfo;
664
665 /* We must be able to set hardware watchpoints. */
666 if (arm_linux_get_hw_watchpoint_count () == 0)
667 return 0;
668
669 /* Retrieve siginfo. */
670 errno = 0;
671 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
672 if (errno != 0)
673 return 0;
674
675 /* This must be a hardware breakpoint. */
676 if (siginfo.si_signo != SIGTRAP
677 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
678 return 0;
679
680 /* If we are in a positive slot then we're looking at a breakpoint and not
681 a watchpoint. */
682 if (siginfo.si_errno >= 0)
683 return 0;
684
685 /* Cache stopped data address for use by arm_stopped_data_address. */
686 lwp->arch_private->stopped_data_address
687 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
688
689 return 1;
690 }
691
692 /* Return data address that triggered watchpoint. Called only if
693 arm_stopped_by_watchpoint returned true. */
694 static CORE_ADDR
695 arm_stopped_data_address (void)
696 {
697 struct lwp_info *lwp = get_thread_lwp (current_thread);
698 return lwp->arch_private->stopped_data_address;
699 }
700
701 /* Called when a new process is created. */
702 static struct arch_process_info *
703 arm_new_process (void)
704 {
705 struct arch_process_info *info = xcalloc (1, sizeof (*info));
706 return info;
707 }
708
709 /* Called when a new thread is detected. */
710 static void
711 arm_new_thread (struct lwp_info *lwp)
712 {
713 struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
714 int i;
715
716 for (i = 0; i < MAX_BPTS; i++)
717 info->bpts_changed[i] = 1;
718 for (i = 0; i < MAX_WPTS; i++)
719 info->wpts_changed[i] = 1;
720
721 lwp->arch_private = info;
722 }
723
724 static void
725 arm_new_fork (struct process_info *parent, struct process_info *child)
726 {
727 struct arch_process_info *parent_proc_info = parent->priv->arch_private;
728 struct arch_process_info *child_proc_info = child->priv->arch_private;
729 struct lwp_info *child_lwp;
730 struct arch_lwp_info *child_lwp_info;
731 int i;
732
733 /* These are allocated by linux_add_process. */
734 gdb_assert (parent->priv != NULL
735 && parent->priv->arch_private != NULL);
736 gdb_assert (child->priv != NULL
737 && child->priv->arch_private != NULL);
738
739 /* Linux kernel before 2.6.33 commit
740 72f674d203cd230426437cdcf7dd6f681dad8b0d
741 will inherit hardware debug registers from parent
742 on fork/vfork/clone. Newer Linux kernels create such tasks with
743 zeroed debug registers.
744
745 GDB core assumes the child inherits the watchpoints/hw
746 breakpoints of the parent, and will remove them all from the
747 forked off process. Copy the debug registers mirrors into the
748 new process so that all breakpoints and watchpoints can be
749 removed together. The debug registers mirror will become zeroed
750 in the end before detaching the forked off process, thus making
751 this compatible with older Linux kernels too. */
752
753 *child_proc_info = *parent_proc_info;
754
755 /* Mark all the hardware breakpoints and watchpoints as changed to
756 make sure that the registers will be updated. */
757 child_lwp = find_lwp_pid (ptid_of (child));
758 child_lwp_info = child_lwp->arch_private;
759 for (i = 0; i < MAX_BPTS; i++)
760 child_lwp_info->bpts_changed[i] = 1;
761 for (i = 0; i < MAX_WPTS; i++)
762 child_lwp_info->wpts_changed[i] = 1;
763 }
764
765 /* Called when resuming a thread.
766 If the debug regs have changed, update the thread's copies. */
767 static void
768 arm_prepare_to_resume (struct lwp_info *lwp)
769 {
770 struct thread_info *thread = get_lwp_thread (lwp);
771 int pid = lwpid_of (thread);
772 struct process_info *proc = find_process_pid (pid_of (thread));
773 struct arch_process_info *proc_info = proc->priv->arch_private;
774 struct arch_lwp_info *lwp_info = lwp->arch_private;
775 int i;
776
777 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
778 if (lwp_info->bpts_changed[i])
779 {
780 errno = 0;
781
782 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
783 if (ptrace (PTRACE_SETHBPREGS, pid,
784 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
785 &proc_info->bpts[i].address) < 0)
786 perror_with_name ("Unexpected error setting breakpoint address");
787
788 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
789 if (ptrace (PTRACE_SETHBPREGS, pid,
790 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
791 &proc_info->bpts[i].control) < 0)
792 perror_with_name ("Unexpected error setting breakpoint");
793
794 lwp_info->bpts_changed[i] = 0;
795 }
796
797 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
798 if (lwp_info->wpts_changed[i])
799 {
800 errno = 0;
801
802 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
803 if (ptrace (PTRACE_SETHBPREGS, pid,
804 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
805 &proc_info->wpts[i].address) < 0)
806 perror_with_name ("Unexpected error setting watchpoint address");
807
808 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
809 if (ptrace (PTRACE_SETHBPREGS, pid,
810 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
811 &proc_info->wpts[i].control) < 0)
812 perror_with_name ("Unexpected error setting watchpoint");
813
814 lwp_info->wpts_changed[i] = 0;
815 }
816 }
817
818
819 static int
820 arm_get_hwcap (unsigned long *valp)
821 {
822 unsigned char *data = alloca (8);
823 int offset = 0;
824
825 while ((*the_target->read_auxv) (offset, data, 8) == 8)
826 {
827 unsigned int *data_p = (unsigned int *)data;
828 if (data_p[0] == AT_HWCAP)
829 {
830 *valp = data_p[1];
831 return 1;
832 }
833
834 offset += 8;
835 }
836
837 *valp = 0;
838 return 0;
839 }
840
841 static const struct target_desc *
842 arm_read_description (void)
843 {
844 int pid = lwpid_of (current_thread);
845 unsigned long arm_hwcap = 0;
846
847 /* Query hardware watchpoint/breakpoint capabilities. */
848 arm_linux_init_hwbp_cap (pid);
849
850 if (arm_get_hwcap (&arm_hwcap) == 0)
851 return tdesc_arm;
852
853 if (arm_hwcap & HWCAP_IWMMXT)
854 return tdesc_arm_with_iwmmxt;
855
856 if (arm_hwcap & HWCAP_VFP)
857 {
858 const struct target_desc *result;
859 char *buf;
860
861 /* NEON implies either no VFP, or VFPv3-D32. We only support
862 it with VFP. */
863 if (arm_hwcap & HWCAP_NEON)
864 result = tdesc_arm_with_neon;
865 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
866 result = tdesc_arm_with_vfpv3;
867 else
868 result = tdesc_arm_with_vfpv2;
869
870 /* Now make sure that the kernel supports reading these
871 registers. Support was added in 2.6.30. */
872 errno = 0;
873 buf = xmalloc (32 * 8 + 4);
874 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
875 && errno == EIO)
876 result = tdesc_arm;
877
878 free (buf);
879
880 return result;
881 }
882
883 /* The default configuration uses legacy FPA registers, probably
884 simulated. */
885 return tdesc_arm;
886 }
887
888 static void
889 arm_arch_setup (void)
890 {
891 current_process ()->tdesc = arm_read_description ();
892 }
893
894 static struct regset_info arm_regsets[] = {
895 { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
896 GENERAL_REGS,
897 arm_fill_gregset, arm_store_gregset },
898 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
899 EXTENDED_REGS,
900 arm_fill_wmmxregset, arm_store_wmmxregset },
901 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
902 EXTENDED_REGS,
903 arm_fill_vfpregset, arm_store_vfpregset },
904 { 0, 0, 0, -1, -1, NULL, NULL }
905 };
906
907 static struct regsets_info arm_regsets_info =
908 {
909 arm_regsets, /* regsets */
910 0, /* num_regsets */
911 NULL, /* disabled_regsets */
912 };
913
914 static struct usrregs_info arm_usrregs_info =
915 {
916 arm_num_regs,
917 arm_regmap,
918 };
919
920 static struct regs_info regs_info =
921 {
922 NULL, /* regset_bitmap */
923 &arm_usrregs_info,
924 &arm_regsets_info
925 };
926
927 static const struct regs_info *
928 arm_regs_info (void)
929 {
930 return &regs_info;
931 }
932
933 struct linux_target_ops the_low_target = {
934 arm_arch_setup,
935 arm_regs_info,
936 arm_cannot_fetch_register,
937 arm_cannot_store_register,
938 NULL, /* fetch_register */
939 arm_get_pc,
940 arm_set_pc,
941
942 /* Define an ARM-mode breakpoint; we only set breakpoints in the C
943 library, which is most likely to be ARM. If the kernel supports
944 clone events, we will never insert a breakpoint, so even a Thumb
945 C library will work; so will mixing EABI/non-EABI gdbserver and
946 application. */
947 #ifndef __ARM_EABI__
948 (const unsigned char *) &arm_breakpoint,
949 #else
950 (const unsigned char *) &arm_eabi_breakpoint,
951 #endif
952 arm_breakpoint_len,
953 arm_reinsert_addr,
954 0,
955 arm_breakpoint_at,
956 arm_supports_z_point_type,
957 arm_insert_point,
958 arm_remove_point,
959 arm_stopped_by_watchpoint,
960 arm_stopped_data_address,
961 NULL, /* collect_ptrace_register */
962 NULL, /* supply_ptrace_register */
963 NULL, /* siginfo_fixup */
964 arm_new_process,
965 arm_new_thread,
966 arm_new_fork,
967 arm_prepare_to_resume,
968 };
969
970 void
971 initialize_low_arch (void)
972 {
973 /* Initialize the Linux target descriptions. */
974 init_registers_arm ();
975 init_registers_arm_with_iwmmxt ();
976 init_registers_arm_with_vfpv2 ();
977 init_registers_arm_with_vfpv3 ();
978 init_registers_arm_with_neon ();
979
980 initialize_regsets_info (&arm_regsets_info);
981 }
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