gdb/gdbserver/linux-arm-low.c

   1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2017 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21 #include "arch/arm.h"
  22 #include "arch/arm-linux.h"
  23 #include "arch/arm-get-next-pcs.h"
  24 #include "linux-aarch32-low.h"
  25
  26 #include <sys/uio.h>
  27 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  28    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  29 #ifndef ELFMAG0
  30 #include <elf.h>
  31 #endif
  32 #include "nat/gdb_ptrace.h"
  33 #include <signal.h>
  34 #include <sys/syscall.h>
  35
  36 /* Defined in auto-generated files.  */
  37 void init_registers_arm (void);
  38 extern const struct target_desc *tdesc_arm;
  39
  40 void init_registers_arm_with_iwmmxt (void);
  41 extern const struct target_desc *tdesc_arm_with_iwmmxt;
  42
  43 void init_registers_arm_with_vfpv2 (void);
  44 extern const struct target_desc *tdesc_arm_with_vfpv2;
  45
  46 void init_registers_arm_with_vfpv3 (void);
  47 extern const struct target_desc *tdesc_arm_with_vfpv3;
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 22
  51 #endif
  52
  53 #ifndef PTRACE_GETWMMXREGS
  54 # define PTRACE_GETWMMXREGS 18
  55 # define PTRACE_SETWMMXREGS 19
  56 #endif
  57
  58 #ifndef PTRACE_GETVFPREGS
  59 # define PTRACE_GETVFPREGS 27
  60 # define PTRACE_SETVFPREGS 28
  61 #endif
  62
  63 #ifndef PTRACE_GETHBPREGS
  64 #define PTRACE_GETHBPREGS 29
  65 #define PTRACE_SETHBPREGS 30
  66 #endif
  67
  68 /* Information describing the hardware breakpoint capabilities.  */
  69 static struct
  70 {
  71   unsigned char arch;
  72   unsigned char max_wp_length;
  73   unsigned char wp_count;
  74   unsigned char bp_count;
  75 } arm_linux_hwbp_cap;
  76
  77 /* Enum describing the different types of ARM hardware break-/watch-points.  */
  78 typedef enum
  79 {
  80   arm_hwbp_break = 0,
  81   arm_hwbp_load = 1,
  82   arm_hwbp_store = 2,
  83   arm_hwbp_access = 3
  84 } arm_hwbp_type;
  85
  86 /* Type describing an ARM Hardware Breakpoint Control register value.  */
  87 typedef unsigned int arm_hwbp_control_t;
  88
  89 /* Structure used to keep track of hardware break-/watch-points.  */
  90 struct arm_linux_hw_breakpoint
  91 {
  92   /* Address to break on, or being watched.  */
  93   unsigned int address;
  94   /* Control register for break-/watch- point.  */
  95   arm_hwbp_control_t control;
  96 };
  97
  98 /* Since we cannot dynamically allocate subfields of arch_process_info,
  99    assume a maximum number of supported break-/watchpoints.  */
 100 #define MAX_BPTS 32
 101 #define MAX_WPTS 32
 102
 103 /* Per-process arch-specific data we want to keep.  */
 104 struct arch_process_info
 105 {
 106   /* Hardware breakpoints for this process.  */
 107   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 108   /* Hardware watchpoints for this process.  */
 109   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 110 };
 111
 112 /* Per-thread arch-specific data we want to keep.  */
 113 struct arch_lwp_info
 114 {
 115   /* Non-zero if our copy differs from what's recorded in the thread.  */
 116   char bpts_changed[MAX_BPTS];
 117   char wpts_changed[MAX_WPTS];
 118   /* Cached stopped data address.  */
 119   CORE_ADDR stopped_data_address;
 120 };
 121
 122 /* These are in <asm/elf.h> in current kernels.  */
 123 #define HWCAP_VFP       64
 124 #define HWCAP_IWMMXT    512
 125 #define HWCAP_NEON      4096
 126 #define HWCAP_VFPv3     8192
 127 #define HWCAP_VFPv3D16  16384
 128
 129 #ifdef HAVE_SYS_REG_H
 130 #include <sys/reg.h>
 131 #endif
 132
 133 #define arm_num_regs 26
 134
 135 static int arm_regmap[] = {
 136   0, 4, 8, 12, 16, 20, 24, 28,
 137   32, 36, 40, 44, 48, 52, 56, 60,
 138   -1, -1, -1, -1, -1, -1, -1, -1, -1,
 139   64
 140 };
 141
 142 /* Forward declarations needed for get_next_pcs ops.  */
 143 static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 144                                                            int len,
 145                                                            int byte_order);
 146
 147 static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
 148                                                 CORE_ADDR val);
 149
 150 static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
 151
 152 static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
 153
 154 /* get_next_pcs operations.  */
 155 static struct arm_get_next_pcs_ops get_next_pcs_ops = {
 156   get_next_pcs_read_memory_unsigned_integer,
 157   get_next_pcs_syscall_next_pc,
 158   get_next_pcs_addr_bits_remove,
 159   get_next_pcs_is_thumb,
 160   arm_linux_get_next_pcs_fixup,
 161 };
 162
 163 static int
 164 arm_cannot_store_register (int regno)
 165 {
 166   return (regno >= arm_num_regs);
 167 }
 168
 169 static int
 170 arm_cannot_fetch_register (int regno)
 171 {
 172   return (regno >= arm_num_regs);
 173 }
 174
 175 static void
 176 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
 177 {
 178   int i;
 179
 180   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 181     return;
 182
 183   for (i = 0; i < 16; i++)
 184     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 185
 186   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 187   for (i = 0; i < 6; i++)
 188     collect_register (regcache, arm_num_regs + i + 16,
 189                       (char *) buf + 16 * 8 + i * 4);
 190 }
 191
 192 static void
 193 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
 194 {
 195   int i;
 196
 197   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 198     return;
 199
 200   for (i = 0; i < 16; i++)
 201     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 202
 203   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 204   for (i = 0; i < 6; i++)
 205     supply_register (regcache, arm_num_regs + i + 16,
 206                      (char *) buf + 16 * 8 + i * 4);
 207 }
 208
 209 static void
 210 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 211 {
 212   int num;
 213
 214   if (regcache->tdesc == tdesc_arm_with_neon
 215       || regcache->tdesc == tdesc_arm_with_vfpv3)
 216     num = 32;
 217   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 218     num = 16;
 219   else
 220     return;
 221
 222   arm_fill_vfpregset_num (regcache, buf, num);
 223 }
 224
 225 /* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs.  */
 226 static CORE_ADDR
 227 get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
 228 {
 229   return UNMAKE_THUMB_ADDR (val);
 230 }
 231
 232 static void
 233 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 234 {
 235   int num;
 236
 237   if (regcache->tdesc == tdesc_arm_with_neon
 238       || regcache->tdesc == tdesc_arm_with_vfpv3)
 239     num = 32;
 240   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 241     num = 16;
 242   else
 243     return;
 244
 245   arm_store_vfpregset_num (regcache, buf, num);
 246 }
 247
 248 /* Wrapper of arm_is_thumb_mode for get_next_pcs.  */
 249 static int
 250 get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
 251 {
 252   return arm_is_thumb_mode ();
 253 }
 254
 255 /* Read memory from the inferiror.
 256    BYTE_ORDER is ignored and there to keep compatiblity with GDB's
 257    read_memory_unsigned_integer. */
 258 static ULONGEST
 259 get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 260                                            int len,
 261                                            int byte_order)
 262 {
 263   ULONGEST res;
 264
 265   res = 0;
 266   target_read_memory (memaddr, (unsigned char *) &res, len);
 267
 268   return res;
 269 }
 270
 271 /* Fetch the thread-local storage pointer for libthread_db.  */
 272
 273 ps_err_e
 274 ps_get_thread_area (struct ps_prochandle *ph,
 275                     lwpid_t lwpid, int idx, void **base)
 276 {
 277   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 278     return PS_ERR;
 279
 280   /* IDX is the bias from the thread pointer to the beginning of the
 281      thread descriptor.  It has to be subtracted due to implementation
 282      quirks in libthread_db.  */
 283   *base = (void *) ((char *)*base - idx);
 284
 285   return PS_OK;
 286 }
 287
 288
 289 /* Query Hardware Breakpoint information for the target we are attached to
 290    (using PID as ptrace argument) and set up arm_linux_hwbp_cap.  */
 291 static void
 292 arm_linux_init_hwbp_cap (int pid)
 293 {
 294   unsigned int val;
 295
 296   if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
 297     return;
 298
 299   arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
 300   if (arm_linux_hwbp_cap.arch == 0)
 301     return;
 302
 303   arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
 304   arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
 305   arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
 306
 307   if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
 308     internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
 309   if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
 310     internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
 311 }
 312
 313 /* How many hardware breakpoints are available?  */
 314 static int
 315 arm_linux_get_hw_breakpoint_count (void)
 316 {
 317   return arm_linux_hwbp_cap.bp_count;
 318 }
 319
 320 /* How many hardware watchpoints are available?  */
 321 static int
 322 arm_linux_get_hw_watchpoint_count (void)
 323 {
 324   return arm_linux_hwbp_cap.wp_count;
 325 }
 326
 327 /* Maximum length of area watched by hardware watchpoint.  */
 328 static int
 329 arm_linux_get_hw_watchpoint_max_length (void)
 330 {
 331   return arm_linux_hwbp_cap.max_wp_length;
 332 }
 333
 334 /* Initialize an ARM hardware break-/watch-point control register value.
 335    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 336    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 337    */
 338 static arm_hwbp_control_t
 339 arm_hwbp_control_initialize (unsigned byte_address_select,
 340                              arm_hwbp_type hwbp_type,
 341                              int enable)
 342 {
 343   gdb_assert ((byte_address_select & ~0xffU) == 0);
 344   gdb_assert (hwbp_type != arm_hwbp_break
 345               || ((byte_address_select & 0xfU) != 0));
 346
 347   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 348 }
 349
 350 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 351 static int
 352 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 353 {
 354   return control & 0x1;
 355 }
 356
 357 /* Is the breakpoint control value CONTROL initialized?  */
 358 static int
 359 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
 360 {
 361   return control != 0;
 362 }
 363
 364 /* Change a breakpoint control word so that it is in the disabled state.  */
 365 static arm_hwbp_control_t
 366 arm_hwbp_control_disable (arm_hwbp_control_t control)
 367 {
 368   return control & ~0x1;
 369 }
 370
 371 /* Are two break-/watch-points equal?  */
 372 static int
 373 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 374                                const struct arm_linux_hw_breakpoint *p2)
 375 {
 376   return p1->address == p2->address && p1->control == p2->control;
 377 }
 378
 379 /* Convert a raw breakpoint type to an enum arm_hwbp_type.  */
 380
 381 static arm_hwbp_type
 382 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
 383 {
 384   switch (raw_type)
 385     {
 386     case raw_bkpt_type_hw:
 387       return arm_hwbp_break;
 388     case raw_bkpt_type_write_wp:
 389       return arm_hwbp_store;
 390     case raw_bkpt_type_read_wp:
 391       return arm_hwbp_load;
 392     case raw_bkpt_type_access_wp:
 393       return arm_hwbp_access;
 394     default:
 395       gdb_assert_not_reached ("unhandled raw type");
 396     }
 397 }
 398
 399 /* Initialize the hardware breakpoint structure P for a breakpoint or
 400    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
 401    Returns -1 if TYPE is unsupported, or -2 if the particular combination
 402    of ADDR and LEN cannot be implemented.  Otherwise, returns 0 if TYPE
 403    represents a breakpoint and 1 if type represents a watchpoint.  */
 404 static int
 405 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
 406                                int len, struct arm_linux_hw_breakpoint *p)
 407 {
 408   arm_hwbp_type hwbp_type;
 409   unsigned mask;
 410
 411   hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
 412
 413   if (hwbp_type == arm_hwbp_break)
 414     {
 415       /* For breakpoints, the length field encodes the mode.  */
 416       switch (len)
 417         {
 418         case 2:  /* 16-bit Thumb mode breakpoint */
 419         case 3:  /* 32-bit Thumb mode breakpoint */
 420           mask = 0x3;
 421           addr &= ~1;
 422           break;
 423         case 4:  /* 32-bit ARM mode breakpoint */
 424           mask = 0xf;
 425           addr &= ~3;
 426           break;
 427         default:
 428           /* Unsupported. */
 429           return -2;
 430         }
 431     }
 432   else
 433     {
 434       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
 435       CORE_ADDR aligned_addr;
 436
 437       /* Can not set watchpoints for zero or negative lengths.  */
 438       if (len <= 0)
 439         return -2;
 440       /* The current ptrace interface can only handle watchpoints that are a
 441          power of 2.  */
 442       if ((len & (len - 1)) != 0)
 443         return -2;
 444
 445       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
 446          range covered by a watchpoint.  */
 447       aligned_addr = addr & ~(max_wp_length - 1);
 448       if (aligned_addr + max_wp_length < addr + len)
 449         return -2;
 450
 451       mask = (1 << len) - 1;
 452     }
 453
 454   p->address = (unsigned int) addr;
 455   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
 456
 457   return hwbp_type != arm_hwbp_break;
 458 }
 459
 460 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 461    the current process.  */
 462
 463 struct update_registers_data
 464 {
 465   int watch;
 466   int i;
 467 };
 468
 469 static int
 470 update_registers_callback (struct inferior_list_entry *entry, void *arg)
 471 {
 472   struct thread_info *thread = (struct thread_info *) entry;
 473   struct lwp_info *lwp = get_thread_lwp (thread);
 474   struct update_registers_data *data = (struct update_registers_data *) arg;
 475
 476   /* Only update the threads of the current process.  */
 477   if (pid_of (thread) == pid_of (current_thread))
 478     {
 479       /* The actual update is done later just before resuming the lwp,
 480          we just mark that the registers need updating.  */
 481       if (data->watch)
 482         lwp->arch_private->wpts_changed[data->i] = 1;
 483       else
 484         lwp->arch_private->bpts_changed[data->i] = 1;
 485
 486       /* If the lwp isn't stopped, force it to momentarily pause, so
 487          we can update its breakpoint registers.  */
 488       if (!lwp->stopped)
 489         linux_stop_lwp (lwp);
 490     }
 491
 492   return 0;
 493 }
 494
 495 static int
 496 arm_supports_z_point_type (char z_type)
 497 {
 498   switch (z_type)
 499     {
 500     case Z_PACKET_SW_BP:
 501     case Z_PACKET_HW_BP:
 502     case Z_PACKET_WRITE_WP:
 503     case Z_PACKET_READ_WP:
 504     case Z_PACKET_ACCESS_WP:
 505       return 1;
 506     default:
 507       /* Leave the handling of sw breakpoints with the gdb client.  */
 508       return 0;
 509     }
 510 }
 511
 512 /* Insert hardware break-/watchpoint.  */
 513 static int
 514 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 515                   int len, struct raw_breakpoint *bp)
 516 {
 517   struct process_info *proc = current_process ();
 518   struct arm_linux_hw_breakpoint p, *pts;
 519   int watch, i, count;
 520
 521   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 522   if (watch < 0)
 523     {
 524       /* Unsupported.  */
 525       return watch == -1 ? 1 : -1;
 526     }
 527
 528   if (watch)
 529     {
 530       count = arm_linux_get_hw_watchpoint_count ();
 531       pts = proc->priv->arch_private->wpts;
 532     }
 533   else
 534     {
 535       count = arm_linux_get_hw_breakpoint_count ();
 536       pts = proc->priv->arch_private->bpts;
 537     }
 538
 539   for (i = 0; i < count; i++)
 540     if (!arm_hwbp_control_is_enabled (pts[i].control))
 541       {
 542         struct update_registers_data data = { watch, i };
 543         pts[i] = p;
 544         find_inferior (&all_threads, update_registers_callback, &data);
 545         return 0;
 546       }
 547
 548   /* We're out of watchpoints.  */
 549   return -1;
 550 }
 551
 552 /* Remove hardware break-/watchpoint.  */
 553 static int
 554 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 555                   int len, struct raw_breakpoint *bp)
 556 {
 557   struct process_info *proc = current_process ();
 558   struct arm_linux_hw_breakpoint p, *pts;
 559   int watch, i, count;
 560
 561   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 562   if (watch < 0)
 563     {
 564       /* Unsupported.  */
 565       return -1;
 566     }
 567
 568   if (watch)
 569     {
 570       count = arm_linux_get_hw_watchpoint_count ();
 571       pts = proc->priv->arch_private->wpts;
 572     }
 573   else
 574     {
 575       count = arm_linux_get_hw_breakpoint_count ();
 576       pts = proc->priv->arch_private->bpts;
 577     }
 578
 579   for (i = 0; i < count; i++)
 580     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
 581       {
 582         struct update_registers_data data = { watch, i };
 583         pts[i].control = arm_hwbp_control_disable (pts[i].control);
 584         find_inferior (&all_threads, update_registers_callback, &data);
 585         return 0;
 586       }
 587
 588   /* No watchpoint matched.  */
 589   return -1;
 590 }
 591
 592 /* Return whether current thread is stopped due to a watchpoint.  */
 593 static int
 594 arm_stopped_by_watchpoint (void)
 595 {
 596   struct lwp_info *lwp = get_thread_lwp (current_thread);
 597   siginfo_t siginfo;
 598
 599   /* We must be able to set hardware watchpoints.  */
 600   if (arm_linux_get_hw_watchpoint_count () == 0)
 601     return 0;
 602
 603   /* Retrieve siginfo.  */
 604   errno = 0;
 605   ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
 606   if (errno != 0)
 607     return 0;
 608
 609   /* This must be a hardware breakpoint.  */
 610   if (siginfo.si_signo != SIGTRAP
 611       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
 612     return 0;
 613
 614   /* If we are in a positive slot then we're looking at a breakpoint and not
 615      a watchpoint.  */
 616   if (siginfo.si_errno >= 0)
 617     return 0;
 618
 619   /* Cache stopped data address for use by arm_stopped_data_address.  */
 620   lwp->arch_private->stopped_data_address
 621     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
 622
 623   return 1;
 624 }
 625
 626 /* Return data address that triggered watchpoint.  Called only if
 627    arm_stopped_by_watchpoint returned true.  */
 628 static CORE_ADDR
 629 arm_stopped_data_address (void)
 630 {
 631   struct lwp_info *lwp = get_thread_lwp (current_thread);
 632   return lwp->arch_private->stopped_data_address;
 633 }
 634
 635 /* Called when a new process is created.  */
 636 static struct arch_process_info *
 637 arm_new_process (void)
 638 {
 639   struct arch_process_info *info = XCNEW (struct arch_process_info);
 640   return info;
 641 }
 642
 643 /* Called when a new thread is detected.  */
 644 static void
 645 arm_new_thread (struct lwp_info *lwp)
 646 {
 647   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 648   int i;
 649
 650   for (i = 0; i < MAX_BPTS; i++)
 651     info->bpts_changed[i] = 1;
 652   for (i = 0; i < MAX_WPTS; i++)
 653     info->wpts_changed[i] = 1;
 654
 655   lwp->arch_private = info;
 656 }
 657
 658 static void
 659 arm_new_fork (struct process_info *parent, struct process_info *child)
 660 {
 661   struct arch_process_info *parent_proc_info;
 662   struct arch_process_info *child_proc_info;
 663   struct lwp_info *child_lwp;
 664   struct arch_lwp_info *child_lwp_info;
 665   int i;
 666
 667   /* These are allocated by linux_add_process.  */
 668   gdb_assert (parent->priv != NULL
 669               && parent->priv->arch_private != NULL);
 670   gdb_assert (child->priv != NULL
 671               && child->priv->arch_private != NULL);
 672
 673   parent_proc_info = parent->priv->arch_private;
 674   child_proc_info = child->priv->arch_private;
 675
 676   /* Linux kernel before 2.6.33 commit
 677      72f674d203cd230426437cdcf7dd6f681dad8b0d
 678      will inherit hardware debug registers from parent
 679      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 680      zeroed debug registers.
 681
 682      GDB core assumes the child inherits the watchpoints/hw
 683      breakpoints of the parent, and will remove them all from the
 684      forked off process.  Copy the debug registers mirrors into the
 685      new process so that all breakpoints and watchpoints can be
 686      removed together.  The debug registers mirror will become zeroed
 687      in the end before detaching the forked off process, thus making
 688      this compatible with older Linux kernels too.  */
 689
 690   *child_proc_info = *parent_proc_info;
 691
 692   /* Mark all the hardware breakpoints and watchpoints as changed to
 693      make sure that the registers will be updated.  */
 694   child_lwp = find_lwp_pid (ptid_of (child));
 695   child_lwp_info = child_lwp->arch_private;
 696   for (i = 0; i < MAX_BPTS; i++)
 697     child_lwp_info->bpts_changed[i] = 1;
 698   for (i = 0; i < MAX_WPTS; i++)
 699     child_lwp_info->wpts_changed[i] = 1;
 700 }
 701
 702 /* Called when resuming a thread.
 703    If the debug regs have changed, update the thread's copies.  */
 704 static void
 705 arm_prepare_to_resume (struct lwp_info *lwp)
 706 {
 707   struct thread_info *thread = get_lwp_thread (lwp);
 708   int pid = lwpid_of (thread);
 709   struct process_info *proc = find_process_pid (pid_of (thread));
 710   struct arch_process_info *proc_info = proc->priv->arch_private;
 711   struct arch_lwp_info *lwp_info = lwp->arch_private;
 712   int i;
 713
 714   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
 715     if (lwp_info->bpts_changed[i])
 716       {
 717         errno = 0;
 718
 719         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
 720           if (ptrace (PTRACE_SETHBPREGS, pid,
 721                       (PTRACE_TYPE_ARG3) ((i << 1) + 1),
 722                       &proc_info->bpts[i].address) < 0)
 723             perror_with_name ("Unexpected error setting breakpoint address");
 724
 725         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
 726           if (ptrace (PTRACE_SETHBPREGS, pid,
 727                       (PTRACE_TYPE_ARG3) ((i << 1) + 2),
 728                       &proc_info->bpts[i].control) < 0)
 729             perror_with_name ("Unexpected error setting breakpoint");
 730
 731         lwp_info->bpts_changed[i] = 0;
 732       }
 733
 734   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
 735     if (lwp_info->wpts_changed[i])
 736       {
 737         errno = 0;
 738
 739         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
 740           if (ptrace (PTRACE_SETHBPREGS, pid,
 741                       (PTRACE_TYPE_ARG3) -((i << 1) + 1),
 742                       &proc_info->wpts[i].address) < 0)
 743             perror_with_name ("Unexpected error setting watchpoint address");
 744
 745         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
 746           if (ptrace (PTRACE_SETHBPREGS, pid,
 747                       (PTRACE_TYPE_ARG3) -((i << 1) + 2),
 748                       &proc_info->wpts[i].control) < 0)
 749             perror_with_name ("Unexpected error setting watchpoint");
 750
 751         lwp_info->wpts_changed[i] = 0;
 752       }
 753 }
 754
 755 /* Find the next pc for a sigreturn or rt_sigreturn syscall.  In
 756    addition, set IS_THUMB depending on whether we will return to ARM
 757    or Thumb code.
 758    See arm-linux.h for stack layout details.  */
 759 static CORE_ADDR
 760 arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
 761                        int *is_thumb)
 762 {
 763   unsigned long sp;
 764   unsigned long sp_data;
 765   /* Offset of PC register.  */
 766   int pc_offset = 0;
 767   CORE_ADDR next_pc = 0;
 768   uint32_t cpsr;
 769
 770   gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
 771
 772   collect_register_by_name (regcache, "sp", &sp);
 773   (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4);
 774
 775   pc_offset = arm_linux_sigreturn_next_pc_offset
 776     (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
 777
 778   (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);
 779
 780   /* Set IS_THUMB according the CPSR saved on the stack.  */
 781   (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
 782   *is_thumb = ((cpsr & CPSR_T) != 0);
 783
 784   return next_pc;
 785 }
 786
 787 /* When PC is at a syscall instruction, return the PC of the next
 788    instruction to be executed.  */
 789 static CORE_ADDR
 790 get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
 791 {
 792   CORE_ADDR next_pc = 0;
 793   CORE_ADDR pc = regcache_read_pc (self->regcache);
 794   int is_thumb = arm_is_thumb_mode ();
 795   ULONGEST svc_number = 0;
 796   struct regcache *regcache = self->regcache;
 797
 798   if (is_thumb)
 799     {
 800       collect_register (regcache, 7, &svc_number);
 801       next_pc = pc + 2;
 802     }
 803   else
 804     {
 805       unsigned long this_instr;
 806       unsigned long svc_operand;
 807
 808       target_read_memory (pc, (unsigned char *) &this_instr, 4);
 809       svc_operand = (0x00ffffff & this_instr);
 810
 811       if (svc_operand)  /* OABI.  */
 812         {
 813           svc_number = svc_operand - 0x900000;
 814         }
 815       else /* EABI.  */
 816         {
 817           collect_register (regcache, 7, &svc_number);
 818         }
 819
 820       next_pc = pc + 4;
 821     }
 822
 823   /* This is a sigreturn or sigreturn_rt syscall.  */
 824   if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
 825     {
 826       /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
 827          update IS_THUMB.   */
 828       next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
 829     }
 830
 831   /* Addresses for calling Thumb functions have the bit 0 set.  */
 832   if (is_thumb)
 833     next_pc = MAKE_THUMB_ADDR (next_pc);
 834
 835   return next_pc;
 836 }
 837
 838 static int
 839 arm_get_hwcap (unsigned long *valp)
 840 {
 841   unsigned char *data = (unsigned char *) alloca (8);
 842   int offset = 0;
 843
 844   while ((*the_target->read_auxv) (offset, data, 8) == 8)
 845     {
 846       unsigned int *data_p = (unsigned int *)data;
 847       if (data_p[0] == AT_HWCAP)
 848         {
 849           *valp = data_p[1];
 850           return 1;
 851         }
 852
 853       offset += 8;
 854     }
 855
 856   *valp = 0;
 857   return 0;
 858 }
 859
 860 static const struct target_desc *
 861 arm_read_description (void)
 862 {
 863   int pid = lwpid_of (current_thread);
 864   unsigned long arm_hwcap = 0;
 865
 866   /* Query hardware watchpoint/breakpoint capabilities.  */
 867   arm_linux_init_hwbp_cap (pid);
 868
 869   if (arm_get_hwcap (&arm_hwcap) == 0)
 870     return tdesc_arm;
 871
 872   if (arm_hwcap & HWCAP_IWMMXT)
 873     return tdesc_arm_with_iwmmxt;
 874
 875   if (arm_hwcap & HWCAP_VFP)
 876     {
 877       const struct target_desc *result;
 878       char *buf;
 879
 880       /* NEON implies either no VFP, or VFPv3-D32.  We only support
 881          it with VFP.  */
 882       if (arm_hwcap & HWCAP_NEON)
 883         result = tdesc_arm_with_neon;
 884       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 885         result = tdesc_arm_with_vfpv3;
 886       else
 887         result = tdesc_arm_with_vfpv2;
 888
 889       /* Now make sure that the kernel supports reading these
 890          registers.  Support was added in 2.6.30.  */
 891       errno = 0;
 892       buf = (char *) xmalloc (32 * 8 + 4);
 893       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 894           && errno == EIO)
 895         result = tdesc_arm;
 896
 897       free (buf);
 898
 899       return result;
 900     }
 901
 902   /* The default configuration uses legacy FPA registers, probably
 903      simulated.  */
 904   return tdesc_arm;
 905 }
 906
 907 static void
 908 arm_arch_setup (void)
 909 {
 910   int tid = lwpid_of (current_thread);
 911   int gpregs[18];
 912   struct iovec iov;
 913
 914   current_process ()->tdesc = arm_read_description ();
 915
 916   iov.iov_base = gpregs;
 917   iov.iov_len = sizeof (gpregs);
 918
 919   /* Check if PTRACE_GETREGSET works.  */
 920   if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
 921     have_ptrace_getregset = 1;
 922   else
 923     have_ptrace_getregset = 0;
 924 }
 925
 926 /* Fetch the next possible PCs after the current instruction executes.  */
 927
 928 static std::vector<CORE_ADDR>
 929 arm_gdbserver_get_next_pcs (struct regcache *regcache)
 930 {
 931   struct arm_get_next_pcs next_pcs_ctx;
 932
 933   arm_get_next_pcs_ctor (&next_pcs_ctx,
 934                          &get_next_pcs_ops,
 935                          /* Byte order is ignored assumed as host.  */
 936                          0,
 937                          0,
 938                          1,
 939                          regcache);
 940
 941   return arm_get_next_pcs (&next_pcs_ctx);
 942 }
 943
 944 /* Support for hardware single step.  */
 945
 946 static int
 947 arm_supports_hardware_single_step (void)
 948 {
 949   return 0;
 950 }
 951
 952 /* Implementation of linux_target_ops method "get_syscall_trapinfo".  */
 953
 954 static void
 955 arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
 956 {
 957   if (arm_is_thumb_mode ())
 958     collect_register_by_name (regcache, "r7", sysno);
 959   else
 960     {
 961       unsigned long pc;
 962       unsigned long insn;
 963
 964       collect_register_by_name (regcache, "pc", &pc);
 965
 966       if ((*the_target->read_memory) (pc - 4, (unsigned char *) &insn, 4))
 967         *sysno = UNKNOWN_SYSCALL;
 968       else
 969         {
 970           unsigned long svc_operand = (0x00ffffff & insn);
 971
 972           if (svc_operand)
 973             {
 974               /* OABI */
 975               *sysno = svc_operand - 0x900000;
 976             }
 977           else
 978             {
 979               /* EABI */
 980               collect_register_by_name (regcache, "r7", sysno);
 981             }
 982         }
 983     }
 984 }
 985
 986 /* Register sets without using PTRACE_GETREGSET.  */
 987
 988 static struct regset_info arm_regsets[] = {
 989   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
 990     GENERAL_REGS,
 991     arm_fill_gregset, arm_store_gregset },
 992   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
 993     EXTENDED_REGS,
 994     arm_fill_wmmxregset, arm_store_wmmxregset },
 995   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
 996     EXTENDED_REGS,
 997     arm_fill_vfpregset, arm_store_vfpregset },
 998   NULL_REGSET
 999 };
1000
1001 static struct regsets_info arm_regsets_info =
1002   {
1003     arm_regsets, /* regsets */
1004     0, /* num_regsets */
1005     NULL, /* disabled_regsets */
1006   };
1007
1008 static struct usrregs_info arm_usrregs_info =
1009   {
1010     arm_num_regs,
1011     arm_regmap,
1012   };
1013
1014 static struct regs_info regs_info_arm =
1015   {
1016     NULL, /* regset_bitmap */
1017     &arm_usrregs_info,
1018     &arm_regsets_info
1019   };
1020
1021 static const struct regs_info *
1022 arm_regs_info (void)
1023 {
1024   const struct target_desc *tdesc = current_process ()->tdesc;
1025
1026   if (have_ptrace_getregset == 1
1027       && (tdesc == tdesc_arm_with_neon || tdesc == tdesc_arm_with_vfpv3))
1028     return &regs_info_aarch32;
1029   else
1030     return &regs_info_arm;
1031 }
1032
1033 struct linux_target_ops the_low_target = {
1034   arm_arch_setup,
1035   arm_regs_info,
1036   arm_cannot_fetch_register,
1037   arm_cannot_store_register,
1038   NULL, /* fetch_register */
1039   linux_get_pc_32bit,
1040   linux_set_pc_32bit,
1041   arm_breakpoint_kind_from_pc,
1042   arm_sw_breakpoint_from_kind,
1043   arm_gdbserver_get_next_pcs,
1044   0,
1045   arm_breakpoint_at,
1046   arm_supports_z_point_type,
1047   arm_insert_point,
1048   arm_remove_point,
1049   arm_stopped_by_watchpoint,
1050   arm_stopped_data_address,
1051   NULL, /* collect_ptrace_register */
1052   NULL, /* supply_ptrace_register */
1053   NULL, /* siginfo_fixup */
1054   arm_new_process,
1055   arm_new_thread,
1056   arm_new_fork,
1057   arm_prepare_to_resume,
1058   NULL, /* process_qsupported */
1059   NULL, /* supports_tracepoints */
1060   NULL, /* get_thread_area */
1061   NULL, /* install_fast_tracepoint_jump_pad */
1062   NULL, /* emit_ops */
1063   NULL, /* get_min_fast_tracepoint_insn_len */
1064   NULL, /* supports_range_stepping */
1065   arm_breakpoint_kind_from_current_state,
1066   arm_supports_hardware_single_step,
1067   arm_get_syscall_trapinfo,
1068 };
1069
1070 void
1071 initialize_low_arch (void)
1072 {
1073   /* Initialize the Linux target descriptions.  */
1074   init_registers_arm ();
1075   init_registers_arm_with_iwmmxt ();
1076   init_registers_arm_with_vfpv2 ();
1077   init_registers_arm_with_vfpv3 ();
1078
1079   initialize_low_arch_aarch32 ();
1080
1081   initialize_regsets_info (&arm_regsets_info);
1082 }