1 /* GNU/Linux/CRIS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2015 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "linux-low.h"
21 #include "nat/gdb_ptrace.h"
23 /* Defined in auto-generated file reg-crisv32.c. */
24 void init_registers_crisv32 (void);
25 extern const struct target_desc
*tdesc_crisv32
;
28 #define cris_num_regs 49
30 #ifndef PTRACE_GET_THREAD_AREA
31 #define PTRACE_GET_THREAD_AREA 25
34 /* Note: Ignoring USP (having the stack pointer in two locations causes trouble
35 without any significant gain). */
37 /* Locations need to match <include/asm/arch/ptrace.h>. */
38 static int cris_regmap
[] = {
41 9*4, 10*4, 11*4, 12*4,
42 13*4, 14*4, 24*4, 15*4,
52 30*4, 31*4, 32*4, 33*4,
53 34*4, 35*4, 36*4, 37*4,
58 extern int debug_threads
;
61 cris_get_pc (struct regcache
*regcache
)
64 collect_register_by_name (regcache
, "pc", &pc
);
66 debug_printf ("stop pc is %08lx\n", pc
);
71 cris_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
73 unsigned long newpc
= pc
;
74 supply_register_by_name (regcache
, "pc", &newpc
);
77 static const unsigned short cris_breakpoint
= 0xe938;
78 #define cris_breakpoint_len 2
80 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
82 static const gdb_byte
*
83 cris_sw_breakpoint_from_kind (int kind
, int *size
)
85 *size
= cris_breakpoint_len
;
86 return (const gdb_byte
*) &cris_breakpoint
;
90 cris_breakpoint_at (CORE_ADDR where
)
94 (*the_target
->read_memory
) (where
, (unsigned char *) &insn
,
96 if (insn
== cris_breakpoint
)
99 /* If necessary, recognize more trap instructions here. GDB only uses the
104 /* We only place breakpoints in empty marker functions, and thread locking
105 is outside of the function. So rather than importing software single-step,
106 we can just run until exit. */
108 /* FIXME: This function should not be needed, since we have PTRACE_SINGLESTEP
109 for CRISv32. Without it, td_ta_event_getmsg in thread_db_create_event
110 will fail when debugging multi-threaded applications. */
113 cris_reinsert_addr (void)
115 struct regcache
*regcache
= get_thread_regcache (current_thread
, 1);
117 collect_register_by_name (regcache
, "srp", &pc
);
122 cris_write_data_breakpoint (struct regcache
*regcache
,
123 int bp
, unsigned long start
, unsigned long end
)
128 supply_register_by_name (regcache
, "s3", &start
);
129 supply_register_by_name (regcache
, "s4", &end
);
132 supply_register_by_name (regcache
, "s5", &start
);
133 supply_register_by_name (regcache
, "s6", &end
);
136 supply_register_by_name (regcache
, "s7", &start
);
137 supply_register_by_name (regcache
, "s8", &end
);
140 supply_register_by_name (regcache
, "s9", &start
);
141 supply_register_by_name (regcache
, "s10", &end
);
144 supply_register_by_name (regcache
, "s11", &start
);
145 supply_register_by_name (regcache
, "s12", &end
);
148 supply_register_by_name (regcache
, "s13", &start
);
149 supply_register_by_name (regcache
, "s14", &end
);
155 cris_supports_z_point_type (char z_type
)
159 case Z_PACKET_WRITE_WP
:
160 case Z_PACKET_READ_WP
:
161 case Z_PACKET_ACCESS_WP
:
169 cris_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
170 int len
, struct raw_breakpoint
*bp
)
173 unsigned long bp_ctrl
;
174 unsigned long start
, end
;
176 struct regcache
*regcache
;
178 regcache
= get_thread_regcache (current_thread
, 1);
180 /* Read watchpoints are set as access watchpoints, because of GDB's
181 inability to deal with pure read watchpoints. */
182 if (type
== raw_bkpt_type_read_wp
)
183 type
= raw_bkpt_type_access_wp
;
185 /* Get the configuration register. */
186 collect_register_by_name (regcache
, "s0", &bp_ctrl
);
188 /* The watchpoint allocation scheme is the simplest possible.
189 For example, if a region is watched for read and
190 a write watch is requested, a new watchpoint will
191 be used. Also, if a watch for a region that is already
192 covered by one or more existing watchpoints, a new
193 watchpoint will be used. */
195 /* First, find a free data watchpoint. */
196 for (bp
= 0; bp
< 6; bp
++)
198 /* Each data watchpoint's control registers occupy 2 bits
199 (hence the 3), starting at bit 2 for D0 (hence the 2)
200 with 4 bits between for each watchpoint (yes, the 4). */
201 if (!(bp_ctrl
& (0x3 << (2 + (bp
* 4)))))
207 /* We're out of watchpoints. */
211 /* Configure the control register first. */
212 if (type
== raw_bkpt_type_read_wp
|| type
== raw_bkpt_type_access_wp
)
214 /* Trigger on read. */
215 bp_ctrl
|= (1 << (2 + bp
* 4));
217 if (type
== raw_bkpt_type_write_wp
|| type
== raw_bkpt_type_access_wp
)
219 /* Trigger on write. */
220 bp_ctrl
|= (2 << (2 + bp
* 4));
223 /* Setup the configuration register. */
224 supply_register_by_name (regcache
, "s0", &bp_ctrl
);
226 /* Setup the range. */
228 end
= addr
+ len
- 1;
230 /* Configure the watchpoint register. */
231 cris_write_data_breakpoint (regcache
, bp
, start
, end
);
233 collect_register_by_name (regcache
, "ccs", &ccs
);
234 /* Set the S1 flag to enable watchpoints. */
236 supply_register_by_name (regcache
, "ccs", &ccs
);
242 cris_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
, int len
,
243 struct raw_breakpoint
*bp
)
246 unsigned long bp_ctrl
;
247 unsigned long start
, end
;
248 struct regcache
*regcache
;
249 unsigned long bp_d_regs
[12];
251 regcache
= get_thread_regcache (current_thread
, 1);
253 /* Read watchpoints are set as access watchpoints, because of GDB's
254 inability to deal with pure read watchpoints. */
255 if (type
== raw_bkpt_type_read_wp
)
256 type
= raw_bkpt_type_access_wp
;
258 /* Get the configuration register. */
259 collect_register_by_name (regcache
, "s0", &bp_ctrl
);
261 /* Try to find a watchpoint that is configured for the
262 specified range, then check that read/write also matches. */
264 /* Ugly pointer arithmetic, since I cannot rely on a
265 single switch (addr) as there may be several watchpoints with
266 the same start address for example. */
268 /* Get all range registers to simplify search. */
269 collect_register_by_name (regcache
, "s3", &bp_d_regs
[0]);
270 collect_register_by_name (regcache
, "s4", &bp_d_regs
[1]);
271 collect_register_by_name (regcache
, "s5", &bp_d_regs
[2]);
272 collect_register_by_name (regcache
, "s6", &bp_d_regs
[3]);
273 collect_register_by_name (regcache
, "s7", &bp_d_regs
[4]);
274 collect_register_by_name (regcache
, "s8", &bp_d_regs
[5]);
275 collect_register_by_name (regcache
, "s9", &bp_d_regs
[6]);
276 collect_register_by_name (regcache
, "s10", &bp_d_regs
[7]);
277 collect_register_by_name (regcache
, "s11", &bp_d_regs
[8]);
278 collect_register_by_name (regcache
, "s12", &bp_d_regs
[9]);
279 collect_register_by_name (regcache
, "s13", &bp_d_regs
[10]);
280 collect_register_by_name (regcache
, "s14", &bp_d_regs
[11]);
282 for (bp
= 0; bp
< 6; bp
++)
284 if (bp_d_regs
[bp
* 2] == addr
285 && bp_d_regs
[bp
* 2 + 1] == (addr
+ len
- 1)) {
286 /* Matching range. */
287 int bitpos
= 2 + bp
* 4;
290 /* Read/write bits for this BP. */
291 rw_bits
= (bp_ctrl
& (0x3 << bitpos
)) >> bitpos
;
293 if ((type
== raw_bkpt_type_read_wp
&& rw_bits
== 0x1)
294 || (type
== raw_bkpt_type_write_wp
&& rw_bits
== 0x2)
295 || (type
== raw_bkpt_type_access_wp
&& rw_bits
== 0x3))
297 /* Read/write matched. */
305 /* No watchpoint matched. */
309 /* Found a matching watchpoint. Now, deconfigure it by
310 both disabling read/write in bp_ctrl and zeroing its
311 start/end addresses. */
312 bp_ctrl
&= ~(3 << (2 + (bp
* 4)));
313 /* Setup the configuration register. */
314 supply_register_by_name (regcache
, "s0", &bp_ctrl
);
317 /* Configure the watchpoint register. */
318 cris_write_data_breakpoint (regcache
, bp
, start
, end
);
320 /* Note that we don't clear the S1 flag here. It's done when continuing. */
325 cris_stopped_by_watchpoint (void)
328 struct regcache
*regcache
= get_thread_regcache (current_thread
, 1);
330 collect_register_by_name (regcache
, "exs", &exs
);
332 return (((exs
& 0xff00) >> 8) == 0xc);
336 cris_stopped_data_address (void)
339 struct regcache
*regcache
= get_thread_regcache (current_thread
, 1);
341 collect_register_by_name (regcache
, "eda", &eda
);
343 /* FIXME: Possibly adjust to match watched range. */
348 ps_get_thread_area (const struct ps_prochandle
*ph
,
349 lwpid_t lwpid
, int idx
, void **base
)
351 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
354 /* IDX is the bias from the thread pointer to the beginning of the
355 thread descriptor. It has to be subtracted due to implementation
356 quirks in libthread_db. */
357 *base
= (void *) ((char *) *base
- idx
);
362 cris_fill_gregset (struct regcache
*regcache
, void *buf
)
366 for (i
= 0; i
< cris_num_regs
; i
++)
368 if (cris_regmap
[i
] != -1)
369 collect_register (regcache
, i
, ((char *) buf
) + cris_regmap
[i
]);
374 cris_store_gregset (struct regcache
*regcache
, const void *buf
)
378 for (i
= 0; i
< cris_num_regs
; i
++)
380 if (cris_regmap
[i
] != -1)
381 supply_register (regcache
, i
, ((char *) buf
) + cris_regmap
[i
]);
386 cris_arch_setup (void)
388 current_process ()->tdesc
= tdesc_crisv32
;
391 static struct regset_info cris_regsets
[] = {
392 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, cris_num_regs
* 4,
393 GENERAL_REGS
, cris_fill_gregset
, cris_store_gregset
},
398 static struct regsets_info cris_regsets_info
=
400 cris_regsets
, /* regsets */
402 NULL
, /* disabled_regsets */
405 static struct usrregs_info cris_usrregs_info
=
411 static struct regs_info regs_info
=
413 NULL
, /* regset_bitmap */
418 static const struct regs_info
*
419 cris_regs_info (void)
424 struct linux_target_ops the_low_target
= {
429 NULL
, /* fetch_register */
432 NULL
, /* breakpoint_kind_from_pc */
433 cris_sw_breakpoint_from_kind
,
437 cris_supports_z_point_type
,
440 cris_stopped_by_watchpoint
,
441 cris_stopped_data_address
,
445 initialize_low_arch (void)
447 init_registers_crisv32 ();
449 initialize_regsets_info (&cris_regsets_info
);