1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2018 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "linux-low.h"
22 #include "nat/gdb_ptrace.h"
25 #include "nat/mips-linux-watch.h"
26 #include "gdb_proc_service.h"
28 /* Defined in auto-generated file mips-linux.c. */
29 void init_registers_mips_linux (void);
30 extern const struct target_desc
*tdesc_mips_linux
;
32 /* Defined in auto-generated file mips-dsp-linux.c. */
33 void init_registers_mips_dsp_linux (void);
34 extern const struct target_desc
*tdesc_mips_dsp_linux
;
36 /* Defined in auto-generated file mips64-linux.c. */
37 void init_registers_mips64_linux (void);
38 extern const struct target_desc
*tdesc_mips64_linux
;
40 /* Defined in auto-generated file mips64-dsp-linux.c. */
41 void init_registers_mips64_dsp_linux (void);
42 extern const struct target_desc
*tdesc_mips64_dsp_linux
;
45 #define tdesc_mips_linux tdesc_mips64_linux
46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
49 #ifndef PTRACE_GET_THREAD_AREA
50 #define PTRACE_GET_THREAD_AREA 25
57 #define mips_num_regs 73
58 #define mips_dsp_num_regs 80
60 #include <asm/ptrace.h>
64 #define DSP_CONTROL 77
71 /* Deliberately signed, for proper sign extension. */
76 /* Return the ptrace ``address'' of register REGNO. */
78 #define mips_base_regs \
79 -1, 1, 2, 3, 4, 5, 6, 7, \
80 8, 9, 10, 11, 12, 13, 14, 15, \
81 16, 17, 18, 19, 20, 21, 22, 23, \
82 24, 25, 26, 27, 28, 29, 30, 31, \
84 -1, MMLO, MMHI, BADVADDR, CAUSE, PC, \
86 FPR_BASE, FPR_BASE + 1, FPR_BASE + 2, FPR_BASE + 3, \
87 FPR_BASE + 4, FPR_BASE + 5, FPR_BASE + 6, FPR_BASE + 7, \
88 FPR_BASE + 8, FPR_BASE + 9, FPR_BASE + 10, FPR_BASE + 11, \
89 FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15, \
90 FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19, \
91 FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23, \
92 FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27, \
93 FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31, \
96 #define mips_dsp_regs \
97 DSP_BASE, DSP_BASE + 1, DSP_BASE + 2, DSP_BASE + 3, \
98 DSP_BASE + 4, DSP_BASE + 5, \
101 static int mips_regmap
[mips_num_regs
] = {
106 static int mips_dsp_regmap
[mips_dsp_num_regs
] = {
112 /* DSP registers are not in any regset and can only be accessed
115 static unsigned char mips_dsp_regset_bitmap
[(mips_dsp_num_regs
+ 7) / 8] = {
116 0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
119 static int have_dsp
= -1;
121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
122 user register set accordingly. */
124 static const struct target_desc
*
125 mips_read_description (void)
129 int pid
= lwpid_of (current_thread
);
132 ptrace (PTRACE_PEEKUSER
, pid
, DSP_CONTROL
, 0);
142 perror_with_name ("ptrace");
147 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
151 mips_arch_setup (void)
153 current_process ()->tdesc
= mips_read_description ();
156 static struct usrregs_info
*
157 get_usrregs_info (void)
159 const struct regs_info
*regs_info
= the_low_target
.regs_info ();
161 return regs_info
->usrregs
;
164 /* Per-process arch-specific data we want to keep. */
166 struct arch_process_info
168 /* -1 if the kernel and/or CPU do not support watch registers.
169 1 if watch_readback is valid and we can read style, num_valid
171 0 if we need to read the watch_readback. */
173 int watch_readback_valid
;
175 /* Cached watch register read values. */
177 struct pt_watch_regs watch_readback
;
179 /* Current watchpoint requests for this process. */
181 struct mips_watchpoint
*current_watches
;
183 /* The current set of watch register values for writing the
186 struct pt_watch_regs watch_mirror
;
189 /* Per-thread arch-specific data we want to keep. */
193 /* Non-zero if our copy differs from what's recorded in the thread. */
194 int watch_registers_changed
;
197 /* From mips-linux-nat.c. */
199 /* Pseudo registers can not be read. ptrace does not provide a way to
200 read (or set) PS_REGNUM, and there's no point in reading or setting
201 ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR via
205 mips_cannot_fetch_register (int regno
)
207 const struct target_desc
*tdesc
;
209 if (get_usrregs_info ()->regmap
[regno
] == -1)
212 tdesc
= current_process ()->tdesc
;
214 if (find_regno (tdesc
, "r0") == regno
)
221 mips_cannot_store_register (int regno
)
223 const struct target_desc
*tdesc
;
225 if (get_usrregs_info ()->regmap
[regno
] == -1)
228 tdesc
= current_process ()->tdesc
;
230 if (find_regno (tdesc
, "r0") == regno
)
233 if (find_regno (tdesc
, "cause") == regno
)
236 if (find_regno (tdesc
, "badvaddr") == regno
)
239 if (find_regno (tdesc
, "fir") == regno
)
246 mips_get_pc (struct regcache
*regcache
)
248 union mips_register pc
;
249 collect_register_by_name (regcache
, "pc", pc
.buf
);
250 return register_size (regcache
->tdesc
, 0) == 4 ? pc
.reg32
: pc
.reg64
;
254 mips_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
256 union mips_register newpc
;
257 if (register_size (regcache
->tdesc
, 0) == 4)
262 supply_register_by_name (regcache
, "pc", newpc
.buf
);
265 /* Correct in either endianness. */
266 static const unsigned int mips_breakpoint
= 0x0005000d;
267 #define mips_breakpoint_len 4
269 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
271 static const gdb_byte
*
272 mips_sw_breakpoint_from_kind (int kind
, int *size
)
274 *size
= mips_breakpoint_len
;
275 return (const gdb_byte
*) &mips_breakpoint
;
279 mips_breakpoint_at (CORE_ADDR where
)
283 (*the_target
->read_memory
) (where
, (unsigned char *) &insn
, 4);
284 if (insn
== mips_breakpoint
)
287 /* If necessary, recognize more trap instructions here. GDB only uses the
292 /* Mark the watch registers of lwp, represented by ENTRY, as changed. */
295 update_watch_registers_callback (thread_info
*thread
)
297 struct lwp_info
*lwp
= get_thread_lwp (thread
);
299 /* The actual update is done later just before resuming the lwp,
300 we just mark that the registers need updating. */
301 lwp
->arch_private
->watch_registers_changed
= 1;
303 /* If the lwp isn't stopped, force it to momentarily pause, so
304 we can update its watch registers. */
306 linux_stop_lwp (lwp
);
309 /* This is the implementation of linux_target_ops method
312 static struct arch_process_info
*
313 mips_linux_new_process (void)
315 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
320 /* This is the implementation of linux_target_ops method
324 mips_linux_delete_process (struct arch_process_info
*info
)
329 /* This is the implementation of linux_target_ops method new_thread.
330 Mark the watch registers as changed, so the threads' copies will
334 mips_linux_new_thread (struct lwp_info
*lwp
)
336 struct arch_lwp_info
*info
= XCNEW (struct arch_lwp_info
);
338 info
->watch_registers_changed
= 1;
340 lwp
->arch_private
= info
;
343 /* Function to call when a thread is being deleted. */
346 mips_linux_delete_thread (struct arch_lwp_info
*arch_lwp
)
351 /* Create a new mips_watchpoint and add it to the list. */
354 mips_add_watchpoint (struct arch_process_info
*priv
, CORE_ADDR addr
, int len
,
355 enum target_hw_bp_type watch_type
)
357 struct mips_watchpoint
*new_watch
;
358 struct mips_watchpoint
**pw
;
360 new_watch
= XNEW (struct mips_watchpoint
);
361 new_watch
->addr
= addr
;
362 new_watch
->len
= len
;
363 new_watch
->type
= watch_type
;
364 new_watch
->next
= NULL
;
366 pw
= &priv
->current_watches
;
372 /* Hook to call when a new fork is attached. */
375 mips_linux_new_fork (struct process_info
*parent
,
376 struct process_info
*child
)
378 struct arch_process_info
*parent_private
;
379 struct arch_process_info
*child_private
;
380 struct mips_watchpoint
*wp
;
382 /* These are allocated by linux_add_process. */
383 gdb_assert (parent
->priv
!= NULL
384 && parent
->priv
->arch_private
!= NULL
);
385 gdb_assert (child
->priv
!= NULL
386 && child
->priv
->arch_private
!= NULL
);
388 /* Linux kernel before 2.6.33 commit
389 72f674d203cd230426437cdcf7dd6f681dad8b0d
390 will inherit hardware debug registers from parent
391 on fork/vfork/clone. Newer Linux kernels create such tasks with
392 zeroed debug registers.
394 GDB core assumes the child inherits the watchpoints/hw
395 breakpoints of the parent, and will remove them all from the
396 forked off process. Copy the debug registers mirrors into the
397 new process so that all breakpoints and watchpoints can be
398 removed together. The debug registers mirror will become zeroed
399 in the end before detaching the forked off process, thus making
400 this compatible with older Linux kernels too. */
402 parent_private
= parent
->priv
->arch_private
;
403 child_private
= child
->priv
->arch_private
;
405 child_private
->watch_readback_valid
= parent_private
->watch_readback_valid
;
406 child_private
->watch_readback
= parent_private
->watch_readback
;
408 for (wp
= parent_private
->current_watches
; wp
!= NULL
; wp
= wp
->next
)
409 mips_add_watchpoint (child_private
, wp
->addr
, wp
->len
, wp
->type
);
411 child_private
->watch_mirror
= parent_private
->watch_mirror
;
413 /* This is the implementation of linux_target_ops method
414 prepare_to_resume. If the watch regs have changed, update the
418 mips_linux_prepare_to_resume (struct lwp_info
*lwp
)
420 ptid_t ptid
= ptid_of (get_lwp_thread (lwp
));
421 struct process_info
*proc
= find_process_pid (ptid_get_pid (ptid
));
422 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
424 if (lwp
->arch_private
->watch_registers_changed
)
426 /* Only update the watch registers if we have set or unset a
427 watchpoint already. */
428 if (mips_linux_watch_get_num_valid (&priv
->watch_mirror
) > 0)
430 /* Write the mirrored watch register values. */
431 int tid
= ptid_get_lwp (ptid
);
433 if (-1 == ptrace (PTRACE_SET_WATCH_REGS
, tid
,
434 &priv
->watch_mirror
, NULL
))
435 perror_with_name ("Couldn't write watch register");
438 lwp
->arch_private
->watch_registers_changed
= 0;
443 mips_supports_z_point_type (char z_type
)
447 case Z_PACKET_WRITE_WP
:
448 case Z_PACKET_READ_WP
:
449 case Z_PACKET_ACCESS_WP
:
456 /* This is the implementation of linux_target_ops method
460 mips_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
461 int len
, struct raw_breakpoint
*bp
)
463 struct process_info
*proc
= current_process ();
464 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
465 struct pt_watch_regs regs
;
467 enum target_hw_bp_type watch_type
;
470 lwpid
= lwpid_of (current_thread
);
471 if (!mips_linux_read_watch_registers (lwpid
,
472 &priv
->watch_readback
,
473 &priv
->watch_readback_valid
,
480 regs
= priv
->watch_readback
;
481 /* Add the current watches. */
482 mips_linux_watch_populate_regs (priv
->current_watches
, ®s
);
484 /* Now try to add the new watch. */
485 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
486 irw
= mips_linux_watch_type_to_irw (watch_type
);
487 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
, irw
))
490 /* It fit. Stick it on the end of the list. */
491 mips_add_watchpoint (priv
, addr
, len
, watch_type
);
493 priv
->watch_mirror
= regs
;
495 /* Only update the threads of this process. */
496 for_each_thread (proc
->pid
, update_watch_registers_callback
);
501 /* This is the implementation of linux_target_ops method
505 mips_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
506 int len
, struct raw_breakpoint
*bp
)
508 struct process_info
*proc
= current_process ();
509 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
512 enum target_hw_bp_type watch_type
;
514 struct mips_watchpoint
**pw
;
515 struct mips_watchpoint
*w
;
517 /* Search for a known watch that matches. Then unlink and free it. */
518 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
520 pw
= &priv
->current_watches
;
523 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== watch_type
)
534 return -1; /* We don't know about it, fail doing nothing. */
536 /* At this point watch_readback is known to be valid because we
537 could not have added the watch without reading it. */
538 gdb_assert (priv
->watch_readback_valid
== 1);
540 priv
->watch_mirror
= priv
->watch_readback
;
541 mips_linux_watch_populate_regs (priv
->current_watches
,
542 &priv
->watch_mirror
);
544 /* Only update the threads of this process. */
545 for_each_thread (proc
->pid
, update_watch_registers_callback
);
550 /* This is the implementation of linux_target_ops method
551 stopped_by_watchpoint. The watchhi R and W bits indicate
552 the watch register triggered. */
555 mips_stopped_by_watchpoint (void)
557 struct process_info
*proc
= current_process ();
558 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
561 long lwpid
= lwpid_of (current_thread
);
563 if (!mips_linux_read_watch_registers (lwpid
,
564 &priv
->watch_readback
,
565 &priv
->watch_readback_valid
,
569 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
571 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
572 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
579 /* This is the implementation of linux_target_ops method
580 stopped_data_address. */
583 mips_stopped_data_address (void)
585 struct process_info
*proc
= current_process ();
586 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
589 long lwpid
= lwpid_of (current_thread
);
591 /* On MIPS we don't know the low order 3 bits of the data address.
592 GDB does not support remote targets that can't report the
593 watchpoint address. So, make our best guess; return the starting
594 address of a watchpoint request which overlaps the one that
597 if (!mips_linux_read_watch_registers (lwpid
,
598 &priv
->watch_readback
,
599 &priv
->watch_readback_valid
,
603 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
605 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
606 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
609 CORE_ADDR t_low
, t_hi
;
611 struct mips_watchpoint
*watch
;
613 t_low
= mips_linux_watch_get_watchlo (&priv
->watch_readback
, n
);
614 t_irw
= t_low
& IRW_MASK
;
615 t_hi
= (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
617 t_low
&= ~(CORE_ADDR
)t_hi
;
619 for (watch
= priv
->current_watches
;
623 CORE_ADDR addr
= watch
->addr
;
624 CORE_ADDR last_byte
= addr
+ watch
->len
- 1;
626 if ((t_irw
& mips_linux_watch_type_to_irw (watch
->type
)) == 0)
628 /* Different type. */
631 /* Check for overlap of even a single byte. */
632 if (last_byte
>= t_low
&& addr
<= t_low
+ t_hi
)
637 /* Shouldn't happen. */
641 /* Fetch the thread-local storage pointer for libthread_db. */
644 ps_get_thread_area (struct ps_prochandle
*ph
,
645 lwpid_t lwpid
, int idx
, void **base
)
647 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
650 /* IDX is the bias from the thread pointer to the beginning of the
651 thread descriptor. It has to be subtracted due to implementation
652 quirks in libthread_db. */
653 *base
= (void *) ((char *)*base
- idx
);
658 #ifdef HAVE_PTRACE_GETREGS
661 mips_collect_register (struct regcache
*regcache
,
662 int use_64bit
, int regno
, union mips_register
*reg
)
664 union mips_register tmp_reg
;
668 collect_register (regcache
, regno
, &tmp_reg
.reg64
);
673 collect_register (regcache
, regno
, &tmp_reg
.reg32
);
674 reg
->reg64
= tmp_reg
.reg32
;
679 mips_supply_register (struct regcache
*regcache
,
680 int use_64bit
, int regno
, const union mips_register
*reg
)
684 /* For big-endian 32-bit targets, ignore the high four bytes of each
686 if (__BYTE_ORDER
== __BIG_ENDIAN
&& !use_64bit
)
689 supply_register (regcache
, regno
, reg
->buf
+ offset
);
693 mips_collect_register_32bit (struct regcache
*regcache
,
694 int use_64bit
, int regno
, unsigned char *buf
)
696 union mips_register tmp_reg
;
699 mips_collect_register (regcache
, use_64bit
, regno
, &tmp_reg
);
700 reg32
= tmp_reg
.reg64
;
701 memcpy (buf
, ®32
, 4);
705 mips_supply_register_32bit (struct regcache
*regcache
,
706 int use_64bit
, int regno
, const unsigned char *buf
)
708 union mips_register tmp_reg
;
711 memcpy (®32
, buf
, 4);
712 tmp_reg
.reg64
= reg32
;
713 mips_supply_register (regcache
, use_64bit
, regno
, &tmp_reg
);
717 mips_fill_gregset (struct regcache
*regcache
, void *buf
)
719 union mips_register
*regset
= (union mips_register
*) buf
;
721 const struct target_desc
*tdesc
= regcache
->tdesc
;
723 use_64bit
= (register_size (tdesc
, 0) == 8);
725 for (i
= 1; i
< 32; i
++)
726 mips_collect_register (regcache
, use_64bit
, i
, regset
+ i
);
728 mips_collect_register (regcache
, use_64bit
,
729 find_regno (tdesc
, "lo"), regset
+ 32);
730 mips_collect_register (regcache
, use_64bit
,
731 find_regno (tdesc
, "hi"), regset
+ 33);
732 mips_collect_register (regcache
, use_64bit
,
733 find_regno (tdesc
, "pc"), regset
+ 34);
734 mips_collect_register (regcache
, use_64bit
,
735 find_regno (tdesc
, "badvaddr"), regset
+ 35);
736 mips_collect_register (regcache
, use_64bit
,
737 find_regno (tdesc
, "status"), regset
+ 36);
738 mips_collect_register (regcache
, use_64bit
,
739 find_regno (tdesc
, "cause"), regset
+ 37);
741 mips_collect_register (regcache
, use_64bit
,
742 find_regno (tdesc
, "restart"), regset
+ 0);
746 mips_store_gregset (struct regcache
*regcache
, const void *buf
)
748 const union mips_register
*regset
= (const union mips_register
*) buf
;
751 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
753 for (i
= 0; i
< 32; i
++)
754 mips_supply_register (regcache
, use_64bit
, i
, regset
+ i
);
756 mips_supply_register (regcache
, use_64bit
,
757 find_regno (regcache
->tdesc
, "lo"), regset
+ 32);
758 mips_supply_register (regcache
, use_64bit
,
759 find_regno (regcache
->tdesc
, "hi"), regset
+ 33);
760 mips_supply_register (regcache
, use_64bit
,
761 find_regno (regcache
->tdesc
, "pc"), regset
+ 34);
762 mips_supply_register (regcache
, use_64bit
,
763 find_regno (regcache
->tdesc
, "badvaddr"), regset
+ 35);
764 mips_supply_register (regcache
, use_64bit
,
765 find_regno (regcache
->tdesc
, "status"), regset
+ 36);
766 mips_supply_register (regcache
, use_64bit
,
767 find_regno (regcache
->tdesc
, "cause"), regset
+ 37);
769 mips_supply_register (regcache
, use_64bit
,
770 find_regno (regcache
->tdesc
, "restart"), regset
+ 0);
774 mips_fill_fpregset (struct regcache
*regcache
, void *buf
)
776 union mips_register
*regset
= (union mips_register
*) buf
;
777 int i
, use_64bit
, first_fp
, big_endian
;
779 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
780 first_fp
= find_regno (regcache
->tdesc
, "f0");
781 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
783 /* See GDB for a discussion of this peculiar layout. */
784 for (i
= 0; i
< 32; i
++)
786 collect_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
788 collect_register (regcache
, first_fp
+ i
,
789 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
791 mips_collect_register_32bit (regcache
, use_64bit
,
792 find_regno (regcache
->tdesc
, "fcsr"), regset
[32].buf
);
793 mips_collect_register_32bit (regcache
, use_64bit
,
794 find_regno (regcache
->tdesc
, "fir"),
799 mips_store_fpregset (struct regcache
*regcache
, const void *buf
)
801 const union mips_register
*regset
= (const union mips_register
*) buf
;
802 int i
, use_64bit
, first_fp
, big_endian
;
804 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
805 first_fp
= find_regno (regcache
->tdesc
, "f0");
806 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
808 /* See GDB for a discussion of this peculiar layout. */
809 for (i
= 0; i
< 32; i
++)
811 supply_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
813 supply_register (regcache
, first_fp
+ i
,
814 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
816 mips_supply_register_32bit (regcache
, use_64bit
,
817 find_regno (regcache
->tdesc
, "fcsr"),
819 mips_supply_register_32bit (regcache
, use_64bit
,
820 find_regno (regcache
->tdesc
, "fir"),
823 #endif /* HAVE_PTRACE_GETREGS */
825 static struct regset_info mips_regsets
[] = {
826 #ifdef HAVE_PTRACE_GETREGS
827 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, 38 * 8, GENERAL_REGS
,
828 mips_fill_gregset
, mips_store_gregset
},
829 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, 33 * 8, FP_REGS
,
830 mips_fill_fpregset
, mips_store_fpregset
},
831 #endif /* HAVE_PTRACE_GETREGS */
835 static struct regsets_info mips_regsets_info
=
837 mips_regsets
, /* regsets */
839 NULL
, /* disabled_regsets */
842 static struct usrregs_info mips_dsp_usrregs_info
=
848 static struct usrregs_info mips_usrregs_info
=
854 static struct regs_info dsp_regs_info
=
856 mips_dsp_regset_bitmap
,
857 &mips_dsp_usrregs_info
,
861 static struct regs_info regs_info
=
863 NULL
, /* regset_bitmap */
868 static const struct regs_info
*
869 mips_regs_info (void)
872 return &dsp_regs_info
;
877 struct linux_target_ops the_low_target
= {
880 mips_cannot_fetch_register
,
881 mips_cannot_store_register
,
882 NULL
, /* fetch_register */
885 NULL
, /* breakpoint_kind_from_pc */
886 mips_sw_breakpoint_from_kind
,
887 NULL
, /* get_next_pcs */
890 mips_supports_z_point_type
,
893 mips_stopped_by_watchpoint
,
894 mips_stopped_data_address
,
897 NULL
, /* siginfo_fixup */
898 mips_linux_new_process
,
899 mips_linux_delete_process
,
900 mips_linux_new_thread
,
901 mips_linux_delete_thread
,
903 mips_linux_prepare_to_resume
907 initialize_low_arch (void)
909 /* Initialize the Linux target descriptions. */
910 init_registers_mips_linux ();
911 init_registers_mips_dsp_linux ();
912 init_registers_mips64_linux ();
913 init_registers_mips64_dsp_linux ();
915 initialize_regsets_info (&mips_regsets_info
);