1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "linux-low.h"
22 #include "nat/gdb_ptrace.h"
25 #include "nat/mips-linux-watch.h"
26 #include "gdb_proc_service.h"
28 /* Defined in auto-generated file mips-linux.c. */
29 void init_registers_mips_linux (void);
30 extern const struct target_desc
*tdesc_mips_linux
;
32 /* Defined in auto-generated file mips-dsp-linux.c. */
33 void init_registers_mips_dsp_linux (void);
34 extern const struct target_desc
*tdesc_mips_dsp_linux
;
36 /* Defined in auto-generated file mips64-linux.c. */
37 void init_registers_mips64_linux (void);
38 extern const struct target_desc
*tdesc_mips64_linux
;
40 /* Defined in auto-generated file mips64-dsp-linux.c. */
41 void init_registers_mips64_dsp_linux (void);
42 extern const struct target_desc
*tdesc_mips64_dsp_linux
;
45 #define tdesc_mips_linux tdesc_mips64_linux
46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
49 #ifndef PTRACE_GET_THREAD_AREA
50 #define PTRACE_GET_THREAD_AREA 25
57 #define mips_num_regs 73
58 #define mips_dsp_num_regs 80
60 #include <asm/ptrace.h>
64 #define DSP_CONTROL 77
71 /* Deliberately signed, for proper sign extension. */
76 /* Return the ptrace ``address'' of register REGNO. */
78 #define mips_base_regs \
79 -1, 1, 2, 3, 4, 5, 6, 7, \
80 8, 9, 10, 11, 12, 13, 14, 15, \
81 16, 17, 18, 19, 20, 21, 22, 23, \
82 24, 25, 26, 27, 28, 29, 30, 31, \
84 -1, MMLO, MMHI, BADVADDR, CAUSE, PC, \
86 FPR_BASE, FPR_BASE + 1, FPR_BASE + 2, FPR_BASE + 3, \
87 FPR_BASE + 4, FPR_BASE + 5, FPR_BASE + 6, FPR_BASE + 7, \
88 FPR_BASE + 8, FPR_BASE + 9, FPR_BASE + 10, FPR_BASE + 11, \
89 FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15, \
90 FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19, \
91 FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23, \
92 FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27, \
93 FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31, \
96 #define mips_dsp_regs \
97 DSP_BASE, DSP_BASE + 1, DSP_BASE + 2, DSP_BASE + 3, \
98 DSP_BASE + 4, DSP_BASE + 5, \
101 static int mips_regmap
[mips_num_regs
] = {
106 static int mips_dsp_regmap
[mips_dsp_num_regs
] = {
112 /* DSP registers are not in any regset and can only be accessed
115 static unsigned char mips_dsp_regset_bitmap
[(mips_dsp_num_regs
+ 7) / 8] = {
116 0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
119 static int have_dsp
= -1;
121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
122 user register set accordingly. */
124 static const struct target_desc
*
125 mips_read_description (void)
129 int pid
= lwpid_of (current_thread
);
132 ptrace (PTRACE_PEEKUSER
, pid
, DSP_CONTROL
, 0);
142 perror_with_name ("ptrace");
147 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
151 mips_arch_setup (void)
153 current_process ()->tdesc
= mips_read_description ();
156 static struct usrregs_info
*
157 get_usrregs_info (void)
159 const struct regs_info
*regs_info
= the_low_target
.regs_info ();
161 return regs_info
->usrregs
;
164 /* Per-process arch-specific data we want to keep. */
166 struct arch_process_info
168 /* -1 if the kernel and/or CPU do not support watch registers.
169 1 if watch_readback is valid and we can read style, num_valid
171 0 if we need to read the watch_readback. */
173 int watch_readback_valid
;
175 /* Cached watch register read values. */
177 struct pt_watch_regs watch_readback
;
179 /* Current watchpoint requests for this process. */
181 struct mips_watchpoint
*current_watches
;
183 /* The current set of watch register values for writing the
186 struct pt_watch_regs watch_mirror
;
189 /* Per-thread arch-specific data we want to keep. */
193 /* Non-zero if our copy differs from what's recorded in the thread. */
194 int watch_registers_changed
;
197 /* From mips-linux-nat.c. */
199 /* Pseudo registers can not be read. ptrace does not provide a way to
200 read (or set) PS_REGNUM, and there's no point in reading or setting
201 ZERO_REGNUM, it's always 0. We also can not set BADVADDR, CAUSE,
202 or FCRIR via ptrace(). */
205 mips_cannot_fetch_register (int regno
)
207 const struct target_desc
*tdesc
;
209 if (get_usrregs_info ()->regmap
[regno
] == -1)
212 tdesc
= current_process ()->tdesc
;
214 /* On n32 we can't access 64-bit registers via PTRACE_PEEKUSR. */
215 if (register_size (tdesc
, regno
) > sizeof (PTRACE_XFER_TYPE
))
218 if (find_regno (tdesc
, "r0") == regno
)
225 mips_cannot_store_register (int regno
)
227 const struct target_desc
*tdesc
;
229 if (get_usrregs_info ()->regmap
[regno
] == -1)
232 tdesc
= current_process ()->tdesc
;
234 /* On n32 we can't access 64-bit registers via PTRACE_POKEUSR. */
235 if (register_size (tdesc
, regno
) > sizeof (PTRACE_XFER_TYPE
))
238 if (find_regno (tdesc
, "r0") == regno
)
241 if (find_regno (tdesc
, "cause") == regno
)
244 if (find_regno (tdesc
, "badvaddr") == regno
)
247 if (find_regno (tdesc
, "fir") == regno
)
254 mips_fetch_register (struct regcache
*regcache
, int regno
)
256 const struct target_desc
*tdesc
= current_process ()->tdesc
;
258 if (find_regno (tdesc
, "r0") == regno
)
260 supply_register_zeroed (regcache
, regno
);
268 mips_get_pc (struct regcache
*regcache
)
270 union mips_register pc
;
271 collect_register_by_name (regcache
, "pc", pc
.buf
);
272 return register_size (regcache
->tdesc
, 0) == 4 ? pc
.reg32
: pc
.reg64
;
276 mips_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
278 union mips_register newpc
;
279 if (register_size (regcache
->tdesc
, 0) == 4)
284 supply_register_by_name (regcache
, "pc", newpc
.buf
);
287 /* Correct in either endianness. */
288 static const unsigned int mips_breakpoint
= 0x0005000d;
289 #define mips_breakpoint_len 4
291 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
293 static const gdb_byte
*
294 mips_sw_breakpoint_from_kind (int kind
, int *size
)
296 *size
= mips_breakpoint_len
;
297 return (const gdb_byte
*) &mips_breakpoint
;
301 mips_breakpoint_at (CORE_ADDR where
)
305 (*the_target
->read_memory
) (where
, (unsigned char *) &insn
, 4);
306 if (insn
== mips_breakpoint
)
309 /* If necessary, recognize more trap instructions here. GDB only uses the
314 /* Mark the watch registers of lwp, represented by ENTRY, as changed. */
317 update_watch_registers_callback (thread_info
*thread
)
319 struct lwp_info
*lwp
= get_thread_lwp (thread
);
321 /* The actual update is done later just before resuming the lwp,
322 we just mark that the registers need updating. */
323 lwp
->arch_private
->watch_registers_changed
= 1;
325 /* If the lwp isn't stopped, force it to momentarily pause, so
326 we can update its watch registers. */
328 linux_stop_lwp (lwp
);
331 /* This is the implementation of linux_target_ops method
334 static struct arch_process_info
*
335 mips_linux_new_process (void)
337 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
342 /* This is the implementation of linux_target_ops method
346 mips_linux_delete_process (struct arch_process_info
*info
)
351 /* This is the implementation of linux_target_ops method new_thread.
352 Mark the watch registers as changed, so the threads' copies will
356 mips_linux_new_thread (struct lwp_info
*lwp
)
358 struct arch_lwp_info
*info
= XCNEW (struct arch_lwp_info
);
360 info
->watch_registers_changed
= 1;
362 lwp
->arch_private
= info
;
365 /* Function to call when a thread is being deleted. */
368 mips_linux_delete_thread (struct arch_lwp_info
*arch_lwp
)
373 /* Create a new mips_watchpoint and add it to the list. */
376 mips_add_watchpoint (struct arch_process_info
*priv
, CORE_ADDR addr
, int len
,
377 enum target_hw_bp_type watch_type
)
379 struct mips_watchpoint
*new_watch
;
380 struct mips_watchpoint
**pw
;
382 new_watch
= XNEW (struct mips_watchpoint
);
383 new_watch
->addr
= addr
;
384 new_watch
->len
= len
;
385 new_watch
->type
= watch_type
;
386 new_watch
->next
= NULL
;
388 pw
= &priv
->current_watches
;
394 /* Hook to call when a new fork is attached. */
397 mips_linux_new_fork (struct process_info
*parent
,
398 struct process_info
*child
)
400 struct arch_process_info
*parent_private
;
401 struct arch_process_info
*child_private
;
402 struct mips_watchpoint
*wp
;
404 /* These are allocated by linux_add_process. */
405 gdb_assert (parent
->priv
!= NULL
406 && parent
->priv
->arch_private
!= NULL
);
407 gdb_assert (child
->priv
!= NULL
408 && child
->priv
->arch_private
!= NULL
);
410 /* Linux kernel before 2.6.33 commit
411 72f674d203cd230426437cdcf7dd6f681dad8b0d
412 will inherit hardware debug registers from parent
413 on fork/vfork/clone. Newer Linux kernels create such tasks with
414 zeroed debug registers.
416 GDB core assumes the child inherits the watchpoints/hw
417 breakpoints of the parent, and will remove them all from the
418 forked off process. Copy the debug registers mirrors into the
419 new process so that all breakpoints and watchpoints can be
420 removed together. The debug registers mirror will become zeroed
421 in the end before detaching the forked off process, thus making
422 this compatible with older Linux kernels too. */
424 parent_private
= parent
->priv
->arch_private
;
425 child_private
= child
->priv
->arch_private
;
427 child_private
->watch_readback_valid
= parent_private
->watch_readback_valid
;
428 child_private
->watch_readback
= parent_private
->watch_readback
;
430 for (wp
= parent_private
->current_watches
; wp
!= NULL
; wp
= wp
->next
)
431 mips_add_watchpoint (child_private
, wp
->addr
, wp
->len
, wp
->type
);
433 child_private
->watch_mirror
= parent_private
->watch_mirror
;
435 /* This is the implementation of linux_target_ops method
436 prepare_to_resume. If the watch regs have changed, update the
440 mips_linux_prepare_to_resume (struct lwp_info
*lwp
)
442 ptid_t ptid
= ptid_of (get_lwp_thread (lwp
));
443 struct process_info
*proc
= find_process_pid (ptid
.pid ());
444 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
446 if (lwp
->arch_private
->watch_registers_changed
)
448 /* Only update the watch registers if we have set or unset a
449 watchpoint already. */
450 if (mips_linux_watch_get_num_valid (&priv
->watch_mirror
) > 0)
452 /* Write the mirrored watch register values. */
453 int tid
= ptid
.lwp ();
455 if (-1 == ptrace (PTRACE_SET_WATCH_REGS
, tid
,
456 &priv
->watch_mirror
, NULL
))
457 perror_with_name ("Couldn't write watch register");
460 lwp
->arch_private
->watch_registers_changed
= 0;
465 mips_supports_z_point_type (char z_type
)
469 case Z_PACKET_WRITE_WP
:
470 case Z_PACKET_READ_WP
:
471 case Z_PACKET_ACCESS_WP
:
478 /* This is the implementation of linux_target_ops method
482 mips_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
483 int len
, struct raw_breakpoint
*bp
)
485 struct process_info
*proc
= current_process ();
486 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
487 struct pt_watch_regs regs
;
489 enum target_hw_bp_type watch_type
;
492 lwpid
= lwpid_of (current_thread
);
493 if (!mips_linux_read_watch_registers (lwpid
,
494 &priv
->watch_readback
,
495 &priv
->watch_readback_valid
,
502 regs
= priv
->watch_readback
;
503 /* Add the current watches. */
504 mips_linux_watch_populate_regs (priv
->current_watches
, ®s
);
506 /* Now try to add the new watch. */
507 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
508 irw
= mips_linux_watch_type_to_irw (watch_type
);
509 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
, irw
))
512 /* It fit. Stick it on the end of the list. */
513 mips_add_watchpoint (priv
, addr
, len
, watch_type
);
515 priv
->watch_mirror
= regs
;
517 /* Only update the threads of this process. */
518 for_each_thread (proc
->pid
, update_watch_registers_callback
);
523 /* This is the implementation of linux_target_ops method
527 mips_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
528 int len
, struct raw_breakpoint
*bp
)
530 struct process_info
*proc
= current_process ();
531 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
534 enum target_hw_bp_type watch_type
;
536 struct mips_watchpoint
**pw
;
537 struct mips_watchpoint
*w
;
539 /* Search for a known watch that matches. Then unlink and free it. */
540 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
542 pw
= &priv
->current_watches
;
545 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== watch_type
)
556 return -1; /* We don't know about it, fail doing nothing. */
558 /* At this point watch_readback is known to be valid because we
559 could not have added the watch without reading it. */
560 gdb_assert (priv
->watch_readback_valid
== 1);
562 priv
->watch_mirror
= priv
->watch_readback
;
563 mips_linux_watch_populate_regs (priv
->current_watches
,
564 &priv
->watch_mirror
);
566 /* Only update the threads of this process. */
567 for_each_thread (proc
->pid
, update_watch_registers_callback
);
572 /* This is the implementation of linux_target_ops method
573 stopped_by_watchpoint. The watchhi R and W bits indicate
574 the watch register triggered. */
577 mips_stopped_by_watchpoint (void)
579 struct process_info
*proc
= current_process ();
580 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
583 long lwpid
= lwpid_of (current_thread
);
585 if (!mips_linux_read_watch_registers (lwpid
,
586 &priv
->watch_readback
,
587 &priv
->watch_readback_valid
,
591 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
593 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
594 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
601 /* This is the implementation of linux_target_ops method
602 stopped_data_address. */
605 mips_stopped_data_address (void)
607 struct process_info
*proc
= current_process ();
608 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
611 long lwpid
= lwpid_of (current_thread
);
613 /* On MIPS we don't know the low order 3 bits of the data address.
614 GDB does not support remote targets that can't report the
615 watchpoint address. So, make our best guess; return the starting
616 address of a watchpoint request which overlaps the one that
619 if (!mips_linux_read_watch_registers (lwpid
,
620 &priv
->watch_readback
,
621 &priv
->watch_readback_valid
,
625 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
627 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
628 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
631 CORE_ADDR t_low
, t_hi
;
633 struct mips_watchpoint
*watch
;
635 t_low
= mips_linux_watch_get_watchlo (&priv
->watch_readback
, n
);
636 t_irw
= t_low
& IRW_MASK
;
637 t_hi
= (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
639 t_low
&= ~(CORE_ADDR
)t_hi
;
641 for (watch
= priv
->current_watches
;
645 CORE_ADDR addr
= watch
->addr
;
646 CORE_ADDR last_byte
= addr
+ watch
->len
- 1;
648 if ((t_irw
& mips_linux_watch_type_to_irw (watch
->type
)) == 0)
650 /* Different type. */
653 /* Check for overlap of even a single byte. */
654 if (last_byte
>= t_low
&& addr
<= t_low
+ t_hi
)
659 /* Shouldn't happen. */
663 /* Fetch the thread-local storage pointer for libthread_db. */
666 ps_get_thread_area (struct ps_prochandle
*ph
,
667 lwpid_t lwpid
, int idx
, void **base
)
669 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
672 /* IDX is the bias from the thread pointer to the beginning of the
673 thread descriptor. It has to be subtracted due to implementation
674 quirks in libthread_db. */
675 *base
= (void *) ((char *)*base
- idx
);
681 mips_collect_register (struct regcache
*regcache
,
682 int use_64bit
, int regno
, union mips_register
*reg
)
684 union mips_register tmp_reg
;
688 collect_register (regcache
, regno
, &tmp_reg
.reg64
);
693 collect_register (regcache
, regno
, &tmp_reg
.reg32
);
694 reg
->reg64
= tmp_reg
.reg32
;
699 mips_supply_register (struct regcache
*regcache
,
700 int use_64bit
, int regno
, const union mips_register
*reg
)
704 /* For big-endian 32-bit targets, ignore the high four bytes of each
706 if (__BYTE_ORDER
== __BIG_ENDIAN
&& !use_64bit
)
709 supply_register (regcache
, regno
, reg
->buf
+ offset
);
712 #ifdef HAVE_PTRACE_GETREGS
715 mips_collect_register_32bit (struct regcache
*regcache
,
716 int use_64bit
, int regno
, unsigned char *buf
)
718 union mips_register tmp_reg
;
721 mips_collect_register (regcache
, use_64bit
, regno
, &tmp_reg
);
722 reg32
= tmp_reg
.reg64
;
723 memcpy (buf
, ®32
, 4);
727 mips_supply_register_32bit (struct regcache
*regcache
,
728 int use_64bit
, int regno
, const unsigned char *buf
)
730 union mips_register tmp_reg
;
733 memcpy (®32
, buf
, 4);
734 tmp_reg
.reg64
= reg32
;
735 mips_supply_register (regcache
, use_64bit
, regno
, &tmp_reg
);
739 mips_fill_gregset (struct regcache
*regcache
, void *buf
)
741 union mips_register
*regset
= (union mips_register
*) buf
;
743 const struct target_desc
*tdesc
= regcache
->tdesc
;
745 use_64bit
= (register_size (tdesc
, 0) == 8);
747 for (i
= 1; i
< 32; i
++)
748 mips_collect_register (regcache
, use_64bit
, i
, regset
+ i
);
750 mips_collect_register (regcache
, use_64bit
,
751 find_regno (tdesc
, "lo"), regset
+ 32);
752 mips_collect_register (regcache
, use_64bit
,
753 find_regno (tdesc
, "hi"), regset
+ 33);
754 mips_collect_register (regcache
, use_64bit
,
755 find_regno (tdesc
, "pc"), regset
+ 34);
756 mips_collect_register (regcache
, use_64bit
,
757 find_regno (tdesc
, "badvaddr"), regset
+ 35);
758 mips_collect_register (regcache
, use_64bit
,
759 find_regno (tdesc
, "status"), regset
+ 36);
760 mips_collect_register (regcache
, use_64bit
,
761 find_regno (tdesc
, "cause"), regset
+ 37);
763 mips_collect_register (regcache
, use_64bit
,
764 find_regno (tdesc
, "restart"), regset
+ 0);
768 mips_store_gregset (struct regcache
*regcache
, const void *buf
)
770 const union mips_register
*regset
= (const union mips_register
*) buf
;
773 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
775 supply_register_by_name_zeroed (regcache
, "r0");
777 for (i
= 1; i
< 32; i
++)
778 mips_supply_register (regcache
, use_64bit
, i
, regset
+ i
);
780 mips_supply_register (regcache
, use_64bit
,
781 find_regno (regcache
->tdesc
, "lo"), regset
+ 32);
782 mips_supply_register (regcache
, use_64bit
,
783 find_regno (regcache
->tdesc
, "hi"), regset
+ 33);
784 mips_supply_register (regcache
, use_64bit
,
785 find_regno (regcache
->tdesc
, "pc"), regset
+ 34);
786 mips_supply_register (regcache
, use_64bit
,
787 find_regno (regcache
->tdesc
, "badvaddr"), regset
+ 35);
788 mips_supply_register (regcache
, use_64bit
,
789 find_regno (regcache
->tdesc
, "status"), regset
+ 36);
790 mips_supply_register (regcache
, use_64bit
,
791 find_regno (regcache
->tdesc
, "cause"), regset
+ 37);
793 mips_supply_register (regcache
, use_64bit
,
794 find_regno (regcache
->tdesc
, "restart"), regset
+ 0);
798 mips_fill_fpregset (struct regcache
*regcache
, void *buf
)
800 union mips_register
*regset
= (union mips_register
*) buf
;
801 int i
, use_64bit
, first_fp
, big_endian
;
803 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
804 first_fp
= find_regno (regcache
->tdesc
, "f0");
805 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
807 /* See GDB for a discussion of this peculiar layout. */
808 for (i
= 0; i
< 32; i
++)
810 collect_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
812 collect_register (regcache
, first_fp
+ i
,
813 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
815 mips_collect_register_32bit (regcache
, use_64bit
,
816 find_regno (regcache
->tdesc
, "fcsr"), regset
[32].buf
);
817 mips_collect_register_32bit (regcache
, use_64bit
,
818 find_regno (regcache
->tdesc
, "fir"),
823 mips_store_fpregset (struct regcache
*regcache
, const void *buf
)
825 const union mips_register
*regset
= (const union mips_register
*) buf
;
826 int i
, use_64bit
, first_fp
, big_endian
;
828 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
829 first_fp
= find_regno (regcache
->tdesc
, "f0");
830 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
832 /* See GDB for a discussion of this peculiar layout. */
833 for (i
= 0; i
< 32; i
++)
835 supply_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
837 supply_register (regcache
, first_fp
+ i
,
838 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
840 mips_supply_register_32bit (regcache
, use_64bit
,
841 find_regno (regcache
->tdesc
, "fcsr"),
843 mips_supply_register_32bit (regcache
, use_64bit
,
844 find_regno (regcache
->tdesc
, "fir"),
847 #endif /* HAVE_PTRACE_GETREGS */
849 /* Take care of 32-bit registers with 64-bit ptrace, POKEUSER side. */
852 mips_collect_ptrace_register (struct regcache
*regcache
,
853 int regno
, char *buf
)
855 int use_64bit
= sizeof (PTRACE_XFER_TYPE
) == 8;
857 if (use_64bit
&& register_size (regcache
->tdesc
, regno
) == 4)
859 union mips_register reg
;
861 mips_collect_register (regcache
, 0, regno
, ®
);
862 memcpy (buf
, ®
, sizeof (reg
));
865 collect_register (regcache
, regno
, buf
);
868 /* Take care of 32-bit registers with 64-bit ptrace, PEEKUSER side. */
871 mips_supply_ptrace_register (struct regcache
*regcache
,
872 int regno
, const char *buf
)
874 int use_64bit
= sizeof (PTRACE_XFER_TYPE
) == 8;
876 if (use_64bit
&& register_size (regcache
->tdesc
, regno
) == 4)
878 union mips_register reg
;
880 memcpy (®
, buf
, sizeof (reg
));
881 mips_supply_register (regcache
, 0, regno
, ®
);
884 supply_register (regcache
, regno
, buf
);
887 static struct regset_info mips_regsets
[] = {
888 #ifdef HAVE_PTRACE_GETREGS
889 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, 38 * 8, GENERAL_REGS
,
890 mips_fill_gregset
, mips_store_gregset
},
891 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, 33 * 8, FP_REGS
,
892 mips_fill_fpregset
, mips_store_fpregset
},
893 #endif /* HAVE_PTRACE_GETREGS */
897 static struct regsets_info mips_regsets_info
=
899 mips_regsets
, /* regsets */
901 NULL
, /* disabled_regsets */
904 static struct usrregs_info mips_dsp_usrregs_info
=
910 static struct usrregs_info mips_usrregs_info
=
916 static struct regs_info dsp_regs_info
=
918 mips_dsp_regset_bitmap
,
919 &mips_dsp_usrregs_info
,
923 static struct regs_info regs_info
=
925 NULL
, /* regset_bitmap */
930 static const struct regs_info
*
931 mips_regs_info (void)
934 return &dsp_regs_info
;
939 struct linux_target_ops the_low_target
= {
942 mips_cannot_fetch_register
,
943 mips_cannot_store_register
,
947 NULL
, /* breakpoint_kind_from_pc */
948 mips_sw_breakpoint_from_kind
,
949 NULL
, /* get_next_pcs */
952 mips_supports_z_point_type
,
955 mips_stopped_by_watchpoint
,
956 mips_stopped_data_address
,
957 mips_collect_ptrace_register
,
958 mips_supply_ptrace_register
,
959 NULL
, /* siginfo_fixup */
960 mips_linux_new_process
,
961 mips_linux_delete_process
,
962 mips_linux_new_thread
,
963 mips_linux_delete_thread
,
965 mips_linux_prepare_to_resume
969 initialize_low_arch (void)
971 /* Initialize the Linux target descriptions. */
972 init_registers_mips_linux ();
973 init_registers_mips_dsp_linux ();
974 init_registers_mips64_linux ();
975 init_registers_mips64_dsp_linux ();
977 initialize_regsets_info (&mips_regsets_info
);