gdb/gdbserver/linux-mips-low.c

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2018 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Defined in auto-generated file mips-linux.c.  */
  29 void init_registers_mips_linux (void);
  30 extern const struct target_desc *tdesc_mips_linux;
  31
  32 /* Defined in auto-generated file mips-dsp-linux.c.  */
  33 void init_registers_mips_dsp_linux (void);
  34 extern const struct target_desc *tdesc_mips_dsp_linux;
  35
  36 /* Defined in auto-generated file mips64-linux.c.  */
  37 void init_registers_mips64_linux (void);
  38 extern const struct target_desc *tdesc_mips64_linux;
  39
  40 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  41 void init_registers_mips64_dsp_linux (void);
  42 extern const struct target_desc *tdesc_mips64_dsp_linux;
  43
  44 #ifdef __mips64
  45 #define tdesc_mips_linux tdesc_mips64_linux
  46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  47 #endif
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 25
  51 #endif
  52
  53 #ifdef HAVE_SYS_REG_H
  54 #include <sys/reg.h>
  55 #endif
  56
  57 #define mips_num_regs 73
  58 #define mips_dsp_num_regs 80
  59
  60 #include <asm/ptrace.h>
  61
  62 #ifndef DSP_BASE
  63 #define DSP_BASE 71
  64 #define DSP_CONTROL 77
  65 #endif
  66
  67 union mips_register
  68 {
  69   unsigned char buf[8];
  70
  71   /* Deliberately signed, for proper sign extension.  */
  72   int reg32;
  73   long long reg64;
  74 };
  75
  76 /* Return the ptrace ``address'' of register REGNO. */
  77
  78 #define mips_base_regs                                                  \
  79   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
  80   8,  9,  10, 11, 12, 13, 14, 15,                                       \
  81   16, 17, 18, 19, 20, 21, 22, 23,                                       \
  82   24, 25, 26, 27, 28, 29, 30, 31,                                       \
  83                                                                         \
  84   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
  85                                                                         \
  86   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
  87   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
  88   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
  89   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
  90   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
  91   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
  92   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
  93   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
  94   FPC_CSR, FPC_EIR
  95
  96 #define mips_dsp_regs                                                   \
  97   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
  98   DSP_BASE + 4,  DSP_BASE + 5,                                          \
  99   DSP_CONTROL
 100
 101 static int mips_regmap[mips_num_regs] = {
 102   mips_base_regs,
 103   0
 104 };
 105
 106 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 107   mips_base_regs,
 108   mips_dsp_regs,
 109   0
 110 };
 111
 112 /* DSP registers are not in any regset and can only be accessed
 113    individually.  */
 114
 115 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 116   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 117 };
 118
 119 static int have_dsp = -1;
 120
 121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 122    user register set accordingly.  */
 123
 124 static const struct target_desc *
 125 mips_read_description (void)
 126 {
 127   if (have_dsp < 0)
 128     {
 129       int pid = lwpid_of (current_thread);
 130
 131       errno = 0;
 132       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 133       switch (errno)
 134         {
 135         case 0:
 136           have_dsp = 1;
 137           break;
 138         case EIO:
 139           have_dsp = 0;
 140           break;
 141         default:
 142           perror_with_name ("ptrace");
 143           break;
 144         }
 145     }
 146
 147   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 148 }
 149
 150 static void
 151 mips_arch_setup (void)
 152 {
 153   current_process ()->tdesc = mips_read_description ();
 154 }
 155
 156 static struct usrregs_info *
 157 get_usrregs_info (void)
 158 {
 159   const struct regs_info *regs_info = the_low_target.regs_info ();
 160
 161   return regs_info->usrregs;
 162 }
 163
 164 /* Per-process arch-specific data we want to keep.  */
 165
 166 struct arch_process_info
 167 {
 168   /* -1 if the kernel and/or CPU do not support watch registers.
 169       1 if watch_readback is valid and we can read style, num_valid
 170         and the masks.
 171       0 if we need to read the watch_readback.  */
 172
 173   int watch_readback_valid;
 174
 175   /* Cached watch register read values.  */
 176
 177   struct pt_watch_regs watch_readback;
 178
 179   /* Current watchpoint requests for this process.  */
 180
 181   struct mips_watchpoint *current_watches;
 182
 183   /* The current set of watch register values for writing the
 184      registers.  */
 185
 186   struct pt_watch_regs watch_mirror;
 187 };
 188
 189 /* Per-thread arch-specific data we want to keep.  */
 190
 191 struct arch_lwp_info
 192 {
 193   /* Non-zero if our copy differs from what's recorded in the thread.  */
 194   int watch_registers_changed;
 195 };
 196
 197 /* From mips-linux-nat.c.  */
 198
 199 /* Pseudo registers can not be read.  ptrace does not provide a way to
 200    read (or set) PS_REGNUM, and there's no point in reading or setting
 201    ZERO_REGNUM, it's always 0.  We also can not set BADVADDR, CAUSE,
 202    or FCRIR via ptrace().  */
 203
 204 static int
 205 mips_cannot_fetch_register (int regno)
 206 {
 207   const struct target_desc *tdesc;
 208
 209   if (get_usrregs_info ()->regmap[regno] == -1)
 210     return 1;
 211
 212   tdesc = current_process ()->tdesc;
 213
 214   if (find_regno (tdesc, "r0") == regno)
 215     return 1;
 216
 217   return 0;
 218 }
 219
 220 static int
 221 mips_cannot_store_register (int regno)
 222 {
 223   const struct target_desc *tdesc;
 224
 225   if (get_usrregs_info ()->regmap[regno] == -1)
 226     return 1;
 227
 228   tdesc = current_process ()->tdesc;
 229
 230   if (find_regno (tdesc, "r0") == regno)
 231     return 1;
 232
 233   if (find_regno (tdesc, "cause") == regno)
 234     return 1;
 235
 236   if (find_regno (tdesc, "badvaddr") == regno)
 237     return 1;
 238
 239   if (find_regno (tdesc, "fir") == regno)
 240     return 1;
 241
 242   return 0;
 243 }
 244
 245 static int
 246 mips_fetch_register (struct regcache *regcache, int regno)
 247 {
 248   const struct target_desc *tdesc = current_process ()->tdesc;
 249
 250   if (find_regno (tdesc, "r0") == regno)
 251     {
 252       supply_register_zeroed (regcache, regno);
 253       return 1;
 254     }
 255
 256   return 0;
 257 }
 258
 259 static CORE_ADDR
 260 mips_get_pc (struct regcache *regcache)
 261 {
 262   union mips_register pc;
 263   collect_register_by_name (regcache, "pc", pc.buf);
 264   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 265 }
 266
 267 static void
 268 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 269 {
 270   union mips_register newpc;
 271   if (register_size (regcache->tdesc, 0) == 4)
 272     newpc.reg32 = pc;
 273   else
 274     newpc.reg64 = pc;
 275
 276   supply_register_by_name (regcache, "pc", newpc.buf);
 277 }
 278
 279 /* Correct in either endianness.  */
 280 static const unsigned int mips_breakpoint = 0x0005000d;
 281 #define mips_breakpoint_len 4
 282
 283 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 284
 285 static const gdb_byte *
 286 mips_sw_breakpoint_from_kind (int kind, int *size)
 287 {
 288   *size = mips_breakpoint_len;
 289   return (const gdb_byte *) &mips_breakpoint;
 290 }
 291
 292 static int
 293 mips_breakpoint_at (CORE_ADDR where)
 294 {
 295   unsigned int insn;
 296
 297   (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 298   if (insn == mips_breakpoint)
 299     return 1;
 300
 301   /* If necessary, recognize more trap instructions here.  GDB only uses the
 302      one.  */
 303   return 0;
 304 }
 305
 306 /* Mark the watch registers of lwp, represented by ENTRY, as changed.  */
 307
 308 static void
 309 update_watch_registers_callback (thread_info *thread)
 310 {
 311   struct lwp_info *lwp = get_thread_lwp (thread);
 312
 313   /* The actual update is done later just before resuming the lwp,
 314      we just mark that the registers need updating.  */
 315   lwp->arch_private->watch_registers_changed = 1;
 316
 317   /* If the lwp isn't stopped, force it to momentarily pause, so
 318      we can update its watch registers.  */
 319   if (!lwp->stopped)
 320     linux_stop_lwp (lwp);
 321 }
 322
 323 /* This is the implementation of linux_target_ops method
 324    new_process.  */
 325
 326 static struct arch_process_info *
 327 mips_linux_new_process (void)
 328 {
 329   struct arch_process_info *info = XCNEW (struct arch_process_info);
 330
 331   return info;
 332 }
 333
 334 /* This is the implementation of linux_target_ops method
 335    delete_process.  */
 336
 337 static void
 338 mips_linux_delete_process (struct arch_process_info *info)
 339 {
 340   xfree (info);
 341 }
 342
 343 /* This is the implementation of linux_target_ops method new_thread.
 344    Mark the watch registers as changed, so the threads' copies will
 345    be updated.  */
 346
 347 static void
 348 mips_linux_new_thread (struct lwp_info *lwp)
 349 {
 350   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 351
 352   info->watch_registers_changed = 1;
 353
 354   lwp->arch_private = info;
 355 }
 356
 357 /* Function to call when a thread is being deleted.  */
 358
 359 static void
 360 mips_linux_delete_thread (struct arch_lwp_info *arch_lwp)
 361 {
 362   xfree (arch_lwp);
 363 }
 364
 365 /* Create a new mips_watchpoint and add it to the list.  */
 366
 367 static void
 368 mips_add_watchpoint (struct arch_process_info *priv, CORE_ADDR addr, int len,
 369                      enum target_hw_bp_type watch_type)
 370 {
 371   struct mips_watchpoint *new_watch;
 372   struct mips_watchpoint **pw;
 373
 374   new_watch = XNEW (struct mips_watchpoint);
 375   new_watch->addr = addr;
 376   new_watch->len = len;
 377   new_watch->type = watch_type;
 378   new_watch->next = NULL;
 379
 380   pw = &priv->current_watches;
 381   while (*pw != NULL)
 382     pw = &(*pw)->next;
 383   *pw = new_watch;
 384 }
 385
 386 /* Hook to call when a new fork is attached.  */
 387
 388 static void
 389 mips_linux_new_fork (struct process_info *parent,
 390                         struct process_info *child)
 391 {
 392   struct arch_process_info *parent_private;
 393   struct arch_process_info *child_private;
 394   struct mips_watchpoint *wp;
 395
 396   /* These are allocated by linux_add_process.  */
 397   gdb_assert (parent->priv != NULL
 398               && parent->priv->arch_private != NULL);
 399   gdb_assert (child->priv != NULL
 400               && child->priv->arch_private != NULL);
 401
 402   /* Linux kernel before 2.6.33 commit
 403      72f674d203cd230426437cdcf7dd6f681dad8b0d
 404      will inherit hardware debug registers from parent
 405      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 406      zeroed debug registers.
 407
 408      GDB core assumes the child inherits the watchpoints/hw
 409      breakpoints of the parent, and will remove them all from the
 410      forked off process.  Copy the debug registers mirrors into the
 411      new process so that all breakpoints and watchpoints can be
 412      removed together.  The debug registers mirror will become zeroed
 413      in the end before detaching the forked off process, thus making
 414      this compatible with older Linux kernels too.  */
 415
 416   parent_private = parent->priv->arch_private;
 417   child_private = child->priv->arch_private;
 418
 419   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 420   child_private->watch_readback = parent_private->watch_readback;
 421
 422   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 423     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 424
 425   child_private->watch_mirror = parent_private->watch_mirror;
 426 }
 427 /* This is the implementation of linux_target_ops method
 428    prepare_to_resume.  If the watch regs have changed, update the
 429    thread's copies.  */
 430
 431 static void
 432 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 433 {
 434   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 435   struct process_info *proc = find_process_pid (ptid_get_pid (ptid));
 436   struct arch_process_info *priv = proc->priv->arch_private;
 437
 438   if (lwp->arch_private->watch_registers_changed)
 439     {
 440       /* Only update the watch registers if we have set or unset a
 441          watchpoint already.  */
 442       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 443         {
 444           /* Write the mirrored watch register values.  */
 445           int tid = ptid_get_lwp (ptid);
 446
 447           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 448                             &priv->watch_mirror, NULL))
 449             perror_with_name ("Couldn't write watch register");
 450         }
 451
 452       lwp->arch_private->watch_registers_changed = 0;
 453     }
 454 }
 455
 456 static int
 457 mips_supports_z_point_type (char z_type)
 458 {
 459   switch (z_type)
 460     {
 461     case Z_PACKET_WRITE_WP:
 462     case Z_PACKET_READ_WP:
 463     case Z_PACKET_ACCESS_WP:
 464       return 1;
 465     default:
 466       return 0;
 467     }
 468 }
 469
 470 /* This is the implementation of linux_target_ops method
 471    insert_point.  */
 472
 473 static int
 474 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 475                    int len, struct raw_breakpoint *bp)
 476 {
 477   struct process_info *proc = current_process ();
 478   struct arch_process_info *priv = proc->priv->arch_private;
 479   struct pt_watch_regs regs;
 480   long lwpid;
 481   enum target_hw_bp_type watch_type;
 482   uint32_t irw;
 483
 484   lwpid = lwpid_of (current_thread);
 485   if (!mips_linux_read_watch_registers (lwpid,
 486                                         &priv->watch_readback,
 487                                         &priv->watch_readback_valid,
 488                                         0))
 489     return -1;
 490
 491   if (len <= 0)
 492     return -1;
 493
 494   regs = priv->watch_readback;
 495   /* Add the current watches.  */
 496   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 497
 498   /* Now try to add the new watch.  */
 499   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 500   irw = mips_linux_watch_type_to_irw (watch_type);
 501   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 502     return -1;
 503
 504   /* It fit.  Stick it on the end of the list.  */
 505   mips_add_watchpoint (priv, addr, len, watch_type);
 506
 507   priv->watch_mirror = regs;
 508
 509   /* Only update the threads of this process.  */
 510   for_each_thread (proc->pid, update_watch_registers_callback);
 511
 512   return 0;
 513 }
 514
 515 /* This is the implementation of linux_target_ops method
 516    remove_point.  */
 517
 518 static int
 519 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 520                    int len, struct raw_breakpoint *bp)
 521 {
 522   struct process_info *proc = current_process ();
 523   struct arch_process_info *priv = proc->priv->arch_private;
 524
 525   int deleted_one;
 526   enum target_hw_bp_type watch_type;
 527
 528   struct mips_watchpoint **pw;
 529   struct mips_watchpoint *w;
 530
 531   /* Search for a known watch that matches.  Then unlink and free it.  */
 532   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 533   deleted_one = 0;
 534   pw = &priv->current_watches;
 535   while ((w = *pw))
 536     {
 537       if (w->addr == addr && w->len == len && w->type == watch_type)
 538         {
 539           *pw = w->next;
 540           free (w);
 541           deleted_one = 1;
 542           break;
 543         }
 544       pw = &(w->next);
 545     }
 546
 547   if (!deleted_one)
 548     return -1;  /* We don't know about it, fail doing nothing.  */
 549
 550   /* At this point watch_readback is known to be valid because we
 551      could not have added the watch without reading it.  */
 552   gdb_assert (priv->watch_readback_valid == 1);
 553
 554   priv->watch_mirror = priv->watch_readback;
 555   mips_linux_watch_populate_regs (priv->current_watches,
 556                                   &priv->watch_mirror);
 557
 558   /* Only update the threads of this process.  */
 559   for_each_thread (proc->pid, update_watch_registers_callback);
 560
 561   return 0;
 562 }
 563
 564 /* This is the implementation of linux_target_ops method
 565    stopped_by_watchpoint.  The watchhi R and W bits indicate
 566    the watch register triggered. */
 567
 568 static int
 569 mips_stopped_by_watchpoint (void)
 570 {
 571   struct process_info *proc = current_process ();
 572   struct arch_process_info *priv = proc->priv->arch_private;
 573   int n;
 574   int num_valid;
 575   long lwpid = lwpid_of (current_thread);
 576
 577   if (!mips_linux_read_watch_registers (lwpid,
 578                                         &priv->watch_readback,
 579                                         &priv->watch_readback_valid,
 580                                         1))
 581     return 0;
 582
 583   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 584
 585   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 586     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 587         & (R_MASK | W_MASK))
 588       return 1;
 589
 590   return 0;
 591 }
 592
 593 /* This is the implementation of linux_target_ops method
 594    stopped_data_address.  */
 595
 596 static CORE_ADDR
 597 mips_stopped_data_address (void)
 598 {
 599   struct process_info *proc = current_process ();
 600   struct arch_process_info *priv = proc->priv->arch_private;
 601   int n;
 602   int num_valid;
 603   long lwpid = lwpid_of (current_thread);
 604
 605   /* On MIPS we don't know the low order 3 bits of the data address.
 606      GDB does not support remote targets that can't report the
 607      watchpoint address.  So, make our best guess; return the starting
 608      address of a watchpoint request which overlaps the one that
 609      triggered.  */
 610
 611   if (!mips_linux_read_watch_registers (lwpid,
 612                                         &priv->watch_readback,
 613                                         &priv->watch_readback_valid,
 614                                         0))
 615     return 0;
 616
 617   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 618
 619   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 620     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 621         & (R_MASK | W_MASK))
 622       {
 623         CORE_ADDR t_low, t_hi;
 624         int t_irw;
 625         struct mips_watchpoint *watch;
 626
 627         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 628         t_irw = t_low & IRW_MASK;
 629         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 630                 | IRW_MASK);
 631         t_low &= ~(CORE_ADDR)t_hi;
 632
 633         for (watch = priv->current_watches;
 634              watch != NULL;
 635              watch = watch->next)
 636           {
 637             CORE_ADDR addr = watch->addr;
 638             CORE_ADDR last_byte = addr + watch->len - 1;
 639
 640             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 641               {
 642                 /* Different type.  */
 643                 continue;
 644               }
 645             /* Check for overlap of even a single byte.  */
 646             if (last_byte >= t_low && addr <= t_low + t_hi)
 647               return addr;
 648           }
 649       }
 650
 651   /* Shouldn't happen.  */
 652   return 0;
 653 }
 654
 655 /* Fetch the thread-local storage pointer for libthread_db.  */
 656
 657 ps_err_e
 658 ps_get_thread_area (struct ps_prochandle *ph,
 659                     lwpid_t lwpid, int idx, void **base)
 660 {
 661   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 662     return PS_ERR;
 663
 664   /* IDX is the bias from the thread pointer to the beginning of the
 665      thread descriptor.  It has to be subtracted due to implementation
 666      quirks in libthread_db.  */
 667   *base = (void *) ((char *)*base - idx);
 668
 669   return PS_OK;
 670 }
 671
 672 #ifdef HAVE_PTRACE_GETREGS
 673
 674 static void
 675 mips_collect_register (struct regcache *regcache,
 676                        int use_64bit, int regno, union mips_register *reg)
 677 {
 678   union mips_register tmp_reg;
 679
 680   if (use_64bit)
 681     {
 682       collect_register (regcache, regno, &tmp_reg.reg64);
 683       *reg = tmp_reg;
 684     }
 685   else
 686     {
 687       collect_register (regcache, regno, &tmp_reg.reg32);
 688       reg->reg64 = tmp_reg.reg32;
 689     }
 690 }
 691
 692 static void
 693 mips_supply_register (struct regcache *regcache,
 694                       int use_64bit, int regno, const union mips_register *reg)
 695 {
 696   int offset = 0;
 697
 698   /* For big-endian 32-bit targets, ignore the high four bytes of each
 699      eight-byte slot.  */
 700   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 701     offset = 4;
 702
 703   supply_register (regcache, regno, reg->buf + offset);
 704 }
 705
 706 static void
 707 mips_collect_register_32bit (struct regcache *regcache,
 708                              int use_64bit, int regno, unsigned char *buf)
 709 {
 710   union mips_register tmp_reg;
 711   int reg32;
 712
 713   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 714   reg32 = tmp_reg.reg64;
 715   memcpy (buf, &reg32, 4);
 716 }
 717
 718 static void
 719 mips_supply_register_32bit (struct regcache *regcache,
 720                             int use_64bit, int regno, const unsigned char *buf)
 721 {
 722   union mips_register tmp_reg;
 723   int reg32;
 724
 725   memcpy (&reg32, buf, 4);
 726   tmp_reg.reg64 = reg32;
 727   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 728 }
 729
 730 static void
 731 mips_fill_gregset (struct regcache *regcache, void *buf)
 732 {
 733   union mips_register *regset = (union mips_register *) buf;
 734   int i, use_64bit;
 735   const struct target_desc *tdesc = regcache->tdesc;
 736
 737   use_64bit = (register_size (tdesc, 0) == 8);
 738
 739   for (i = 1; i < 32; i++)
 740     mips_collect_register (regcache, use_64bit, i, regset + i);
 741
 742   mips_collect_register (regcache, use_64bit,
 743                          find_regno (tdesc, "lo"), regset + 32);
 744   mips_collect_register (regcache, use_64bit,
 745                          find_regno (tdesc, "hi"), regset + 33);
 746   mips_collect_register (regcache, use_64bit,
 747                          find_regno (tdesc, "pc"), regset + 34);
 748   mips_collect_register (regcache, use_64bit,
 749                          find_regno (tdesc, "badvaddr"), regset + 35);
 750   mips_collect_register (regcache, use_64bit,
 751                          find_regno (tdesc, "status"), regset + 36);
 752   mips_collect_register (regcache, use_64bit,
 753                          find_regno (tdesc, "cause"), regset + 37);
 754
 755   mips_collect_register (regcache, use_64bit,
 756                          find_regno (tdesc, "restart"), regset + 0);
 757 }
 758
 759 static void
 760 mips_store_gregset (struct regcache *regcache, const void *buf)
 761 {
 762   const union mips_register *regset = (const union mips_register *) buf;
 763   int i, use_64bit;
 764
 765   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 766
 767   supply_register_by_name_zeroed (regcache, "r0");
 768
 769   for (i = 1; i < 32; i++)
 770     mips_supply_register (regcache, use_64bit, i, regset + i);
 771
 772   mips_supply_register (regcache, use_64bit,
 773                         find_regno (regcache->tdesc, "lo"), regset + 32);
 774   mips_supply_register (regcache, use_64bit,
 775                         find_regno (regcache->tdesc, "hi"), regset + 33);
 776   mips_supply_register (regcache, use_64bit,
 777                         find_regno (regcache->tdesc, "pc"), regset + 34);
 778   mips_supply_register (regcache, use_64bit,
 779                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 780   mips_supply_register (regcache, use_64bit,
 781                         find_regno (regcache->tdesc, "status"), regset + 36);
 782   mips_supply_register (regcache, use_64bit,
 783                         find_regno (regcache->tdesc, "cause"), regset + 37);
 784
 785   mips_supply_register (regcache, use_64bit,
 786                         find_regno (regcache->tdesc, "restart"), regset + 0);
 787 }
 788
 789 static void
 790 mips_fill_fpregset (struct regcache *regcache, void *buf)
 791 {
 792   union mips_register *regset = (union mips_register *) buf;
 793   int i, use_64bit, first_fp, big_endian;
 794
 795   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 796   first_fp = find_regno (regcache->tdesc, "f0");
 797   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 798
 799   /* See GDB for a discussion of this peculiar layout.  */
 800   for (i = 0; i < 32; i++)
 801     if (use_64bit)
 802       collect_register (regcache, first_fp + i, regset[i].buf);
 803     else
 804       collect_register (regcache, first_fp + i,
 805                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 806
 807   mips_collect_register_32bit (regcache, use_64bit,
 808                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 809   mips_collect_register_32bit (regcache, use_64bit,
 810                                find_regno (regcache->tdesc, "fir"),
 811                                regset[32].buf + 4);
 812 }
 813
 814 static void
 815 mips_store_fpregset (struct regcache *regcache, const void *buf)
 816 {
 817   const union mips_register *regset = (const union mips_register *) buf;
 818   int i, use_64bit, first_fp, big_endian;
 819
 820   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 821   first_fp = find_regno (regcache->tdesc, "f0");
 822   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 823
 824   /* See GDB for a discussion of this peculiar layout.  */
 825   for (i = 0; i < 32; i++)
 826     if (use_64bit)
 827       supply_register (regcache, first_fp + i, regset[i].buf);
 828     else
 829       supply_register (regcache, first_fp + i,
 830                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 831
 832   mips_supply_register_32bit (regcache, use_64bit,
 833                               find_regno (regcache->tdesc, "fcsr"),
 834                               regset[32].buf);
 835   mips_supply_register_32bit (regcache, use_64bit,
 836                               find_regno (regcache->tdesc, "fir"),
 837                               regset[32].buf + 4);
 838 }
 839 #endif /* HAVE_PTRACE_GETREGS */
 840
 841 static struct regset_info mips_regsets[] = {
 842 #ifdef HAVE_PTRACE_GETREGS
 843   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 844     mips_fill_gregset, mips_store_gregset },
 845   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 846     mips_fill_fpregset, mips_store_fpregset },
 847 #endif /* HAVE_PTRACE_GETREGS */
 848   NULL_REGSET
 849 };
 850
 851 static struct regsets_info mips_regsets_info =
 852   {
 853     mips_regsets, /* regsets */
 854     0, /* num_regsets */
 855     NULL, /* disabled_regsets */
 856   };
 857
 858 static struct usrregs_info mips_dsp_usrregs_info =
 859   {
 860     mips_dsp_num_regs,
 861     mips_dsp_regmap,
 862   };
 863
 864 static struct usrregs_info mips_usrregs_info =
 865   {
 866     mips_num_regs,
 867     mips_regmap,
 868   };
 869
 870 static struct regs_info dsp_regs_info =
 871   {
 872     mips_dsp_regset_bitmap,
 873     &mips_dsp_usrregs_info,
 874     &mips_regsets_info
 875   };
 876
 877 static struct regs_info regs_info =
 878   {
 879     NULL, /* regset_bitmap */
 880     &mips_usrregs_info,
 881     &mips_regsets_info
 882   };
 883
 884 static const struct regs_info *
 885 mips_regs_info (void)
 886 {
 887   if (have_dsp)
 888     return &dsp_regs_info;
 889   else
 890     return &regs_info;
 891 }
 892
 893 struct linux_target_ops the_low_target = {
 894   mips_arch_setup,
 895   mips_regs_info,
 896   mips_cannot_fetch_register,
 897   mips_cannot_store_register,
 898   mips_fetch_register,
 899   mips_get_pc,
 900   mips_set_pc,
 901   NULL, /* breakpoint_kind_from_pc */
 902   mips_sw_breakpoint_from_kind,
 903   NULL, /* get_next_pcs */
 904   0,
 905   mips_breakpoint_at,
 906   mips_supports_z_point_type,
 907   mips_insert_point,
 908   mips_remove_point,
 909   mips_stopped_by_watchpoint,
 910   mips_stopped_data_address,
 911   NULL,
 912   NULL,
 913   NULL, /* siginfo_fixup */
 914   mips_linux_new_process,
 915   mips_linux_delete_process,
 916   mips_linux_new_thread,
 917   mips_linux_delete_thread,
 918   mips_linux_new_fork,
 919   mips_linux_prepare_to_resume
 920 };
 921
 922 void
 923 initialize_low_arch (void)
 924 {
 925   /* Initialize the Linux target descriptions.  */
 926   init_registers_mips_linux ();
 927   init_registers_mips_dsp_linux ();
 928   init_registers_mips64_linux ();
 929   init_registers_mips64_dsp_linux ();
 930
 931   initialize_regsets_info (&mips_regsets_info);
 932 }