1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2015 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-low.h"
27 #include "x86-xstate.h"
28 #include "nat/gdb_ptrace.h"
30 #include "gdb_proc_service.h"
31 /* Don't include elf/common.h if linux/elf.h got included by
32 gdb_proc_service.h. */
34 #include "elf/common.h"
39 #include "tracepoint.h"
41 #include "nat/linux-nat.h"
42 #include "nat/x86-linux.h"
43 #include "nat/x86-linux-dregs.h"
46 /* Defined in auto-generated file amd64-linux.c. */
47 void init_registers_amd64_linux (void);
48 extern const struct target_desc
*tdesc_amd64_linux
;
50 /* Defined in auto-generated file amd64-avx-linux.c. */
51 void init_registers_amd64_avx_linux (void);
52 extern const struct target_desc
*tdesc_amd64_avx_linux
;
54 /* Defined in auto-generated file amd64-avx512-linux.c. */
55 void init_registers_amd64_avx512_linux (void);
56 extern const struct target_desc
*tdesc_amd64_avx512_linux
;
58 /* Defined in auto-generated file amd64-mpx-linux.c. */
59 void init_registers_amd64_mpx_linux (void);
60 extern const struct target_desc
*tdesc_amd64_mpx_linux
;
62 /* Defined in auto-generated file x32-linux.c. */
63 void init_registers_x32_linux (void);
64 extern const struct target_desc
*tdesc_x32_linux
;
66 /* Defined in auto-generated file x32-avx-linux.c. */
67 void init_registers_x32_avx_linux (void);
68 extern const struct target_desc
*tdesc_x32_avx_linux
;
70 /* Defined in auto-generated file x32-avx512-linux.c. */
71 void init_registers_x32_avx512_linux (void);
72 extern const struct target_desc
*tdesc_x32_avx512_linux
;
76 /* Defined in auto-generated file i386-linux.c. */
77 void init_registers_i386_linux (void);
78 extern const struct target_desc
*tdesc_i386_linux
;
80 /* Defined in auto-generated file i386-mmx-linux.c. */
81 void init_registers_i386_mmx_linux (void);
82 extern const struct target_desc
*tdesc_i386_mmx_linux
;
84 /* Defined in auto-generated file i386-avx-linux.c. */
85 void init_registers_i386_avx_linux (void);
86 extern const struct target_desc
*tdesc_i386_avx_linux
;
88 /* Defined in auto-generated file i386-avx512-linux.c. */
89 void init_registers_i386_avx512_linux (void);
90 extern const struct target_desc
*tdesc_i386_avx512_linux
;
92 /* Defined in auto-generated file i386-mpx-linux.c. */
93 void init_registers_i386_mpx_linux (void);
94 extern const struct target_desc
*tdesc_i386_mpx_linux
;
97 static struct target_desc
*tdesc_amd64_linux_no_xml
;
99 static struct target_desc
*tdesc_i386_linux_no_xml
;
102 static unsigned char jump_insn
[] = { 0xe9, 0, 0, 0, 0 };
103 static unsigned char small_jump_insn
[] = { 0x66, 0xe9, 0, 0 };
105 /* Backward compatibility for gdb without XML support. */
107 static const char *xmltarget_i386_linux_no_xml
= "@<target>\
108 <architecture>i386</architecture>\
109 <osabi>GNU/Linux</osabi>\
113 static const char *xmltarget_amd64_linux_no_xml
= "@<target>\
114 <architecture>i386:x86-64</architecture>\
115 <osabi>GNU/Linux</osabi>\
120 #include <sys/procfs.h>
121 #include "nat/gdb_ptrace.h"
124 #ifndef PTRACE_GET_THREAD_AREA
125 #define PTRACE_GET_THREAD_AREA 25
128 /* This definition comes from prctl.h, but some kernels may not have it. */
129 #ifndef PTRACE_ARCH_PRCTL
130 #define PTRACE_ARCH_PRCTL 30
133 /* The following definitions come from prctl.h, but may be absent
134 for certain configurations. */
136 #define ARCH_SET_GS 0x1001
137 #define ARCH_SET_FS 0x1002
138 #define ARCH_GET_FS 0x1003
139 #define ARCH_GET_GS 0x1004
142 /* Per-process arch-specific data we want to keep. */
144 struct arch_process_info
146 struct x86_debug_reg_state debug_reg_state
;
151 /* Mapping between the general-purpose registers in `struct user'
152 format and GDB's register array layout.
153 Note that the transfer layout uses 64-bit regs. */
154 static /*const*/ int i386_regmap
[] =
156 RAX
* 8, RCX
* 8, RDX
* 8, RBX
* 8,
157 RSP
* 8, RBP
* 8, RSI
* 8, RDI
* 8,
158 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
159 DS
* 8, ES
* 8, FS
* 8, GS
* 8
162 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
164 /* So code below doesn't have to care, i386 or amd64. */
165 #define ORIG_EAX ORIG_RAX
168 static const int x86_64_regmap
[] =
170 RAX
* 8, RBX
* 8, RCX
* 8, RDX
* 8,
171 RSI
* 8, RDI
* 8, RBP
* 8, RSP
* 8,
172 R8
* 8, R9
* 8, R10
* 8, R11
* 8,
173 R12
* 8, R13
* 8, R14
* 8, R15
* 8,
174 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
175 DS
* 8, ES
* 8, FS
* 8, GS
* 8,
176 -1, -1, -1, -1, -1, -1, -1, -1,
177 -1, -1, -1, -1, -1, -1, -1, -1,
178 -1, -1, -1, -1, -1, -1, -1, -1,
180 -1, -1, -1, -1, -1, -1, -1, -1,
182 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
183 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
184 -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
185 -1, -1, -1, -1, -1, -1, -1, -1,
186 -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
187 -1, -1, -1, -1, -1, -1, -1, -1,
188 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
189 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
190 -1, -1, -1, -1, -1, -1, -1, -1,
191 -1, -1, -1, -1, -1, -1, -1, -1,
192 -1, -1, -1, -1, -1, -1, -1, -1
195 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
196 #define X86_64_USER_REGS (GS + 1)
198 #else /* ! __x86_64__ */
200 /* Mapping between the general-purpose registers in `struct user'
201 format and GDB's register array layout. */
202 static /*const*/ int i386_regmap
[] =
204 EAX
* 4, ECX
* 4, EDX
* 4, EBX
* 4,
205 UESP
* 4, EBP
* 4, ESI
* 4, EDI
* 4,
206 EIP
* 4, EFL
* 4, CS
* 4, SS
* 4,
207 DS
* 4, ES
* 4, FS
* 4, GS
* 4
210 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
218 /* Returns true if the current inferior belongs to a x86-64 process,
222 is_64bit_tdesc (void)
224 struct regcache
*regcache
= get_thread_regcache (current_thread
, 0);
226 return register_size (regcache
->tdesc
, 0) == 8;
232 /* Called by libthread_db. */
235 ps_get_thread_area (const struct ps_prochandle
*ph
,
236 lwpid_t lwpid
, int idx
, void **base
)
239 int use_64bit
= is_64bit_tdesc ();
246 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
250 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
261 unsigned int desc
[4];
263 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
,
264 (void *) (intptr_t) idx
, (unsigned long) &desc
) < 0)
267 /* Ensure we properly extend the value to 64-bits for x86_64. */
268 *base
= (void *) (uintptr_t) desc
[1];
273 /* Get the thread area address. This is used to recognize which
274 thread is which when tracing with the in-process agent library. We
275 don't read anything from the address, and treat it as opaque; it's
276 the address itself that we assume is unique per-thread. */
279 x86_get_thread_area (int lwpid
, CORE_ADDR
*addr
)
282 int use_64bit
= is_64bit_tdesc ();
287 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
289 *addr
= (CORE_ADDR
) (uintptr_t) base
;
298 struct lwp_info
*lwp
= find_lwp_pid (pid_to_ptid (lwpid
));
299 struct thread_info
*thr
= get_lwp_thread (lwp
);
300 struct regcache
*regcache
= get_thread_regcache (thr
, 1);
301 unsigned int desc
[4];
303 const int reg_thread_area
= 3; /* bits to scale down register value. */
306 collect_register_by_name (regcache
, "gs", &gs
);
308 idx
= gs
>> reg_thread_area
;
310 if (ptrace (PTRACE_GET_THREAD_AREA
,
312 (void *) (long) idx
, (unsigned long) &desc
) < 0)
323 x86_cannot_store_register (int regno
)
326 if (is_64bit_tdesc ())
330 return regno
>= I386_NUM_REGS
;
334 x86_cannot_fetch_register (int regno
)
337 if (is_64bit_tdesc ())
341 return regno
>= I386_NUM_REGS
;
345 x86_fill_gregset (struct regcache
*regcache
, void *buf
)
350 if (register_size (regcache
->tdesc
, 0) == 8)
352 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
353 if (x86_64_regmap
[i
] != -1)
354 collect_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
358 /* 32-bit inferior registers need to be zero-extended.
359 Callers would read uninitialized memory otherwise. */
360 memset (buf
, 0x00, X86_64_USER_REGS
* 8);
363 for (i
= 0; i
< I386_NUM_REGS
; i
++)
364 collect_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
366 collect_register_by_name (regcache
, "orig_eax",
367 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
371 x86_store_gregset (struct regcache
*regcache
, const void *buf
)
376 if (register_size (regcache
->tdesc
, 0) == 8)
378 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
379 if (x86_64_regmap
[i
] != -1)
380 supply_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
385 for (i
= 0; i
< I386_NUM_REGS
; i
++)
386 supply_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
388 supply_register_by_name (regcache
, "orig_eax",
389 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
393 x86_fill_fpregset (struct regcache
*regcache
, void *buf
)
396 i387_cache_to_fxsave (regcache
, buf
);
398 i387_cache_to_fsave (regcache
, buf
);
403 x86_store_fpregset (struct regcache
*regcache
, const void *buf
)
406 i387_fxsave_to_cache (regcache
, buf
);
408 i387_fsave_to_cache (regcache
, buf
);
415 x86_fill_fpxregset (struct regcache
*regcache
, void *buf
)
417 i387_cache_to_fxsave (regcache
, buf
);
421 x86_store_fpxregset (struct regcache
*regcache
, const void *buf
)
423 i387_fxsave_to_cache (regcache
, buf
);
429 x86_fill_xstateregset (struct regcache
*regcache
, void *buf
)
431 i387_cache_to_xsave (regcache
, buf
);
435 x86_store_xstateregset (struct regcache
*regcache
, const void *buf
)
437 i387_xsave_to_cache (regcache
, buf
);
440 /* ??? The non-biarch i386 case stores all the i387 regs twice.
441 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
442 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
443 doesn't work. IWBN to avoid the duplication in the case where it
444 does work. Maybe the arch_setup routine could check whether it works
445 and update the supported regsets accordingly. */
447 static struct regset_info x86_regsets
[] =
449 #ifdef HAVE_PTRACE_GETREGS
450 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, sizeof (elf_gregset_t
),
452 x86_fill_gregset
, x86_store_gregset
},
453 { PTRACE_GETREGSET
, PTRACE_SETREGSET
, NT_X86_XSTATE
, 0,
454 EXTENDED_REGS
, x86_fill_xstateregset
, x86_store_xstateregset
},
456 # ifdef HAVE_PTRACE_GETFPXREGS
457 { PTRACE_GETFPXREGS
, PTRACE_SETFPXREGS
, 0, sizeof (elf_fpxregset_t
),
459 x86_fill_fpxregset
, x86_store_fpxregset
},
462 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, sizeof (elf_fpregset_t
),
464 x86_fill_fpregset
, x86_store_fpregset
},
465 #endif /* HAVE_PTRACE_GETREGS */
470 x86_get_pc (struct regcache
*regcache
)
472 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
477 collect_register_by_name (regcache
, "rip", &pc
);
478 return (CORE_ADDR
) pc
;
483 collect_register_by_name (regcache
, "eip", &pc
);
484 return (CORE_ADDR
) pc
;
489 x86_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
491 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
495 unsigned long newpc
= pc
;
496 supply_register_by_name (regcache
, "rip", &newpc
);
500 unsigned int newpc
= pc
;
501 supply_register_by_name (regcache
, "eip", &newpc
);
505 static const gdb_byte x86_breakpoint
[] = { 0xCC };
506 #define x86_breakpoint_len 1
509 x86_breakpoint_at (CORE_ADDR pc
)
513 (*the_target
->read_memory
) (pc
, &c
, 1);
520 /* Low-level function vector. */
521 struct x86_dr_low_type x86_dr_low
=
523 x86_linux_dr_set_control
,
524 x86_linux_dr_set_addr
,
525 x86_linux_dr_get_addr
,
526 x86_linux_dr_get_status
,
527 x86_linux_dr_get_control
,
531 /* Breakpoint/Watchpoint support. */
534 x86_supports_z_point_type (char z_type
)
540 case Z_PACKET_WRITE_WP
:
541 case Z_PACKET_ACCESS_WP
:
549 x86_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
550 int size
, struct raw_breakpoint
*bp
)
552 struct process_info
*proc
= current_process ();
556 case raw_bkpt_type_hw
:
557 case raw_bkpt_type_write_wp
:
558 case raw_bkpt_type_access_wp
:
560 enum target_hw_bp_type hw_type
561 = raw_bkpt_type_to_target_hw_bp_type (type
);
562 struct x86_debug_reg_state
*state
563 = &proc
->priv
->arch_private
->debug_reg_state
;
565 return x86_dr_insert_watchpoint (state
, hw_type
, addr
, size
);
575 x86_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
576 int size
, struct raw_breakpoint
*bp
)
578 struct process_info
*proc
= current_process ();
582 case raw_bkpt_type_hw
:
583 case raw_bkpt_type_write_wp
:
584 case raw_bkpt_type_access_wp
:
586 enum target_hw_bp_type hw_type
587 = raw_bkpt_type_to_target_hw_bp_type (type
);
588 struct x86_debug_reg_state
*state
589 = &proc
->priv
->arch_private
->debug_reg_state
;
591 return x86_dr_remove_watchpoint (state
, hw_type
, addr
, size
);
600 x86_stopped_by_watchpoint (void)
602 struct process_info
*proc
= current_process ();
603 return x86_dr_stopped_by_watchpoint (&proc
->priv
->arch_private
->debug_reg_state
);
607 x86_stopped_data_address (void)
609 struct process_info
*proc
= current_process ();
611 if (x86_dr_stopped_data_address (&proc
->priv
->arch_private
->debug_reg_state
,
617 /* Called when a new process is created. */
619 static struct arch_process_info
*
620 x86_linux_new_process (void)
622 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
624 x86_low_init_dregs (&info
->debug_reg_state
);
629 /* Target routine for linux_new_fork. */
632 x86_linux_new_fork (struct process_info
*parent
, struct process_info
*child
)
634 /* These are allocated by linux_add_process. */
635 gdb_assert (parent
->priv
!= NULL
636 && parent
->priv
->arch_private
!= NULL
);
637 gdb_assert (child
->priv
!= NULL
638 && child
->priv
->arch_private
!= NULL
);
640 /* Linux kernel before 2.6.33 commit
641 72f674d203cd230426437cdcf7dd6f681dad8b0d
642 will inherit hardware debug registers from parent
643 on fork/vfork/clone. Newer Linux kernels create such tasks with
644 zeroed debug registers.
646 GDB core assumes the child inherits the watchpoints/hw
647 breakpoints of the parent, and will remove them all from the
648 forked off process. Copy the debug registers mirrors into the
649 new process so that all breakpoints and watchpoints can be
650 removed together. The debug registers mirror will become zeroed
651 in the end before detaching the forked off process, thus making
652 this compatible with older Linux kernels too. */
654 *child
->priv
->arch_private
= *parent
->priv
->arch_private
;
657 /* See nat/x86-dregs.h. */
659 struct x86_debug_reg_state
*
660 x86_debug_reg_state (pid_t pid
)
662 struct process_info
*proc
= find_process_pid (pid
);
664 return &proc
->priv
->arch_private
->debug_reg_state
;
667 /* When GDBSERVER is built as a 64-bit application on linux, the
668 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
669 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
670 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
671 conversion in-place ourselves. */
673 /* These types below (compat_*) define a siginfo type that is layout
674 compatible with the siginfo type exported by the 32-bit userspace
679 typedef int compat_int_t
;
680 typedef unsigned int compat_uptr_t
;
682 typedef int compat_time_t
;
683 typedef int compat_timer_t
;
684 typedef int compat_clock_t
;
686 struct compat_timeval
688 compat_time_t tv_sec
;
692 typedef union compat_sigval
694 compat_int_t sival_int
;
695 compat_uptr_t sival_ptr
;
698 typedef struct compat_siginfo
706 int _pad
[((128 / sizeof (int)) - 3)];
715 /* POSIX.1b timers */
720 compat_sigval_t _sigval
;
723 /* POSIX.1b signals */
728 compat_sigval_t _sigval
;
737 compat_clock_t _utime
;
738 compat_clock_t _stime
;
741 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
756 /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
757 typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t
;
759 typedef struct compat_x32_siginfo
767 int _pad
[((128 / sizeof (int)) - 3)];
776 /* POSIX.1b timers */
781 compat_sigval_t _sigval
;
784 /* POSIX.1b signals */
789 compat_sigval_t _sigval
;
798 compat_x32_clock_t _utime
;
799 compat_x32_clock_t _stime
;
802 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
815 } compat_x32_siginfo_t
__attribute__ ((__aligned__ (8)));
817 #define cpt_si_pid _sifields._kill._pid
818 #define cpt_si_uid _sifields._kill._uid
819 #define cpt_si_timerid _sifields._timer._tid
820 #define cpt_si_overrun _sifields._timer._overrun
821 #define cpt_si_status _sifields._sigchld._status
822 #define cpt_si_utime _sifields._sigchld._utime
823 #define cpt_si_stime _sifields._sigchld._stime
824 #define cpt_si_ptr _sifields._rt._sigval.sival_ptr
825 #define cpt_si_addr _sifields._sigfault._addr
826 #define cpt_si_band _sifields._sigpoll._band
827 #define cpt_si_fd _sifields._sigpoll._fd
829 /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
830 In their place is si_timer1,si_timer2. */
832 #define si_timerid si_timer1
835 #define si_overrun si_timer2
839 compat_siginfo_from_siginfo (compat_siginfo_t
*to
, siginfo_t
*from
)
841 memset (to
, 0, sizeof (*to
));
843 to
->si_signo
= from
->si_signo
;
844 to
->si_errno
= from
->si_errno
;
845 to
->si_code
= from
->si_code
;
847 if (to
->si_code
== SI_TIMER
)
849 to
->cpt_si_timerid
= from
->si_timerid
;
850 to
->cpt_si_overrun
= from
->si_overrun
;
851 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
853 else if (to
->si_code
== SI_USER
)
855 to
->cpt_si_pid
= from
->si_pid
;
856 to
->cpt_si_uid
= from
->si_uid
;
858 else if (to
->si_code
< 0)
860 to
->cpt_si_pid
= from
->si_pid
;
861 to
->cpt_si_uid
= from
->si_uid
;
862 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
866 switch (to
->si_signo
)
869 to
->cpt_si_pid
= from
->si_pid
;
870 to
->cpt_si_uid
= from
->si_uid
;
871 to
->cpt_si_status
= from
->si_status
;
872 to
->cpt_si_utime
= from
->si_utime
;
873 to
->cpt_si_stime
= from
->si_stime
;
879 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
882 to
->cpt_si_band
= from
->si_band
;
883 to
->cpt_si_fd
= from
->si_fd
;
886 to
->cpt_si_pid
= from
->si_pid
;
887 to
->cpt_si_uid
= from
->si_uid
;
888 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
895 siginfo_from_compat_siginfo (siginfo_t
*to
, compat_siginfo_t
*from
)
897 memset (to
, 0, sizeof (*to
));
899 to
->si_signo
= from
->si_signo
;
900 to
->si_errno
= from
->si_errno
;
901 to
->si_code
= from
->si_code
;
903 if (to
->si_code
== SI_TIMER
)
905 to
->si_timerid
= from
->cpt_si_timerid
;
906 to
->si_overrun
= from
->cpt_si_overrun
;
907 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
909 else if (to
->si_code
== SI_USER
)
911 to
->si_pid
= from
->cpt_si_pid
;
912 to
->si_uid
= from
->cpt_si_uid
;
914 else if (to
->si_code
< 0)
916 to
->si_pid
= from
->cpt_si_pid
;
917 to
->si_uid
= from
->cpt_si_uid
;
918 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
922 switch (to
->si_signo
)
925 to
->si_pid
= from
->cpt_si_pid
;
926 to
->si_uid
= from
->cpt_si_uid
;
927 to
->si_status
= from
->cpt_si_status
;
928 to
->si_utime
= from
->cpt_si_utime
;
929 to
->si_stime
= from
->cpt_si_stime
;
935 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
938 to
->si_band
= from
->cpt_si_band
;
939 to
->si_fd
= from
->cpt_si_fd
;
942 to
->si_pid
= from
->cpt_si_pid
;
943 to
->si_uid
= from
->cpt_si_uid
;
944 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
951 compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t
*to
,
954 memset (to
, 0, sizeof (*to
));
956 to
->si_signo
= from
->si_signo
;
957 to
->si_errno
= from
->si_errno
;
958 to
->si_code
= from
->si_code
;
960 if (to
->si_code
== SI_TIMER
)
962 to
->cpt_si_timerid
= from
->si_timerid
;
963 to
->cpt_si_overrun
= from
->si_overrun
;
964 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
966 else if (to
->si_code
== SI_USER
)
968 to
->cpt_si_pid
= from
->si_pid
;
969 to
->cpt_si_uid
= from
->si_uid
;
971 else if (to
->si_code
< 0)
973 to
->cpt_si_pid
= from
->si_pid
;
974 to
->cpt_si_uid
= from
->si_uid
;
975 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
979 switch (to
->si_signo
)
982 to
->cpt_si_pid
= from
->si_pid
;
983 to
->cpt_si_uid
= from
->si_uid
;
984 to
->cpt_si_status
= from
->si_status
;
985 to
->cpt_si_utime
= from
->si_utime
;
986 to
->cpt_si_stime
= from
->si_stime
;
992 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
995 to
->cpt_si_band
= from
->si_band
;
996 to
->cpt_si_fd
= from
->si_fd
;
999 to
->cpt_si_pid
= from
->si_pid
;
1000 to
->cpt_si_uid
= from
->si_uid
;
1001 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1008 siginfo_from_compat_x32_siginfo (siginfo_t
*to
,
1009 compat_x32_siginfo_t
*from
)
1011 memset (to
, 0, sizeof (*to
));
1013 to
->si_signo
= from
->si_signo
;
1014 to
->si_errno
= from
->si_errno
;
1015 to
->si_code
= from
->si_code
;
1017 if (to
->si_code
== SI_TIMER
)
1019 to
->si_timerid
= from
->cpt_si_timerid
;
1020 to
->si_overrun
= from
->cpt_si_overrun
;
1021 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1023 else if (to
->si_code
== SI_USER
)
1025 to
->si_pid
= from
->cpt_si_pid
;
1026 to
->si_uid
= from
->cpt_si_uid
;
1028 else if (to
->si_code
< 0)
1030 to
->si_pid
= from
->cpt_si_pid
;
1031 to
->si_uid
= from
->cpt_si_uid
;
1032 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1036 switch (to
->si_signo
)
1039 to
->si_pid
= from
->cpt_si_pid
;
1040 to
->si_uid
= from
->cpt_si_uid
;
1041 to
->si_status
= from
->cpt_si_status
;
1042 to
->si_utime
= from
->cpt_si_utime
;
1043 to
->si_stime
= from
->cpt_si_stime
;
1049 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1052 to
->si_band
= from
->cpt_si_band
;
1053 to
->si_fd
= from
->cpt_si_fd
;
1056 to
->si_pid
= from
->cpt_si_pid
;
1057 to
->si_uid
= from
->cpt_si_uid
;
1058 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1064 #endif /* __x86_64__ */
1066 /* Convert a native/host siginfo object, into/from the siginfo in the
1067 layout of the inferiors' architecture. Returns true if any
1068 conversion was done; false otherwise. If DIRECTION is 1, then copy
1069 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
1073 x86_siginfo_fixup (siginfo_t
*native
, void *inf
, int direction
)
1076 unsigned int machine
;
1077 int tid
= lwpid_of (current_thread
);
1078 int is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1080 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
1081 if (!is_64bit_tdesc ())
1083 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_siginfo_t
));
1086 compat_siginfo_from_siginfo ((struct compat_siginfo
*) inf
, native
);
1088 siginfo_from_compat_siginfo (native
, (struct compat_siginfo
*) inf
);
1092 /* No fixup for native x32 GDB. */
1093 else if (!is_elf64
&& sizeof (void *) == 8)
1095 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_x32_siginfo_t
));
1098 compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo
*) inf
,
1101 siginfo_from_compat_x32_siginfo (native
,
1102 (struct compat_x32_siginfo
*) inf
);
1113 /* Format of XSAVE extended state is:
1116 fxsave_bytes[0..463]
1117 sw_usable_bytes[464..511]
1118 xstate_hdr_bytes[512..575]
1123 Same memory layout will be used for the coredump NT_X86_XSTATE
1124 representing the XSAVE extended state registers.
1126 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
1127 extended state mask, which is the same as the extended control register
1128 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
1129 together with the mask saved in the xstate_hdr_bytes to determine what
1130 states the processor/OS supports and what state, used or initialized,
1131 the process/thread is in. */
1132 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
1134 /* Does the current host support the GETFPXREGS request? The header
1135 file may or may not define it, and even if it is defined, the
1136 kernel will return EIO if it's running on a pre-SSE processor. */
1137 int have_ptrace_getfpxregs
=
1138 #ifdef HAVE_PTRACE_GETFPXREGS
1145 /* Get Linux/x86 target description from running target. */
1147 static const struct target_desc
*
1148 x86_linux_read_description (void)
1150 unsigned int machine
;
1154 static uint64_t xcr0
;
1155 struct regset_info
*regset
;
1157 tid
= lwpid_of (current_thread
);
1159 is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1161 if (sizeof (void *) == 4)
1164 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
1166 else if (machine
== EM_X86_64
)
1167 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
1171 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
1172 if (machine
== EM_386
&& have_ptrace_getfpxregs
== -1)
1174 elf_fpxregset_t fpxregs
;
1176 if (ptrace (PTRACE_GETFPXREGS
, tid
, 0, (long) &fpxregs
) < 0)
1178 have_ptrace_getfpxregs
= 0;
1179 have_ptrace_getregset
= 0;
1180 return tdesc_i386_mmx_linux
;
1183 have_ptrace_getfpxregs
= 1;
1189 x86_xcr0
= X86_XSTATE_SSE_MASK
;
1191 /* Don't use XML. */
1193 if (machine
== EM_X86_64
)
1194 return tdesc_amd64_linux_no_xml
;
1197 return tdesc_i386_linux_no_xml
;
1200 if (have_ptrace_getregset
== -1)
1202 uint64_t xstateregs
[(X86_XSTATE_SSE_SIZE
/ sizeof (uint64_t))];
1205 iov
.iov_base
= xstateregs
;
1206 iov
.iov_len
= sizeof (xstateregs
);
1208 /* Check if PTRACE_GETREGSET works. */
1209 if (ptrace (PTRACE_GETREGSET
, tid
,
1210 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
1211 have_ptrace_getregset
= 0;
1214 have_ptrace_getregset
= 1;
1216 /* Get XCR0 from XSAVE extended state. */
1217 xcr0
= xstateregs
[(I386_LINUX_XSAVE_XCR0_OFFSET
1218 / sizeof (uint64_t))];
1220 /* Use PTRACE_GETREGSET if it is available. */
1221 for (regset
= x86_regsets
;
1222 regset
->fill_function
!= NULL
; regset
++)
1223 if (regset
->get_request
== PTRACE_GETREGSET
)
1224 regset
->size
= X86_XSTATE_SIZE (xcr0
);
1225 else if (regset
->type
!= GENERAL_REGS
)
1230 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
1231 xcr0_features
= (have_ptrace_getregset
1232 && (xcr0
& X86_XSTATE_ALL_MASK
));
1237 if (machine
== EM_X86_64
)
1244 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1246 case X86_XSTATE_AVX512_MASK
:
1247 return tdesc_amd64_avx512_linux
;
1249 case X86_XSTATE_MPX_MASK
:
1250 return tdesc_amd64_mpx_linux
;
1252 case X86_XSTATE_AVX_MASK
:
1253 return tdesc_amd64_avx_linux
;
1256 return tdesc_amd64_linux
;
1260 return tdesc_amd64_linux
;
1266 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1268 case X86_XSTATE_AVX512_MASK
:
1269 return tdesc_x32_avx512_linux
;
1271 case X86_XSTATE_MPX_MASK
: /* No MPX on x32. */
1272 case X86_XSTATE_AVX_MASK
:
1273 return tdesc_x32_avx_linux
;
1276 return tdesc_x32_linux
;
1280 return tdesc_x32_linux
;
1288 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1290 case (X86_XSTATE_AVX512_MASK
):
1291 return tdesc_i386_avx512_linux
;
1293 case (X86_XSTATE_MPX_MASK
):
1294 return tdesc_i386_mpx_linux
;
1296 case (X86_XSTATE_AVX_MASK
):
1297 return tdesc_i386_avx_linux
;
1300 return tdesc_i386_linux
;
1304 return tdesc_i386_linux
;
1307 gdb_assert_not_reached ("failed to return tdesc");
1310 /* Callback for find_inferior. Stops iteration when a thread with a
1311 given PID is found. */
1314 same_process_callback (struct inferior_list_entry
*entry
, void *data
)
1316 int pid
= *(int *) data
;
1318 return (ptid_get_pid (entry
->id
) == pid
);
1321 /* Callback for for_each_inferior. Calls the arch_setup routine for
1325 x86_arch_setup_process_callback (struct inferior_list_entry
*entry
)
1327 int pid
= ptid_get_pid (entry
->id
);
1329 /* Look up any thread of this processes. */
1331 = (struct thread_info
*) find_inferior (&all_threads
,
1332 same_process_callback
, &pid
);
1334 the_low_target
.arch_setup ();
1337 /* Update all the target description of all processes; a new GDB
1338 connected, and it may or not support xml target descriptions. */
1341 x86_linux_update_xmltarget (void)
1343 struct thread_info
*saved_thread
= current_thread
;
1345 /* Before changing the register cache's internal layout, flush the
1346 contents of the current valid caches back to the threads, and
1347 release the current regcache objects. */
1348 regcache_release ();
1350 for_each_inferior (&all_processes
, x86_arch_setup_process_callback
);
1352 current_thread
= saved_thread
;
1355 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
1356 PTRACE_GETREGSET. */
1359 x86_linux_process_qsupported (char **features
, int count
)
1363 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
1364 with "i386" in qSupported query, it supports x86 XML target
1367 for (i
= 0; i
< count
; i
++)
1369 const char *feature
= features
[i
];
1371 if (startswith (feature
, "xmlRegisters="))
1373 char *copy
= xstrdup (feature
+ 13);
1376 for (p
= strtok (copy
, ","); p
!= NULL
; p
= strtok (NULL
, ","))
1378 if (strcmp (p
, "i386") == 0)
1388 x86_linux_update_xmltarget ();
1391 /* Common for x86/x86-64. */
1393 static struct regsets_info x86_regsets_info
=
1395 x86_regsets
, /* regsets */
1396 0, /* num_regsets */
1397 NULL
, /* disabled_regsets */
1401 static struct regs_info amd64_linux_regs_info
=
1403 NULL
, /* regset_bitmap */
1404 NULL
, /* usrregs_info */
1408 static struct usrregs_info i386_linux_usrregs_info
=
1414 static struct regs_info i386_linux_regs_info
=
1416 NULL
, /* regset_bitmap */
1417 &i386_linux_usrregs_info
,
1421 const struct regs_info
*
1422 x86_linux_regs_info (void)
1425 if (is_64bit_tdesc ())
1426 return &amd64_linux_regs_info
;
1429 return &i386_linux_regs_info
;
1432 /* Initialize the target description for the architecture of the
1436 x86_arch_setup (void)
1438 current_process ()->tdesc
= x86_linux_read_description ();
1442 x86_supports_tracepoints (void)
1448 append_insns (CORE_ADDR
*to
, size_t len
, const unsigned char *buf
)
1450 write_inferior_memory (*to
, buf
, len
);
1455 push_opcode (unsigned char *buf
, char *op
)
1457 unsigned char *buf_org
= buf
;
1462 unsigned long ul
= strtoul (op
, &endptr
, 16);
1471 return buf
- buf_org
;
1476 /* Build a jump pad that saves registers and calls a collection
1477 function. Writes a jump instruction to the jump pad to
1478 JJUMPAD_INSN. The caller is responsible to write it in at the
1479 tracepoint address. */
1482 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1483 CORE_ADDR collector
,
1486 CORE_ADDR
*jump_entry
,
1487 CORE_ADDR
*trampoline
,
1488 ULONGEST
*trampoline_size
,
1489 unsigned char *jjump_pad_insn
,
1490 ULONGEST
*jjump_pad_insn_size
,
1491 CORE_ADDR
*adjusted_insn_addr
,
1492 CORE_ADDR
*adjusted_insn_addr_end
,
1495 unsigned char buf
[40];
1499 CORE_ADDR buildaddr
= *jump_entry
;
1501 /* Build the jump pad. */
1503 /* First, do tracepoint data collection. Save registers. */
1505 /* Need to ensure stack pointer saved first. */
1506 buf
[i
++] = 0x54; /* push %rsp */
1507 buf
[i
++] = 0x55; /* push %rbp */
1508 buf
[i
++] = 0x57; /* push %rdi */
1509 buf
[i
++] = 0x56; /* push %rsi */
1510 buf
[i
++] = 0x52; /* push %rdx */
1511 buf
[i
++] = 0x51; /* push %rcx */
1512 buf
[i
++] = 0x53; /* push %rbx */
1513 buf
[i
++] = 0x50; /* push %rax */
1514 buf
[i
++] = 0x41; buf
[i
++] = 0x57; /* push %r15 */
1515 buf
[i
++] = 0x41; buf
[i
++] = 0x56; /* push %r14 */
1516 buf
[i
++] = 0x41; buf
[i
++] = 0x55; /* push %r13 */
1517 buf
[i
++] = 0x41; buf
[i
++] = 0x54; /* push %r12 */
1518 buf
[i
++] = 0x41; buf
[i
++] = 0x53; /* push %r11 */
1519 buf
[i
++] = 0x41; buf
[i
++] = 0x52; /* push %r10 */
1520 buf
[i
++] = 0x41; buf
[i
++] = 0x51; /* push %r9 */
1521 buf
[i
++] = 0x41; buf
[i
++] = 0x50; /* push %r8 */
1522 buf
[i
++] = 0x9c; /* pushfq */
1523 buf
[i
++] = 0x48; /* movl <addr>,%rdi */
1525 *((unsigned long *)(buf
+ i
)) = (unsigned long) tpaddr
;
1526 i
+= sizeof (unsigned long);
1527 buf
[i
++] = 0x57; /* push %rdi */
1528 append_insns (&buildaddr
, i
, buf
);
1530 /* Stack space for the collecting_t object. */
1532 i
+= push_opcode (&buf
[i
], "48 83 ec 18"); /* sub $0x18,%rsp */
1533 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov <tpoint>,%rax */
1534 memcpy (buf
+ i
, &tpoint
, 8);
1536 i
+= push_opcode (&buf
[i
], "48 89 04 24"); /* mov %rax,(%rsp) */
1537 i
+= push_opcode (&buf
[i
],
1538 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1539 i
+= push_opcode (&buf
[i
], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1540 append_insns (&buildaddr
, i
, buf
);
1544 i
+= push_opcode (&buf
[i
], "48 be"); /* movl <lockaddr>,%rsi */
1545 memcpy (&buf
[i
], (void *) &lockaddr
, 8);
1547 i
+= push_opcode (&buf
[i
], "48 89 e1"); /* mov %rsp,%rcx */
1548 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1549 i
+= push_opcode (&buf
[i
], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1550 i
+= push_opcode (&buf
[i
], "48 85 c0"); /* test %rax,%rax */
1551 i
+= push_opcode (&buf
[i
], "75 f4"); /* jne <again> */
1552 append_insns (&buildaddr
, i
, buf
);
1554 /* Set up the gdb_collect call. */
1555 /* At this point, (stack pointer + 0x18) is the base of our saved
1559 i
+= push_opcode (&buf
[i
], "48 89 e6"); /* mov %rsp,%rsi */
1560 i
+= push_opcode (&buf
[i
], "48 83 c6 18"); /* add $0x18,%rsi */
1562 /* tpoint address may be 64-bit wide. */
1563 i
+= push_opcode (&buf
[i
], "48 bf"); /* movl <addr>,%rdi */
1564 memcpy (buf
+ i
, &tpoint
, 8);
1566 append_insns (&buildaddr
, i
, buf
);
1568 /* The collector function being in the shared library, may be
1569 >31-bits away off the jump pad. */
1571 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov $collector,%rax */
1572 memcpy (buf
+ i
, &collector
, 8);
1574 i
+= push_opcode (&buf
[i
], "ff d0"); /* callq *%rax */
1575 append_insns (&buildaddr
, i
, buf
);
1577 /* Clear the spin-lock. */
1579 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1580 i
+= push_opcode (&buf
[i
], "48 a3"); /* mov %rax, lockaddr */
1581 memcpy (buf
+ i
, &lockaddr
, 8);
1583 append_insns (&buildaddr
, i
, buf
);
1585 /* Remove stack that had been used for the collect_t object. */
1587 i
+= push_opcode (&buf
[i
], "48 83 c4 18"); /* add $0x18,%rsp */
1588 append_insns (&buildaddr
, i
, buf
);
1590 /* Restore register state. */
1592 buf
[i
++] = 0x48; /* add $0x8,%rsp */
1596 buf
[i
++] = 0x9d; /* popfq */
1597 buf
[i
++] = 0x41; buf
[i
++] = 0x58; /* pop %r8 */
1598 buf
[i
++] = 0x41; buf
[i
++] = 0x59; /* pop %r9 */
1599 buf
[i
++] = 0x41; buf
[i
++] = 0x5a; /* pop %r10 */
1600 buf
[i
++] = 0x41; buf
[i
++] = 0x5b; /* pop %r11 */
1601 buf
[i
++] = 0x41; buf
[i
++] = 0x5c; /* pop %r12 */
1602 buf
[i
++] = 0x41; buf
[i
++] = 0x5d; /* pop %r13 */
1603 buf
[i
++] = 0x41; buf
[i
++] = 0x5e; /* pop %r14 */
1604 buf
[i
++] = 0x41; buf
[i
++] = 0x5f; /* pop %r15 */
1605 buf
[i
++] = 0x58; /* pop %rax */
1606 buf
[i
++] = 0x5b; /* pop %rbx */
1607 buf
[i
++] = 0x59; /* pop %rcx */
1608 buf
[i
++] = 0x5a; /* pop %rdx */
1609 buf
[i
++] = 0x5e; /* pop %rsi */
1610 buf
[i
++] = 0x5f; /* pop %rdi */
1611 buf
[i
++] = 0x5d; /* pop %rbp */
1612 buf
[i
++] = 0x5c; /* pop %rsp */
1613 append_insns (&buildaddr
, i
, buf
);
1615 /* Now, adjust the original instruction to execute in the jump
1617 *adjusted_insn_addr
= buildaddr
;
1618 relocate_instruction (&buildaddr
, tpaddr
);
1619 *adjusted_insn_addr_end
= buildaddr
;
1621 /* Finally, write a jump back to the program. */
1623 loffset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1624 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1627 "E.Jump back from jump pad too far from tracepoint "
1628 "(offset 0x%" PRIx64
" > int32).", loffset
);
1632 offset
= (int) loffset
;
1633 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1634 memcpy (buf
+ 1, &offset
, 4);
1635 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1637 /* The jump pad is now built. Wire in a jump to our jump pad. This
1638 is always done last (by our caller actually), so that we can
1639 install fast tracepoints with threads running. This relies on
1640 the agent's atomic write support. */
1641 loffset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1642 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1645 "E.Jump pad too far from tracepoint "
1646 "(offset 0x%" PRIx64
" > int32).", loffset
);
1650 offset
= (int) loffset
;
1652 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1653 memcpy (buf
+ 1, &offset
, 4);
1654 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1655 *jjump_pad_insn_size
= sizeof (jump_insn
);
1657 /* Return the end address of our pad. */
1658 *jump_entry
= buildaddr
;
1663 #endif /* __x86_64__ */
1665 /* Build a jump pad that saves registers and calls a collection
1666 function. Writes a jump instruction to the jump pad to
1667 JJUMPAD_INSN. The caller is responsible to write it in at the
1668 tracepoint address. */
1671 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1672 CORE_ADDR collector
,
1675 CORE_ADDR
*jump_entry
,
1676 CORE_ADDR
*trampoline
,
1677 ULONGEST
*trampoline_size
,
1678 unsigned char *jjump_pad_insn
,
1679 ULONGEST
*jjump_pad_insn_size
,
1680 CORE_ADDR
*adjusted_insn_addr
,
1681 CORE_ADDR
*adjusted_insn_addr_end
,
1684 unsigned char buf
[0x100];
1686 CORE_ADDR buildaddr
= *jump_entry
;
1688 /* Build the jump pad. */
1690 /* First, do tracepoint data collection. Save registers. */
1692 buf
[i
++] = 0x60; /* pushad */
1693 buf
[i
++] = 0x68; /* push tpaddr aka $pc */
1694 *((int *)(buf
+ i
)) = (int) tpaddr
;
1696 buf
[i
++] = 0x9c; /* pushf */
1697 buf
[i
++] = 0x1e; /* push %ds */
1698 buf
[i
++] = 0x06; /* push %es */
1699 buf
[i
++] = 0x0f; /* push %fs */
1701 buf
[i
++] = 0x0f; /* push %gs */
1703 buf
[i
++] = 0x16; /* push %ss */
1704 buf
[i
++] = 0x0e; /* push %cs */
1705 append_insns (&buildaddr
, i
, buf
);
1707 /* Stack space for the collecting_t object. */
1709 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1711 /* Build the object. */
1712 i
+= push_opcode (&buf
[i
], "b8"); /* mov <tpoint>,%eax */
1713 memcpy (buf
+ i
, &tpoint
, 4);
1715 i
+= push_opcode (&buf
[i
], "89 04 24"); /* mov %eax,(%esp) */
1717 i
+= push_opcode (&buf
[i
], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1718 i
+= push_opcode (&buf
[i
], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1719 append_insns (&buildaddr
, i
, buf
);
1721 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1722 If we cared for it, this could be using xchg alternatively. */
1725 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1726 i
+= push_opcode (&buf
[i
], "f0 0f b1 25"); /* lock cmpxchg
1728 memcpy (&buf
[i
], (void *) &lockaddr
, 4);
1730 i
+= push_opcode (&buf
[i
], "85 c0"); /* test %eax,%eax */
1731 i
+= push_opcode (&buf
[i
], "75 f2"); /* jne <again> */
1732 append_insns (&buildaddr
, i
, buf
);
1735 /* Set up arguments to the gdb_collect call. */
1737 i
+= push_opcode (&buf
[i
], "89 e0"); /* mov %esp,%eax */
1738 i
+= push_opcode (&buf
[i
], "83 c0 08"); /* add $0x08,%eax */
1739 i
+= push_opcode (&buf
[i
], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1740 append_insns (&buildaddr
, i
, buf
);
1743 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1744 append_insns (&buildaddr
, i
, buf
);
1747 i
+= push_opcode (&buf
[i
], "c7 04 24"); /* movl <addr>,(%esp) */
1748 memcpy (&buf
[i
], (void *) &tpoint
, 4);
1750 append_insns (&buildaddr
, i
, buf
);
1752 buf
[0] = 0xe8; /* call <reladdr> */
1753 offset
= collector
- (buildaddr
+ sizeof (jump_insn
));
1754 memcpy (buf
+ 1, &offset
, 4);
1755 append_insns (&buildaddr
, 5, buf
);
1756 /* Clean up after the call. */
1757 buf
[0] = 0x83; /* add $0x8,%esp */
1760 append_insns (&buildaddr
, 3, buf
);
1763 /* Clear the spin-lock. This would need the LOCK prefix on older
1766 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1767 i
+= push_opcode (&buf
[i
], "a3"); /* mov %eax, lockaddr */
1768 memcpy (buf
+ i
, &lockaddr
, 4);
1770 append_insns (&buildaddr
, i
, buf
);
1773 /* Remove stack that had been used for the collect_t object. */
1775 i
+= push_opcode (&buf
[i
], "83 c4 08"); /* add $0x08,%esp */
1776 append_insns (&buildaddr
, i
, buf
);
1779 buf
[i
++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1782 buf
[i
++] = 0x17; /* pop %ss */
1783 buf
[i
++] = 0x0f; /* pop %gs */
1785 buf
[i
++] = 0x0f; /* pop %fs */
1787 buf
[i
++] = 0x07; /* pop %es */
1788 buf
[i
++] = 0x1f; /* pop %ds */
1789 buf
[i
++] = 0x9d; /* popf */
1790 buf
[i
++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1793 buf
[i
++] = 0x61; /* popad */
1794 append_insns (&buildaddr
, i
, buf
);
1796 /* Now, adjust the original instruction to execute in the jump
1798 *adjusted_insn_addr
= buildaddr
;
1799 relocate_instruction (&buildaddr
, tpaddr
);
1800 *adjusted_insn_addr_end
= buildaddr
;
1802 /* Write the jump back to the program. */
1803 offset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1804 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1805 memcpy (buf
+ 1, &offset
, 4);
1806 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1808 /* The jump pad is now built. Wire in a jump to our jump pad. This
1809 is always done last (by our caller actually), so that we can
1810 install fast tracepoints with threads running. This relies on
1811 the agent's atomic write support. */
1814 /* Create a trampoline. */
1815 *trampoline_size
= sizeof (jump_insn
);
1816 if (!claim_trampoline_space (*trampoline_size
, trampoline
))
1818 /* No trampoline space available. */
1820 "E.Cannot allocate trampoline space needed for fast "
1821 "tracepoints on 4-byte instructions.");
1825 offset
= *jump_entry
- (*trampoline
+ sizeof (jump_insn
));
1826 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1827 memcpy (buf
+ 1, &offset
, 4);
1828 write_inferior_memory (*trampoline
, buf
, sizeof (jump_insn
));
1830 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1831 offset
= (*trampoline
- (tpaddr
+ sizeof (small_jump_insn
))) & 0xffff;
1832 memcpy (buf
, small_jump_insn
, sizeof (small_jump_insn
));
1833 memcpy (buf
+ 2, &offset
, 2);
1834 memcpy (jjump_pad_insn
, buf
, sizeof (small_jump_insn
));
1835 *jjump_pad_insn_size
= sizeof (small_jump_insn
);
1839 /* Else use a 32-bit relative jump instruction. */
1840 offset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1841 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1842 memcpy (buf
+ 1, &offset
, 4);
1843 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1844 *jjump_pad_insn_size
= sizeof (jump_insn
);
1847 /* Return the end address of our pad. */
1848 *jump_entry
= buildaddr
;
1854 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1855 CORE_ADDR collector
,
1858 CORE_ADDR
*jump_entry
,
1859 CORE_ADDR
*trampoline
,
1860 ULONGEST
*trampoline_size
,
1861 unsigned char *jjump_pad_insn
,
1862 ULONGEST
*jjump_pad_insn_size
,
1863 CORE_ADDR
*adjusted_insn_addr
,
1864 CORE_ADDR
*adjusted_insn_addr_end
,
1868 if (is_64bit_tdesc ())
1869 return amd64_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1870 collector
, lockaddr
,
1871 orig_size
, jump_entry
,
1872 trampoline
, trampoline_size
,
1874 jjump_pad_insn_size
,
1876 adjusted_insn_addr_end
,
1880 return i386_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1881 collector
, lockaddr
,
1882 orig_size
, jump_entry
,
1883 trampoline
, trampoline_size
,
1885 jjump_pad_insn_size
,
1887 adjusted_insn_addr_end
,
1891 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1895 x86_get_min_fast_tracepoint_insn_len (void)
1897 static int warned_about_fast_tracepoints
= 0;
1900 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1901 used for fast tracepoints. */
1902 if (is_64bit_tdesc ())
1906 if (agent_loaded_p ())
1908 char errbuf
[IPA_BUFSIZ
];
1912 /* On x86, if trampolines are available, then 4-byte jump instructions
1913 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1914 with a 4-byte offset are used instead. */
1915 if (have_fast_tracepoint_trampoline_buffer (errbuf
))
1919 /* GDB has no channel to explain to user why a shorter fast
1920 tracepoint is not possible, but at least make GDBserver
1921 mention that something has gone awry. */
1922 if (!warned_about_fast_tracepoints
)
1924 warning ("4-byte fast tracepoints not available; %s\n", errbuf
);
1925 warned_about_fast_tracepoints
= 1;
1932 /* Indicate that the minimum length is currently unknown since the IPA
1933 has not loaded yet. */
1939 add_insns (unsigned char *start
, int len
)
1941 CORE_ADDR buildaddr
= current_insn_ptr
;
1944 debug_printf ("Adding %d bytes of insn at %s\n",
1945 len
, paddress (buildaddr
));
1947 append_insns (&buildaddr
, len
, start
);
1948 current_insn_ptr
= buildaddr
;
1951 /* Our general strategy for emitting code is to avoid specifying raw
1952 bytes whenever possible, and instead copy a block of inline asm
1953 that is embedded in the function. This is a little messy, because
1954 we need to keep the compiler from discarding what looks like dead
1955 code, plus suppress various warnings. */
1957 #define EMIT_ASM(NAME, INSNS) \
1960 extern unsigned char start_ ## NAME, end_ ## NAME; \
1961 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1962 __asm__ ("jmp end_" #NAME "\n" \
1963 "\t" "start_" #NAME ":" \
1965 "\t" "end_" #NAME ":"); \
1970 #define EMIT_ASM32(NAME,INSNS) \
1973 extern unsigned char start_ ## NAME, end_ ## NAME; \
1974 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1975 __asm__ (".code32\n" \
1976 "\t" "jmp end_" #NAME "\n" \
1977 "\t" "start_" #NAME ":\n" \
1979 "\t" "end_" #NAME ":\n" \
1985 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
1992 amd64_emit_prologue (void)
1994 EMIT_ASM (amd64_prologue
,
1996 "movq %rsp,%rbp\n\t"
1997 "sub $0x20,%rsp\n\t"
1998 "movq %rdi,-8(%rbp)\n\t"
1999 "movq %rsi,-16(%rbp)");
2004 amd64_emit_epilogue (void)
2006 EMIT_ASM (amd64_epilogue
,
2007 "movq -16(%rbp),%rdi\n\t"
2008 "movq %rax,(%rdi)\n\t"
2015 amd64_emit_add (void)
2017 EMIT_ASM (amd64_add
,
2018 "add (%rsp),%rax\n\t"
2019 "lea 0x8(%rsp),%rsp");
2023 amd64_emit_sub (void)
2025 EMIT_ASM (amd64_sub
,
2026 "sub %rax,(%rsp)\n\t"
2031 amd64_emit_mul (void)
2037 amd64_emit_lsh (void)
2043 amd64_emit_rsh_signed (void)
2049 amd64_emit_rsh_unsigned (void)
2055 amd64_emit_ext (int arg
)
2060 EMIT_ASM (amd64_ext_8
,
2066 EMIT_ASM (amd64_ext_16
,
2071 EMIT_ASM (amd64_ext_32
,
2080 amd64_emit_log_not (void)
2082 EMIT_ASM (amd64_log_not
,
2083 "test %rax,%rax\n\t"
2089 amd64_emit_bit_and (void)
2091 EMIT_ASM (amd64_and
,
2092 "and (%rsp),%rax\n\t"
2093 "lea 0x8(%rsp),%rsp");
2097 amd64_emit_bit_or (void)
2100 "or (%rsp),%rax\n\t"
2101 "lea 0x8(%rsp),%rsp");
2105 amd64_emit_bit_xor (void)
2107 EMIT_ASM (amd64_xor
,
2108 "xor (%rsp),%rax\n\t"
2109 "lea 0x8(%rsp),%rsp");
2113 amd64_emit_bit_not (void)
2115 EMIT_ASM (amd64_bit_not
,
2116 "xorq $0xffffffffffffffff,%rax");
2120 amd64_emit_equal (void)
2122 EMIT_ASM (amd64_equal
,
2123 "cmp %rax,(%rsp)\n\t"
2124 "je .Lamd64_equal_true\n\t"
2126 "jmp .Lamd64_equal_end\n\t"
2127 ".Lamd64_equal_true:\n\t"
2129 ".Lamd64_equal_end:\n\t"
2130 "lea 0x8(%rsp),%rsp");
2134 amd64_emit_less_signed (void)
2136 EMIT_ASM (amd64_less_signed
,
2137 "cmp %rax,(%rsp)\n\t"
2138 "jl .Lamd64_less_signed_true\n\t"
2140 "jmp .Lamd64_less_signed_end\n\t"
2141 ".Lamd64_less_signed_true:\n\t"
2143 ".Lamd64_less_signed_end:\n\t"
2144 "lea 0x8(%rsp),%rsp");
2148 amd64_emit_less_unsigned (void)
2150 EMIT_ASM (amd64_less_unsigned
,
2151 "cmp %rax,(%rsp)\n\t"
2152 "jb .Lamd64_less_unsigned_true\n\t"
2154 "jmp .Lamd64_less_unsigned_end\n\t"
2155 ".Lamd64_less_unsigned_true:\n\t"
2157 ".Lamd64_less_unsigned_end:\n\t"
2158 "lea 0x8(%rsp),%rsp");
2162 amd64_emit_ref (int size
)
2167 EMIT_ASM (amd64_ref1
,
2171 EMIT_ASM (amd64_ref2
,
2175 EMIT_ASM (amd64_ref4
,
2176 "movl (%rax),%eax");
2179 EMIT_ASM (amd64_ref8
,
2180 "movq (%rax),%rax");
2186 amd64_emit_if_goto (int *offset_p
, int *size_p
)
2188 EMIT_ASM (amd64_if_goto
,
2192 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2200 amd64_emit_goto (int *offset_p
, int *size_p
)
2202 EMIT_ASM (amd64_goto
,
2203 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2211 amd64_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2213 int diff
= (to
- (from
+ size
));
2214 unsigned char buf
[sizeof (int)];
2222 memcpy (buf
, &diff
, sizeof (int));
2223 write_inferior_memory (from
, buf
, sizeof (int));
2227 amd64_emit_const (LONGEST num
)
2229 unsigned char buf
[16];
2231 CORE_ADDR buildaddr
= current_insn_ptr
;
2234 buf
[i
++] = 0x48; buf
[i
++] = 0xb8; /* mov $<n>,%rax */
2235 memcpy (&buf
[i
], &num
, sizeof (num
));
2237 append_insns (&buildaddr
, i
, buf
);
2238 current_insn_ptr
= buildaddr
;
2242 amd64_emit_call (CORE_ADDR fn
)
2244 unsigned char buf
[16];
2246 CORE_ADDR buildaddr
;
2249 /* The destination function being in the shared library, may be
2250 >31-bits away off the compiled code pad. */
2252 buildaddr
= current_insn_ptr
;
2254 offset64
= fn
- (buildaddr
+ 1 /* call op */ + 4 /* 32-bit offset */);
2258 if (offset64
> INT_MAX
|| offset64
< INT_MIN
)
2260 /* Offset is too large for a call. Use callq, but that requires
2261 a register, so avoid it if possible. Use r10, since it is
2262 call-clobbered, we don't have to push/pop it. */
2263 buf
[i
++] = 0x48; /* mov $fn,%r10 */
2265 memcpy (buf
+ i
, &fn
, 8);
2267 buf
[i
++] = 0xff; /* callq *%r10 */
2272 int offset32
= offset64
; /* we know we can't overflow here. */
2273 memcpy (buf
+ i
, &offset32
, 4);
2277 append_insns (&buildaddr
, i
, buf
);
2278 current_insn_ptr
= buildaddr
;
2282 amd64_emit_reg (int reg
)
2284 unsigned char buf
[16];
2286 CORE_ADDR buildaddr
;
2288 /* Assume raw_regs is still in %rdi. */
2289 buildaddr
= current_insn_ptr
;
2291 buf
[i
++] = 0xbe; /* mov $<n>,%esi */
2292 memcpy (&buf
[i
], ®
, sizeof (reg
));
2294 append_insns (&buildaddr
, i
, buf
);
2295 current_insn_ptr
= buildaddr
;
2296 amd64_emit_call (get_raw_reg_func_addr ());
2300 amd64_emit_pop (void)
2302 EMIT_ASM (amd64_pop
,
2307 amd64_emit_stack_flush (void)
2309 EMIT_ASM (amd64_stack_flush
,
2314 amd64_emit_zero_ext (int arg
)
2319 EMIT_ASM (amd64_zero_ext_8
,
2323 EMIT_ASM (amd64_zero_ext_16
,
2324 "and $0xffff,%rax");
2327 EMIT_ASM (amd64_zero_ext_32
,
2328 "mov $0xffffffff,%rcx\n\t"
2337 amd64_emit_swap (void)
2339 EMIT_ASM (amd64_swap
,
2346 amd64_emit_stack_adjust (int n
)
2348 unsigned char buf
[16];
2350 CORE_ADDR buildaddr
= current_insn_ptr
;
2353 buf
[i
++] = 0x48; /* lea $<n>(%rsp),%rsp */
2357 /* This only handles adjustments up to 16, but we don't expect any more. */
2359 append_insns (&buildaddr
, i
, buf
);
2360 current_insn_ptr
= buildaddr
;
2363 /* FN's prototype is `LONGEST(*fn)(int)'. */
2366 amd64_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2368 unsigned char buf
[16];
2370 CORE_ADDR buildaddr
;
2372 buildaddr
= current_insn_ptr
;
2374 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2375 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2377 append_insns (&buildaddr
, i
, buf
);
2378 current_insn_ptr
= buildaddr
;
2379 amd64_emit_call (fn
);
2382 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2385 amd64_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
2387 unsigned char buf
[16];
2389 CORE_ADDR buildaddr
;
2391 buildaddr
= current_insn_ptr
;
2393 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2394 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2396 append_insns (&buildaddr
, i
, buf
);
2397 current_insn_ptr
= buildaddr
;
2398 EMIT_ASM (amd64_void_call_2_a
,
2399 /* Save away a copy of the stack top. */
2401 /* Also pass top as the second argument. */
2403 amd64_emit_call (fn
);
2404 EMIT_ASM (amd64_void_call_2_b
,
2405 /* Restore the stack top, %rax may have been trashed. */
2410 amd64_emit_eq_goto (int *offset_p
, int *size_p
)
2413 "cmp %rax,(%rsp)\n\t"
2414 "jne .Lamd64_eq_fallthru\n\t"
2415 "lea 0x8(%rsp),%rsp\n\t"
2417 /* jmp, but don't trust the assembler to choose the right jump */
2418 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2419 ".Lamd64_eq_fallthru:\n\t"
2420 "lea 0x8(%rsp),%rsp\n\t"
2430 amd64_emit_ne_goto (int *offset_p
, int *size_p
)
2433 "cmp %rax,(%rsp)\n\t"
2434 "je .Lamd64_ne_fallthru\n\t"
2435 "lea 0x8(%rsp),%rsp\n\t"
2437 /* jmp, but don't trust the assembler to choose the right jump */
2438 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2439 ".Lamd64_ne_fallthru:\n\t"
2440 "lea 0x8(%rsp),%rsp\n\t"
2450 amd64_emit_lt_goto (int *offset_p
, int *size_p
)
2453 "cmp %rax,(%rsp)\n\t"
2454 "jnl .Lamd64_lt_fallthru\n\t"
2455 "lea 0x8(%rsp),%rsp\n\t"
2457 /* jmp, but don't trust the assembler to choose the right jump */
2458 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2459 ".Lamd64_lt_fallthru:\n\t"
2460 "lea 0x8(%rsp),%rsp\n\t"
2470 amd64_emit_le_goto (int *offset_p
, int *size_p
)
2473 "cmp %rax,(%rsp)\n\t"
2474 "jnle .Lamd64_le_fallthru\n\t"
2475 "lea 0x8(%rsp),%rsp\n\t"
2477 /* jmp, but don't trust the assembler to choose the right jump */
2478 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2479 ".Lamd64_le_fallthru:\n\t"
2480 "lea 0x8(%rsp),%rsp\n\t"
2490 amd64_emit_gt_goto (int *offset_p
, int *size_p
)
2493 "cmp %rax,(%rsp)\n\t"
2494 "jng .Lamd64_gt_fallthru\n\t"
2495 "lea 0x8(%rsp),%rsp\n\t"
2497 /* jmp, but don't trust the assembler to choose the right jump */
2498 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2499 ".Lamd64_gt_fallthru:\n\t"
2500 "lea 0x8(%rsp),%rsp\n\t"
2510 amd64_emit_ge_goto (int *offset_p
, int *size_p
)
2513 "cmp %rax,(%rsp)\n\t"
2514 "jnge .Lamd64_ge_fallthru\n\t"
2515 ".Lamd64_ge_jump:\n\t"
2516 "lea 0x8(%rsp),%rsp\n\t"
2518 /* jmp, but don't trust the assembler to choose the right jump */
2519 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2520 ".Lamd64_ge_fallthru:\n\t"
2521 "lea 0x8(%rsp),%rsp\n\t"
2530 struct emit_ops amd64_emit_ops
=
2532 amd64_emit_prologue
,
2533 amd64_emit_epilogue
,
2538 amd64_emit_rsh_signed
,
2539 amd64_emit_rsh_unsigned
,
2547 amd64_emit_less_signed
,
2548 amd64_emit_less_unsigned
,
2552 amd64_write_goto_address
,
2557 amd64_emit_stack_flush
,
2558 amd64_emit_zero_ext
,
2560 amd64_emit_stack_adjust
,
2561 amd64_emit_int_call_1
,
2562 amd64_emit_void_call_2
,
2571 #endif /* __x86_64__ */
2574 i386_emit_prologue (void)
2576 EMIT_ASM32 (i386_prologue
,
2580 /* At this point, the raw regs base address is at 8(%ebp), and the
2581 value pointer is at 12(%ebp). */
2585 i386_emit_epilogue (void)
2587 EMIT_ASM32 (i386_epilogue
,
2588 "mov 12(%ebp),%ecx\n\t"
2589 "mov %eax,(%ecx)\n\t"
2590 "mov %ebx,0x4(%ecx)\n\t"
2598 i386_emit_add (void)
2600 EMIT_ASM32 (i386_add
,
2601 "add (%esp),%eax\n\t"
2602 "adc 0x4(%esp),%ebx\n\t"
2603 "lea 0x8(%esp),%esp");
2607 i386_emit_sub (void)
2609 EMIT_ASM32 (i386_sub
,
2610 "subl %eax,(%esp)\n\t"
2611 "sbbl %ebx,4(%esp)\n\t"
2617 i386_emit_mul (void)
2623 i386_emit_lsh (void)
2629 i386_emit_rsh_signed (void)
2635 i386_emit_rsh_unsigned (void)
2641 i386_emit_ext (int arg
)
2646 EMIT_ASM32 (i386_ext_8
,
2649 "movl %eax,%ebx\n\t"
2653 EMIT_ASM32 (i386_ext_16
,
2655 "movl %eax,%ebx\n\t"
2659 EMIT_ASM32 (i386_ext_32
,
2660 "movl %eax,%ebx\n\t"
2669 i386_emit_log_not (void)
2671 EMIT_ASM32 (i386_log_not
,
2673 "test %eax,%eax\n\t"
2680 i386_emit_bit_and (void)
2682 EMIT_ASM32 (i386_and
,
2683 "and (%esp),%eax\n\t"
2684 "and 0x4(%esp),%ebx\n\t"
2685 "lea 0x8(%esp),%esp");
2689 i386_emit_bit_or (void)
2691 EMIT_ASM32 (i386_or
,
2692 "or (%esp),%eax\n\t"
2693 "or 0x4(%esp),%ebx\n\t"
2694 "lea 0x8(%esp),%esp");
2698 i386_emit_bit_xor (void)
2700 EMIT_ASM32 (i386_xor
,
2701 "xor (%esp),%eax\n\t"
2702 "xor 0x4(%esp),%ebx\n\t"
2703 "lea 0x8(%esp),%esp");
2707 i386_emit_bit_not (void)
2709 EMIT_ASM32 (i386_bit_not
,
2710 "xor $0xffffffff,%eax\n\t"
2711 "xor $0xffffffff,%ebx\n\t");
2715 i386_emit_equal (void)
2717 EMIT_ASM32 (i386_equal
,
2718 "cmpl %ebx,4(%esp)\n\t"
2719 "jne .Li386_equal_false\n\t"
2720 "cmpl %eax,(%esp)\n\t"
2721 "je .Li386_equal_true\n\t"
2722 ".Li386_equal_false:\n\t"
2724 "jmp .Li386_equal_end\n\t"
2725 ".Li386_equal_true:\n\t"
2727 ".Li386_equal_end:\n\t"
2729 "lea 0x8(%esp),%esp");
2733 i386_emit_less_signed (void)
2735 EMIT_ASM32 (i386_less_signed
,
2736 "cmpl %ebx,4(%esp)\n\t"
2737 "jl .Li386_less_signed_true\n\t"
2738 "jne .Li386_less_signed_false\n\t"
2739 "cmpl %eax,(%esp)\n\t"
2740 "jl .Li386_less_signed_true\n\t"
2741 ".Li386_less_signed_false:\n\t"
2743 "jmp .Li386_less_signed_end\n\t"
2744 ".Li386_less_signed_true:\n\t"
2746 ".Li386_less_signed_end:\n\t"
2748 "lea 0x8(%esp),%esp");
2752 i386_emit_less_unsigned (void)
2754 EMIT_ASM32 (i386_less_unsigned
,
2755 "cmpl %ebx,4(%esp)\n\t"
2756 "jb .Li386_less_unsigned_true\n\t"
2757 "jne .Li386_less_unsigned_false\n\t"
2758 "cmpl %eax,(%esp)\n\t"
2759 "jb .Li386_less_unsigned_true\n\t"
2760 ".Li386_less_unsigned_false:\n\t"
2762 "jmp .Li386_less_unsigned_end\n\t"
2763 ".Li386_less_unsigned_true:\n\t"
2765 ".Li386_less_unsigned_end:\n\t"
2767 "lea 0x8(%esp),%esp");
2771 i386_emit_ref (int size
)
2776 EMIT_ASM32 (i386_ref1
,
2780 EMIT_ASM32 (i386_ref2
,
2784 EMIT_ASM32 (i386_ref4
,
2785 "movl (%eax),%eax");
2788 EMIT_ASM32 (i386_ref8
,
2789 "movl 4(%eax),%ebx\n\t"
2790 "movl (%eax),%eax");
2796 i386_emit_if_goto (int *offset_p
, int *size_p
)
2798 EMIT_ASM32 (i386_if_goto
,
2804 /* Don't trust the assembler to choose the right jump */
2805 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2808 *offset_p
= 11; /* be sure that this matches the sequence above */
2814 i386_emit_goto (int *offset_p
, int *size_p
)
2816 EMIT_ASM32 (i386_goto
,
2817 /* Don't trust the assembler to choose the right jump */
2818 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2826 i386_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2828 int diff
= (to
- (from
+ size
));
2829 unsigned char buf
[sizeof (int)];
2831 /* We're only doing 4-byte sizes at the moment. */
2838 memcpy (buf
, &diff
, sizeof (int));
2839 write_inferior_memory (from
, buf
, sizeof (int));
2843 i386_emit_const (LONGEST num
)
2845 unsigned char buf
[16];
2847 CORE_ADDR buildaddr
= current_insn_ptr
;
2850 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2851 lo
= num
& 0xffffffff;
2852 memcpy (&buf
[i
], &lo
, sizeof (lo
));
2854 hi
= ((num
>> 32) & 0xffffffff);
2857 buf
[i
++] = 0xbb; /* mov $<n>,%ebx */
2858 memcpy (&buf
[i
], &hi
, sizeof (hi
));
2863 buf
[i
++] = 0x31; buf
[i
++] = 0xdb; /* xor %ebx,%ebx */
2865 append_insns (&buildaddr
, i
, buf
);
2866 current_insn_ptr
= buildaddr
;
2870 i386_emit_call (CORE_ADDR fn
)
2872 unsigned char buf
[16];
2874 CORE_ADDR buildaddr
;
2876 buildaddr
= current_insn_ptr
;
2878 buf
[i
++] = 0xe8; /* call <reladdr> */
2879 offset
= ((int) fn
) - (buildaddr
+ 5);
2880 memcpy (buf
+ 1, &offset
, 4);
2881 append_insns (&buildaddr
, 5, buf
);
2882 current_insn_ptr
= buildaddr
;
2886 i386_emit_reg (int reg
)
2888 unsigned char buf
[16];
2890 CORE_ADDR buildaddr
;
2892 EMIT_ASM32 (i386_reg_a
,
2894 buildaddr
= current_insn_ptr
;
2896 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2897 memcpy (&buf
[i
], ®
, sizeof (reg
));
2899 append_insns (&buildaddr
, i
, buf
);
2900 current_insn_ptr
= buildaddr
;
2901 EMIT_ASM32 (i386_reg_b
,
2902 "mov %eax,4(%esp)\n\t"
2903 "mov 8(%ebp),%eax\n\t"
2905 i386_emit_call (get_raw_reg_func_addr ());
2906 EMIT_ASM32 (i386_reg_c
,
2908 "lea 0x8(%esp),%esp");
2912 i386_emit_pop (void)
2914 EMIT_ASM32 (i386_pop
,
2920 i386_emit_stack_flush (void)
2922 EMIT_ASM32 (i386_stack_flush
,
2928 i386_emit_zero_ext (int arg
)
2933 EMIT_ASM32 (i386_zero_ext_8
,
2934 "and $0xff,%eax\n\t"
2938 EMIT_ASM32 (i386_zero_ext_16
,
2939 "and $0xffff,%eax\n\t"
2943 EMIT_ASM32 (i386_zero_ext_32
,
2952 i386_emit_swap (void)
2954 EMIT_ASM32 (i386_swap
,
2964 i386_emit_stack_adjust (int n
)
2966 unsigned char buf
[16];
2968 CORE_ADDR buildaddr
= current_insn_ptr
;
2971 buf
[i
++] = 0x8d; /* lea $<n>(%esp),%esp */
2975 append_insns (&buildaddr
, i
, buf
);
2976 current_insn_ptr
= buildaddr
;
2979 /* FN's prototype is `LONGEST(*fn)(int)'. */
2982 i386_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2984 unsigned char buf
[16];
2986 CORE_ADDR buildaddr
;
2988 EMIT_ASM32 (i386_int_call_1_a
,
2989 /* Reserve a bit of stack space. */
2991 /* Put the one argument on the stack. */
2992 buildaddr
= current_insn_ptr
;
2994 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
2997 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2999 append_insns (&buildaddr
, i
, buf
);
3000 current_insn_ptr
= buildaddr
;
3001 i386_emit_call (fn
);
3002 EMIT_ASM32 (i386_int_call_1_c
,
3004 "lea 0x8(%esp),%esp");
3007 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
3010 i386_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
3012 unsigned char buf
[16];
3014 CORE_ADDR buildaddr
;
3016 EMIT_ASM32 (i386_void_call_2_a
,
3017 /* Preserve %eax only; we don't have to worry about %ebx. */
3019 /* Reserve a bit of stack space for arguments. */
3020 "sub $0x10,%esp\n\t"
3021 /* Copy "top" to the second argument position. (Note that
3022 we can't assume function won't scribble on its
3023 arguments, so don't try to restore from this.) */
3024 "mov %eax,4(%esp)\n\t"
3025 "mov %ebx,8(%esp)");
3026 /* Put the first argument on the stack. */
3027 buildaddr
= current_insn_ptr
;
3029 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3032 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3034 append_insns (&buildaddr
, i
, buf
);
3035 current_insn_ptr
= buildaddr
;
3036 i386_emit_call (fn
);
3037 EMIT_ASM32 (i386_void_call_2_b
,
3038 "lea 0x10(%esp),%esp\n\t"
3039 /* Restore original stack top. */
3045 i386_emit_eq_goto (int *offset_p
, int *size_p
)
3048 /* Check low half first, more likely to be decider */
3049 "cmpl %eax,(%esp)\n\t"
3050 "jne .Leq_fallthru\n\t"
3051 "cmpl %ebx,4(%esp)\n\t"
3052 "jne .Leq_fallthru\n\t"
3053 "lea 0x8(%esp),%esp\n\t"
3056 /* jmp, but don't trust the assembler to choose the right jump */
3057 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3058 ".Leq_fallthru:\n\t"
3059 "lea 0x8(%esp),%esp\n\t"
3070 i386_emit_ne_goto (int *offset_p
, int *size_p
)
3073 /* Check low half first, more likely to be decider */
3074 "cmpl %eax,(%esp)\n\t"
3076 "cmpl %ebx,4(%esp)\n\t"
3077 "je .Lne_fallthru\n\t"
3079 "lea 0x8(%esp),%esp\n\t"
3082 /* jmp, but don't trust the assembler to choose the right jump */
3083 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3084 ".Lne_fallthru:\n\t"
3085 "lea 0x8(%esp),%esp\n\t"
3096 i386_emit_lt_goto (int *offset_p
, int *size_p
)
3099 "cmpl %ebx,4(%esp)\n\t"
3101 "jne .Llt_fallthru\n\t"
3102 "cmpl %eax,(%esp)\n\t"
3103 "jnl .Llt_fallthru\n\t"
3105 "lea 0x8(%esp),%esp\n\t"
3108 /* jmp, but don't trust the assembler to choose the right jump */
3109 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3110 ".Llt_fallthru:\n\t"
3111 "lea 0x8(%esp),%esp\n\t"
3122 i386_emit_le_goto (int *offset_p
, int *size_p
)
3125 "cmpl %ebx,4(%esp)\n\t"
3127 "jne .Lle_fallthru\n\t"
3128 "cmpl %eax,(%esp)\n\t"
3129 "jnle .Lle_fallthru\n\t"
3131 "lea 0x8(%esp),%esp\n\t"
3134 /* jmp, but don't trust the assembler to choose the right jump */
3135 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3136 ".Lle_fallthru:\n\t"
3137 "lea 0x8(%esp),%esp\n\t"
3148 i386_emit_gt_goto (int *offset_p
, int *size_p
)
3151 "cmpl %ebx,4(%esp)\n\t"
3153 "jne .Lgt_fallthru\n\t"
3154 "cmpl %eax,(%esp)\n\t"
3155 "jng .Lgt_fallthru\n\t"
3157 "lea 0x8(%esp),%esp\n\t"
3160 /* jmp, but don't trust the assembler to choose the right jump */
3161 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3162 ".Lgt_fallthru:\n\t"
3163 "lea 0x8(%esp),%esp\n\t"
3174 i386_emit_ge_goto (int *offset_p
, int *size_p
)
3177 "cmpl %ebx,4(%esp)\n\t"
3179 "jne .Lge_fallthru\n\t"
3180 "cmpl %eax,(%esp)\n\t"
3181 "jnge .Lge_fallthru\n\t"
3183 "lea 0x8(%esp),%esp\n\t"
3186 /* jmp, but don't trust the assembler to choose the right jump */
3187 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3188 ".Lge_fallthru:\n\t"
3189 "lea 0x8(%esp),%esp\n\t"
3199 struct emit_ops i386_emit_ops
=
3207 i386_emit_rsh_signed
,
3208 i386_emit_rsh_unsigned
,
3216 i386_emit_less_signed
,
3217 i386_emit_less_unsigned
,
3221 i386_write_goto_address
,
3226 i386_emit_stack_flush
,
3229 i386_emit_stack_adjust
,
3230 i386_emit_int_call_1
,
3231 i386_emit_void_call_2
,
3241 static struct emit_ops
*
3245 if (is_64bit_tdesc ())
3246 return &amd64_emit_ops
;
3249 return &i386_emit_ops
;
3252 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
3254 static const gdb_byte
*
3255 x86_sw_breakpoint_from_kind (int kind
, int *size
)
3257 *size
= x86_breakpoint_len
;
3258 return x86_breakpoint
;
3262 x86_supports_range_stepping (void)
3267 /* Implementation of linux_target_ops method "supports_hardware_single_step".
3271 x86_supports_hardware_single_step (void)
3276 /* This is initialized assuming an amd64 target.
3277 x86_arch_setup will correct it for i386 or amd64 targets. */
3279 struct linux_target_ops the_low_target
=
3282 x86_linux_regs_info
,
3283 x86_cannot_fetch_register
,
3284 x86_cannot_store_register
,
3285 NULL
, /* fetch_register */
3288 NULL
, /* breakpoint_kind_from_pc */
3289 x86_sw_breakpoint_from_kind
,
3293 x86_supports_z_point_type
,
3296 x86_stopped_by_watchpoint
,
3297 x86_stopped_data_address
,
3298 /* collect_ptrace_register/supply_ptrace_register are not needed in the
3299 native i386 case (no registers smaller than an xfer unit), and are not
3300 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
3303 /* need to fix up i386 siginfo if host is amd64 */
3305 x86_linux_new_process
,
3306 x86_linux_new_thread
,
3308 x86_linux_prepare_to_resume
,
3309 x86_linux_process_qsupported
,
3310 x86_supports_tracepoints
,
3311 x86_get_thread_area
,
3312 x86_install_fast_tracepoint_jump_pad
,
3314 x86_get_min_fast_tracepoint_insn_len
,
3315 x86_supports_range_stepping
,
3316 NULL
, /* breakpoint_kind_from_current_state */
3317 x86_supports_hardware_single_step
,
3321 initialize_low_arch (void)
3323 /* Initialize the Linux target descriptions. */
3325 init_registers_amd64_linux ();
3326 init_registers_amd64_avx_linux ();
3327 init_registers_amd64_avx512_linux ();
3328 init_registers_amd64_mpx_linux ();
3330 init_registers_x32_linux ();
3331 init_registers_x32_avx_linux ();
3332 init_registers_x32_avx512_linux ();
3334 tdesc_amd64_linux_no_xml
= XNEW (struct target_desc
);
3335 copy_target_description (tdesc_amd64_linux_no_xml
, tdesc_amd64_linux
);
3336 tdesc_amd64_linux_no_xml
->xmltarget
= xmltarget_amd64_linux_no_xml
;
3338 init_registers_i386_linux ();
3339 init_registers_i386_mmx_linux ();
3340 init_registers_i386_avx_linux ();
3341 init_registers_i386_avx512_linux ();
3342 init_registers_i386_mpx_linux ();
3344 tdesc_i386_linux_no_xml
= XNEW (struct target_desc
);
3345 copy_target_description (tdesc_i386_linux_no_xml
, tdesc_i386_linux
);
3346 tdesc_i386_linux_no_xml
->xmltarget
= xmltarget_i386_linux_no_xml
;
3348 initialize_regsets_info (&x86_regsets_info
);