1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-low.h"
27 #include "x86-xstate.h"
28 #include "nat/gdb_ptrace.h"
30 #include "gdb_proc_service.h"
31 /* Don't include elf/common.h if linux/elf.h got included by
32 gdb_proc_service.h. */
34 #include "elf/common.h"
39 #include "tracepoint.h"
41 #include "nat/linux-nat.h"
42 #include "nat/x86-linux.h"
43 #include "nat/x86-linux-dregs.h"
46 /* Defined in auto-generated file amd64-linux.c. */
47 void init_registers_amd64_linux (void);
48 extern const struct target_desc
*tdesc_amd64_linux
;
50 /* Defined in auto-generated file amd64-avx-linux.c. */
51 void init_registers_amd64_avx_linux (void);
52 extern const struct target_desc
*tdesc_amd64_avx_linux
;
54 /* Defined in auto-generated file amd64-avx512-linux.c. */
55 void init_registers_amd64_avx512_linux (void);
56 extern const struct target_desc
*tdesc_amd64_avx512_linux
;
58 /* Defined in auto-generated file amd64-mpx-linux.c. */
59 void init_registers_amd64_mpx_linux (void);
60 extern const struct target_desc
*tdesc_amd64_mpx_linux
;
62 /* Defined in auto-generated file x32-linux.c. */
63 void init_registers_x32_linux (void);
64 extern const struct target_desc
*tdesc_x32_linux
;
66 /* Defined in auto-generated file x32-avx-linux.c. */
67 void init_registers_x32_avx_linux (void);
68 extern const struct target_desc
*tdesc_x32_avx_linux
;
70 /* Defined in auto-generated file x32-avx512-linux.c. */
71 void init_registers_x32_avx512_linux (void);
72 extern const struct target_desc
*tdesc_x32_avx512_linux
;
76 /* Defined in auto-generated file i386-linux.c. */
77 void init_registers_i386_linux (void);
78 extern const struct target_desc
*tdesc_i386_linux
;
80 /* Defined in auto-generated file i386-mmx-linux.c. */
81 void init_registers_i386_mmx_linux (void);
82 extern const struct target_desc
*tdesc_i386_mmx_linux
;
84 /* Defined in auto-generated file i386-avx-linux.c. */
85 void init_registers_i386_avx_linux (void);
86 extern const struct target_desc
*tdesc_i386_avx_linux
;
88 /* Defined in auto-generated file i386-avx512-linux.c. */
89 void init_registers_i386_avx512_linux (void);
90 extern const struct target_desc
*tdesc_i386_avx512_linux
;
92 /* Defined in auto-generated file i386-mpx-linux.c. */
93 void init_registers_i386_mpx_linux (void);
94 extern const struct target_desc
*tdesc_i386_mpx_linux
;
97 static struct target_desc
*tdesc_amd64_linux_no_xml
;
99 static struct target_desc
*tdesc_i386_linux_no_xml
;
102 static unsigned char jump_insn
[] = { 0xe9, 0, 0, 0, 0 };
103 static unsigned char small_jump_insn
[] = { 0x66, 0xe9, 0, 0 };
105 /* Backward compatibility for gdb without XML support. */
107 static const char *xmltarget_i386_linux_no_xml
= "@<target>\
108 <architecture>i386</architecture>\
109 <osabi>GNU/Linux</osabi>\
113 static const char *xmltarget_amd64_linux_no_xml
= "@<target>\
114 <architecture>i386:x86-64</architecture>\
115 <osabi>GNU/Linux</osabi>\
120 #include <sys/procfs.h>
121 #include "nat/gdb_ptrace.h"
124 #ifndef PTRACE_GET_THREAD_AREA
125 #define PTRACE_GET_THREAD_AREA 25
128 /* This definition comes from prctl.h, but some kernels may not have it. */
129 #ifndef PTRACE_ARCH_PRCTL
130 #define PTRACE_ARCH_PRCTL 30
133 /* The following definitions come from prctl.h, but may be absent
134 for certain configurations. */
136 #define ARCH_SET_GS 0x1001
137 #define ARCH_SET_FS 0x1002
138 #define ARCH_GET_FS 0x1003
139 #define ARCH_GET_GS 0x1004
142 /* Per-process arch-specific data we want to keep. */
144 struct arch_process_info
146 struct x86_debug_reg_state debug_reg_state
;
151 /* Mapping between the general-purpose registers in `struct user'
152 format and GDB's register array layout.
153 Note that the transfer layout uses 64-bit regs. */
154 static /*const*/ int i386_regmap
[] =
156 RAX
* 8, RCX
* 8, RDX
* 8, RBX
* 8,
157 RSP
* 8, RBP
* 8, RSI
* 8, RDI
* 8,
158 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
159 DS
* 8, ES
* 8, FS
* 8, GS
* 8
162 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
164 /* So code below doesn't have to care, i386 or amd64. */
165 #define ORIG_EAX ORIG_RAX
168 static const int x86_64_regmap
[] =
170 RAX
* 8, RBX
* 8, RCX
* 8, RDX
* 8,
171 RSI
* 8, RDI
* 8, RBP
* 8, RSP
* 8,
172 R8
* 8, R9
* 8, R10
* 8, R11
* 8,
173 R12
* 8, R13
* 8, R14
* 8, R15
* 8,
174 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
175 DS
* 8, ES
* 8, FS
* 8, GS
* 8,
176 -1, -1, -1, -1, -1, -1, -1, -1,
177 -1, -1, -1, -1, -1, -1, -1, -1,
178 -1, -1, -1, -1, -1, -1, -1, -1,
180 -1, -1, -1, -1, -1, -1, -1, -1,
182 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
183 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
184 -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
185 -1, -1, -1, -1, -1, -1, -1, -1,
186 -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
187 -1, -1, -1, -1, -1, -1, -1, -1,
188 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
189 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
190 -1, -1, -1, -1, -1, -1, -1, -1,
191 -1, -1, -1, -1, -1, -1, -1, -1,
192 -1, -1, -1, -1, -1, -1, -1, -1
195 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
196 #define X86_64_USER_REGS (GS + 1)
198 #else /* ! __x86_64__ */
200 /* Mapping between the general-purpose registers in `struct user'
201 format and GDB's register array layout. */
202 static /*const*/ int i386_regmap
[] =
204 EAX
* 4, ECX
* 4, EDX
* 4, EBX
* 4,
205 UESP
* 4, EBP
* 4, ESI
* 4, EDI
* 4,
206 EIP
* 4, EFL
* 4, CS
* 4, SS
* 4,
207 DS
* 4, ES
* 4, FS
* 4, GS
* 4
210 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
218 /* Returns true if the current inferior belongs to a x86-64 process,
222 is_64bit_tdesc (void)
224 struct regcache
*regcache
= get_thread_regcache (current_thread
, 0);
226 return register_size (regcache
->tdesc
, 0) == 8;
232 /* Called by libthread_db. */
235 ps_get_thread_area (const struct ps_prochandle
*ph
,
236 lwpid_t lwpid
, int idx
, void **base
)
239 int use_64bit
= is_64bit_tdesc ();
246 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
250 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
261 unsigned int desc
[4];
263 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
,
264 (void *) (intptr_t) idx
, (unsigned long) &desc
) < 0)
267 /* Ensure we properly extend the value to 64-bits for x86_64. */
268 *base
= (void *) (uintptr_t) desc
[1];
273 /* Get the thread area address. This is used to recognize which
274 thread is which when tracing with the in-process agent library. We
275 don't read anything from the address, and treat it as opaque; it's
276 the address itself that we assume is unique per-thread. */
279 x86_get_thread_area (int lwpid
, CORE_ADDR
*addr
)
282 int use_64bit
= is_64bit_tdesc ();
287 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
289 *addr
= (CORE_ADDR
) (uintptr_t) base
;
298 struct lwp_info
*lwp
= find_lwp_pid (pid_to_ptid (lwpid
));
299 struct thread_info
*thr
= get_lwp_thread (lwp
);
300 struct regcache
*regcache
= get_thread_regcache (thr
, 1);
301 unsigned int desc
[4];
303 const int reg_thread_area
= 3; /* bits to scale down register value. */
306 collect_register_by_name (regcache
, "gs", &gs
);
308 idx
= gs
>> reg_thread_area
;
310 if (ptrace (PTRACE_GET_THREAD_AREA
,
312 (void *) (long) idx
, (unsigned long) &desc
) < 0)
323 x86_cannot_store_register (int regno
)
326 if (is_64bit_tdesc ())
330 return regno
>= I386_NUM_REGS
;
334 x86_cannot_fetch_register (int regno
)
337 if (is_64bit_tdesc ())
341 return regno
>= I386_NUM_REGS
;
345 x86_fill_gregset (struct regcache
*regcache
, void *buf
)
350 if (register_size (regcache
->tdesc
, 0) == 8)
352 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
353 if (x86_64_regmap
[i
] != -1)
354 collect_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
358 /* 32-bit inferior registers need to be zero-extended.
359 Callers would read uninitialized memory otherwise. */
360 memset (buf
, 0x00, X86_64_USER_REGS
* 8);
363 for (i
= 0; i
< I386_NUM_REGS
; i
++)
364 collect_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
366 collect_register_by_name (regcache
, "orig_eax",
367 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
371 x86_store_gregset (struct regcache
*regcache
, const void *buf
)
376 if (register_size (regcache
->tdesc
, 0) == 8)
378 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
379 if (x86_64_regmap
[i
] != -1)
380 supply_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
385 for (i
= 0; i
< I386_NUM_REGS
; i
++)
386 supply_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
388 supply_register_by_name (regcache
, "orig_eax",
389 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
393 x86_fill_fpregset (struct regcache
*regcache
, void *buf
)
396 i387_cache_to_fxsave (regcache
, buf
);
398 i387_cache_to_fsave (regcache
, buf
);
403 x86_store_fpregset (struct regcache
*regcache
, const void *buf
)
406 i387_fxsave_to_cache (regcache
, buf
);
408 i387_fsave_to_cache (regcache
, buf
);
415 x86_fill_fpxregset (struct regcache
*regcache
, void *buf
)
417 i387_cache_to_fxsave (regcache
, buf
);
421 x86_store_fpxregset (struct regcache
*regcache
, const void *buf
)
423 i387_fxsave_to_cache (regcache
, buf
);
429 x86_fill_xstateregset (struct regcache
*regcache
, void *buf
)
431 i387_cache_to_xsave (regcache
, buf
);
435 x86_store_xstateregset (struct regcache
*regcache
, const void *buf
)
437 i387_xsave_to_cache (regcache
, buf
);
440 /* ??? The non-biarch i386 case stores all the i387 regs twice.
441 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
442 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
443 doesn't work. IWBN to avoid the duplication in the case where it
444 does work. Maybe the arch_setup routine could check whether it works
445 and update the supported regsets accordingly. */
447 static struct regset_info x86_regsets
[] =
449 #ifdef HAVE_PTRACE_GETREGS
450 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, sizeof (elf_gregset_t
),
452 x86_fill_gregset
, x86_store_gregset
},
453 { PTRACE_GETREGSET
, PTRACE_SETREGSET
, NT_X86_XSTATE
, 0,
454 EXTENDED_REGS
, x86_fill_xstateregset
, x86_store_xstateregset
},
456 # ifdef HAVE_PTRACE_GETFPXREGS
457 { PTRACE_GETFPXREGS
, PTRACE_SETFPXREGS
, 0, sizeof (elf_fpxregset_t
),
459 x86_fill_fpxregset
, x86_store_fpxregset
},
462 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, sizeof (elf_fpregset_t
),
464 x86_fill_fpregset
, x86_store_fpregset
},
465 #endif /* HAVE_PTRACE_GETREGS */
470 x86_get_pc (struct regcache
*regcache
)
472 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
477 collect_register_by_name (regcache
, "rip", &pc
);
478 return (CORE_ADDR
) pc
;
483 collect_register_by_name (regcache
, "eip", &pc
);
484 return (CORE_ADDR
) pc
;
489 x86_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
491 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
495 unsigned long newpc
= pc
;
496 supply_register_by_name (regcache
, "rip", &newpc
);
500 unsigned int newpc
= pc
;
501 supply_register_by_name (regcache
, "eip", &newpc
);
505 static const gdb_byte x86_breakpoint
[] = { 0xCC };
506 #define x86_breakpoint_len 1
509 x86_breakpoint_at (CORE_ADDR pc
)
513 (*the_target
->read_memory
) (pc
, &c
, 1);
520 /* Low-level function vector. */
521 struct x86_dr_low_type x86_dr_low
=
523 x86_linux_dr_set_control
,
524 x86_linux_dr_set_addr
,
525 x86_linux_dr_get_addr
,
526 x86_linux_dr_get_status
,
527 x86_linux_dr_get_control
,
531 /* Breakpoint/Watchpoint support. */
534 x86_supports_z_point_type (char z_type
)
540 case Z_PACKET_WRITE_WP
:
541 case Z_PACKET_ACCESS_WP
:
549 x86_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
550 int size
, struct raw_breakpoint
*bp
)
552 struct process_info
*proc
= current_process ();
556 case raw_bkpt_type_hw
:
557 case raw_bkpt_type_write_wp
:
558 case raw_bkpt_type_access_wp
:
560 enum target_hw_bp_type hw_type
561 = raw_bkpt_type_to_target_hw_bp_type (type
);
562 struct x86_debug_reg_state
*state
563 = &proc
->priv
->arch_private
->debug_reg_state
;
565 return x86_dr_insert_watchpoint (state
, hw_type
, addr
, size
);
575 x86_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
576 int size
, struct raw_breakpoint
*bp
)
578 struct process_info
*proc
= current_process ();
582 case raw_bkpt_type_hw
:
583 case raw_bkpt_type_write_wp
:
584 case raw_bkpt_type_access_wp
:
586 enum target_hw_bp_type hw_type
587 = raw_bkpt_type_to_target_hw_bp_type (type
);
588 struct x86_debug_reg_state
*state
589 = &proc
->priv
->arch_private
->debug_reg_state
;
591 return x86_dr_remove_watchpoint (state
, hw_type
, addr
, size
);
600 x86_stopped_by_watchpoint (void)
602 struct process_info
*proc
= current_process ();
603 return x86_dr_stopped_by_watchpoint (&proc
->priv
->arch_private
->debug_reg_state
);
607 x86_stopped_data_address (void)
609 struct process_info
*proc
= current_process ();
611 if (x86_dr_stopped_data_address (&proc
->priv
->arch_private
->debug_reg_state
,
617 /* Called when a new process is created. */
619 static struct arch_process_info
*
620 x86_linux_new_process (void)
622 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
624 x86_low_init_dregs (&info
->debug_reg_state
);
629 /* Target routine for linux_new_fork. */
632 x86_linux_new_fork (struct process_info
*parent
, struct process_info
*child
)
634 /* These are allocated by linux_add_process. */
635 gdb_assert (parent
->priv
!= NULL
636 && parent
->priv
->arch_private
!= NULL
);
637 gdb_assert (child
->priv
!= NULL
638 && child
->priv
->arch_private
!= NULL
);
640 /* Linux kernel before 2.6.33 commit
641 72f674d203cd230426437cdcf7dd6f681dad8b0d
642 will inherit hardware debug registers from parent
643 on fork/vfork/clone. Newer Linux kernels create such tasks with
644 zeroed debug registers.
646 GDB core assumes the child inherits the watchpoints/hw
647 breakpoints of the parent, and will remove them all from the
648 forked off process. Copy the debug registers mirrors into the
649 new process so that all breakpoints and watchpoints can be
650 removed together. The debug registers mirror will become zeroed
651 in the end before detaching the forked off process, thus making
652 this compatible with older Linux kernels too. */
654 *child
->priv
->arch_private
= *parent
->priv
->arch_private
;
657 /* See nat/x86-dregs.h. */
659 struct x86_debug_reg_state
*
660 x86_debug_reg_state (pid_t pid
)
662 struct process_info
*proc
= find_process_pid (pid
);
664 return &proc
->priv
->arch_private
->debug_reg_state
;
667 /* When GDBSERVER is built as a 64-bit application on linux, the
668 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
669 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
670 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
671 conversion in-place ourselves. */
673 /* These types below (compat_*) define a siginfo type that is layout
674 compatible with the siginfo type exported by the 32-bit userspace
679 typedef int compat_int_t
;
680 typedef unsigned int compat_uptr_t
;
682 typedef int compat_time_t
;
683 typedef int compat_timer_t
;
684 typedef int compat_clock_t
;
686 struct compat_timeval
688 compat_time_t tv_sec
;
692 typedef union compat_sigval
694 compat_int_t sival_int
;
695 compat_uptr_t sival_ptr
;
698 typedef struct compat_siginfo
706 int _pad
[((128 / sizeof (int)) - 3)];
715 /* POSIX.1b timers */
720 compat_sigval_t _sigval
;
723 /* POSIX.1b signals */
728 compat_sigval_t _sigval
;
737 compat_clock_t _utime
;
738 compat_clock_t _stime
;
741 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
756 /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
757 typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t
;
759 typedef struct compat_x32_siginfo
767 int _pad
[((128 / sizeof (int)) - 3)];
776 /* POSIX.1b timers */
781 compat_sigval_t _sigval
;
784 /* POSIX.1b signals */
789 compat_sigval_t _sigval
;
798 compat_x32_clock_t _utime
;
799 compat_x32_clock_t _stime
;
802 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
815 } compat_x32_siginfo_t
__attribute__ ((__aligned__ (8)));
817 #define cpt_si_pid _sifields._kill._pid
818 #define cpt_si_uid _sifields._kill._uid
819 #define cpt_si_timerid _sifields._timer._tid
820 #define cpt_si_overrun _sifields._timer._overrun
821 #define cpt_si_status _sifields._sigchld._status
822 #define cpt_si_utime _sifields._sigchld._utime
823 #define cpt_si_stime _sifields._sigchld._stime
824 #define cpt_si_ptr _sifields._rt._sigval.sival_ptr
825 #define cpt_si_addr _sifields._sigfault._addr
826 #define cpt_si_band _sifields._sigpoll._band
827 #define cpt_si_fd _sifields._sigpoll._fd
829 /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
830 In their place is si_timer1,si_timer2. */
832 #define si_timerid si_timer1
835 #define si_overrun si_timer2
839 compat_siginfo_from_siginfo (compat_siginfo_t
*to
, siginfo_t
*from
)
841 memset (to
, 0, sizeof (*to
));
843 to
->si_signo
= from
->si_signo
;
844 to
->si_errno
= from
->si_errno
;
845 to
->si_code
= from
->si_code
;
847 if (to
->si_code
== SI_TIMER
)
849 to
->cpt_si_timerid
= from
->si_timerid
;
850 to
->cpt_si_overrun
= from
->si_overrun
;
851 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
853 else if (to
->si_code
== SI_USER
)
855 to
->cpt_si_pid
= from
->si_pid
;
856 to
->cpt_si_uid
= from
->si_uid
;
858 else if (to
->si_code
< 0)
860 to
->cpt_si_pid
= from
->si_pid
;
861 to
->cpt_si_uid
= from
->si_uid
;
862 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
866 switch (to
->si_signo
)
869 to
->cpt_si_pid
= from
->si_pid
;
870 to
->cpt_si_uid
= from
->si_uid
;
871 to
->cpt_si_status
= from
->si_status
;
872 to
->cpt_si_utime
= from
->si_utime
;
873 to
->cpt_si_stime
= from
->si_stime
;
879 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
882 to
->cpt_si_band
= from
->si_band
;
883 to
->cpt_si_fd
= from
->si_fd
;
886 to
->cpt_si_pid
= from
->si_pid
;
887 to
->cpt_si_uid
= from
->si_uid
;
888 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
895 siginfo_from_compat_siginfo (siginfo_t
*to
, compat_siginfo_t
*from
)
897 memset (to
, 0, sizeof (*to
));
899 to
->si_signo
= from
->si_signo
;
900 to
->si_errno
= from
->si_errno
;
901 to
->si_code
= from
->si_code
;
903 if (to
->si_code
== SI_TIMER
)
905 to
->si_timerid
= from
->cpt_si_timerid
;
906 to
->si_overrun
= from
->cpt_si_overrun
;
907 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
909 else if (to
->si_code
== SI_USER
)
911 to
->si_pid
= from
->cpt_si_pid
;
912 to
->si_uid
= from
->cpt_si_uid
;
914 else if (to
->si_code
< 0)
916 to
->si_pid
= from
->cpt_si_pid
;
917 to
->si_uid
= from
->cpt_si_uid
;
918 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
922 switch (to
->si_signo
)
925 to
->si_pid
= from
->cpt_si_pid
;
926 to
->si_uid
= from
->cpt_si_uid
;
927 to
->si_status
= from
->cpt_si_status
;
928 to
->si_utime
= from
->cpt_si_utime
;
929 to
->si_stime
= from
->cpt_si_stime
;
935 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
938 to
->si_band
= from
->cpt_si_band
;
939 to
->si_fd
= from
->cpt_si_fd
;
942 to
->si_pid
= from
->cpt_si_pid
;
943 to
->si_uid
= from
->cpt_si_uid
;
944 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
951 compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t
*to
,
954 memset (to
, 0, sizeof (*to
));
956 to
->si_signo
= from
->si_signo
;
957 to
->si_errno
= from
->si_errno
;
958 to
->si_code
= from
->si_code
;
960 if (to
->si_code
== SI_TIMER
)
962 to
->cpt_si_timerid
= from
->si_timerid
;
963 to
->cpt_si_overrun
= from
->si_overrun
;
964 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
966 else if (to
->si_code
== SI_USER
)
968 to
->cpt_si_pid
= from
->si_pid
;
969 to
->cpt_si_uid
= from
->si_uid
;
971 else if (to
->si_code
< 0)
973 to
->cpt_si_pid
= from
->si_pid
;
974 to
->cpt_si_uid
= from
->si_uid
;
975 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
979 switch (to
->si_signo
)
982 to
->cpt_si_pid
= from
->si_pid
;
983 to
->cpt_si_uid
= from
->si_uid
;
984 to
->cpt_si_status
= from
->si_status
;
985 to
->cpt_si_utime
= from
->si_utime
;
986 to
->cpt_si_stime
= from
->si_stime
;
992 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
995 to
->cpt_si_band
= from
->si_band
;
996 to
->cpt_si_fd
= from
->si_fd
;
999 to
->cpt_si_pid
= from
->si_pid
;
1000 to
->cpt_si_uid
= from
->si_uid
;
1001 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1008 siginfo_from_compat_x32_siginfo (siginfo_t
*to
,
1009 compat_x32_siginfo_t
*from
)
1011 memset (to
, 0, sizeof (*to
));
1013 to
->si_signo
= from
->si_signo
;
1014 to
->si_errno
= from
->si_errno
;
1015 to
->si_code
= from
->si_code
;
1017 if (to
->si_code
== SI_TIMER
)
1019 to
->si_timerid
= from
->cpt_si_timerid
;
1020 to
->si_overrun
= from
->cpt_si_overrun
;
1021 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1023 else if (to
->si_code
== SI_USER
)
1025 to
->si_pid
= from
->cpt_si_pid
;
1026 to
->si_uid
= from
->cpt_si_uid
;
1028 else if (to
->si_code
< 0)
1030 to
->si_pid
= from
->cpt_si_pid
;
1031 to
->si_uid
= from
->cpt_si_uid
;
1032 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1036 switch (to
->si_signo
)
1039 to
->si_pid
= from
->cpt_si_pid
;
1040 to
->si_uid
= from
->cpt_si_uid
;
1041 to
->si_status
= from
->cpt_si_status
;
1042 to
->si_utime
= from
->cpt_si_utime
;
1043 to
->si_stime
= from
->cpt_si_stime
;
1049 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1052 to
->si_band
= from
->cpt_si_band
;
1053 to
->si_fd
= from
->cpt_si_fd
;
1056 to
->si_pid
= from
->cpt_si_pid
;
1057 to
->si_uid
= from
->cpt_si_uid
;
1058 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1064 #endif /* __x86_64__ */
1066 /* Convert a native/host siginfo object, into/from the siginfo in the
1067 layout of the inferiors' architecture. Returns true if any
1068 conversion was done; false otherwise. If DIRECTION is 1, then copy
1069 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
1073 x86_siginfo_fixup (siginfo_t
*native
, void *inf
, int direction
)
1076 unsigned int machine
;
1077 int tid
= lwpid_of (current_thread
);
1078 int is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1080 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
1081 if (!is_64bit_tdesc ())
1083 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_siginfo_t
));
1086 compat_siginfo_from_siginfo ((struct compat_siginfo
*) inf
, native
);
1088 siginfo_from_compat_siginfo (native
, (struct compat_siginfo
*) inf
);
1092 /* No fixup for native x32 GDB. */
1093 else if (!is_elf64
&& sizeof (void *) == 8)
1095 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_x32_siginfo_t
));
1098 compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo
*) inf
,
1101 siginfo_from_compat_x32_siginfo (native
,
1102 (struct compat_x32_siginfo
*) inf
);
1113 /* Format of XSAVE extended state is:
1116 fxsave_bytes[0..463]
1117 sw_usable_bytes[464..511]
1118 xstate_hdr_bytes[512..575]
1123 Same memory layout will be used for the coredump NT_X86_XSTATE
1124 representing the XSAVE extended state registers.
1126 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
1127 extended state mask, which is the same as the extended control register
1128 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
1129 together with the mask saved in the xstate_hdr_bytes to determine what
1130 states the processor/OS supports and what state, used or initialized,
1131 the process/thread is in. */
1132 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
1134 /* Does the current host support the GETFPXREGS request? The header
1135 file may or may not define it, and even if it is defined, the
1136 kernel will return EIO if it's running on a pre-SSE processor. */
1137 int have_ptrace_getfpxregs
=
1138 #ifdef HAVE_PTRACE_GETFPXREGS
1145 /* Get Linux/x86 target description from running target. */
1147 static const struct target_desc
*
1148 x86_linux_read_description (void)
1150 unsigned int machine
;
1154 static uint64_t xcr0
;
1155 struct regset_info
*regset
;
1157 tid
= lwpid_of (current_thread
);
1159 is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1161 if (sizeof (void *) == 4)
1164 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
1166 else if (machine
== EM_X86_64
)
1167 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
1171 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
1172 if (machine
== EM_386
&& have_ptrace_getfpxregs
== -1)
1174 elf_fpxregset_t fpxregs
;
1176 if (ptrace (PTRACE_GETFPXREGS
, tid
, 0, (long) &fpxregs
) < 0)
1178 have_ptrace_getfpxregs
= 0;
1179 have_ptrace_getregset
= 0;
1180 return tdesc_i386_mmx_linux
;
1183 have_ptrace_getfpxregs
= 1;
1189 x86_xcr0
= X86_XSTATE_SSE_MASK
;
1191 /* Don't use XML. */
1193 if (machine
== EM_X86_64
)
1194 return tdesc_amd64_linux_no_xml
;
1197 return tdesc_i386_linux_no_xml
;
1200 if (have_ptrace_getregset
== -1)
1202 uint64_t xstateregs
[(X86_XSTATE_SSE_SIZE
/ sizeof (uint64_t))];
1205 iov
.iov_base
= xstateregs
;
1206 iov
.iov_len
= sizeof (xstateregs
);
1208 /* Check if PTRACE_GETREGSET works. */
1209 if (ptrace (PTRACE_GETREGSET
, tid
,
1210 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
1211 have_ptrace_getregset
= 0;
1214 have_ptrace_getregset
= 1;
1216 /* Get XCR0 from XSAVE extended state. */
1217 xcr0
= xstateregs
[(I386_LINUX_XSAVE_XCR0_OFFSET
1218 / sizeof (uint64_t))];
1220 /* Use PTRACE_GETREGSET if it is available. */
1221 for (regset
= x86_regsets
;
1222 regset
->fill_function
!= NULL
; regset
++)
1223 if (regset
->get_request
== PTRACE_GETREGSET
)
1224 regset
->size
= X86_XSTATE_SIZE (xcr0
);
1225 else if (regset
->type
!= GENERAL_REGS
)
1230 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
1231 xcr0_features
= (have_ptrace_getregset
1232 && (xcr0
& X86_XSTATE_ALL_MASK
));
1237 if (machine
== EM_X86_64
)
1244 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1246 case X86_XSTATE_AVX512_MASK
:
1247 return tdesc_amd64_avx512_linux
;
1249 case X86_XSTATE_MPX_MASK
:
1250 return tdesc_amd64_mpx_linux
;
1252 case X86_XSTATE_AVX_MASK
:
1253 return tdesc_amd64_avx_linux
;
1256 return tdesc_amd64_linux
;
1260 return tdesc_amd64_linux
;
1266 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1268 case X86_XSTATE_AVX512_MASK
:
1269 return tdesc_x32_avx512_linux
;
1271 case X86_XSTATE_MPX_MASK
: /* No MPX on x32. */
1272 case X86_XSTATE_AVX_MASK
:
1273 return tdesc_x32_avx_linux
;
1276 return tdesc_x32_linux
;
1280 return tdesc_x32_linux
;
1288 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1290 case (X86_XSTATE_AVX512_MASK
):
1291 return tdesc_i386_avx512_linux
;
1293 case (X86_XSTATE_MPX_MASK
):
1294 return tdesc_i386_mpx_linux
;
1296 case (X86_XSTATE_AVX_MASK
):
1297 return tdesc_i386_avx_linux
;
1300 return tdesc_i386_linux
;
1304 return tdesc_i386_linux
;
1307 gdb_assert_not_reached ("failed to return tdesc");
1310 /* Callback for find_inferior. Stops iteration when a thread with a
1311 given PID is found. */
1314 same_process_callback (struct inferior_list_entry
*entry
, void *data
)
1316 int pid
= *(int *) data
;
1318 return (ptid_get_pid (entry
->id
) == pid
);
1321 /* Callback for for_each_inferior. Calls the arch_setup routine for
1325 x86_arch_setup_process_callback (struct inferior_list_entry
*entry
)
1327 int pid
= ptid_get_pid (entry
->id
);
1329 /* Look up any thread of this processes. */
1331 = (struct thread_info
*) find_inferior (&all_threads
,
1332 same_process_callback
, &pid
);
1334 the_low_target
.arch_setup ();
1337 /* Update all the target description of all processes; a new GDB
1338 connected, and it may or not support xml target descriptions. */
1341 x86_linux_update_xmltarget (void)
1343 struct thread_info
*saved_thread
= current_thread
;
1345 /* Before changing the register cache's internal layout, flush the
1346 contents of the current valid caches back to the threads, and
1347 release the current regcache objects. */
1348 regcache_release ();
1350 for_each_inferior (&all_processes
, x86_arch_setup_process_callback
);
1352 current_thread
= saved_thread
;
1355 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
1356 PTRACE_GETREGSET. */
1359 x86_linux_process_qsupported (char **features
, int count
)
1363 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
1364 with "i386" in qSupported query, it supports x86 XML target
1367 for (i
= 0; i
< count
; i
++)
1369 const char *feature
= features
[i
];
1371 if (startswith (feature
, "xmlRegisters="))
1373 char *copy
= xstrdup (feature
+ 13);
1376 for (p
= strtok (copy
, ","); p
!= NULL
; p
= strtok (NULL
, ","))
1378 if (strcmp (p
, "i386") == 0)
1388 x86_linux_update_xmltarget ();
1391 /* Common for x86/x86-64. */
1393 static struct regsets_info x86_regsets_info
=
1395 x86_regsets
, /* regsets */
1396 0, /* num_regsets */
1397 NULL
, /* disabled_regsets */
1401 static struct regs_info amd64_linux_regs_info
=
1403 NULL
, /* regset_bitmap */
1404 NULL
, /* usrregs_info */
1408 static struct usrregs_info i386_linux_usrregs_info
=
1414 static struct regs_info i386_linux_regs_info
=
1416 NULL
, /* regset_bitmap */
1417 &i386_linux_usrregs_info
,
1421 const struct regs_info
*
1422 x86_linux_regs_info (void)
1425 if (is_64bit_tdesc ())
1426 return &amd64_linux_regs_info
;
1429 return &i386_linux_regs_info
;
1432 /* Initialize the target description for the architecture of the
1436 x86_arch_setup (void)
1438 current_process ()->tdesc
= x86_linux_read_description ();
1441 /* Fill *SYSNO and *SYSRET with the syscall nr trapped and the syscall return
1442 code. This should only be called if LWP got a SYSCALL_SIGTRAP. */
1445 x86_get_syscall_trapinfo (struct regcache
*regcache
, int *sysno
, int *sysret
)
1447 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
1454 collect_register_by_name (regcache
, "orig_rax", &l_sysno
);
1455 collect_register_by_name (regcache
, "rax", &l_sysret
);
1456 *sysno
= (int) l_sysno
;
1457 *sysret
= (int) l_sysret
;
1461 collect_register_by_name (regcache
, "orig_eax", sysno
);
1462 collect_register_by_name (regcache
, "eax", sysret
);
1467 x86_supports_tracepoints (void)
1473 append_insns (CORE_ADDR
*to
, size_t len
, const unsigned char *buf
)
1475 write_inferior_memory (*to
, buf
, len
);
1480 push_opcode (unsigned char *buf
, char *op
)
1482 unsigned char *buf_org
= buf
;
1487 unsigned long ul
= strtoul (op
, &endptr
, 16);
1496 return buf
- buf_org
;
1501 /* Build a jump pad that saves registers and calls a collection
1502 function. Writes a jump instruction to the jump pad to
1503 JJUMPAD_INSN. The caller is responsible to write it in at the
1504 tracepoint address. */
1507 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1508 CORE_ADDR collector
,
1511 CORE_ADDR
*jump_entry
,
1512 CORE_ADDR
*trampoline
,
1513 ULONGEST
*trampoline_size
,
1514 unsigned char *jjump_pad_insn
,
1515 ULONGEST
*jjump_pad_insn_size
,
1516 CORE_ADDR
*adjusted_insn_addr
,
1517 CORE_ADDR
*adjusted_insn_addr_end
,
1520 unsigned char buf
[40];
1524 CORE_ADDR buildaddr
= *jump_entry
;
1526 /* Build the jump pad. */
1528 /* First, do tracepoint data collection. Save registers. */
1530 /* Need to ensure stack pointer saved first. */
1531 buf
[i
++] = 0x54; /* push %rsp */
1532 buf
[i
++] = 0x55; /* push %rbp */
1533 buf
[i
++] = 0x57; /* push %rdi */
1534 buf
[i
++] = 0x56; /* push %rsi */
1535 buf
[i
++] = 0x52; /* push %rdx */
1536 buf
[i
++] = 0x51; /* push %rcx */
1537 buf
[i
++] = 0x53; /* push %rbx */
1538 buf
[i
++] = 0x50; /* push %rax */
1539 buf
[i
++] = 0x41; buf
[i
++] = 0x57; /* push %r15 */
1540 buf
[i
++] = 0x41; buf
[i
++] = 0x56; /* push %r14 */
1541 buf
[i
++] = 0x41; buf
[i
++] = 0x55; /* push %r13 */
1542 buf
[i
++] = 0x41; buf
[i
++] = 0x54; /* push %r12 */
1543 buf
[i
++] = 0x41; buf
[i
++] = 0x53; /* push %r11 */
1544 buf
[i
++] = 0x41; buf
[i
++] = 0x52; /* push %r10 */
1545 buf
[i
++] = 0x41; buf
[i
++] = 0x51; /* push %r9 */
1546 buf
[i
++] = 0x41; buf
[i
++] = 0x50; /* push %r8 */
1547 buf
[i
++] = 0x9c; /* pushfq */
1548 buf
[i
++] = 0x48; /* movl <addr>,%rdi */
1550 *((unsigned long *)(buf
+ i
)) = (unsigned long) tpaddr
;
1551 i
+= sizeof (unsigned long);
1552 buf
[i
++] = 0x57; /* push %rdi */
1553 append_insns (&buildaddr
, i
, buf
);
1555 /* Stack space for the collecting_t object. */
1557 i
+= push_opcode (&buf
[i
], "48 83 ec 18"); /* sub $0x18,%rsp */
1558 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov <tpoint>,%rax */
1559 memcpy (buf
+ i
, &tpoint
, 8);
1561 i
+= push_opcode (&buf
[i
], "48 89 04 24"); /* mov %rax,(%rsp) */
1562 i
+= push_opcode (&buf
[i
],
1563 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1564 i
+= push_opcode (&buf
[i
], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1565 append_insns (&buildaddr
, i
, buf
);
1569 i
+= push_opcode (&buf
[i
], "48 be"); /* movl <lockaddr>,%rsi */
1570 memcpy (&buf
[i
], (void *) &lockaddr
, 8);
1572 i
+= push_opcode (&buf
[i
], "48 89 e1"); /* mov %rsp,%rcx */
1573 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1574 i
+= push_opcode (&buf
[i
], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1575 i
+= push_opcode (&buf
[i
], "48 85 c0"); /* test %rax,%rax */
1576 i
+= push_opcode (&buf
[i
], "75 f4"); /* jne <again> */
1577 append_insns (&buildaddr
, i
, buf
);
1579 /* Set up the gdb_collect call. */
1580 /* At this point, (stack pointer + 0x18) is the base of our saved
1584 i
+= push_opcode (&buf
[i
], "48 89 e6"); /* mov %rsp,%rsi */
1585 i
+= push_opcode (&buf
[i
], "48 83 c6 18"); /* add $0x18,%rsi */
1587 /* tpoint address may be 64-bit wide. */
1588 i
+= push_opcode (&buf
[i
], "48 bf"); /* movl <addr>,%rdi */
1589 memcpy (buf
+ i
, &tpoint
, 8);
1591 append_insns (&buildaddr
, i
, buf
);
1593 /* The collector function being in the shared library, may be
1594 >31-bits away off the jump pad. */
1596 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov $collector,%rax */
1597 memcpy (buf
+ i
, &collector
, 8);
1599 i
+= push_opcode (&buf
[i
], "ff d0"); /* callq *%rax */
1600 append_insns (&buildaddr
, i
, buf
);
1602 /* Clear the spin-lock. */
1604 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1605 i
+= push_opcode (&buf
[i
], "48 a3"); /* mov %rax, lockaddr */
1606 memcpy (buf
+ i
, &lockaddr
, 8);
1608 append_insns (&buildaddr
, i
, buf
);
1610 /* Remove stack that had been used for the collect_t object. */
1612 i
+= push_opcode (&buf
[i
], "48 83 c4 18"); /* add $0x18,%rsp */
1613 append_insns (&buildaddr
, i
, buf
);
1615 /* Restore register state. */
1617 buf
[i
++] = 0x48; /* add $0x8,%rsp */
1621 buf
[i
++] = 0x9d; /* popfq */
1622 buf
[i
++] = 0x41; buf
[i
++] = 0x58; /* pop %r8 */
1623 buf
[i
++] = 0x41; buf
[i
++] = 0x59; /* pop %r9 */
1624 buf
[i
++] = 0x41; buf
[i
++] = 0x5a; /* pop %r10 */
1625 buf
[i
++] = 0x41; buf
[i
++] = 0x5b; /* pop %r11 */
1626 buf
[i
++] = 0x41; buf
[i
++] = 0x5c; /* pop %r12 */
1627 buf
[i
++] = 0x41; buf
[i
++] = 0x5d; /* pop %r13 */
1628 buf
[i
++] = 0x41; buf
[i
++] = 0x5e; /* pop %r14 */
1629 buf
[i
++] = 0x41; buf
[i
++] = 0x5f; /* pop %r15 */
1630 buf
[i
++] = 0x58; /* pop %rax */
1631 buf
[i
++] = 0x5b; /* pop %rbx */
1632 buf
[i
++] = 0x59; /* pop %rcx */
1633 buf
[i
++] = 0x5a; /* pop %rdx */
1634 buf
[i
++] = 0x5e; /* pop %rsi */
1635 buf
[i
++] = 0x5f; /* pop %rdi */
1636 buf
[i
++] = 0x5d; /* pop %rbp */
1637 buf
[i
++] = 0x5c; /* pop %rsp */
1638 append_insns (&buildaddr
, i
, buf
);
1640 /* Now, adjust the original instruction to execute in the jump
1642 *adjusted_insn_addr
= buildaddr
;
1643 relocate_instruction (&buildaddr
, tpaddr
);
1644 *adjusted_insn_addr_end
= buildaddr
;
1646 /* Finally, write a jump back to the program. */
1648 loffset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1649 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1652 "E.Jump back from jump pad too far from tracepoint "
1653 "(offset 0x%" PRIx64
" > int32).", loffset
);
1657 offset
= (int) loffset
;
1658 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1659 memcpy (buf
+ 1, &offset
, 4);
1660 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1662 /* The jump pad is now built. Wire in a jump to our jump pad. This
1663 is always done last (by our caller actually), so that we can
1664 install fast tracepoints with threads running. This relies on
1665 the agent's atomic write support. */
1666 loffset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1667 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1670 "E.Jump pad too far from tracepoint "
1671 "(offset 0x%" PRIx64
" > int32).", loffset
);
1675 offset
= (int) loffset
;
1677 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1678 memcpy (buf
+ 1, &offset
, 4);
1679 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1680 *jjump_pad_insn_size
= sizeof (jump_insn
);
1682 /* Return the end address of our pad. */
1683 *jump_entry
= buildaddr
;
1688 #endif /* __x86_64__ */
1690 /* Build a jump pad that saves registers and calls a collection
1691 function. Writes a jump instruction to the jump pad to
1692 JJUMPAD_INSN. The caller is responsible to write it in at the
1693 tracepoint address. */
1696 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1697 CORE_ADDR collector
,
1700 CORE_ADDR
*jump_entry
,
1701 CORE_ADDR
*trampoline
,
1702 ULONGEST
*trampoline_size
,
1703 unsigned char *jjump_pad_insn
,
1704 ULONGEST
*jjump_pad_insn_size
,
1705 CORE_ADDR
*adjusted_insn_addr
,
1706 CORE_ADDR
*adjusted_insn_addr_end
,
1709 unsigned char buf
[0x100];
1711 CORE_ADDR buildaddr
= *jump_entry
;
1713 /* Build the jump pad. */
1715 /* First, do tracepoint data collection. Save registers. */
1717 buf
[i
++] = 0x60; /* pushad */
1718 buf
[i
++] = 0x68; /* push tpaddr aka $pc */
1719 *((int *)(buf
+ i
)) = (int) tpaddr
;
1721 buf
[i
++] = 0x9c; /* pushf */
1722 buf
[i
++] = 0x1e; /* push %ds */
1723 buf
[i
++] = 0x06; /* push %es */
1724 buf
[i
++] = 0x0f; /* push %fs */
1726 buf
[i
++] = 0x0f; /* push %gs */
1728 buf
[i
++] = 0x16; /* push %ss */
1729 buf
[i
++] = 0x0e; /* push %cs */
1730 append_insns (&buildaddr
, i
, buf
);
1732 /* Stack space for the collecting_t object. */
1734 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1736 /* Build the object. */
1737 i
+= push_opcode (&buf
[i
], "b8"); /* mov <tpoint>,%eax */
1738 memcpy (buf
+ i
, &tpoint
, 4);
1740 i
+= push_opcode (&buf
[i
], "89 04 24"); /* mov %eax,(%esp) */
1742 i
+= push_opcode (&buf
[i
], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1743 i
+= push_opcode (&buf
[i
], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1744 append_insns (&buildaddr
, i
, buf
);
1746 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1747 If we cared for it, this could be using xchg alternatively. */
1750 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1751 i
+= push_opcode (&buf
[i
], "f0 0f b1 25"); /* lock cmpxchg
1753 memcpy (&buf
[i
], (void *) &lockaddr
, 4);
1755 i
+= push_opcode (&buf
[i
], "85 c0"); /* test %eax,%eax */
1756 i
+= push_opcode (&buf
[i
], "75 f2"); /* jne <again> */
1757 append_insns (&buildaddr
, i
, buf
);
1760 /* Set up arguments to the gdb_collect call. */
1762 i
+= push_opcode (&buf
[i
], "89 e0"); /* mov %esp,%eax */
1763 i
+= push_opcode (&buf
[i
], "83 c0 08"); /* add $0x08,%eax */
1764 i
+= push_opcode (&buf
[i
], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1765 append_insns (&buildaddr
, i
, buf
);
1768 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1769 append_insns (&buildaddr
, i
, buf
);
1772 i
+= push_opcode (&buf
[i
], "c7 04 24"); /* movl <addr>,(%esp) */
1773 memcpy (&buf
[i
], (void *) &tpoint
, 4);
1775 append_insns (&buildaddr
, i
, buf
);
1777 buf
[0] = 0xe8; /* call <reladdr> */
1778 offset
= collector
- (buildaddr
+ sizeof (jump_insn
));
1779 memcpy (buf
+ 1, &offset
, 4);
1780 append_insns (&buildaddr
, 5, buf
);
1781 /* Clean up after the call. */
1782 buf
[0] = 0x83; /* add $0x8,%esp */
1785 append_insns (&buildaddr
, 3, buf
);
1788 /* Clear the spin-lock. This would need the LOCK prefix on older
1791 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1792 i
+= push_opcode (&buf
[i
], "a3"); /* mov %eax, lockaddr */
1793 memcpy (buf
+ i
, &lockaddr
, 4);
1795 append_insns (&buildaddr
, i
, buf
);
1798 /* Remove stack that had been used for the collect_t object. */
1800 i
+= push_opcode (&buf
[i
], "83 c4 08"); /* add $0x08,%esp */
1801 append_insns (&buildaddr
, i
, buf
);
1804 buf
[i
++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1807 buf
[i
++] = 0x17; /* pop %ss */
1808 buf
[i
++] = 0x0f; /* pop %gs */
1810 buf
[i
++] = 0x0f; /* pop %fs */
1812 buf
[i
++] = 0x07; /* pop %es */
1813 buf
[i
++] = 0x1f; /* pop %ds */
1814 buf
[i
++] = 0x9d; /* popf */
1815 buf
[i
++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1818 buf
[i
++] = 0x61; /* popad */
1819 append_insns (&buildaddr
, i
, buf
);
1821 /* Now, adjust the original instruction to execute in the jump
1823 *adjusted_insn_addr
= buildaddr
;
1824 relocate_instruction (&buildaddr
, tpaddr
);
1825 *adjusted_insn_addr_end
= buildaddr
;
1827 /* Write the jump back to the program. */
1828 offset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1829 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1830 memcpy (buf
+ 1, &offset
, 4);
1831 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1833 /* The jump pad is now built. Wire in a jump to our jump pad. This
1834 is always done last (by our caller actually), so that we can
1835 install fast tracepoints with threads running. This relies on
1836 the agent's atomic write support. */
1839 /* Create a trampoline. */
1840 *trampoline_size
= sizeof (jump_insn
);
1841 if (!claim_trampoline_space (*trampoline_size
, trampoline
))
1843 /* No trampoline space available. */
1845 "E.Cannot allocate trampoline space needed for fast "
1846 "tracepoints on 4-byte instructions.");
1850 offset
= *jump_entry
- (*trampoline
+ sizeof (jump_insn
));
1851 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1852 memcpy (buf
+ 1, &offset
, 4);
1853 write_inferior_memory (*trampoline
, buf
, sizeof (jump_insn
));
1855 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1856 offset
= (*trampoline
- (tpaddr
+ sizeof (small_jump_insn
))) & 0xffff;
1857 memcpy (buf
, small_jump_insn
, sizeof (small_jump_insn
));
1858 memcpy (buf
+ 2, &offset
, 2);
1859 memcpy (jjump_pad_insn
, buf
, sizeof (small_jump_insn
));
1860 *jjump_pad_insn_size
= sizeof (small_jump_insn
);
1864 /* Else use a 32-bit relative jump instruction. */
1865 offset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1866 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1867 memcpy (buf
+ 1, &offset
, 4);
1868 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1869 *jjump_pad_insn_size
= sizeof (jump_insn
);
1872 /* Return the end address of our pad. */
1873 *jump_entry
= buildaddr
;
1879 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1880 CORE_ADDR collector
,
1883 CORE_ADDR
*jump_entry
,
1884 CORE_ADDR
*trampoline
,
1885 ULONGEST
*trampoline_size
,
1886 unsigned char *jjump_pad_insn
,
1887 ULONGEST
*jjump_pad_insn_size
,
1888 CORE_ADDR
*adjusted_insn_addr
,
1889 CORE_ADDR
*adjusted_insn_addr_end
,
1893 if (is_64bit_tdesc ())
1894 return amd64_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1895 collector
, lockaddr
,
1896 orig_size
, jump_entry
,
1897 trampoline
, trampoline_size
,
1899 jjump_pad_insn_size
,
1901 adjusted_insn_addr_end
,
1905 return i386_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1906 collector
, lockaddr
,
1907 orig_size
, jump_entry
,
1908 trampoline
, trampoline_size
,
1910 jjump_pad_insn_size
,
1912 adjusted_insn_addr_end
,
1916 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1920 x86_get_min_fast_tracepoint_insn_len (void)
1922 static int warned_about_fast_tracepoints
= 0;
1925 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1926 used for fast tracepoints. */
1927 if (is_64bit_tdesc ())
1931 if (agent_loaded_p ())
1933 char errbuf
[IPA_BUFSIZ
];
1937 /* On x86, if trampolines are available, then 4-byte jump instructions
1938 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1939 with a 4-byte offset are used instead. */
1940 if (have_fast_tracepoint_trampoline_buffer (errbuf
))
1944 /* GDB has no channel to explain to user why a shorter fast
1945 tracepoint is not possible, but at least make GDBserver
1946 mention that something has gone awry. */
1947 if (!warned_about_fast_tracepoints
)
1949 warning ("4-byte fast tracepoints not available; %s\n", errbuf
);
1950 warned_about_fast_tracepoints
= 1;
1957 /* Indicate that the minimum length is currently unknown since the IPA
1958 has not loaded yet. */
1964 add_insns (unsigned char *start
, int len
)
1966 CORE_ADDR buildaddr
= current_insn_ptr
;
1969 debug_printf ("Adding %d bytes of insn at %s\n",
1970 len
, paddress (buildaddr
));
1972 append_insns (&buildaddr
, len
, start
);
1973 current_insn_ptr
= buildaddr
;
1976 /* Our general strategy for emitting code is to avoid specifying raw
1977 bytes whenever possible, and instead copy a block of inline asm
1978 that is embedded in the function. This is a little messy, because
1979 we need to keep the compiler from discarding what looks like dead
1980 code, plus suppress various warnings. */
1982 #define EMIT_ASM(NAME, INSNS) \
1985 extern unsigned char start_ ## NAME, end_ ## NAME; \
1986 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1987 __asm__ ("jmp end_" #NAME "\n" \
1988 "\t" "start_" #NAME ":" \
1990 "\t" "end_" #NAME ":"); \
1995 #define EMIT_ASM32(NAME,INSNS) \
1998 extern unsigned char start_ ## NAME, end_ ## NAME; \
1999 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
2000 __asm__ (".code32\n" \
2001 "\t" "jmp end_" #NAME "\n" \
2002 "\t" "start_" #NAME ":\n" \
2004 "\t" "end_" #NAME ":\n" \
2010 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
2017 amd64_emit_prologue (void)
2019 EMIT_ASM (amd64_prologue
,
2021 "movq %rsp,%rbp\n\t"
2022 "sub $0x20,%rsp\n\t"
2023 "movq %rdi,-8(%rbp)\n\t"
2024 "movq %rsi,-16(%rbp)");
2029 amd64_emit_epilogue (void)
2031 EMIT_ASM (amd64_epilogue
,
2032 "movq -16(%rbp),%rdi\n\t"
2033 "movq %rax,(%rdi)\n\t"
2040 amd64_emit_add (void)
2042 EMIT_ASM (amd64_add
,
2043 "add (%rsp),%rax\n\t"
2044 "lea 0x8(%rsp),%rsp");
2048 amd64_emit_sub (void)
2050 EMIT_ASM (amd64_sub
,
2051 "sub %rax,(%rsp)\n\t"
2056 amd64_emit_mul (void)
2062 amd64_emit_lsh (void)
2068 amd64_emit_rsh_signed (void)
2074 amd64_emit_rsh_unsigned (void)
2080 amd64_emit_ext (int arg
)
2085 EMIT_ASM (amd64_ext_8
,
2091 EMIT_ASM (amd64_ext_16
,
2096 EMIT_ASM (amd64_ext_32
,
2105 amd64_emit_log_not (void)
2107 EMIT_ASM (amd64_log_not
,
2108 "test %rax,%rax\n\t"
2114 amd64_emit_bit_and (void)
2116 EMIT_ASM (amd64_and
,
2117 "and (%rsp),%rax\n\t"
2118 "lea 0x8(%rsp),%rsp");
2122 amd64_emit_bit_or (void)
2125 "or (%rsp),%rax\n\t"
2126 "lea 0x8(%rsp),%rsp");
2130 amd64_emit_bit_xor (void)
2132 EMIT_ASM (amd64_xor
,
2133 "xor (%rsp),%rax\n\t"
2134 "lea 0x8(%rsp),%rsp");
2138 amd64_emit_bit_not (void)
2140 EMIT_ASM (amd64_bit_not
,
2141 "xorq $0xffffffffffffffff,%rax");
2145 amd64_emit_equal (void)
2147 EMIT_ASM (amd64_equal
,
2148 "cmp %rax,(%rsp)\n\t"
2149 "je .Lamd64_equal_true\n\t"
2151 "jmp .Lamd64_equal_end\n\t"
2152 ".Lamd64_equal_true:\n\t"
2154 ".Lamd64_equal_end:\n\t"
2155 "lea 0x8(%rsp),%rsp");
2159 amd64_emit_less_signed (void)
2161 EMIT_ASM (amd64_less_signed
,
2162 "cmp %rax,(%rsp)\n\t"
2163 "jl .Lamd64_less_signed_true\n\t"
2165 "jmp .Lamd64_less_signed_end\n\t"
2166 ".Lamd64_less_signed_true:\n\t"
2168 ".Lamd64_less_signed_end:\n\t"
2169 "lea 0x8(%rsp),%rsp");
2173 amd64_emit_less_unsigned (void)
2175 EMIT_ASM (amd64_less_unsigned
,
2176 "cmp %rax,(%rsp)\n\t"
2177 "jb .Lamd64_less_unsigned_true\n\t"
2179 "jmp .Lamd64_less_unsigned_end\n\t"
2180 ".Lamd64_less_unsigned_true:\n\t"
2182 ".Lamd64_less_unsigned_end:\n\t"
2183 "lea 0x8(%rsp),%rsp");
2187 amd64_emit_ref (int size
)
2192 EMIT_ASM (amd64_ref1
,
2196 EMIT_ASM (amd64_ref2
,
2200 EMIT_ASM (amd64_ref4
,
2201 "movl (%rax),%eax");
2204 EMIT_ASM (amd64_ref8
,
2205 "movq (%rax),%rax");
2211 amd64_emit_if_goto (int *offset_p
, int *size_p
)
2213 EMIT_ASM (amd64_if_goto
,
2217 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2225 amd64_emit_goto (int *offset_p
, int *size_p
)
2227 EMIT_ASM (amd64_goto
,
2228 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2236 amd64_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2238 int diff
= (to
- (from
+ size
));
2239 unsigned char buf
[sizeof (int)];
2247 memcpy (buf
, &diff
, sizeof (int));
2248 write_inferior_memory (from
, buf
, sizeof (int));
2252 amd64_emit_const (LONGEST num
)
2254 unsigned char buf
[16];
2256 CORE_ADDR buildaddr
= current_insn_ptr
;
2259 buf
[i
++] = 0x48; buf
[i
++] = 0xb8; /* mov $<n>,%rax */
2260 memcpy (&buf
[i
], &num
, sizeof (num
));
2262 append_insns (&buildaddr
, i
, buf
);
2263 current_insn_ptr
= buildaddr
;
2267 amd64_emit_call (CORE_ADDR fn
)
2269 unsigned char buf
[16];
2271 CORE_ADDR buildaddr
;
2274 /* The destination function being in the shared library, may be
2275 >31-bits away off the compiled code pad. */
2277 buildaddr
= current_insn_ptr
;
2279 offset64
= fn
- (buildaddr
+ 1 /* call op */ + 4 /* 32-bit offset */);
2283 if (offset64
> INT_MAX
|| offset64
< INT_MIN
)
2285 /* Offset is too large for a call. Use callq, but that requires
2286 a register, so avoid it if possible. Use r10, since it is
2287 call-clobbered, we don't have to push/pop it. */
2288 buf
[i
++] = 0x48; /* mov $fn,%r10 */
2290 memcpy (buf
+ i
, &fn
, 8);
2292 buf
[i
++] = 0xff; /* callq *%r10 */
2297 int offset32
= offset64
; /* we know we can't overflow here. */
2298 memcpy (buf
+ i
, &offset32
, 4);
2302 append_insns (&buildaddr
, i
, buf
);
2303 current_insn_ptr
= buildaddr
;
2307 amd64_emit_reg (int reg
)
2309 unsigned char buf
[16];
2311 CORE_ADDR buildaddr
;
2313 /* Assume raw_regs is still in %rdi. */
2314 buildaddr
= current_insn_ptr
;
2316 buf
[i
++] = 0xbe; /* mov $<n>,%esi */
2317 memcpy (&buf
[i
], ®
, sizeof (reg
));
2319 append_insns (&buildaddr
, i
, buf
);
2320 current_insn_ptr
= buildaddr
;
2321 amd64_emit_call (get_raw_reg_func_addr ());
2325 amd64_emit_pop (void)
2327 EMIT_ASM (amd64_pop
,
2332 amd64_emit_stack_flush (void)
2334 EMIT_ASM (amd64_stack_flush
,
2339 amd64_emit_zero_ext (int arg
)
2344 EMIT_ASM (amd64_zero_ext_8
,
2348 EMIT_ASM (amd64_zero_ext_16
,
2349 "and $0xffff,%rax");
2352 EMIT_ASM (amd64_zero_ext_32
,
2353 "mov $0xffffffff,%rcx\n\t"
2362 amd64_emit_swap (void)
2364 EMIT_ASM (amd64_swap
,
2371 amd64_emit_stack_adjust (int n
)
2373 unsigned char buf
[16];
2375 CORE_ADDR buildaddr
= current_insn_ptr
;
2378 buf
[i
++] = 0x48; /* lea $<n>(%rsp),%rsp */
2382 /* This only handles adjustments up to 16, but we don't expect any more. */
2384 append_insns (&buildaddr
, i
, buf
);
2385 current_insn_ptr
= buildaddr
;
2388 /* FN's prototype is `LONGEST(*fn)(int)'. */
2391 amd64_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2393 unsigned char buf
[16];
2395 CORE_ADDR buildaddr
;
2397 buildaddr
= current_insn_ptr
;
2399 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2400 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2402 append_insns (&buildaddr
, i
, buf
);
2403 current_insn_ptr
= buildaddr
;
2404 amd64_emit_call (fn
);
2407 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2410 amd64_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
2412 unsigned char buf
[16];
2414 CORE_ADDR buildaddr
;
2416 buildaddr
= current_insn_ptr
;
2418 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2419 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2421 append_insns (&buildaddr
, i
, buf
);
2422 current_insn_ptr
= buildaddr
;
2423 EMIT_ASM (amd64_void_call_2_a
,
2424 /* Save away a copy of the stack top. */
2426 /* Also pass top as the second argument. */
2428 amd64_emit_call (fn
);
2429 EMIT_ASM (amd64_void_call_2_b
,
2430 /* Restore the stack top, %rax may have been trashed. */
2435 amd64_emit_eq_goto (int *offset_p
, int *size_p
)
2438 "cmp %rax,(%rsp)\n\t"
2439 "jne .Lamd64_eq_fallthru\n\t"
2440 "lea 0x8(%rsp),%rsp\n\t"
2442 /* jmp, but don't trust the assembler to choose the right jump */
2443 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2444 ".Lamd64_eq_fallthru:\n\t"
2445 "lea 0x8(%rsp),%rsp\n\t"
2455 amd64_emit_ne_goto (int *offset_p
, int *size_p
)
2458 "cmp %rax,(%rsp)\n\t"
2459 "je .Lamd64_ne_fallthru\n\t"
2460 "lea 0x8(%rsp),%rsp\n\t"
2462 /* jmp, but don't trust the assembler to choose the right jump */
2463 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2464 ".Lamd64_ne_fallthru:\n\t"
2465 "lea 0x8(%rsp),%rsp\n\t"
2475 amd64_emit_lt_goto (int *offset_p
, int *size_p
)
2478 "cmp %rax,(%rsp)\n\t"
2479 "jnl .Lamd64_lt_fallthru\n\t"
2480 "lea 0x8(%rsp),%rsp\n\t"
2482 /* jmp, but don't trust the assembler to choose the right jump */
2483 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2484 ".Lamd64_lt_fallthru:\n\t"
2485 "lea 0x8(%rsp),%rsp\n\t"
2495 amd64_emit_le_goto (int *offset_p
, int *size_p
)
2498 "cmp %rax,(%rsp)\n\t"
2499 "jnle .Lamd64_le_fallthru\n\t"
2500 "lea 0x8(%rsp),%rsp\n\t"
2502 /* jmp, but don't trust the assembler to choose the right jump */
2503 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2504 ".Lamd64_le_fallthru:\n\t"
2505 "lea 0x8(%rsp),%rsp\n\t"
2515 amd64_emit_gt_goto (int *offset_p
, int *size_p
)
2518 "cmp %rax,(%rsp)\n\t"
2519 "jng .Lamd64_gt_fallthru\n\t"
2520 "lea 0x8(%rsp),%rsp\n\t"
2522 /* jmp, but don't trust the assembler to choose the right jump */
2523 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2524 ".Lamd64_gt_fallthru:\n\t"
2525 "lea 0x8(%rsp),%rsp\n\t"
2535 amd64_emit_ge_goto (int *offset_p
, int *size_p
)
2538 "cmp %rax,(%rsp)\n\t"
2539 "jnge .Lamd64_ge_fallthru\n\t"
2540 ".Lamd64_ge_jump:\n\t"
2541 "lea 0x8(%rsp),%rsp\n\t"
2543 /* jmp, but don't trust the assembler to choose the right jump */
2544 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2545 ".Lamd64_ge_fallthru:\n\t"
2546 "lea 0x8(%rsp),%rsp\n\t"
2555 struct emit_ops amd64_emit_ops
=
2557 amd64_emit_prologue
,
2558 amd64_emit_epilogue
,
2563 amd64_emit_rsh_signed
,
2564 amd64_emit_rsh_unsigned
,
2572 amd64_emit_less_signed
,
2573 amd64_emit_less_unsigned
,
2577 amd64_write_goto_address
,
2582 amd64_emit_stack_flush
,
2583 amd64_emit_zero_ext
,
2585 amd64_emit_stack_adjust
,
2586 amd64_emit_int_call_1
,
2587 amd64_emit_void_call_2
,
2596 #endif /* __x86_64__ */
2599 i386_emit_prologue (void)
2601 EMIT_ASM32 (i386_prologue
,
2605 /* At this point, the raw regs base address is at 8(%ebp), and the
2606 value pointer is at 12(%ebp). */
2610 i386_emit_epilogue (void)
2612 EMIT_ASM32 (i386_epilogue
,
2613 "mov 12(%ebp),%ecx\n\t"
2614 "mov %eax,(%ecx)\n\t"
2615 "mov %ebx,0x4(%ecx)\n\t"
2623 i386_emit_add (void)
2625 EMIT_ASM32 (i386_add
,
2626 "add (%esp),%eax\n\t"
2627 "adc 0x4(%esp),%ebx\n\t"
2628 "lea 0x8(%esp),%esp");
2632 i386_emit_sub (void)
2634 EMIT_ASM32 (i386_sub
,
2635 "subl %eax,(%esp)\n\t"
2636 "sbbl %ebx,4(%esp)\n\t"
2642 i386_emit_mul (void)
2648 i386_emit_lsh (void)
2654 i386_emit_rsh_signed (void)
2660 i386_emit_rsh_unsigned (void)
2666 i386_emit_ext (int arg
)
2671 EMIT_ASM32 (i386_ext_8
,
2674 "movl %eax,%ebx\n\t"
2678 EMIT_ASM32 (i386_ext_16
,
2680 "movl %eax,%ebx\n\t"
2684 EMIT_ASM32 (i386_ext_32
,
2685 "movl %eax,%ebx\n\t"
2694 i386_emit_log_not (void)
2696 EMIT_ASM32 (i386_log_not
,
2698 "test %eax,%eax\n\t"
2705 i386_emit_bit_and (void)
2707 EMIT_ASM32 (i386_and
,
2708 "and (%esp),%eax\n\t"
2709 "and 0x4(%esp),%ebx\n\t"
2710 "lea 0x8(%esp),%esp");
2714 i386_emit_bit_or (void)
2716 EMIT_ASM32 (i386_or
,
2717 "or (%esp),%eax\n\t"
2718 "or 0x4(%esp),%ebx\n\t"
2719 "lea 0x8(%esp),%esp");
2723 i386_emit_bit_xor (void)
2725 EMIT_ASM32 (i386_xor
,
2726 "xor (%esp),%eax\n\t"
2727 "xor 0x4(%esp),%ebx\n\t"
2728 "lea 0x8(%esp),%esp");
2732 i386_emit_bit_not (void)
2734 EMIT_ASM32 (i386_bit_not
,
2735 "xor $0xffffffff,%eax\n\t"
2736 "xor $0xffffffff,%ebx\n\t");
2740 i386_emit_equal (void)
2742 EMIT_ASM32 (i386_equal
,
2743 "cmpl %ebx,4(%esp)\n\t"
2744 "jne .Li386_equal_false\n\t"
2745 "cmpl %eax,(%esp)\n\t"
2746 "je .Li386_equal_true\n\t"
2747 ".Li386_equal_false:\n\t"
2749 "jmp .Li386_equal_end\n\t"
2750 ".Li386_equal_true:\n\t"
2752 ".Li386_equal_end:\n\t"
2754 "lea 0x8(%esp),%esp");
2758 i386_emit_less_signed (void)
2760 EMIT_ASM32 (i386_less_signed
,
2761 "cmpl %ebx,4(%esp)\n\t"
2762 "jl .Li386_less_signed_true\n\t"
2763 "jne .Li386_less_signed_false\n\t"
2764 "cmpl %eax,(%esp)\n\t"
2765 "jl .Li386_less_signed_true\n\t"
2766 ".Li386_less_signed_false:\n\t"
2768 "jmp .Li386_less_signed_end\n\t"
2769 ".Li386_less_signed_true:\n\t"
2771 ".Li386_less_signed_end:\n\t"
2773 "lea 0x8(%esp),%esp");
2777 i386_emit_less_unsigned (void)
2779 EMIT_ASM32 (i386_less_unsigned
,
2780 "cmpl %ebx,4(%esp)\n\t"
2781 "jb .Li386_less_unsigned_true\n\t"
2782 "jne .Li386_less_unsigned_false\n\t"
2783 "cmpl %eax,(%esp)\n\t"
2784 "jb .Li386_less_unsigned_true\n\t"
2785 ".Li386_less_unsigned_false:\n\t"
2787 "jmp .Li386_less_unsigned_end\n\t"
2788 ".Li386_less_unsigned_true:\n\t"
2790 ".Li386_less_unsigned_end:\n\t"
2792 "lea 0x8(%esp),%esp");
2796 i386_emit_ref (int size
)
2801 EMIT_ASM32 (i386_ref1
,
2805 EMIT_ASM32 (i386_ref2
,
2809 EMIT_ASM32 (i386_ref4
,
2810 "movl (%eax),%eax");
2813 EMIT_ASM32 (i386_ref8
,
2814 "movl 4(%eax),%ebx\n\t"
2815 "movl (%eax),%eax");
2821 i386_emit_if_goto (int *offset_p
, int *size_p
)
2823 EMIT_ASM32 (i386_if_goto
,
2829 /* Don't trust the assembler to choose the right jump */
2830 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2833 *offset_p
= 11; /* be sure that this matches the sequence above */
2839 i386_emit_goto (int *offset_p
, int *size_p
)
2841 EMIT_ASM32 (i386_goto
,
2842 /* Don't trust the assembler to choose the right jump */
2843 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2851 i386_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2853 int diff
= (to
- (from
+ size
));
2854 unsigned char buf
[sizeof (int)];
2856 /* We're only doing 4-byte sizes at the moment. */
2863 memcpy (buf
, &diff
, sizeof (int));
2864 write_inferior_memory (from
, buf
, sizeof (int));
2868 i386_emit_const (LONGEST num
)
2870 unsigned char buf
[16];
2872 CORE_ADDR buildaddr
= current_insn_ptr
;
2875 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2876 lo
= num
& 0xffffffff;
2877 memcpy (&buf
[i
], &lo
, sizeof (lo
));
2879 hi
= ((num
>> 32) & 0xffffffff);
2882 buf
[i
++] = 0xbb; /* mov $<n>,%ebx */
2883 memcpy (&buf
[i
], &hi
, sizeof (hi
));
2888 buf
[i
++] = 0x31; buf
[i
++] = 0xdb; /* xor %ebx,%ebx */
2890 append_insns (&buildaddr
, i
, buf
);
2891 current_insn_ptr
= buildaddr
;
2895 i386_emit_call (CORE_ADDR fn
)
2897 unsigned char buf
[16];
2899 CORE_ADDR buildaddr
;
2901 buildaddr
= current_insn_ptr
;
2903 buf
[i
++] = 0xe8; /* call <reladdr> */
2904 offset
= ((int) fn
) - (buildaddr
+ 5);
2905 memcpy (buf
+ 1, &offset
, 4);
2906 append_insns (&buildaddr
, 5, buf
);
2907 current_insn_ptr
= buildaddr
;
2911 i386_emit_reg (int reg
)
2913 unsigned char buf
[16];
2915 CORE_ADDR buildaddr
;
2917 EMIT_ASM32 (i386_reg_a
,
2919 buildaddr
= current_insn_ptr
;
2921 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2922 memcpy (&buf
[i
], ®
, sizeof (reg
));
2924 append_insns (&buildaddr
, i
, buf
);
2925 current_insn_ptr
= buildaddr
;
2926 EMIT_ASM32 (i386_reg_b
,
2927 "mov %eax,4(%esp)\n\t"
2928 "mov 8(%ebp),%eax\n\t"
2930 i386_emit_call (get_raw_reg_func_addr ());
2931 EMIT_ASM32 (i386_reg_c
,
2933 "lea 0x8(%esp),%esp");
2937 i386_emit_pop (void)
2939 EMIT_ASM32 (i386_pop
,
2945 i386_emit_stack_flush (void)
2947 EMIT_ASM32 (i386_stack_flush
,
2953 i386_emit_zero_ext (int arg
)
2958 EMIT_ASM32 (i386_zero_ext_8
,
2959 "and $0xff,%eax\n\t"
2963 EMIT_ASM32 (i386_zero_ext_16
,
2964 "and $0xffff,%eax\n\t"
2968 EMIT_ASM32 (i386_zero_ext_32
,
2977 i386_emit_swap (void)
2979 EMIT_ASM32 (i386_swap
,
2989 i386_emit_stack_adjust (int n
)
2991 unsigned char buf
[16];
2993 CORE_ADDR buildaddr
= current_insn_ptr
;
2996 buf
[i
++] = 0x8d; /* lea $<n>(%esp),%esp */
3000 append_insns (&buildaddr
, i
, buf
);
3001 current_insn_ptr
= buildaddr
;
3004 /* FN's prototype is `LONGEST(*fn)(int)'. */
3007 i386_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
3009 unsigned char buf
[16];
3011 CORE_ADDR buildaddr
;
3013 EMIT_ASM32 (i386_int_call_1_a
,
3014 /* Reserve a bit of stack space. */
3016 /* Put the one argument on the stack. */
3017 buildaddr
= current_insn_ptr
;
3019 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3022 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3024 append_insns (&buildaddr
, i
, buf
);
3025 current_insn_ptr
= buildaddr
;
3026 i386_emit_call (fn
);
3027 EMIT_ASM32 (i386_int_call_1_c
,
3029 "lea 0x8(%esp),%esp");
3032 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
3035 i386_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
3037 unsigned char buf
[16];
3039 CORE_ADDR buildaddr
;
3041 EMIT_ASM32 (i386_void_call_2_a
,
3042 /* Preserve %eax only; we don't have to worry about %ebx. */
3044 /* Reserve a bit of stack space for arguments. */
3045 "sub $0x10,%esp\n\t"
3046 /* Copy "top" to the second argument position. (Note that
3047 we can't assume function won't scribble on its
3048 arguments, so don't try to restore from this.) */
3049 "mov %eax,4(%esp)\n\t"
3050 "mov %ebx,8(%esp)");
3051 /* Put the first argument on the stack. */
3052 buildaddr
= current_insn_ptr
;
3054 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3057 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3059 append_insns (&buildaddr
, i
, buf
);
3060 current_insn_ptr
= buildaddr
;
3061 i386_emit_call (fn
);
3062 EMIT_ASM32 (i386_void_call_2_b
,
3063 "lea 0x10(%esp),%esp\n\t"
3064 /* Restore original stack top. */
3070 i386_emit_eq_goto (int *offset_p
, int *size_p
)
3073 /* Check low half first, more likely to be decider */
3074 "cmpl %eax,(%esp)\n\t"
3075 "jne .Leq_fallthru\n\t"
3076 "cmpl %ebx,4(%esp)\n\t"
3077 "jne .Leq_fallthru\n\t"
3078 "lea 0x8(%esp),%esp\n\t"
3081 /* jmp, but don't trust the assembler to choose the right jump */
3082 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3083 ".Leq_fallthru:\n\t"
3084 "lea 0x8(%esp),%esp\n\t"
3095 i386_emit_ne_goto (int *offset_p
, int *size_p
)
3098 /* Check low half first, more likely to be decider */
3099 "cmpl %eax,(%esp)\n\t"
3101 "cmpl %ebx,4(%esp)\n\t"
3102 "je .Lne_fallthru\n\t"
3104 "lea 0x8(%esp),%esp\n\t"
3107 /* jmp, but don't trust the assembler to choose the right jump */
3108 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3109 ".Lne_fallthru:\n\t"
3110 "lea 0x8(%esp),%esp\n\t"
3121 i386_emit_lt_goto (int *offset_p
, int *size_p
)
3124 "cmpl %ebx,4(%esp)\n\t"
3126 "jne .Llt_fallthru\n\t"
3127 "cmpl %eax,(%esp)\n\t"
3128 "jnl .Llt_fallthru\n\t"
3130 "lea 0x8(%esp),%esp\n\t"
3133 /* jmp, but don't trust the assembler to choose the right jump */
3134 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3135 ".Llt_fallthru:\n\t"
3136 "lea 0x8(%esp),%esp\n\t"
3147 i386_emit_le_goto (int *offset_p
, int *size_p
)
3150 "cmpl %ebx,4(%esp)\n\t"
3152 "jne .Lle_fallthru\n\t"
3153 "cmpl %eax,(%esp)\n\t"
3154 "jnle .Lle_fallthru\n\t"
3156 "lea 0x8(%esp),%esp\n\t"
3159 /* jmp, but don't trust the assembler to choose the right jump */
3160 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3161 ".Lle_fallthru:\n\t"
3162 "lea 0x8(%esp),%esp\n\t"
3173 i386_emit_gt_goto (int *offset_p
, int *size_p
)
3176 "cmpl %ebx,4(%esp)\n\t"
3178 "jne .Lgt_fallthru\n\t"
3179 "cmpl %eax,(%esp)\n\t"
3180 "jng .Lgt_fallthru\n\t"
3182 "lea 0x8(%esp),%esp\n\t"
3185 /* jmp, but don't trust the assembler to choose the right jump */
3186 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3187 ".Lgt_fallthru:\n\t"
3188 "lea 0x8(%esp),%esp\n\t"
3199 i386_emit_ge_goto (int *offset_p
, int *size_p
)
3202 "cmpl %ebx,4(%esp)\n\t"
3204 "jne .Lge_fallthru\n\t"
3205 "cmpl %eax,(%esp)\n\t"
3206 "jnge .Lge_fallthru\n\t"
3208 "lea 0x8(%esp),%esp\n\t"
3211 /* jmp, but don't trust the assembler to choose the right jump */
3212 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3213 ".Lge_fallthru:\n\t"
3214 "lea 0x8(%esp),%esp\n\t"
3224 struct emit_ops i386_emit_ops
=
3232 i386_emit_rsh_signed
,
3233 i386_emit_rsh_unsigned
,
3241 i386_emit_less_signed
,
3242 i386_emit_less_unsigned
,
3246 i386_write_goto_address
,
3251 i386_emit_stack_flush
,
3254 i386_emit_stack_adjust
,
3255 i386_emit_int_call_1
,
3256 i386_emit_void_call_2
,
3266 static struct emit_ops
*
3270 if (is_64bit_tdesc ())
3271 return &amd64_emit_ops
;
3274 return &i386_emit_ops
;
3277 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
3279 static const gdb_byte
*
3280 x86_sw_breakpoint_from_kind (int kind
, int *size
)
3282 *size
= x86_breakpoint_len
;
3283 return x86_breakpoint
;
3287 x86_supports_range_stepping (void)
3292 /* Implementation of linux_target_ops method "supports_hardware_single_step".
3296 x86_supports_hardware_single_step (void)
3301 /* This is initialized assuming an amd64 target.
3302 x86_arch_setup will correct it for i386 or amd64 targets. */
3304 struct linux_target_ops the_low_target
=
3307 x86_linux_regs_info
,
3308 x86_cannot_fetch_register
,
3309 x86_cannot_store_register
,
3310 NULL
, /* fetch_register */
3313 NULL
, /* breakpoint_kind_from_pc */
3314 x86_sw_breakpoint_from_kind
,
3318 x86_supports_z_point_type
,
3321 x86_stopped_by_watchpoint
,
3322 x86_stopped_data_address
,
3323 /* collect_ptrace_register/supply_ptrace_register are not needed in the
3324 native i386 case (no registers smaller than an xfer unit), and are not
3325 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
3328 /* need to fix up i386 siginfo if host is amd64 */
3330 x86_linux_new_process
,
3331 x86_linux_new_thread
,
3333 x86_linux_prepare_to_resume
,
3334 x86_linux_process_qsupported
,
3335 x86_supports_tracepoints
,
3336 x86_get_thread_area
,
3337 x86_install_fast_tracepoint_jump_pad
,
3339 x86_get_min_fast_tracepoint_insn_len
,
3340 x86_supports_range_stepping
,
3341 NULL
, /* breakpoint_kind_from_current_state */
3342 x86_supports_hardware_single_step
,
3343 x86_get_syscall_trapinfo
,
3347 initialize_low_arch (void)
3349 /* Initialize the Linux target descriptions. */
3351 init_registers_amd64_linux ();
3352 init_registers_amd64_avx_linux ();
3353 init_registers_amd64_avx512_linux ();
3354 init_registers_amd64_mpx_linux ();
3356 init_registers_x32_linux ();
3357 init_registers_x32_avx_linux ();
3358 init_registers_x32_avx512_linux ();
3360 tdesc_amd64_linux_no_xml
= XNEW (struct target_desc
);
3361 copy_target_description (tdesc_amd64_linux_no_xml
, tdesc_amd64_linux
);
3362 tdesc_amd64_linux_no_xml
->xmltarget
= xmltarget_amd64_linux_no_xml
;
3364 init_registers_i386_linux ();
3365 init_registers_i386_mmx_linux ();
3366 init_registers_i386_avx_linux ();
3367 init_registers_i386_avx512_linux ();
3368 init_registers_i386_mpx_linux ();
3370 tdesc_i386_linux_no_xml
= XNEW (struct target_desc
);
3371 copy_target_description (tdesc_i386_linux_no_xml
, tdesc_i386_linux
);
3372 tdesc_i386_linux_no_xml
->xmltarget
= xmltarget_i386_linux_no_xml
;
3374 initialize_regsets_info (&x86_regsets_info
);