1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "linux-low.h"
28 #include "i386-xstate.h"
29 #include "elf/common.h"
31 #include "gdb_proc_service.h"
36 /* Defined in auto-generated file amd64-linux.c. */
37 void init_registers_amd64_linux (void);
38 extern const struct target_desc
*tdesc_amd64_linux
;
40 /* Defined in auto-generated file amd64-avx-linux.c. */
41 void init_registers_amd64_avx_linux (void);
42 extern const struct target_desc
*tdesc_amd64_avx_linux
;
44 /* Defined in auto-generated file x32-linux.c. */
45 void init_registers_x32_linux (void);
46 extern const struct target_desc
*tdesc_x32_linux
;
48 /* Defined in auto-generated file x32-avx-linux.c. */
49 void init_registers_x32_avx_linux (void);
50 extern const struct target_desc
*tdesc_x32_avx_linux
;
53 /* Defined in auto-generated file i386-linux.c. */
54 void init_registers_i386_linux (void);
55 extern const struct target_desc
*tdesc_i386_linux
;
57 /* Defined in auto-generated file i386-mmx-linux.c. */
58 void init_registers_i386_mmx_linux (void);
59 extern const struct target_desc
*tdesc_i386_mmx_linux
;
61 /* Defined in auto-generated file i386-avx-linux.c. */
62 void init_registers_i386_avx_linux (void);
63 extern const struct target_desc
*tdesc_i386_avx_linux
;
66 static struct target_desc
*tdesc_amd64_linux_no_xml
;
68 static struct target_desc
*tdesc_i386_linux_no_xml
;
71 static unsigned char jump_insn
[] = { 0xe9, 0, 0, 0, 0 };
72 static unsigned char small_jump_insn
[] = { 0x66, 0xe9, 0, 0 };
74 /* Backward compatibility for gdb without XML support. */
76 static const char *xmltarget_i386_linux_no_xml
= "@<target>\
77 <architecture>i386</architecture>\
78 <osabi>GNU/Linux</osabi>\
82 static const char *xmltarget_amd64_linux_no_xml
= "@<target>\
83 <architecture>i386:x86-64</architecture>\
84 <osabi>GNU/Linux</osabi>\
89 #include <sys/procfs.h>
90 #include <sys/ptrace.h>
93 #ifndef PTRACE_GETREGSET
94 #define PTRACE_GETREGSET 0x4204
97 #ifndef PTRACE_SETREGSET
98 #define PTRACE_SETREGSET 0x4205
102 #ifndef PTRACE_GET_THREAD_AREA
103 #define PTRACE_GET_THREAD_AREA 25
106 /* This definition comes from prctl.h, but some kernels may not have it. */
107 #ifndef PTRACE_ARCH_PRCTL
108 #define PTRACE_ARCH_PRCTL 30
111 /* The following definitions come from prctl.h, but may be absent
112 for certain configurations. */
114 #define ARCH_SET_GS 0x1001
115 #define ARCH_SET_FS 0x1002
116 #define ARCH_GET_FS 0x1003
117 #define ARCH_GET_GS 0x1004
120 /* Per-process arch-specific data we want to keep. */
122 struct arch_process_info
124 struct i386_debug_reg_state debug_reg_state
;
127 /* Per-thread arch-specific data we want to keep. */
131 /* Non-zero if our copy differs from what's recorded in the thread. */
132 int debug_registers_changed
;
137 /* Mapping between the general-purpose registers in `struct user'
138 format and GDB's register array layout.
139 Note that the transfer layout uses 64-bit regs. */
140 static /*const*/ int i386_regmap
[] =
142 RAX
* 8, RCX
* 8, RDX
* 8, RBX
* 8,
143 RSP
* 8, RBP
* 8, RSI
* 8, RDI
* 8,
144 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
145 DS
* 8, ES
* 8, FS
* 8, GS
* 8
148 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
150 /* So code below doesn't have to care, i386 or amd64. */
151 #define ORIG_EAX ORIG_RAX
153 static const int x86_64_regmap
[] =
155 RAX
* 8, RBX
* 8, RCX
* 8, RDX
* 8,
156 RSI
* 8, RDI
* 8, RBP
* 8, RSP
* 8,
157 R8
* 8, R9
* 8, R10
* 8, R11
* 8,
158 R12
* 8, R13
* 8, R14
* 8, R15
* 8,
159 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
160 DS
* 8, ES
* 8, FS
* 8, GS
* 8,
161 -1, -1, -1, -1, -1, -1, -1, -1,
162 -1, -1, -1, -1, -1, -1, -1, -1,
163 -1, -1, -1, -1, -1, -1, -1, -1,
164 -1, -1, -1, -1, -1, -1, -1, -1, -1,
168 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
170 #else /* ! __x86_64__ */
172 /* Mapping between the general-purpose registers in `struct user'
173 format and GDB's register array layout. */
174 static /*const*/ int i386_regmap
[] =
176 EAX
* 4, ECX
* 4, EDX
* 4, EBX
* 4,
177 UESP
* 4, EBP
* 4, ESI
* 4, EDI
* 4,
178 EIP
* 4, EFL
* 4, CS
* 4, SS
* 4,
179 DS
* 4, ES
* 4, FS
* 4, GS
* 4
182 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
188 /* Returns true if the current inferior belongs to a x86-64 process,
192 is_64bit_tdesc (void)
194 struct regcache
*regcache
= get_thread_regcache (current_inferior
, 0);
196 return register_size (regcache
->tdesc
, 0) == 8;
202 /* Called by libthread_db. */
205 ps_get_thread_area (const struct ps_prochandle
*ph
,
206 lwpid_t lwpid
, int idx
, void **base
)
209 int use_64bit
= is_64bit_tdesc ();
216 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
220 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
231 unsigned int desc
[4];
233 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
,
234 (void *) (intptr_t) idx
, (unsigned long) &desc
) < 0)
237 /* Ensure we properly extend the value to 64-bits for x86_64. */
238 *base
= (void *) (uintptr_t) desc
[1];
243 /* Get the thread area address. This is used to recognize which
244 thread is which when tracing with the in-process agent library. We
245 don't read anything from the address, and treat it as opaque; it's
246 the address itself that we assume is unique per-thread. */
249 x86_get_thread_area (int lwpid
, CORE_ADDR
*addr
)
252 int use_64bit
= is_64bit_tdesc ();
257 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
259 *addr
= (CORE_ADDR
) (uintptr_t) base
;
268 struct lwp_info
*lwp
= find_lwp_pid (pid_to_ptid (lwpid
));
269 struct regcache
*regcache
= get_thread_regcache (get_lwp_thread (lwp
), 1);
270 unsigned int desc
[4];
272 const int reg_thread_area
= 3; /* bits to scale down register value. */
275 collect_register_by_name (regcache
, "gs", &gs
);
277 idx
= gs
>> reg_thread_area
;
279 if (ptrace (PTRACE_GET_THREAD_AREA
,
281 (void *) (long) idx
, (unsigned long) &desc
) < 0)
292 x86_cannot_store_register (int regno
)
295 if (is_64bit_tdesc ())
299 return regno
>= I386_NUM_REGS
;
303 x86_cannot_fetch_register (int regno
)
306 if (is_64bit_tdesc ())
310 return regno
>= I386_NUM_REGS
;
314 x86_fill_gregset (struct regcache
*regcache
, void *buf
)
319 if (register_size (regcache
->tdesc
, 0) == 8)
321 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
322 if (x86_64_regmap
[i
] != -1)
323 collect_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
328 for (i
= 0; i
< I386_NUM_REGS
; i
++)
329 collect_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
331 collect_register_by_name (regcache
, "orig_eax",
332 ((char *) buf
) + ORIG_EAX
* 4);
336 x86_store_gregset (struct regcache
*regcache
, const void *buf
)
341 if (register_size (regcache
->tdesc
, 0) == 8)
343 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
344 if (x86_64_regmap
[i
] != -1)
345 supply_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
350 for (i
= 0; i
< I386_NUM_REGS
; i
++)
351 supply_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
353 supply_register_by_name (regcache
, "orig_eax",
354 ((char *) buf
) + ORIG_EAX
* 4);
358 x86_fill_fpregset (struct regcache
*regcache
, void *buf
)
361 i387_cache_to_fxsave (regcache
, buf
);
363 i387_cache_to_fsave (regcache
, buf
);
368 x86_store_fpregset (struct regcache
*regcache
, const void *buf
)
371 i387_fxsave_to_cache (regcache
, buf
);
373 i387_fsave_to_cache (regcache
, buf
);
380 x86_fill_fpxregset (struct regcache
*regcache
, void *buf
)
382 i387_cache_to_fxsave (regcache
, buf
);
386 x86_store_fpxregset (struct regcache
*regcache
, const void *buf
)
388 i387_fxsave_to_cache (regcache
, buf
);
394 x86_fill_xstateregset (struct regcache
*regcache
, void *buf
)
396 i387_cache_to_xsave (regcache
, buf
);
400 x86_store_xstateregset (struct regcache
*regcache
, const void *buf
)
402 i387_xsave_to_cache (regcache
, buf
);
405 /* ??? The non-biarch i386 case stores all the i387 regs twice.
406 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
407 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
408 doesn't work. IWBN to avoid the duplication in the case where it
409 does work. Maybe the arch_setup routine could check whether it works
410 and update the supported regsets accordingly. */
412 static struct regset_info x86_regsets
[] =
414 #ifdef HAVE_PTRACE_GETREGS
415 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, sizeof (elf_gregset_t
),
417 x86_fill_gregset
, x86_store_gregset
},
418 { PTRACE_GETREGSET
, PTRACE_SETREGSET
, NT_X86_XSTATE
, 0,
419 EXTENDED_REGS
, x86_fill_xstateregset
, x86_store_xstateregset
},
421 # ifdef HAVE_PTRACE_GETFPXREGS
422 { PTRACE_GETFPXREGS
, PTRACE_SETFPXREGS
, 0, sizeof (elf_fpxregset_t
),
424 x86_fill_fpxregset
, x86_store_fpxregset
},
427 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, sizeof (elf_fpregset_t
),
429 x86_fill_fpregset
, x86_store_fpregset
},
430 #endif /* HAVE_PTRACE_GETREGS */
431 { 0, 0, 0, -1, -1, NULL
, NULL
}
435 x86_get_pc (struct regcache
*regcache
)
437 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
442 collect_register_by_name (regcache
, "rip", &pc
);
443 return (CORE_ADDR
) pc
;
448 collect_register_by_name (regcache
, "eip", &pc
);
449 return (CORE_ADDR
) pc
;
454 x86_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
456 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
460 unsigned long newpc
= pc
;
461 supply_register_by_name (regcache
, "rip", &newpc
);
465 unsigned int newpc
= pc
;
466 supply_register_by_name (regcache
, "eip", &newpc
);
470 static const unsigned char x86_breakpoint
[] = { 0xCC };
471 #define x86_breakpoint_len 1
474 x86_breakpoint_at (CORE_ADDR pc
)
478 (*the_target
->read_memory
) (pc
, &c
, 1);
485 /* Support for debug registers. */
488 x86_linux_dr_get (ptid_t ptid
, int regnum
)
493 tid
= ptid_get_lwp (ptid
);
496 value
= ptrace (PTRACE_PEEKUSER
, tid
,
497 offsetof (struct user
, u_debugreg
[regnum
]), 0);
499 error ("Couldn't read debug register");
505 x86_linux_dr_set (ptid_t ptid
, int regnum
, unsigned long value
)
509 tid
= ptid_get_lwp (ptid
);
512 ptrace (PTRACE_POKEUSER
, tid
,
513 offsetof (struct user
, u_debugreg
[regnum
]), value
);
515 error ("Couldn't write debug register");
519 update_debug_registers_callback (struct inferior_list_entry
*entry
,
522 struct lwp_info
*lwp
= (struct lwp_info
*) entry
;
523 int pid
= *(int *) pid_p
;
525 /* Only update the threads of this process. */
526 if (pid_of (lwp
) == pid
)
528 /* The actual update is done later just before resuming the lwp,
529 we just mark that the registers need updating. */
530 lwp
->arch_private
->debug_registers_changed
= 1;
532 /* If the lwp isn't stopped, force it to momentarily pause, so
533 we can update its debug registers. */
535 linux_stop_lwp (lwp
);
541 /* Update the inferior's debug register REGNUM from STATE. */
544 i386_dr_low_set_addr (const struct i386_debug_reg_state
*state
, int regnum
)
546 /* Only update the threads of this process. */
547 int pid
= pid_of (get_thread_lwp (current_inferior
));
549 if (! (regnum
>= 0 && regnum
<= DR_LASTADDR
- DR_FIRSTADDR
))
550 fatal ("Invalid debug register %d", regnum
);
552 find_inferior (&all_lwps
, update_debug_registers_callback
, &pid
);
555 /* Return the inferior's debug register REGNUM. */
558 i386_dr_low_get_addr (int regnum
)
560 struct lwp_info
*lwp
= get_thread_lwp (current_inferior
);
561 ptid_t ptid
= ptid_of (lwp
);
563 /* DR6 and DR7 are retrieved with some other way. */
564 gdb_assert (DR_FIRSTADDR
<= regnum
&& regnum
<= DR_LASTADDR
);
566 return x86_linux_dr_get (ptid
, regnum
);
569 /* Update the inferior's DR7 debug control register from STATE. */
572 i386_dr_low_set_control (const struct i386_debug_reg_state
*state
)
574 /* Only update the threads of this process. */
575 int pid
= pid_of (get_thread_lwp (current_inferior
));
577 find_inferior (&all_lwps
, update_debug_registers_callback
, &pid
);
580 /* Return the inferior's DR7 debug control register. */
583 i386_dr_low_get_control (void)
585 struct lwp_info
*lwp
= get_thread_lwp (current_inferior
);
586 ptid_t ptid
= ptid_of (lwp
);
588 return x86_linux_dr_get (ptid
, DR_CONTROL
);
591 /* Get the value of the DR6 debug status register from the inferior
592 and record it in STATE. */
595 i386_dr_low_get_status (void)
597 struct lwp_info
*lwp
= get_thread_lwp (current_inferior
);
598 ptid_t ptid
= ptid_of (lwp
);
600 return x86_linux_dr_get (ptid
, DR_STATUS
);
603 /* Breakpoint/Watchpoint support. */
606 x86_insert_point (char type
, CORE_ADDR addr
, int len
)
608 struct process_info
*proc
= current_process ();
611 case '0': /* software-breakpoint */
615 ret
= prepare_to_access_memory ();
618 ret
= set_gdb_breakpoint_at (addr
);
619 done_accessing_memory ();
622 case '1': /* hardware-breakpoint */
623 case '2': /* write watchpoint */
624 case '3': /* read watchpoint */
625 case '4': /* access watchpoint */
626 return i386_low_insert_watchpoint (&proc
->private->arch_private
->debug_reg_state
,
636 x86_remove_point (char type
, CORE_ADDR addr
, int len
)
638 struct process_info
*proc
= current_process ();
641 case '0': /* software-breakpoint */
645 ret
= prepare_to_access_memory ();
648 ret
= delete_gdb_breakpoint_at (addr
);
649 done_accessing_memory ();
652 case '1': /* hardware-breakpoint */
653 case '2': /* write watchpoint */
654 case '3': /* read watchpoint */
655 case '4': /* access watchpoint */
656 return i386_low_remove_watchpoint (&proc
->private->arch_private
->debug_reg_state
,
665 x86_stopped_by_watchpoint (void)
667 struct process_info
*proc
= current_process ();
668 return i386_low_stopped_by_watchpoint (&proc
->private->arch_private
->debug_reg_state
);
672 x86_stopped_data_address (void)
674 struct process_info
*proc
= current_process ();
676 if (i386_low_stopped_data_address (&proc
->private->arch_private
->debug_reg_state
,
682 /* Called when a new process is created. */
684 static struct arch_process_info
*
685 x86_linux_new_process (void)
687 struct arch_process_info
*info
= xcalloc (1, sizeof (*info
));
689 i386_low_init_dregs (&info
->debug_reg_state
);
694 /* Called when a new thread is detected. */
696 static struct arch_lwp_info
*
697 x86_linux_new_thread (void)
699 struct arch_lwp_info
*info
= xcalloc (1, sizeof (*info
));
701 info
->debug_registers_changed
= 1;
706 /* Called when resuming a thread.
707 If the debug regs have changed, update the thread's copies. */
710 x86_linux_prepare_to_resume (struct lwp_info
*lwp
)
712 ptid_t ptid
= ptid_of (lwp
);
713 int clear_status
= 0;
715 if (lwp
->arch_private
->debug_registers_changed
)
718 int pid
= ptid_get_pid (ptid
);
719 struct process_info
*proc
= find_process_pid (pid
);
720 struct i386_debug_reg_state
*state
721 = &proc
->private->arch_private
->debug_reg_state
;
723 for (i
= DR_FIRSTADDR
; i
<= DR_LASTADDR
; i
++)
724 if (state
->dr_ref_count
[i
] > 0)
726 x86_linux_dr_set (ptid
, i
, state
->dr_mirror
[i
]);
728 /* If we're setting a watchpoint, any change the inferior
729 had done itself to the debug registers needs to be
730 discarded, otherwise, i386_low_stopped_data_address can
735 x86_linux_dr_set (ptid
, DR_CONTROL
, state
->dr_control_mirror
);
737 lwp
->arch_private
->debug_registers_changed
= 0;
740 if (clear_status
|| lwp
->stopped_by_watchpoint
)
741 x86_linux_dr_set (ptid
, DR_STATUS
, 0);
744 /* When GDBSERVER is built as a 64-bit application on linux, the
745 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
746 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
747 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
748 conversion in-place ourselves. */
750 /* These types below (compat_*) define a siginfo type that is layout
751 compatible with the siginfo type exported by the 32-bit userspace
756 typedef int compat_int_t
;
757 typedef unsigned int compat_uptr_t
;
759 typedef int compat_time_t
;
760 typedef int compat_timer_t
;
761 typedef int compat_clock_t
;
763 struct compat_timeval
765 compat_time_t tv_sec
;
769 typedef union compat_sigval
771 compat_int_t sival_int
;
772 compat_uptr_t sival_ptr
;
775 typedef struct compat_siginfo
783 int _pad
[((128 / sizeof (int)) - 3)];
792 /* POSIX.1b timers */
797 compat_sigval_t _sigval
;
800 /* POSIX.1b signals */
805 compat_sigval_t _sigval
;
814 compat_clock_t _utime
;
815 compat_clock_t _stime
;
818 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
833 /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
834 typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t
;
836 typedef struct compat_x32_siginfo
844 int _pad
[((128 / sizeof (int)) - 3)];
853 /* POSIX.1b timers */
858 compat_sigval_t _sigval
;
861 /* POSIX.1b signals */
866 compat_sigval_t _sigval
;
875 compat_x32_clock_t _utime
;
876 compat_x32_clock_t _stime
;
879 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
892 } compat_x32_siginfo_t
__attribute__ ((__aligned__ (8)));
894 #define cpt_si_pid _sifields._kill._pid
895 #define cpt_si_uid _sifields._kill._uid
896 #define cpt_si_timerid _sifields._timer._tid
897 #define cpt_si_overrun _sifields._timer._overrun
898 #define cpt_si_status _sifields._sigchld._status
899 #define cpt_si_utime _sifields._sigchld._utime
900 #define cpt_si_stime _sifields._sigchld._stime
901 #define cpt_si_ptr _sifields._rt._sigval.sival_ptr
902 #define cpt_si_addr _sifields._sigfault._addr
903 #define cpt_si_band _sifields._sigpoll._band
904 #define cpt_si_fd _sifields._sigpoll._fd
906 /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
907 In their place is si_timer1,si_timer2. */
909 #define si_timerid si_timer1
912 #define si_overrun si_timer2
916 compat_siginfo_from_siginfo (compat_siginfo_t
*to
, siginfo_t
*from
)
918 memset (to
, 0, sizeof (*to
));
920 to
->si_signo
= from
->si_signo
;
921 to
->si_errno
= from
->si_errno
;
922 to
->si_code
= from
->si_code
;
924 if (to
->si_code
== SI_TIMER
)
926 to
->cpt_si_timerid
= from
->si_timerid
;
927 to
->cpt_si_overrun
= from
->si_overrun
;
928 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
930 else if (to
->si_code
== SI_USER
)
932 to
->cpt_si_pid
= from
->si_pid
;
933 to
->cpt_si_uid
= from
->si_uid
;
935 else if (to
->si_code
< 0)
937 to
->cpt_si_pid
= from
->si_pid
;
938 to
->cpt_si_uid
= from
->si_uid
;
939 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
943 switch (to
->si_signo
)
946 to
->cpt_si_pid
= from
->si_pid
;
947 to
->cpt_si_uid
= from
->si_uid
;
948 to
->cpt_si_status
= from
->si_status
;
949 to
->cpt_si_utime
= from
->si_utime
;
950 to
->cpt_si_stime
= from
->si_stime
;
956 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
959 to
->cpt_si_band
= from
->si_band
;
960 to
->cpt_si_fd
= from
->si_fd
;
963 to
->cpt_si_pid
= from
->si_pid
;
964 to
->cpt_si_uid
= from
->si_uid
;
965 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
972 siginfo_from_compat_siginfo (siginfo_t
*to
, compat_siginfo_t
*from
)
974 memset (to
, 0, sizeof (*to
));
976 to
->si_signo
= from
->si_signo
;
977 to
->si_errno
= from
->si_errno
;
978 to
->si_code
= from
->si_code
;
980 if (to
->si_code
== SI_TIMER
)
982 to
->si_timerid
= from
->cpt_si_timerid
;
983 to
->si_overrun
= from
->cpt_si_overrun
;
984 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
986 else if (to
->si_code
== SI_USER
)
988 to
->si_pid
= from
->cpt_si_pid
;
989 to
->si_uid
= from
->cpt_si_uid
;
991 else if (to
->si_code
< 0)
993 to
->si_pid
= from
->cpt_si_pid
;
994 to
->si_uid
= from
->cpt_si_uid
;
995 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
999 switch (to
->si_signo
)
1002 to
->si_pid
= from
->cpt_si_pid
;
1003 to
->si_uid
= from
->cpt_si_uid
;
1004 to
->si_status
= from
->cpt_si_status
;
1005 to
->si_utime
= from
->cpt_si_utime
;
1006 to
->si_stime
= from
->cpt_si_stime
;
1012 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1015 to
->si_band
= from
->cpt_si_band
;
1016 to
->si_fd
= from
->cpt_si_fd
;
1019 to
->si_pid
= from
->cpt_si_pid
;
1020 to
->si_uid
= from
->cpt_si_uid
;
1021 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1028 compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t
*to
,
1031 memset (to
, 0, sizeof (*to
));
1033 to
->si_signo
= from
->si_signo
;
1034 to
->si_errno
= from
->si_errno
;
1035 to
->si_code
= from
->si_code
;
1037 if (to
->si_code
== SI_TIMER
)
1039 to
->cpt_si_timerid
= from
->si_timerid
;
1040 to
->cpt_si_overrun
= from
->si_overrun
;
1041 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1043 else if (to
->si_code
== SI_USER
)
1045 to
->cpt_si_pid
= from
->si_pid
;
1046 to
->cpt_si_uid
= from
->si_uid
;
1048 else if (to
->si_code
< 0)
1050 to
->cpt_si_pid
= from
->si_pid
;
1051 to
->cpt_si_uid
= from
->si_uid
;
1052 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1056 switch (to
->si_signo
)
1059 to
->cpt_si_pid
= from
->si_pid
;
1060 to
->cpt_si_uid
= from
->si_uid
;
1061 to
->cpt_si_status
= from
->si_status
;
1062 to
->cpt_si_utime
= from
->si_utime
;
1063 to
->cpt_si_stime
= from
->si_stime
;
1069 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
1072 to
->cpt_si_band
= from
->si_band
;
1073 to
->cpt_si_fd
= from
->si_fd
;
1076 to
->cpt_si_pid
= from
->si_pid
;
1077 to
->cpt_si_uid
= from
->si_uid
;
1078 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1085 siginfo_from_compat_x32_siginfo (siginfo_t
*to
,
1086 compat_x32_siginfo_t
*from
)
1088 memset (to
, 0, sizeof (*to
));
1090 to
->si_signo
= from
->si_signo
;
1091 to
->si_errno
= from
->si_errno
;
1092 to
->si_code
= from
->si_code
;
1094 if (to
->si_code
== SI_TIMER
)
1096 to
->si_timerid
= from
->cpt_si_timerid
;
1097 to
->si_overrun
= from
->cpt_si_overrun
;
1098 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1100 else if (to
->si_code
== SI_USER
)
1102 to
->si_pid
= from
->cpt_si_pid
;
1103 to
->si_uid
= from
->cpt_si_uid
;
1105 else if (to
->si_code
< 0)
1107 to
->si_pid
= from
->cpt_si_pid
;
1108 to
->si_uid
= from
->cpt_si_uid
;
1109 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1113 switch (to
->si_signo
)
1116 to
->si_pid
= from
->cpt_si_pid
;
1117 to
->si_uid
= from
->cpt_si_uid
;
1118 to
->si_status
= from
->cpt_si_status
;
1119 to
->si_utime
= from
->cpt_si_utime
;
1120 to
->si_stime
= from
->cpt_si_stime
;
1126 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1129 to
->si_band
= from
->cpt_si_band
;
1130 to
->si_fd
= from
->cpt_si_fd
;
1133 to
->si_pid
= from
->cpt_si_pid
;
1134 to
->si_uid
= from
->cpt_si_uid
;
1135 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1141 /* Is this process 64-bit? */
1142 static int linux_is_elf64
;
1143 #endif /* __x86_64__ */
1145 /* Convert a native/host siginfo object, into/from the siginfo in the
1146 layout of the inferiors' architecture. Returns true if any
1147 conversion was done; false otherwise. If DIRECTION is 1, then copy
1148 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
1152 x86_siginfo_fixup (siginfo_t
*native
, void *inf
, int direction
)
1155 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
1156 if (!is_64bit_tdesc ())
1158 if (sizeof (siginfo_t
) != sizeof (compat_siginfo_t
))
1159 fatal ("unexpected difference in siginfo");
1162 compat_siginfo_from_siginfo ((struct compat_siginfo
*) inf
, native
);
1164 siginfo_from_compat_siginfo (native
, (struct compat_siginfo
*) inf
);
1168 /* No fixup for native x32 GDB. */
1169 else if (!linux_is_elf64
&& sizeof (void *) == 8)
1171 if (sizeof (siginfo_t
) != sizeof (compat_x32_siginfo_t
))
1172 fatal ("unexpected difference in siginfo");
1175 compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo
*) inf
,
1178 siginfo_from_compat_x32_siginfo (native
,
1179 (struct compat_x32_siginfo
*) inf
);
1190 /* Format of XSAVE extended state is:
1193 fxsave_bytes[0..463]
1194 sw_usable_bytes[464..511]
1195 xstate_hdr_bytes[512..575]
1200 Same memory layout will be used for the coredump NT_X86_XSTATE
1201 representing the XSAVE extended state registers.
1203 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
1204 extended state mask, which is the same as the extended control register
1205 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
1206 together with the mask saved in the xstate_hdr_bytes to determine what
1207 states the processor/OS supports and what state, used or initialized,
1208 the process/thread is in. */
1209 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
1211 /* Does the current host support the GETFPXREGS request? The header
1212 file may or may not define it, and even if it is defined, the
1213 kernel will return EIO if it's running on a pre-SSE processor. */
1214 int have_ptrace_getfpxregs
=
1215 #ifdef HAVE_PTRACE_GETFPXREGS
1222 /* Does the current host support PTRACE_GETREGSET? */
1223 static int have_ptrace_getregset
= -1;
1225 /* Get Linux/x86 target description from running target. */
1227 static const struct target_desc
*
1228 x86_linux_read_description (void)
1230 unsigned int machine
;
1234 static uint64_t xcr0
;
1235 struct regset_info
*regset
;
1237 tid
= lwpid_of (get_thread_lwp (current_inferior
));
1239 is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1241 if (sizeof (void *) == 4)
1244 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
1246 else if (machine
== EM_X86_64
)
1247 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
1251 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
1252 if (machine
== EM_386
&& have_ptrace_getfpxregs
== -1)
1254 elf_fpxregset_t fpxregs
;
1256 if (ptrace (PTRACE_GETFPXREGS
, tid
, 0, (long) &fpxregs
) < 0)
1258 have_ptrace_getfpxregs
= 0;
1259 have_ptrace_getregset
= 0;
1260 return tdesc_i386_mmx_linux
;
1263 have_ptrace_getfpxregs
= 1;
1269 x86_xcr0
= I386_XSTATE_SSE_MASK
;
1271 /* Don't use XML. */
1273 if (machine
== EM_X86_64
)
1274 return tdesc_amd64_linux_no_xml
;
1277 return tdesc_i386_linux_no_xml
;
1280 if (have_ptrace_getregset
== -1)
1282 uint64_t xstateregs
[(I386_XSTATE_SSE_SIZE
/ sizeof (uint64_t))];
1285 iov
.iov_base
= xstateregs
;
1286 iov
.iov_len
= sizeof (xstateregs
);
1288 /* Check if PTRACE_GETREGSET works. */
1289 if (ptrace (PTRACE_GETREGSET
, tid
,
1290 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
1291 have_ptrace_getregset
= 0;
1294 have_ptrace_getregset
= 1;
1296 /* Get XCR0 from XSAVE extended state. */
1297 xcr0
= xstateregs
[(I386_LINUX_XSAVE_XCR0_OFFSET
1298 / sizeof (uint64_t))];
1300 /* Use PTRACE_GETREGSET if it is available. */
1301 for (regset
= x86_regsets
;
1302 regset
->fill_function
!= NULL
; regset
++)
1303 if (regset
->get_request
== PTRACE_GETREGSET
)
1304 regset
->size
= I386_XSTATE_SIZE (xcr0
);
1305 else if (regset
->type
!= GENERAL_REGS
)
1310 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
1311 avx
= (have_ptrace_getregset
1312 && (xcr0
& I386_XSTATE_AVX_MASK
) == I386_XSTATE_AVX_MASK
);
1314 /* AVX is the highest feature we support. */
1318 if (machine
== EM_X86_64
)
1324 return tdesc_x32_avx_linux
;
1326 return tdesc_amd64_avx_linux
;
1331 return tdesc_x32_linux
;
1333 return tdesc_amd64_linux
;
1340 return tdesc_i386_avx_linux
;
1342 return tdesc_i386_linux
;
1345 gdb_assert_not_reached ("failed to return tdesc");
1348 /* Callback for find_inferior. Stops iteration when a thread with a
1349 given PID is found. */
1352 same_process_callback (struct inferior_list_entry
*entry
, void *data
)
1354 int pid
= *(int *) data
;
1356 return (ptid_get_pid (entry
->id
) == pid
);
1359 /* Callback for for_each_inferior. Calls the arch_setup routine for
1363 x86_arch_setup_process_callback (struct inferior_list_entry
*entry
)
1365 int pid
= ptid_get_pid (entry
->id
);
1367 /* Look up any thread of this processes. */
1369 = (struct thread_info
*) find_inferior (&all_threads
,
1370 same_process_callback
, &pid
);
1372 the_low_target
.arch_setup ();
1375 /* Update all the target description of all processes; a new GDB
1376 connected, and it may or not support xml target descriptions. */
1379 x86_linux_update_xmltarget (void)
1381 struct thread_info
*save_inferior
= current_inferior
;
1383 /* Before changing the register cache's internal layout, flush the
1384 contents of the current valid caches back to the threads, and
1385 release the current regcache objects. */
1386 regcache_release ();
1388 for_each_inferior (&all_processes
, x86_arch_setup_process_callback
);
1390 current_inferior
= save_inferior
;
1393 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
1394 PTRACE_GETREGSET. */
1397 x86_linux_process_qsupported (const char *query
)
1399 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
1400 with "i386" in qSupported query, it supports x86 XML target
1403 if (query
!= NULL
&& strncmp (query
, "xmlRegisters=", 13) == 0)
1405 char *copy
= xstrdup (query
+ 13);
1408 for (p
= strtok (copy
, ","); p
!= NULL
; p
= strtok (NULL
, ","))
1410 if (strcmp (p
, "i386") == 0)
1420 x86_linux_update_xmltarget ();
1423 /* Common for x86/x86-64. */
1425 static struct regsets_info x86_regsets_info
=
1427 x86_regsets
, /* regsets */
1428 0, /* num_regsets */
1429 NULL
, /* disabled_regsets */
1433 static struct regs_info amd64_linux_regs_info
=
1435 NULL
, /* regset_bitmap */
1436 NULL
, /* usrregs_info */
1440 static struct usrregs_info i386_linux_usrregs_info
=
1446 static struct regs_info i386_linux_regs_info
=
1448 NULL
, /* regset_bitmap */
1449 &i386_linux_usrregs_info
,
1453 const struct regs_info
*
1454 x86_linux_regs_info (void)
1457 if (is_64bit_tdesc ())
1458 return &amd64_linux_regs_info
;
1461 return &i386_linux_regs_info
;
1464 /* Initialize the target description for the architecture of the
1468 x86_arch_setup (void)
1470 current_process ()->tdesc
= x86_linux_read_description ();
1474 x86_supports_tracepoints (void)
1480 append_insns (CORE_ADDR
*to
, size_t len
, const unsigned char *buf
)
1482 write_inferior_memory (*to
, buf
, len
);
1487 push_opcode (unsigned char *buf
, char *op
)
1489 unsigned char *buf_org
= buf
;
1494 unsigned long ul
= strtoul (op
, &endptr
, 16);
1503 return buf
- buf_org
;
1508 /* Build a jump pad that saves registers and calls a collection
1509 function. Writes a jump instruction to the jump pad to
1510 JJUMPAD_INSN. The caller is responsible to write it in at the
1511 tracepoint address. */
1514 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1515 CORE_ADDR collector
,
1518 CORE_ADDR
*jump_entry
,
1519 CORE_ADDR
*trampoline
,
1520 ULONGEST
*trampoline_size
,
1521 unsigned char *jjump_pad_insn
,
1522 ULONGEST
*jjump_pad_insn_size
,
1523 CORE_ADDR
*adjusted_insn_addr
,
1524 CORE_ADDR
*adjusted_insn_addr_end
,
1527 unsigned char buf
[40];
1531 CORE_ADDR buildaddr
= *jump_entry
;
1533 /* Build the jump pad. */
1535 /* First, do tracepoint data collection. Save registers. */
1537 /* Need to ensure stack pointer saved first. */
1538 buf
[i
++] = 0x54; /* push %rsp */
1539 buf
[i
++] = 0x55; /* push %rbp */
1540 buf
[i
++] = 0x57; /* push %rdi */
1541 buf
[i
++] = 0x56; /* push %rsi */
1542 buf
[i
++] = 0x52; /* push %rdx */
1543 buf
[i
++] = 0x51; /* push %rcx */
1544 buf
[i
++] = 0x53; /* push %rbx */
1545 buf
[i
++] = 0x50; /* push %rax */
1546 buf
[i
++] = 0x41; buf
[i
++] = 0x57; /* push %r15 */
1547 buf
[i
++] = 0x41; buf
[i
++] = 0x56; /* push %r14 */
1548 buf
[i
++] = 0x41; buf
[i
++] = 0x55; /* push %r13 */
1549 buf
[i
++] = 0x41; buf
[i
++] = 0x54; /* push %r12 */
1550 buf
[i
++] = 0x41; buf
[i
++] = 0x53; /* push %r11 */
1551 buf
[i
++] = 0x41; buf
[i
++] = 0x52; /* push %r10 */
1552 buf
[i
++] = 0x41; buf
[i
++] = 0x51; /* push %r9 */
1553 buf
[i
++] = 0x41; buf
[i
++] = 0x50; /* push %r8 */
1554 buf
[i
++] = 0x9c; /* pushfq */
1555 buf
[i
++] = 0x48; /* movl <addr>,%rdi */
1557 *((unsigned long *)(buf
+ i
)) = (unsigned long) tpaddr
;
1558 i
+= sizeof (unsigned long);
1559 buf
[i
++] = 0x57; /* push %rdi */
1560 append_insns (&buildaddr
, i
, buf
);
1562 /* Stack space for the collecting_t object. */
1564 i
+= push_opcode (&buf
[i
], "48 83 ec 18"); /* sub $0x18,%rsp */
1565 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov <tpoint>,%rax */
1566 memcpy (buf
+ i
, &tpoint
, 8);
1568 i
+= push_opcode (&buf
[i
], "48 89 04 24"); /* mov %rax,(%rsp) */
1569 i
+= push_opcode (&buf
[i
],
1570 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1571 i
+= push_opcode (&buf
[i
], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1572 append_insns (&buildaddr
, i
, buf
);
1576 i
+= push_opcode (&buf
[i
], "48 be"); /* movl <lockaddr>,%rsi */
1577 memcpy (&buf
[i
], (void *) &lockaddr
, 8);
1579 i
+= push_opcode (&buf
[i
], "48 89 e1"); /* mov %rsp,%rcx */
1580 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1581 i
+= push_opcode (&buf
[i
], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1582 i
+= push_opcode (&buf
[i
], "48 85 c0"); /* test %rax,%rax */
1583 i
+= push_opcode (&buf
[i
], "75 f4"); /* jne <again> */
1584 append_insns (&buildaddr
, i
, buf
);
1586 /* Set up the gdb_collect call. */
1587 /* At this point, (stack pointer + 0x18) is the base of our saved
1591 i
+= push_opcode (&buf
[i
], "48 89 e6"); /* mov %rsp,%rsi */
1592 i
+= push_opcode (&buf
[i
], "48 83 c6 18"); /* add $0x18,%rsi */
1594 /* tpoint address may be 64-bit wide. */
1595 i
+= push_opcode (&buf
[i
], "48 bf"); /* movl <addr>,%rdi */
1596 memcpy (buf
+ i
, &tpoint
, 8);
1598 append_insns (&buildaddr
, i
, buf
);
1600 /* The collector function being in the shared library, may be
1601 >31-bits away off the jump pad. */
1603 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov $collector,%rax */
1604 memcpy (buf
+ i
, &collector
, 8);
1606 i
+= push_opcode (&buf
[i
], "ff d0"); /* callq *%rax */
1607 append_insns (&buildaddr
, i
, buf
);
1609 /* Clear the spin-lock. */
1611 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1612 i
+= push_opcode (&buf
[i
], "48 a3"); /* mov %rax, lockaddr */
1613 memcpy (buf
+ i
, &lockaddr
, 8);
1615 append_insns (&buildaddr
, i
, buf
);
1617 /* Remove stack that had been used for the collect_t object. */
1619 i
+= push_opcode (&buf
[i
], "48 83 c4 18"); /* add $0x18,%rsp */
1620 append_insns (&buildaddr
, i
, buf
);
1622 /* Restore register state. */
1624 buf
[i
++] = 0x48; /* add $0x8,%rsp */
1628 buf
[i
++] = 0x9d; /* popfq */
1629 buf
[i
++] = 0x41; buf
[i
++] = 0x58; /* pop %r8 */
1630 buf
[i
++] = 0x41; buf
[i
++] = 0x59; /* pop %r9 */
1631 buf
[i
++] = 0x41; buf
[i
++] = 0x5a; /* pop %r10 */
1632 buf
[i
++] = 0x41; buf
[i
++] = 0x5b; /* pop %r11 */
1633 buf
[i
++] = 0x41; buf
[i
++] = 0x5c; /* pop %r12 */
1634 buf
[i
++] = 0x41; buf
[i
++] = 0x5d; /* pop %r13 */
1635 buf
[i
++] = 0x41; buf
[i
++] = 0x5e; /* pop %r14 */
1636 buf
[i
++] = 0x41; buf
[i
++] = 0x5f; /* pop %r15 */
1637 buf
[i
++] = 0x58; /* pop %rax */
1638 buf
[i
++] = 0x5b; /* pop %rbx */
1639 buf
[i
++] = 0x59; /* pop %rcx */
1640 buf
[i
++] = 0x5a; /* pop %rdx */
1641 buf
[i
++] = 0x5e; /* pop %rsi */
1642 buf
[i
++] = 0x5f; /* pop %rdi */
1643 buf
[i
++] = 0x5d; /* pop %rbp */
1644 buf
[i
++] = 0x5c; /* pop %rsp */
1645 append_insns (&buildaddr
, i
, buf
);
1647 /* Now, adjust the original instruction to execute in the jump
1649 *adjusted_insn_addr
= buildaddr
;
1650 relocate_instruction (&buildaddr
, tpaddr
);
1651 *adjusted_insn_addr_end
= buildaddr
;
1653 /* Finally, write a jump back to the program. */
1655 loffset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1656 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1659 "E.Jump back from jump pad too far from tracepoint "
1660 "(offset 0x%" PRIx64
" > int32).", loffset
);
1664 offset
= (int) loffset
;
1665 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1666 memcpy (buf
+ 1, &offset
, 4);
1667 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1669 /* The jump pad is now built. Wire in a jump to our jump pad. This
1670 is always done last (by our caller actually), so that we can
1671 install fast tracepoints with threads running. This relies on
1672 the agent's atomic write support. */
1673 loffset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1674 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1677 "E.Jump pad too far from tracepoint "
1678 "(offset 0x%" PRIx64
" > int32).", loffset
);
1682 offset
= (int) loffset
;
1684 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1685 memcpy (buf
+ 1, &offset
, 4);
1686 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1687 *jjump_pad_insn_size
= sizeof (jump_insn
);
1689 /* Return the end address of our pad. */
1690 *jump_entry
= buildaddr
;
1695 #endif /* __x86_64__ */
1697 /* Build a jump pad that saves registers and calls a collection
1698 function. Writes a jump instruction to the jump pad to
1699 JJUMPAD_INSN. The caller is responsible to write it in at the
1700 tracepoint address. */
1703 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1704 CORE_ADDR collector
,
1707 CORE_ADDR
*jump_entry
,
1708 CORE_ADDR
*trampoline
,
1709 ULONGEST
*trampoline_size
,
1710 unsigned char *jjump_pad_insn
,
1711 ULONGEST
*jjump_pad_insn_size
,
1712 CORE_ADDR
*adjusted_insn_addr
,
1713 CORE_ADDR
*adjusted_insn_addr_end
,
1716 unsigned char buf
[0x100];
1718 CORE_ADDR buildaddr
= *jump_entry
;
1720 /* Build the jump pad. */
1722 /* First, do tracepoint data collection. Save registers. */
1724 buf
[i
++] = 0x60; /* pushad */
1725 buf
[i
++] = 0x68; /* push tpaddr aka $pc */
1726 *((int *)(buf
+ i
)) = (int) tpaddr
;
1728 buf
[i
++] = 0x9c; /* pushf */
1729 buf
[i
++] = 0x1e; /* push %ds */
1730 buf
[i
++] = 0x06; /* push %es */
1731 buf
[i
++] = 0x0f; /* push %fs */
1733 buf
[i
++] = 0x0f; /* push %gs */
1735 buf
[i
++] = 0x16; /* push %ss */
1736 buf
[i
++] = 0x0e; /* push %cs */
1737 append_insns (&buildaddr
, i
, buf
);
1739 /* Stack space for the collecting_t object. */
1741 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1743 /* Build the object. */
1744 i
+= push_opcode (&buf
[i
], "b8"); /* mov <tpoint>,%eax */
1745 memcpy (buf
+ i
, &tpoint
, 4);
1747 i
+= push_opcode (&buf
[i
], "89 04 24"); /* mov %eax,(%esp) */
1749 i
+= push_opcode (&buf
[i
], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1750 i
+= push_opcode (&buf
[i
], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1751 append_insns (&buildaddr
, i
, buf
);
1753 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1754 If we cared for it, this could be using xchg alternatively. */
1757 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1758 i
+= push_opcode (&buf
[i
], "f0 0f b1 25"); /* lock cmpxchg
1760 memcpy (&buf
[i
], (void *) &lockaddr
, 4);
1762 i
+= push_opcode (&buf
[i
], "85 c0"); /* test %eax,%eax */
1763 i
+= push_opcode (&buf
[i
], "75 f2"); /* jne <again> */
1764 append_insns (&buildaddr
, i
, buf
);
1767 /* Set up arguments to the gdb_collect call. */
1769 i
+= push_opcode (&buf
[i
], "89 e0"); /* mov %esp,%eax */
1770 i
+= push_opcode (&buf
[i
], "83 c0 08"); /* add $0x08,%eax */
1771 i
+= push_opcode (&buf
[i
], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1772 append_insns (&buildaddr
, i
, buf
);
1775 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1776 append_insns (&buildaddr
, i
, buf
);
1779 i
+= push_opcode (&buf
[i
], "c7 04 24"); /* movl <addr>,(%esp) */
1780 memcpy (&buf
[i
], (void *) &tpoint
, 4);
1782 append_insns (&buildaddr
, i
, buf
);
1784 buf
[0] = 0xe8; /* call <reladdr> */
1785 offset
= collector
- (buildaddr
+ sizeof (jump_insn
));
1786 memcpy (buf
+ 1, &offset
, 4);
1787 append_insns (&buildaddr
, 5, buf
);
1788 /* Clean up after the call. */
1789 buf
[0] = 0x83; /* add $0x8,%esp */
1792 append_insns (&buildaddr
, 3, buf
);
1795 /* Clear the spin-lock. This would need the LOCK prefix on older
1798 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1799 i
+= push_opcode (&buf
[i
], "a3"); /* mov %eax, lockaddr */
1800 memcpy (buf
+ i
, &lockaddr
, 4);
1802 append_insns (&buildaddr
, i
, buf
);
1805 /* Remove stack that had been used for the collect_t object. */
1807 i
+= push_opcode (&buf
[i
], "83 c4 08"); /* add $0x08,%esp */
1808 append_insns (&buildaddr
, i
, buf
);
1811 buf
[i
++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1814 buf
[i
++] = 0x17; /* pop %ss */
1815 buf
[i
++] = 0x0f; /* pop %gs */
1817 buf
[i
++] = 0x0f; /* pop %fs */
1819 buf
[i
++] = 0x07; /* pop %es */
1820 buf
[i
++] = 0x1f; /* pop %ds */
1821 buf
[i
++] = 0x9d; /* popf */
1822 buf
[i
++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1825 buf
[i
++] = 0x61; /* popad */
1826 append_insns (&buildaddr
, i
, buf
);
1828 /* Now, adjust the original instruction to execute in the jump
1830 *adjusted_insn_addr
= buildaddr
;
1831 relocate_instruction (&buildaddr
, tpaddr
);
1832 *adjusted_insn_addr_end
= buildaddr
;
1834 /* Write the jump back to the program. */
1835 offset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1836 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1837 memcpy (buf
+ 1, &offset
, 4);
1838 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1840 /* The jump pad is now built. Wire in a jump to our jump pad. This
1841 is always done last (by our caller actually), so that we can
1842 install fast tracepoints with threads running. This relies on
1843 the agent's atomic write support. */
1846 /* Create a trampoline. */
1847 *trampoline_size
= sizeof (jump_insn
);
1848 if (!claim_trampoline_space (*trampoline_size
, trampoline
))
1850 /* No trampoline space available. */
1852 "E.Cannot allocate trampoline space needed for fast "
1853 "tracepoints on 4-byte instructions.");
1857 offset
= *jump_entry
- (*trampoline
+ sizeof (jump_insn
));
1858 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1859 memcpy (buf
+ 1, &offset
, 4);
1860 write_inferior_memory (*trampoline
, buf
, sizeof (jump_insn
));
1862 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1863 offset
= (*trampoline
- (tpaddr
+ sizeof (small_jump_insn
))) & 0xffff;
1864 memcpy (buf
, small_jump_insn
, sizeof (small_jump_insn
));
1865 memcpy (buf
+ 2, &offset
, 2);
1866 memcpy (jjump_pad_insn
, buf
, sizeof (small_jump_insn
));
1867 *jjump_pad_insn_size
= sizeof (small_jump_insn
);
1871 /* Else use a 32-bit relative jump instruction. */
1872 offset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1873 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1874 memcpy (buf
+ 1, &offset
, 4);
1875 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1876 *jjump_pad_insn_size
= sizeof (jump_insn
);
1879 /* Return the end address of our pad. */
1880 *jump_entry
= buildaddr
;
1886 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1887 CORE_ADDR collector
,
1890 CORE_ADDR
*jump_entry
,
1891 CORE_ADDR
*trampoline
,
1892 ULONGEST
*trampoline_size
,
1893 unsigned char *jjump_pad_insn
,
1894 ULONGEST
*jjump_pad_insn_size
,
1895 CORE_ADDR
*adjusted_insn_addr
,
1896 CORE_ADDR
*adjusted_insn_addr_end
,
1900 if (is_64bit_tdesc ())
1901 return amd64_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1902 collector
, lockaddr
,
1903 orig_size
, jump_entry
,
1904 trampoline
, trampoline_size
,
1906 jjump_pad_insn_size
,
1908 adjusted_insn_addr_end
,
1912 return i386_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1913 collector
, lockaddr
,
1914 orig_size
, jump_entry
,
1915 trampoline
, trampoline_size
,
1917 jjump_pad_insn_size
,
1919 adjusted_insn_addr_end
,
1923 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1927 x86_get_min_fast_tracepoint_insn_len (void)
1929 static int warned_about_fast_tracepoints
= 0;
1932 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1933 used for fast tracepoints. */
1934 if (is_64bit_tdesc ())
1938 if (agent_loaded_p ())
1940 char errbuf
[IPA_BUFSIZ
];
1944 /* On x86, if trampolines are available, then 4-byte jump instructions
1945 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1946 with a 4-byte offset are used instead. */
1947 if (have_fast_tracepoint_trampoline_buffer (errbuf
))
1951 /* GDB has no channel to explain to user why a shorter fast
1952 tracepoint is not possible, but at least make GDBserver
1953 mention that something has gone awry. */
1954 if (!warned_about_fast_tracepoints
)
1956 warning ("4-byte fast tracepoints not available; %s\n", errbuf
);
1957 warned_about_fast_tracepoints
= 1;
1964 /* Indicate that the minimum length is currently unknown since the IPA
1965 has not loaded yet. */
1971 add_insns (unsigned char *start
, int len
)
1973 CORE_ADDR buildaddr
= current_insn_ptr
;
1976 fprintf (stderr
, "Adding %d bytes of insn at %s\n",
1977 len
, paddress (buildaddr
));
1979 append_insns (&buildaddr
, len
, start
);
1980 current_insn_ptr
= buildaddr
;
1983 /* Our general strategy for emitting code is to avoid specifying raw
1984 bytes whenever possible, and instead copy a block of inline asm
1985 that is embedded in the function. This is a little messy, because
1986 we need to keep the compiler from discarding what looks like dead
1987 code, plus suppress various warnings. */
1989 #define EMIT_ASM(NAME, INSNS) \
1992 extern unsigned char start_ ## NAME, end_ ## NAME; \
1993 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1994 __asm__ ("jmp end_" #NAME "\n" \
1995 "\t" "start_" #NAME ":" \
1997 "\t" "end_" #NAME ":"); \
2002 #define EMIT_ASM32(NAME,INSNS) \
2005 extern unsigned char start_ ## NAME, end_ ## NAME; \
2006 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
2007 __asm__ (".code32\n" \
2008 "\t" "jmp end_" #NAME "\n" \
2009 "\t" "start_" #NAME ":\n" \
2011 "\t" "end_" #NAME ":\n" \
2017 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
2024 amd64_emit_prologue (void)
2026 EMIT_ASM (amd64_prologue
,
2028 "movq %rsp,%rbp\n\t"
2029 "sub $0x20,%rsp\n\t"
2030 "movq %rdi,-8(%rbp)\n\t"
2031 "movq %rsi,-16(%rbp)");
2036 amd64_emit_epilogue (void)
2038 EMIT_ASM (amd64_epilogue
,
2039 "movq -16(%rbp),%rdi\n\t"
2040 "movq %rax,(%rdi)\n\t"
2047 amd64_emit_add (void)
2049 EMIT_ASM (amd64_add
,
2050 "add (%rsp),%rax\n\t"
2051 "lea 0x8(%rsp),%rsp");
2055 amd64_emit_sub (void)
2057 EMIT_ASM (amd64_sub
,
2058 "sub %rax,(%rsp)\n\t"
2063 amd64_emit_mul (void)
2069 amd64_emit_lsh (void)
2075 amd64_emit_rsh_signed (void)
2081 amd64_emit_rsh_unsigned (void)
2087 amd64_emit_ext (int arg
)
2092 EMIT_ASM (amd64_ext_8
,
2098 EMIT_ASM (amd64_ext_16
,
2103 EMIT_ASM (amd64_ext_32
,
2112 amd64_emit_log_not (void)
2114 EMIT_ASM (amd64_log_not
,
2115 "test %rax,%rax\n\t"
2121 amd64_emit_bit_and (void)
2123 EMIT_ASM (amd64_and
,
2124 "and (%rsp),%rax\n\t"
2125 "lea 0x8(%rsp),%rsp");
2129 amd64_emit_bit_or (void)
2132 "or (%rsp),%rax\n\t"
2133 "lea 0x8(%rsp),%rsp");
2137 amd64_emit_bit_xor (void)
2139 EMIT_ASM (amd64_xor
,
2140 "xor (%rsp),%rax\n\t"
2141 "lea 0x8(%rsp),%rsp");
2145 amd64_emit_bit_not (void)
2147 EMIT_ASM (amd64_bit_not
,
2148 "xorq $0xffffffffffffffff,%rax");
2152 amd64_emit_equal (void)
2154 EMIT_ASM (amd64_equal
,
2155 "cmp %rax,(%rsp)\n\t"
2156 "je .Lamd64_equal_true\n\t"
2158 "jmp .Lamd64_equal_end\n\t"
2159 ".Lamd64_equal_true:\n\t"
2161 ".Lamd64_equal_end:\n\t"
2162 "lea 0x8(%rsp),%rsp");
2166 amd64_emit_less_signed (void)
2168 EMIT_ASM (amd64_less_signed
,
2169 "cmp %rax,(%rsp)\n\t"
2170 "jl .Lamd64_less_signed_true\n\t"
2172 "jmp .Lamd64_less_signed_end\n\t"
2173 ".Lamd64_less_signed_true:\n\t"
2175 ".Lamd64_less_signed_end:\n\t"
2176 "lea 0x8(%rsp),%rsp");
2180 amd64_emit_less_unsigned (void)
2182 EMIT_ASM (amd64_less_unsigned
,
2183 "cmp %rax,(%rsp)\n\t"
2184 "jb .Lamd64_less_unsigned_true\n\t"
2186 "jmp .Lamd64_less_unsigned_end\n\t"
2187 ".Lamd64_less_unsigned_true:\n\t"
2189 ".Lamd64_less_unsigned_end:\n\t"
2190 "lea 0x8(%rsp),%rsp");
2194 amd64_emit_ref (int size
)
2199 EMIT_ASM (amd64_ref1
,
2203 EMIT_ASM (amd64_ref2
,
2207 EMIT_ASM (amd64_ref4
,
2208 "movl (%rax),%eax");
2211 EMIT_ASM (amd64_ref8
,
2212 "movq (%rax),%rax");
2218 amd64_emit_if_goto (int *offset_p
, int *size_p
)
2220 EMIT_ASM (amd64_if_goto
,
2224 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2232 amd64_emit_goto (int *offset_p
, int *size_p
)
2234 EMIT_ASM (amd64_goto
,
2235 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2243 amd64_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2245 int diff
= (to
- (from
+ size
));
2246 unsigned char buf
[sizeof (int)];
2254 memcpy (buf
, &diff
, sizeof (int));
2255 write_inferior_memory (from
, buf
, sizeof (int));
2259 amd64_emit_const (LONGEST num
)
2261 unsigned char buf
[16];
2263 CORE_ADDR buildaddr
= current_insn_ptr
;
2266 buf
[i
++] = 0x48; buf
[i
++] = 0xb8; /* mov $<n>,%rax */
2267 memcpy (&buf
[i
], &num
, sizeof (num
));
2269 append_insns (&buildaddr
, i
, buf
);
2270 current_insn_ptr
= buildaddr
;
2274 amd64_emit_call (CORE_ADDR fn
)
2276 unsigned char buf
[16];
2278 CORE_ADDR buildaddr
;
2281 /* The destination function being in the shared library, may be
2282 >31-bits away off the compiled code pad. */
2284 buildaddr
= current_insn_ptr
;
2286 offset64
= fn
- (buildaddr
+ 1 /* call op */ + 4 /* 32-bit offset */);
2290 if (offset64
> INT_MAX
|| offset64
< INT_MIN
)
2292 /* Offset is too large for a call. Use callq, but that requires
2293 a register, so avoid it if possible. Use r10, since it is
2294 call-clobbered, we don't have to push/pop it. */
2295 buf
[i
++] = 0x48; /* mov $fn,%r10 */
2297 memcpy (buf
+ i
, &fn
, 8);
2299 buf
[i
++] = 0xff; /* callq *%r10 */
2304 int offset32
= offset64
; /* we know we can't overflow here. */
2305 memcpy (buf
+ i
, &offset32
, 4);
2309 append_insns (&buildaddr
, i
, buf
);
2310 current_insn_ptr
= buildaddr
;
2314 amd64_emit_reg (int reg
)
2316 unsigned char buf
[16];
2318 CORE_ADDR buildaddr
;
2320 /* Assume raw_regs is still in %rdi. */
2321 buildaddr
= current_insn_ptr
;
2323 buf
[i
++] = 0xbe; /* mov $<n>,%esi */
2324 memcpy (&buf
[i
], ®
, sizeof (reg
));
2326 append_insns (&buildaddr
, i
, buf
);
2327 current_insn_ptr
= buildaddr
;
2328 amd64_emit_call (get_raw_reg_func_addr ());
2332 amd64_emit_pop (void)
2334 EMIT_ASM (amd64_pop
,
2339 amd64_emit_stack_flush (void)
2341 EMIT_ASM (amd64_stack_flush
,
2346 amd64_emit_zero_ext (int arg
)
2351 EMIT_ASM (amd64_zero_ext_8
,
2355 EMIT_ASM (amd64_zero_ext_16
,
2356 "and $0xffff,%rax");
2359 EMIT_ASM (amd64_zero_ext_32
,
2360 "mov $0xffffffff,%rcx\n\t"
2369 amd64_emit_swap (void)
2371 EMIT_ASM (amd64_swap
,
2378 amd64_emit_stack_adjust (int n
)
2380 unsigned char buf
[16];
2382 CORE_ADDR buildaddr
= current_insn_ptr
;
2385 buf
[i
++] = 0x48; /* lea $<n>(%rsp),%rsp */
2389 /* This only handles adjustments up to 16, but we don't expect any more. */
2391 append_insns (&buildaddr
, i
, buf
);
2392 current_insn_ptr
= buildaddr
;
2395 /* FN's prototype is `LONGEST(*fn)(int)'. */
2398 amd64_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2400 unsigned char buf
[16];
2402 CORE_ADDR buildaddr
;
2404 buildaddr
= current_insn_ptr
;
2406 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2407 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2409 append_insns (&buildaddr
, i
, buf
);
2410 current_insn_ptr
= buildaddr
;
2411 amd64_emit_call (fn
);
2414 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2417 amd64_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
2419 unsigned char buf
[16];
2421 CORE_ADDR buildaddr
;
2423 buildaddr
= current_insn_ptr
;
2425 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2426 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2428 append_insns (&buildaddr
, i
, buf
);
2429 current_insn_ptr
= buildaddr
;
2430 EMIT_ASM (amd64_void_call_2_a
,
2431 /* Save away a copy of the stack top. */
2433 /* Also pass top as the second argument. */
2435 amd64_emit_call (fn
);
2436 EMIT_ASM (amd64_void_call_2_b
,
2437 /* Restore the stack top, %rax may have been trashed. */
2442 amd64_emit_eq_goto (int *offset_p
, int *size_p
)
2445 "cmp %rax,(%rsp)\n\t"
2446 "jne .Lamd64_eq_fallthru\n\t"
2447 "lea 0x8(%rsp),%rsp\n\t"
2449 /* jmp, but don't trust the assembler to choose the right jump */
2450 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2451 ".Lamd64_eq_fallthru:\n\t"
2452 "lea 0x8(%rsp),%rsp\n\t"
2462 amd64_emit_ne_goto (int *offset_p
, int *size_p
)
2465 "cmp %rax,(%rsp)\n\t"
2466 "je .Lamd64_ne_fallthru\n\t"
2467 "lea 0x8(%rsp),%rsp\n\t"
2469 /* jmp, but don't trust the assembler to choose the right jump */
2470 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2471 ".Lamd64_ne_fallthru:\n\t"
2472 "lea 0x8(%rsp),%rsp\n\t"
2482 amd64_emit_lt_goto (int *offset_p
, int *size_p
)
2485 "cmp %rax,(%rsp)\n\t"
2486 "jnl .Lamd64_lt_fallthru\n\t"
2487 "lea 0x8(%rsp),%rsp\n\t"
2489 /* jmp, but don't trust the assembler to choose the right jump */
2490 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2491 ".Lamd64_lt_fallthru:\n\t"
2492 "lea 0x8(%rsp),%rsp\n\t"
2502 amd64_emit_le_goto (int *offset_p
, int *size_p
)
2505 "cmp %rax,(%rsp)\n\t"
2506 "jnle .Lamd64_le_fallthru\n\t"
2507 "lea 0x8(%rsp),%rsp\n\t"
2509 /* jmp, but don't trust the assembler to choose the right jump */
2510 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2511 ".Lamd64_le_fallthru:\n\t"
2512 "lea 0x8(%rsp),%rsp\n\t"
2522 amd64_emit_gt_goto (int *offset_p
, int *size_p
)
2525 "cmp %rax,(%rsp)\n\t"
2526 "jng .Lamd64_gt_fallthru\n\t"
2527 "lea 0x8(%rsp),%rsp\n\t"
2529 /* jmp, but don't trust the assembler to choose the right jump */
2530 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2531 ".Lamd64_gt_fallthru:\n\t"
2532 "lea 0x8(%rsp),%rsp\n\t"
2542 amd64_emit_ge_goto (int *offset_p
, int *size_p
)
2545 "cmp %rax,(%rsp)\n\t"
2546 "jnge .Lamd64_ge_fallthru\n\t"
2547 ".Lamd64_ge_jump:\n\t"
2548 "lea 0x8(%rsp),%rsp\n\t"
2550 /* jmp, but don't trust the assembler to choose the right jump */
2551 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2552 ".Lamd64_ge_fallthru:\n\t"
2553 "lea 0x8(%rsp),%rsp\n\t"
2562 struct emit_ops amd64_emit_ops
=
2564 amd64_emit_prologue
,
2565 amd64_emit_epilogue
,
2570 amd64_emit_rsh_signed
,
2571 amd64_emit_rsh_unsigned
,
2579 amd64_emit_less_signed
,
2580 amd64_emit_less_unsigned
,
2584 amd64_write_goto_address
,
2589 amd64_emit_stack_flush
,
2590 amd64_emit_zero_ext
,
2592 amd64_emit_stack_adjust
,
2593 amd64_emit_int_call_1
,
2594 amd64_emit_void_call_2
,
2603 #endif /* __x86_64__ */
2606 i386_emit_prologue (void)
2608 EMIT_ASM32 (i386_prologue
,
2612 /* At this point, the raw regs base address is at 8(%ebp), and the
2613 value pointer is at 12(%ebp). */
2617 i386_emit_epilogue (void)
2619 EMIT_ASM32 (i386_epilogue
,
2620 "mov 12(%ebp),%ecx\n\t"
2621 "mov %eax,(%ecx)\n\t"
2622 "mov %ebx,0x4(%ecx)\n\t"
2630 i386_emit_add (void)
2632 EMIT_ASM32 (i386_add
,
2633 "add (%esp),%eax\n\t"
2634 "adc 0x4(%esp),%ebx\n\t"
2635 "lea 0x8(%esp),%esp");
2639 i386_emit_sub (void)
2641 EMIT_ASM32 (i386_sub
,
2642 "subl %eax,(%esp)\n\t"
2643 "sbbl %ebx,4(%esp)\n\t"
2649 i386_emit_mul (void)
2655 i386_emit_lsh (void)
2661 i386_emit_rsh_signed (void)
2667 i386_emit_rsh_unsigned (void)
2673 i386_emit_ext (int arg
)
2678 EMIT_ASM32 (i386_ext_8
,
2681 "movl %eax,%ebx\n\t"
2685 EMIT_ASM32 (i386_ext_16
,
2687 "movl %eax,%ebx\n\t"
2691 EMIT_ASM32 (i386_ext_32
,
2692 "movl %eax,%ebx\n\t"
2701 i386_emit_log_not (void)
2703 EMIT_ASM32 (i386_log_not
,
2705 "test %eax,%eax\n\t"
2712 i386_emit_bit_and (void)
2714 EMIT_ASM32 (i386_and
,
2715 "and (%esp),%eax\n\t"
2716 "and 0x4(%esp),%ebx\n\t"
2717 "lea 0x8(%esp),%esp");
2721 i386_emit_bit_or (void)
2723 EMIT_ASM32 (i386_or
,
2724 "or (%esp),%eax\n\t"
2725 "or 0x4(%esp),%ebx\n\t"
2726 "lea 0x8(%esp),%esp");
2730 i386_emit_bit_xor (void)
2732 EMIT_ASM32 (i386_xor
,
2733 "xor (%esp),%eax\n\t"
2734 "xor 0x4(%esp),%ebx\n\t"
2735 "lea 0x8(%esp),%esp");
2739 i386_emit_bit_not (void)
2741 EMIT_ASM32 (i386_bit_not
,
2742 "xor $0xffffffff,%eax\n\t"
2743 "xor $0xffffffff,%ebx\n\t");
2747 i386_emit_equal (void)
2749 EMIT_ASM32 (i386_equal
,
2750 "cmpl %ebx,4(%esp)\n\t"
2751 "jne .Li386_equal_false\n\t"
2752 "cmpl %eax,(%esp)\n\t"
2753 "je .Li386_equal_true\n\t"
2754 ".Li386_equal_false:\n\t"
2756 "jmp .Li386_equal_end\n\t"
2757 ".Li386_equal_true:\n\t"
2759 ".Li386_equal_end:\n\t"
2761 "lea 0x8(%esp),%esp");
2765 i386_emit_less_signed (void)
2767 EMIT_ASM32 (i386_less_signed
,
2768 "cmpl %ebx,4(%esp)\n\t"
2769 "jl .Li386_less_signed_true\n\t"
2770 "jne .Li386_less_signed_false\n\t"
2771 "cmpl %eax,(%esp)\n\t"
2772 "jl .Li386_less_signed_true\n\t"
2773 ".Li386_less_signed_false:\n\t"
2775 "jmp .Li386_less_signed_end\n\t"
2776 ".Li386_less_signed_true:\n\t"
2778 ".Li386_less_signed_end:\n\t"
2780 "lea 0x8(%esp),%esp");
2784 i386_emit_less_unsigned (void)
2786 EMIT_ASM32 (i386_less_unsigned
,
2787 "cmpl %ebx,4(%esp)\n\t"
2788 "jb .Li386_less_unsigned_true\n\t"
2789 "jne .Li386_less_unsigned_false\n\t"
2790 "cmpl %eax,(%esp)\n\t"
2791 "jb .Li386_less_unsigned_true\n\t"
2792 ".Li386_less_unsigned_false:\n\t"
2794 "jmp .Li386_less_unsigned_end\n\t"
2795 ".Li386_less_unsigned_true:\n\t"
2797 ".Li386_less_unsigned_end:\n\t"
2799 "lea 0x8(%esp),%esp");
2803 i386_emit_ref (int size
)
2808 EMIT_ASM32 (i386_ref1
,
2812 EMIT_ASM32 (i386_ref2
,
2816 EMIT_ASM32 (i386_ref4
,
2817 "movl (%eax),%eax");
2820 EMIT_ASM32 (i386_ref8
,
2821 "movl 4(%eax),%ebx\n\t"
2822 "movl (%eax),%eax");
2828 i386_emit_if_goto (int *offset_p
, int *size_p
)
2830 EMIT_ASM32 (i386_if_goto
,
2836 /* Don't trust the assembler to choose the right jump */
2837 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2840 *offset_p
= 11; /* be sure that this matches the sequence above */
2846 i386_emit_goto (int *offset_p
, int *size_p
)
2848 EMIT_ASM32 (i386_goto
,
2849 /* Don't trust the assembler to choose the right jump */
2850 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2858 i386_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2860 int diff
= (to
- (from
+ size
));
2861 unsigned char buf
[sizeof (int)];
2863 /* We're only doing 4-byte sizes at the moment. */
2870 memcpy (buf
, &diff
, sizeof (int));
2871 write_inferior_memory (from
, buf
, sizeof (int));
2875 i386_emit_const (LONGEST num
)
2877 unsigned char buf
[16];
2879 CORE_ADDR buildaddr
= current_insn_ptr
;
2882 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2883 lo
= num
& 0xffffffff;
2884 memcpy (&buf
[i
], &lo
, sizeof (lo
));
2886 hi
= ((num
>> 32) & 0xffffffff);
2889 buf
[i
++] = 0xbb; /* mov $<n>,%ebx */
2890 memcpy (&buf
[i
], &hi
, sizeof (hi
));
2895 buf
[i
++] = 0x31; buf
[i
++] = 0xdb; /* xor %ebx,%ebx */
2897 append_insns (&buildaddr
, i
, buf
);
2898 current_insn_ptr
= buildaddr
;
2902 i386_emit_call (CORE_ADDR fn
)
2904 unsigned char buf
[16];
2906 CORE_ADDR buildaddr
;
2908 buildaddr
= current_insn_ptr
;
2910 buf
[i
++] = 0xe8; /* call <reladdr> */
2911 offset
= ((int) fn
) - (buildaddr
+ 5);
2912 memcpy (buf
+ 1, &offset
, 4);
2913 append_insns (&buildaddr
, 5, buf
);
2914 current_insn_ptr
= buildaddr
;
2918 i386_emit_reg (int reg
)
2920 unsigned char buf
[16];
2922 CORE_ADDR buildaddr
;
2924 EMIT_ASM32 (i386_reg_a
,
2926 buildaddr
= current_insn_ptr
;
2928 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2929 memcpy (&buf
[i
], ®
, sizeof (reg
));
2931 append_insns (&buildaddr
, i
, buf
);
2932 current_insn_ptr
= buildaddr
;
2933 EMIT_ASM32 (i386_reg_b
,
2934 "mov %eax,4(%esp)\n\t"
2935 "mov 8(%ebp),%eax\n\t"
2937 i386_emit_call (get_raw_reg_func_addr ());
2938 EMIT_ASM32 (i386_reg_c
,
2940 "lea 0x8(%esp),%esp");
2944 i386_emit_pop (void)
2946 EMIT_ASM32 (i386_pop
,
2952 i386_emit_stack_flush (void)
2954 EMIT_ASM32 (i386_stack_flush
,
2960 i386_emit_zero_ext (int arg
)
2965 EMIT_ASM32 (i386_zero_ext_8
,
2966 "and $0xff,%eax\n\t"
2970 EMIT_ASM32 (i386_zero_ext_16
,
2971 "and $0xffff,%eax\n\t"
2975 EMIT_ASM32 (i386_zero_ext_32
,
2984 i386_emit_swap (void)
2986 EMIT_ASM32 (i386_swap
,
2996 i386_emit_stack_adjust (int n
)
2998 unsigned char buf
[16];
3000 CORE_ADDR buildaddr
= current_insn_ptr
;
3003 buf
[i
++] = 0x8d; /* lea $<n>(%esp),%esp */
3007 append_insns (&buildaddr
, i
, buf
);
3008 current_insn_ptr
= buildaddr
;
3011 /* FN's prototype is `LONGEST(*fn)(int)'. */
3014 i386_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
3016 unsigned char buf
[16];
3018 CORE_ADDR buildaddr
;
3020 EMIT_ASM32 (i386_int_call_1_a
,
3021 /* Reserve a bit of stack space. */
3023 /* Put the one argument on the stack. */
3024 buildaddr
= current_insn_ptr
;
3026 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3029 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3031 append_insns (&buildaddr
, i
, buf
);
3032 current_insn_ptr
= buildaddr
;
3033 i386_emit_call (fn
);
3034 EMIT_ASM32 (i386_int_call_1_c
,
3036 "lea 0x8(%esp),%esp");
3039 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
3042 i386_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
3044 unsigned char buf
[16];
3046 CORE_ADDR buildaddr
;
3048 EMIT_ASM32 (i386_void_call_2_a
,
3049 /* Preserve %eax only; we don't have to worry about %ebx. */
3051 /* Reserve a bit of stack space for arguments. */
3052 "sub $0x10,%esp\n\t"
3053 /* Copy "top" to the second argument position. (Note that
3054 we can't assume function won't scribble on its
3055 arguments, so don't try to restore from this.) */
3056 "mov %eax,4(%esp)\n\t"
3057 "mov %ebx,8(%esp)");
3058 /* Put the first argument on the stack. */
3059 buildaddr
= current_insn_ptr
;
3061 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3064 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3066 append_insns (&buildaddr
, i
, buf
);
3067 current_insn_ptr
= buildaddr
;
3068 i386_emit_call (fn
);
3069 EMIT_ASM32 (i386_void_call_2_b
,
3070 "lea 0x10(%esp),%esp\n\t"
3071 /* Restore original stack top. */
3077 i386_emit_eq_goto (int *offset_p
, int *size_p
)
3080 /* Check low half first, more likely to be decider */
3081 "cmpl %eax,(%esp)\n\t"
3082 "jne .Leq_fallthru\n\t"
3083 "cmpl %ebx,4(%esp)\n\t"
3084 "jne .Leq_fallthru\n\t"
3085 "lea 0x8(%esp),%esp\n\t"
3088 /* jmp, but don't trust the assembler to choose the right jump */
3089 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3090 ".Leq_fallthru:\n\t"
3091 "lea 0x8(%esp),%esp\n\t"
3102 i386_emit_ne_goto (int *offset_p
, int *size_p
)
3105 /* Check low half first, more likely to be decider */
3106 "cmpl %eax,(%esp)\n\t"
3108 "cmpl %ebx,4(%esp)\n\t"
3109 "je .Lne_fallthru\n\t"
3111 "lea 0x8(%esp),%esp\n\t"
3114 /* jmp, but don't trust the assembler to choose the right jump */
3115 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3116 ".Lne_fallthru:\n\t"
3117 "lea 0x8(%esp),%esp\n\t"
3128 i386_emit_lt_goto (int *offset_p
, int *size_p
)
3131 "cmpl %ebx,4(%esp)\n\t"
3133 "jne .Llt_fallthru\n\t"
3134 "cmpl %eax,(%esp)\n\t"
3135 "jnl .Llt_fallthru\n\t"
3137 "lea 0x8(%esp),%esp\n\t"
3140 /* jmp, but don't trust the assembler to choose the right jump */
3141 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3142 ".Llt_fallthru:\n\t"
3143 "lea 0x8(%esp),%esp\n\t"
3154 i386_emit_le_goto (int *offset_p
, int *size_p
)
3157 "cmpl %ebx,4(%esp)\n\t"
3159 "jne .Lle_fallthru\n\t"
3160 "cmpl %eax,(%esp)\n\t"
3161 "jnle .Lle_fallthru\n\t"
3163 "lea 0x8(%esp),%esp\n\t"
3166 /* jmp, but don't trust the assembler to choose the right jump */
3167 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3168 ".Lle_fallthru:\n\t"
3169 "lea 0x8(%esp),%esp\n\t"
3180 i386_emit_gt_goto (int *offset_p
, int *size_p
)
3183 "cmpl %ebx,4(%esp)\n\t"
3185 "jne .Lgt_fallthru\n\t"
3186 "cmpl %eax,(%esp)\n\t"
3187 "jng .Lgt_fallthru\n\t"
3189 "lea 0x8(%esp),%esp\n\t"
3192 /* jmp, but don't trust the assembler to choose the right jump */
3193 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3194 ".Lgt_fallthru:\n\t"
3195 "lea 0x8(%esp),%esp\n\t"
3206 i386_emit_ge_goto (int *offset_p
, int *size_p
)
3209 "cmpl %ebx,4(%esp)\n\t"
3211 "jne .Lge_fallthru\n\t"
3212 "cmpl %eax,(%esp)\n\t"
3213 "jnge .Lge_fallthru\n\t"
3215 "lea 0x8(%esp),%esp\n\t"
3218 /* jmp, but don't trust the assembler to choose the right jump */
3219 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3220 ".Lge_fallthru:\n\t"
3221 "lea 0x8(%esp),%esp\n\t"
3231 struct emit_ops i386_emit_ops
=
3239 i386_emit_rsh_signed
,
3240 i386_emit_rsh_unsigned
,
3248 i386_emit_less_signed
,
3249 i386_emit_less_unsigned
,
3253 i386_write_goto_address
,
3258 i386_emit_stack_flush
,
3261 i386_emit_stack_adjust
,
3262 i386_emit_int_call_1
,
3263 i386_emit_void_call_2
,
3273 static struct emit_ops
*
3277 if (is_64bit_tdesc ())
3278 return &amd64_emit_ops
;
3281 return &i386_emit_ops
;
3285 x86_supports_range_stepping (void)
3290 /* This is initialized assuming an amd64 target.
3291 x86_arch_setup will correct it for i386 or amd64 targets. */
3293 struct linux_target_ops the_low_target
=
3296 x86_linux_regs_info
,
3297 x86_cannot_fetch_register
,
3298 x86_cannot_store_register
,
3299 NULL
, /* fetch_register */
3309 x86_stopped_by_watchpoint
,
3310 x86_stopped_data_address
,
3311 /* collect_ptrace_register/supply_ptrace_register are not needed in the
3312 native i386 case (no registers smaller than an xfer unit), and are not
3313 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
3316 /* need to fix up i386 siginfo if host is amd64 */
3318 x86_linux_new_process
,
3319 x86_linux_new_thread
,
3320 x86_linux_prepare_to_resume
,
3321 x86_linux_process_qsupported
,
3322 x86_supports_tracepoints
,
3323 x86_get_thread_area
,
3324 x86_install_fast_tracepoint_jump_pad
,
3326 x86_get_min_fast_tracepoint_insn_len
,
3327 x86_supports_range_stepping
,
3331 initialize_low_arch (void)
3333 /* Initialize the Linux target descriptions. */
3335 init_registers_amd64_linux ();
3336 init_registers_amd64_avx_linux ();
3337 init_registers_x32_linux ();
3339 tdesc_amd64_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3340 copy_target_description (tdesc_amd64_linux_no_xml
, tdesc_amd64_linux
);
3341 tdesc_amd64_linux_no_xml
->xmltarget
= xmltarget_amd64_linux_no_xml
;
3343 init_registers_i386_linux ();
3344 init_registers_i386_mmx_linux ();
3345 init_registers_i386_avx_linux ();
3347 tdesc_i386_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3348 copy_target_description (tdesc_i386_linux_no_xml
, tdesc_i386_linux
);
3349 tdesc_i386_linux_no_xml
->xmltarget
= xmltarget_i386_linux_no_xml
;
3351 initialize_regsets_info (&x86_regsets_info
);