1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2015 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-low.h"
27 #include "x86-xstate.h"
28 #include "nat/gdb_ptrace.h"
30 #include "gdb_proc_service.h"
31 /* Don't include elf/common.h if linux/elf.h got included by
32 gdb_proc_service.h. */
34 #include "elf/common.h"
39 #include "tracepoint.h"
41 #include "nat/linux-nat.h"
42 #include "nat/x86-linux.h"
43 #include "nat/x86-linux-dregs.h"
46 /* Defined in auto-generated file amd64-linux.c. */
47 void init_registers_amd64_linux (void);
48 extern const struct target_desc
*tdesc_amd64_linux
;
50 /* Defined in auto-generated file amd64-avx-linux.c. */
51 void init_registers_amd64_avx_linux (void);
52 extern const struct target_desc
*tdesc_amd64_avx_linux
;
54 /* Defined in auto-generated file amd64-avx512-linux.c. */
55 void init_registers_amd64_avx512_linux (void);
56 extern const struct target_desc
*tdesc_amd64_avx512_linux
;
58 /* Defined in auto-generated file amd64-mpx-linux.c. */
59 void init_registers_amd64_mpx_linux (void);
60 extern const struct target_desc
*tdesc_amd64_mpx_linux
;
62 /* Defined in auto-generated file x32-linux.c. */
63 void init_registers_x32_linux (void);
64 extern const struct target_desc
*tdesc_x32_linux
;
66 /* Defined in auto-generated file x32-avx-linux.c. */
67 void init_registers_x32_avx_linux (void);
68 extern const struct target_desc
*tdesc_x32_avx_linux
;
70 /* Defined in auto-generated file x32-avx512-linux.c. */
71 void init_registers_x32_avx512_linux (void);
72 extern const struct target_desc
*tdesc_x32_avx512_linux
;
76 /* Defined in auto-generated file i386-linux.c. */
77 void init_registers_i386_linux (void);
78 extern const struct target_desc
*tdesc_i386_linux
;
80 /* Defined in auto-generated file i386-mmx-linux.c. */
81 void init_registers_i386_mmx_linux (void);
82 extern const struct target_desc
*tdesc_i386_mmx_linux
;
84 /* Defined in auto-generated file i386-avx-linux.c. */
85 void init_registers_i386_avx_linux (void);
86 extern const struct target_desc
*tdesc_i386_avx_linux
;
88 /* Defined in auto-generated file i386-avx512-linux.c. */
89 void init_registers_i386_avx512_linux (void);
90 extern const struct target_desc
*tdesc_i386_avx512_linux
;
92 /* Defined in auto-generated file i386-mpx-linux.c. */
93 void init_registers_i386_mpx_linux (void);
94 extern const struct target_desc
*tdesc_i386_mpx_linux
;
97 static struct target_desc
*tdesc_amd64_linux_no_xml
;
99 static struct target_desc
*tdesc_i386_linux_no_xml
;
102 static unsigned char jump_insn
[] = { 0xe9, 0, 0, 0, 0 };
103 static unsigned char small_jump_insn
[] = { 0x66, 0xe9, 0, 0 };
105 /* Backward compatibility for gdb without XML support. */
107 static const char *xmltarget_i386_linux_no_xml
= "@<target>\
108 <architecture>i386</architecture>\
109 <osabi>GNU/Linux</osabi>\
113 static const char *xmltarget_amd64_linux_no_xml
= "@<target>\
114 <architecture>i386:x86-64</architecture>\
115 <osabi>GNU/Linux</osabi>\
120 #include <sys/procfs.h>
121 #include "nat/gdb_ptrace.h"
124 #ifndef PTRACE_GET_THREAD_AREA
125 #define PTRACE_GET_THREAD_AREA 25
128 /* This definition comes from prctl.h, but some kernels may not have it. */
129 #ifndef PTRACE_ARCH_PRCTL
130 #define PTRACE_ARCH_PRCTL 30
133 /* The following definitions come from prctl.h, but may be absent
134 for certain configurations. */
136 #define ARCH_SET_GS 0x1001
137 #define ARCH_SET_FS 0x1002
138 #define ARCH_GET_FS 0x1003
139 #define ARCH_GET_GS 0x1004
142 /* Per-process arch-specific data we want to keep. */
144 struct arch_process_info
146 struct x86_debug_reg_state debug_reg_state
;
151 /* Mapping between the general-purpose registers in `struct user'
152 format and GDB's register array layout.
153 Note that the transfer layout uses 64-bit regs. */
154 static /*const*/ int i386_regmap
[] =
156 RAX
* 8, RCX
* 8, RDX
* 8, RBX
* 8,
157 RSP
* 8, RBP
* 8, RSI
* 8, RDI
* 8,
158 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
159 DS
* 8, ES
* 8, FS
* 8, GS
* 8
162 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
164 /* So code below doesn't have to care, i386 or amd64. */
165 #define ORIG_EAX ORIG_RAX
168 static const int x86_64_regmap
[] =
170 RAX
* 8, RBX
* 8, RCX
* 8, RDX
* 8,
171 RSI
* 8, RDI
* 8, RBP
* 8, RSP
* 8,
172 R8
* 8, R9
* 8, R10
* 8, R11
* 8,
173 R12
* 8, R13
* 8, R14
* 8, R15
* 8,
174 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
175 DS
* 8, ES
* 8, FS
* 8, GS
* 8,
176 -1, -1, -1, -1, -1, -1, -1, -1,
177 -1, -1, -1, -1, -1, -1, -1, -1,
178 -1, -1, -1, -1, -1, -1, -1, -1,
180 -1, -1, -1, -1, -1, -1, -1, -1,
182 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
183 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
184 -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
185 -1, -1, -1, -1, -1, -1, -1, -1,
186 -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
187 -1, -1, -1, -1, -1, -1, -1, -1,
188 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
189 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
190 -1, -1, -1, -1, -1, -1, -1, -1,
191 -1, -1, -1, -1, -1, -1, -1, -1,
192 -1, -1, -1, -1, -1, -1, -1, -1
195 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
196 #define X86_64_USER_REGS (GS + 1)
198 #else /* ! __x86_64__ */
200 /* Mapping between the general-purpose registers in `struct user'
201 format and GDB's register array layout. */
202 static /*const*/ int i386_regmap
[] =
204 EAX
* 4, ECX
* 4, EDX
* 4, EBX
* 4,
205 UESP
* 4, EBP
* 4, ESI
* 4, EDI
* 4,
206 EIP
* 4, EFL
* 4, CS
* 4, SS
* 4,
207 DS
* 4, ES
* 4, FS
* 4, GS
* 4
210 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
218 /* Returns true if the current inferior belongs to a x86-64 process,
222 is_64bit_tdesc (void)
224 struct regcache
*regcache
= get_thread_regcache (current_thread
, 0);
226 return register_size (regcache
->tdesc
, 0) == 8;
232 /* Called by libthread_db. */
235 ps_get_thread_area (const struct ps_prochandle
*ph
,
236 lwpid_t lwpid
, int idx
, void **base
)
239 int use_64bit
= is_64bit_tdesc ();
246 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
250 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
261 unsigned int desc
[4];
263 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
,
264 (void *) (intptr_t) idx
, (unsigned long) &desc
) < 0)
267 /* Ensure we properly extend the value to 64-bits for x86_64. */
268 *base
= (void *) (uintptr_t) desc
[1];
273 /* Get the thread area address. This is used to recognize which
274 thread is which when tracing with the in-process agent library. We
275 don't read anything from the address, and treat it as opaque; it's
276 the address itself that we assume is unique per-thread. */
279 x86_get_thread_area (int lwpid
, CORE_ADDR
*addr
)
282 int use_64bit
= is_64bit_tdesc ();
287 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
289 *addr
= (CORE_ADDR
) (uintptr_t) base
;
298 struct lwp_info
*lwp
= find_lwp_pid (pid_to_ptid (lwpid
));
299 struct thread_info
*thr
= get_lwp_thread (lwp
);
300 struct regcache
*regcache
= get_thread_regcache (thr
, 1);
301 unsigned int desc
[4];
303 const int reg_thread_area
= 3; /* bits to scale down register value. */
306 collect_register_by_name (regcache
, "gs", &gs
);
308 idx
= gs
>> reg_thread_area
;
310 if (ptrace (PTRACE_GET_THREAD_AREA
,
312 (void *) (long) idx
, (unsigned long) &desc
) < 0)
323 x86_cannot_store_register (int regno
)
326 if (is_64bit_tdesc ())
330 return regno
>= I386_NUM_REGS
;
334 x86_cannot_fetch_register (int regno
)
337 if (is_64bit_tdesc ())
341 return regno
>= I386_NUM_REGS
;
345 x86_fill_gregset (struct regcache
*regcache
, void *buf
)
350 if (register_size (regcache
->tdesc
, 0) == 8)
352 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
353 if (x86_64_regmap
[i
] != -1)
354 collect_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
358 /* 32-bit inferior registers need to be zero-extended.
359 Callers would read uninitialized memory otherwise. */
360 memset (buf
, 0x00, X86_64_USER_REGS
* 8);
363 for (i
= 0; i
< I386_NUM_REGS
; i
++)
364 collect_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
366 collect_register_by_name (regcache
, "orig_eax",
367 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
371 x86_store_gregset (struct regcache
*regcache
, const void *buf
)
376 if (register_size (regcache
->tdesc
, 0) == 8)
378 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
379 if (x86_64_regmap
[i
] != -1)
380 supply_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
385 for (i
= 0; i
< I386_NUM_REGS
; i
++)
386 supply_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
388 supply_register_by_name (regcache
, "orig_eax",
389 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
393 x86_fill_fpregset (struct regcache
*regcache
, void *buf
)
396 i387_cache_to_fxsave (regcache
, buf
);
398 i387_cache_to_fsave (regcache
, buf
);
403 x86_store_fpregset (struct regcache
*regcache
, const void *buf
)
406 i387_fxsave_to_cache (regcache
, buf
);
408 i387_fsave_to_cache (regcache
, buf
);
415 x86_fill_fpxregset (struct regcache
*regcache
, void *buf
)
417 i387_cache_to_fxsave (regcache
, buf
);
421 x86_store_fpxregset (struct regcache
*regcache
, const void *buf
)
423 i387_fxsave_to_cache (regcache
, buf
);
429 x86_fill_xstateregset (struct regcache
*regcache
, void *buf
)
431 i387_cache_to_xsave (regcache
, buf
);
435 x86_store_xstateregset (struct regcache
*regcache
, const void *buf
)
437 i387_xsave_to_cache (regcache
, buf
);
440 /* ??? The non-biarch i386 case stores all the i387 regs twice.
441 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
442 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
443 doesn't work. IWBN to avoid the duplication in the case where it
444 does work. Maybe the arch_setup routine could check whether it works
445 and update the supported regsets accordingly. */
447 static struct regset_info x86_regsets
[] =
449 #ifdef HAVE_PTRACE_GETREGS
450 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, sizeof (elf_gregset_t
),
452 x86_fill_gregset
, x86_store_gregset
},
453 { PTRACE_GETREGSET
, PTRACE_SETREGSET
, NT_X86_XSTATE
, 0,
454 EXTENDED_REGS
, x86_fill_xstateregset
, x86_store_xstateregset
},
456 # ifdef HAVE_PTRACE_GETFPXREGS
457 { PTRACE_GETFPXREGS
, PTRACE_SETFPXREGS
, 0, sizeof (elf_fpxregset_t
),
459 x86_fill_fpxregset
, x86_store_fpxregset
},
462 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, sizeof (elf_fpregset_t
),
464 x86_fill_fpregset
, x86_store_fpregset
},
465 #endif /* HAVE_PTRACE_GETREGS */
466 { 0, 0, 0, -1, -1, NULL
, NULL
}
470 x86_get_pc (struct regcache
*regcache
)
472 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
477 collect_register_by_name (regcache
, "rip", &pc
);
478 return (CORE_ADDR
) pc
;
483 collect_register_by_name (regcache
, "eip", &pc
);
484 return (CORE_ADDR
) pc
;
489 x86_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
491 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
495 unsigned long newpc
= pc
;
496 supply_register_by_name (regcache
, "rip", &newpc
);
500 unsigned int newpc
= pc
;
501 supply_register_by_name (regcache
, "eip", &newpc
);
505 static const unsigned char x86_breakpoint
[] = { 0xCC };
506 #define x86_breakpoint_len 1
509 x86_breakpoint_at (CORE_ADDR pc
)
513 (*the_target
->read_memory
) (pc
, &c
, 1);
520 /* Low-level function vector. */
521 struct x86_dr_low_type x86_dr_low
=
523 x86_linux_dr_set_control
,
524 x86_linux_dr_set_addr
,
525 x86_linux_dr_get_addr
,
526 x86_linux_dr_get_status
,
527 x86_linux_dr_get_control
,
531 /* Breakpoint/Watchpoint support. */
534 x86_supports_z_point_type (char z_type
)
540 case Z_PACKET_WRITE_WP
:
541 case Z_PACKET_ACCESS_WP
:
549 x86_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
550 int size
, struct raw_breakpoint
*bp
)
552 struct process_info
*proc
= current_process ();
556 case raw_bkpt_type_hw
:
557 case raw_bkpt_type_write_wp
:
558 case raw_bkpt_type_access_wp
:
560 enum target_hw_bp_type hw_type
561 = raw_bkpt_type_to_target_hw_bp_type (type
);
562 struct x86_debug_reg_state
*state
563 = &proc
->priv
->arch_private
->debug_reg_state
;
565 return x86_dr_insert_watchpoint (state
, hw_type
, addr
, size
);
575 x86_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
576 int size
, struct raw_breakpoint
*bp
)
578 struct process_info
*proc
= current_process ();
582 case raw_bkpt_type_hw
:
583 case raw_bkpt_type_write_wp
:
584 case raw_bkpt_type_access_wp
:
586 enum target_hw_bp_type hw_type
587 = raw_bkpt_type_to_target_hw_bp_type (type
);
588 struct x86_debug_reg_state
*state
589 = &proc
->priv
->arch_private
->debug_reg_state
;
591 return x86_dr_remove_watchpoint (state
, hw_type
, addr
, size
);
600 x86_stopped_by_watchpoint (void)
602 struct process_info
*proc
= current_process ();
603 return x86_dr_stopped_by_watchpoint (&proc
->priv
->arch_private
->debug_reg_state
);
607 x86_stopped_data_address (void)
609 struct process_info
*proc
= current_process ();
611 if (x86_dr_stopped_data_address (&proc
->priv
->arch_private
->debug_reg_state
,
617 /* Called when a new process is created. */
619 static struct arch_process_info
*
620 x86_linux_new_process (void)
622 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
624 x86_low_init_dregs (&info
->debug_reg_state
);
629 /* Target routine for linux_new_fork. */
632 x86_linux_new_fork (struct process_info
*parent
, struct process_info
*child
)
634 /* These are allocated by linux_add_process. */
635 gdb_assert (parent
->priv
!= NULL
636 && parent
->priv
->arch_private
!= NULL
);
637 gdb_assert (child
->priv
!= NULL
638 && child
->priv
->arch_private
!= NULL
);
640 /* Linux kernel before 2.6.33 commit
641 72f674d203cd230426437cdcf7dd6f681dad8b0d
642 will inherit hardware debug registers from parent
643 on fork/vfork/clone. Newer Linux kernels create such tasks with
644 zeroed debug registers.
646 GDB core assumes the child inherits the watchpoints/hw
647 breakpoints of the parent, and will remove them all from the
648 forked off process. Copy the debug registers mirrors into the
649 new process so that all breakpoints and watchpoints can be
650 removed together. The debug registers mirror will become zeroed
651 in the end before detaching the forked off process, thus making
652 this compatible with older Linux kernels too. */
654 *child
->priv
->arch_private
= *parent
->priv
->arch_private
;
657 /* See nat/x86-dregs.h. */
659 struct x86_debug_reg_state
*
660 x86_debug_reg_state (pid_t pid
)
662 struct process_info
*proc
= find_process_pid (pid
);
664 return &proc
->priv
->arch_private
->debug_reg_state
;
667 /* When GDBSERVER is built as a 64-bit application on linux, the
668 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
669 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
670 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
671 conversion in-place ourselves. */
673 /* These types below (compat_*) define a siginfo type that is layout
674 compatible with the siginfo type exported by the 32-bit userspace
679 typedef int compat_int_t
;
680 typedef unsigned int compat_uptr_t
;
682 typedef int compat_time_t
;
683 typedef int compat_timer_t
;
684 typedef int compat_clock_t
;
686 struct compat_timeval
688 compat_time_t tv_sec
;
692 typedef union compat_sigval
694 compat_int_t sival_int
;
695 compat_uptr_t sival_ptr
;
698 typedef struct compat_siginfo
706 int _pad
[((128 / sizeof (int)) - 3)];
715 /* POSIX.1b timers */
720 compat_sigval_t _sigval
;
723 /* POSIX.1b signals */
728 compat_sigval_t _sigval
;
737 compat_clock_t _utime
;
738 compat_clock_t _stime
;
741 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
756 /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
757 typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t
;
759 typedef struct compat_x32_siginfo
767 int _pad
[((128 / sizeof (int)) - 3)];
776 /* POSIX.1b timers */
781 compat_sigval_t _sigval
;
784 /* POSIX.1b signals */
789 compat_sigval_t _sigval
;
798 compat_x32_clock_t _utime
;
799 compat_x32_clock_t _stime
;
802 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
815 } compat_x32_siginfo_t
__attribute__ ((__aligned__ (8)));
817 #define cpt_si_pid _sifields._kill._pid
818 #define cpt_si_uid _sifields._kill._uid
819 #define cpt_si_timerid _sifields._timer._tid
820 #define cpt_si_overrun _sifields._timer._overrun
821 #define cpt_si_status _sifields._sigchld._status
822 #define cpt_si_utime _sifields._sigchld._utime
823 #define cpt_si_stime _sifields._sigchld._stime
824 #define cpt_si_ptr _sifields._rt._sigval.sival_ptr
825 #define cpt_si_addr _sifields._sigfault._addr
826 #define cpt_si_band _sifields._sigpoll._band
827 #define cpt_si_fd _sifields._sigpoll._fd
829 /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
830 In their place is si_timer1,si_timer2. */
832 #define si_timerid si_timer1
835 #define si_overrun si_timer2
839 compat_siginfo_from_siginfo (compat_siginfo_t
*to
, siginfo_t
*from
)
841 memset (to
, 0, sizeof (*to
));
843 to
->si_signo
= from
->si_signo
;
844 to
->si_errno
= from
->si_errno
;
845 to
->si_code
= from
->si_code
;
847 if (to
->si_code
== SI_TIMER
)
849 to
->cpt_si_timerid
= from
->si_timerid
;
850 to
->cpt_si_overrun
= from
->si_overrun
;
851 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
853 else if (to
->si_code
== SI_USER
)
855 to
->cpt_si_pid
= from
->si_pid
;
856 to
->cpt_si_uid
= from
->si_uid
;
858 else if (to
->si_code
< 0)
860 to
->cpt_si_pid
= from
->si_pid
;
861 to
->cpt_si_uid
= from
->si_uid
;
862 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
866 switch (to
->si_signo
)
869 to
->cpt_si_pid
= from
->si_pid
;
870 to
->cpt_si_uid
= from
->si_uid
;
871 to
->cpt_si_status
= from
->si_status
;
872 to
->cpt_si_utime
= from
->si_utime
;
873 to
->cpt_si_stime
= from
->si_stime
;
879 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
882 to
->cpt_si_band
= from
->si_band
;
883 to
->cpt_si_fd
= from
->si_fd
;
886 to
->cpt_si_pid
= from
->si_pid
;
887 to
->cpt_si_uid
= from
->si_uid
;
888 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
895 siginfo_from_compat_siginfo (siginfo_t
*to
, compat_siginfo_t
*from
)
897 memset (to
, 0, sizeof (*to
));
899 to
->si_signo
= from
->si_signo
;
900 to
->si_errno
= from
->si_errno
;
901 to
->si_code
= from
->si_code
;
903 if (to
->si_code
== SI_TIMER
)
905 to
->si_timerid
= from
->cpt_si_timerid
;
906 to
->si_overrun
= from
->cpt_si_overrun
;
907 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
909 else if (to
->si_code
== SI_USER
)
911 to
->si_pid
= from
->cpt_si_pid
;
912 to
->si_uid
= from
->cpt_si_uid
;
914 else if (to
->si_code
< 0)
916 to
->si_pid
= from
->cpt_si_pid
;
917 to
->si_uid
= from
->cpt_si_uid
;
918 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
922 switch (to
->si_signo
)
925 to
->si_pid
= from
->cpt_si_pid
;
926 to
->si_uid
= from
->cpt_si_uid
;
927 to
->si_status
= from
->cpt_si_status
;
928 to
->si_utime
= from
->cpt_si_utime
;
929 to
->si_stime
= from
->cpt_si_stime
;
935 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
938 to
->si_band
= from
->cpt_si_band
;
939 to
->si_fd
= from
->cpt_si_fd
;
942 to
->si_pid
= from
->cpt_si_pid
;
943 to
->si_uid
= from
->cpt_si_uid
;
944 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
951 compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t
*to
,
954 memset (to
, 0, sizeof (*to
));
956 to
->si_signo
= from
->si_signo
;
957 to
->si_errno
= from
->si_errno
;
958 to
->si_code
= from
->si_code
;
960 if (to
->si_code
== SI_TIMER
)
962 to
->cpt_si_timerid
= from
->si_timerid
;
963 to
->cpt_si_overrun
= from
->si_overrun
;
964 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
966 else if (to
->si_code
== SI_USER
)
968 to
->cpt_si_pid
= from
->si_pid
;
969 to
->cpt_si_uid
= from
->si_uid
;
971 else if (to
->si_code
< 0)
973 to
->cpt_si_pid
= from
->si_pid
;
974 to
->cpt_si_uid
= from
->si_uid
;
975 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
979 switch (to
->si_signo
)
982 to
->cpt_si_pid
= from
->si_pid
;
983 to
->cpt_si_uid
= from
->si_uid
;
984 to
->cpt_si_status
= from
->si_status
;
985 to
->cpt_si_utime
= from
->si_utime
;
986 to
->cpt_si_stime
= from
->si_stime
;
992 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
995 to
->cpt_si_band
= from
->si_band
;
996 to
->cpt_si_fd
= from
->si_fd
;
999 to
->cpt_si_pid
= from
->si_pid
;
1000 to
->cpt_si_uid
= from
->si_uid
;
1001 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1008 siginfo_from_compat_x32_siginfo (siginfo_t
*to
,
1009 compat_x32_siginfo_t
*from
)
1011 memset (to
, 0, sizeof (*to
));
1013 to
->si_signo
= from
->si_signo
;
1014 to
->si_errno
= from
->si_errno
;
1015 to
->si_code
= from
->si_code
;
1017 if (to
->si_code
== SI_TIMER
)
1019 to
->si_timerid
= from
->cpt_si_timerid
;
1020 to
->si_overrun
= from
->cpt_si_overrun
;
1021 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1023 else if (to
->si_code
== SI_USER
)
1025 to
->si_pid
= from
->cpt_si_pid
;
1026 to
->si_uid
= from
->cpt_si_uid
;
1028 else if (to
->si_code
< 0)
1030 to
->si_pid
= from
->cpt_si_pid
;
1031 to
->si_uid
= from
->cpt_si_uid
;
1032 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1036 switch (to
->si_signo
)
1039 to
->si_pid
= from
->cpt_si_pid
;
1040 to
->si_uid
= from
->cpt_si_uid
;
1041 to
->si_status
= from
->cpt_si_status
;
1042 to
->si_utime
= from
->cpt_si_utime
;
1043 to
->si_stime
= from
->cpt_si_stime
;
1049 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1052 to
->si_band
= from
->cpt_si_band
;
1053 to
->si_fd
= from
->cpt_si_fd
;
1056 to
->si_pid
= from
->cpt_si_pid
;
1057 to
->si_uid
= from
->cpt_si_uid
;
1058 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1064 #endif /* __x86_64__ */
1066 /* Convert a native/host siginfo object, into/from the siginfo in the
1067 layout of the inferiors' architecture. Returns true if any
1068 conversion was done; false otherwise. If DIRECTION is 1, then copy
1069 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
1073 x86_siginfo_fixup (siginfo_t
*native
, void *inf
, int direction
)
1076 unsigned int machine
;
1077 int tid
= lwpid_of (current_thread
);
1078 int is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1080 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
1081 if (!is_64bit_tdesc ())
1083 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_siginfo_t
));
1086 compat_siginfo_from_siginfo ((struct compat_siginfo
*) inf
, native
);
1088 siginfo_from_compat_siginfo (native
, (struct compat_siginfo
*) inf
);
1092 /* No fixup for native x32 GDB. */
1093 else if (!is_elf64
&& sizeof (void *) == 8)
1095 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_x32_siginfo_t
));
1098 compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo
*) inf
,
1101 siginfo_from_compat_x32_siginfo (native
,
1102 (struct compat_x32_siginfo
*) inf
);
1113 /* Format of XSAVE extended state is:
1116 fxsave_bytes[0..463]
1117 sw_usable_bytes[464..511]
1118 xstate_hdr_bytes[512..575]
1123 Same memory layout will be used for the coredump NT_X86_XSTATE
1124 representing the XSAVE extended state registers.
1126 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
1127 extended state mask, which is the same as the extended control register
1128 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
1129 together with the mask saved in the xstate_hdr_bytes to determine what
1130 states the processor/OS supports and what state, used or initialized,
1131 the process/thread is in. */
1132 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
1134 /* Does the current host support the GETFPXREGS request? The header
1135 file may or may not define it, and even if it is defined, the
1136 kernel will return EIO if it's running on a pre-SSE processor. */
1137 int have_ptrace_getfpxregs
=
1138 #ifdef HAVE_PTRACE_GETFPXREGS
1145 /* Does the current host support PTRACE_GETREGSET? */
1146 static int have_ptrace_getregset
= -1;
1148 /* Get Linux/x86 target description from running target. */
1150 static const struct target_desc
*
1151 x86_linux_read_description (void)
1153 unsigned int machine
;
1157 static uint64_t xcr0
;
1158 struct regset_info
*regset
;
1160 tid
= lwpid_of (current_thread
);
1162 is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1164 if (sizeof (void *) == 4)
1167 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
1169 else if (machine
== EM_X86_64
)
1170 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
1174 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
1175 if (machine
== EM_386
&& have_ptrace_getfpxregs
== -1)
1177 elf_fpxregset_t fpxregs
;
1179 if (ptrace (PTRACE_GETFPXREGS
, tid
, 0, (long) &fpxregs
) < 0)
1181 have_ptrace_getfpxregs
= 0;
1182 have_ptrace_getregset
= 0;
1183 return tdesc_i386_mmx_linux
;
1186 have_ptrace_getfpxregs
= 1;
1192 x86_xcr0
= X86_XSTATE_SSE_MASK
;
1194 /* Don't use XML. */
1196 if (machine
== EM_X86_64
)
1197 return tdesc_amd64_linux_no_xml
;
1200 return tdesc_i386_linux_no_xml
;
1203 if (have_ptrace_getregset
== -1)
1205 uint64_t xstateregs
[(X86_XSTATE_SSE_SIZE
/ sizeof (uint64_t))];
1208 iov
.iov_base
= xstateregs
;
1209 iov
.iov_len
= sizeof (xstateregs
);
1211 /* Check if PTRACE_GETREGSET works. */
1212 if (ptrace (PTRACE_GETREGSET
, tid
,
1213 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
1214 have_ptrace_getregset
= 0;
1217 have_ptrace_getregset
= 1;
1219 /* Get XCR0 from XSAVE extended state. */
1220 xcr0
= xstateregs
[(I386_LINUX_XSAVE_XCR0_OFFSET
1221 / sizeof (uint64_t))];
1223 /* Use PTRACE_GETREGSET if it is available. */
1224 for (regset
= x86_regsets
;
1225 regset
->fill_function
!= NULL
; regset
++)
1226 if (regset
->get_request
== PTRACE_GETREGSET
)
1227 regset
->size
= X86_XSTATE_SIZE (xcr0
);
1228 else if (regset
->type
!= GENERAL_REGS
)
1233 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
1234 xcr0_features
= (have_ptrace_getregset
1235 && (xcr0
& X86_XSTATE_ALL_MASK
));
1240 if (machine
== EM_X86_64
)
1247 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1249 case X86_XSTATE_AVX512_MASK
:
1250 return tdesc_amd64_avx512_linux
;
1252 case X86_XSTATE_MPX_MASK
:
1253 return tdesc_amd64_mpx_linux
;
1255 case X86_XSTATE_AVX_MASK
:
1256 return tdesc_amd64_avx_linux
;
1259 return tdesc_amd64_linux
;
1263 return tdesc_amd64_linux
;
1269 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1271 case X86_XSTATE_AVX512_MASK
:
1272 return tdesc_x32_avx512_linux
;
1274 case X86_XSTATE_MPX_MASK
: /* No MPX on x32. */
1275 case X86_XSTATE_AVX_MASK
:
1276 return tdesc_x32_avx_linux
;
1279 return tdesc_x32_linux
;
1283 return tdesc_x32_linux
;
1291 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1293 case (X86_XSTATE_AVX512_MASK
):
1294 return tdesc_i386_avx512_linux
;
1296 case (X86_XSTATE_MPX_MASK
):
1297 return tdesc_i386_mpx_linux
;
1299 case (X86_XSTATE_AVX_MASK
):
1300 return tdesc_i386_avx_linux
;
1303 return tdesc_i386_linux
;
1307 return tdesc_i386_linux
;
1310 gdb_assert_not_reached ("failed to return tdesc");
1313 /* Callback for find_inferior. Stops iteration when a thread with a
1314 given PID is found. */
1317 same_process_callback (struct inferior_list_entry
*entry
, void *data
)
1319 int pid
= *(int *) data
;
1321 return (ptid_get_pid (entry
->id
) == pid
);
1324 /* Callback for for_each_inferior. Calls the arch_setup routine for
1328 x86_arch_setup_process_callback (struct inferior_list_entry
*entry
)
1330 int pid
= ptid_get_pid (entry
->id
);
1332 /* Look up any thread of this processes. */
1334 = (struct thread_info
*) find_inferior (&all_threads
,
1335 same_process_callback
, &pid
);
1337 the_low_target
.arch_setup ();
1340 /* Update all the target description of all processes; a new GDB
1341 connected, and it may or not support xml target descriptions. */
1344 x86_linux_update_xmltarget (void)
1346 struct thread_info
*saved_thread
= current_thread
;
1348 /* Before changing the register cache's internal layout, flush the
1349 contents of the current valid caches back to the threads, and
1350 release the current regcache objects. */
1351 regcache_release ();
1353 for_each_inferior (&all_processes
, x86_arch_setup_process_callback
);
1355 current_thread
= saved_thread
;
1358 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
1359 PTRACE_GETREGSET. */
1362 x86_linux_process_qsupported (const char *query
)
1364 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
1365 with "i386" in qSupported query, it supports x86 XML target
1368 if (query
!= NULL
&& startswith (query
, "xmlRegisters="))
1370 char *copy
= xstrdup (query
+ 13);
1373 for (p
= strtok (copy
, ","); p
!= NULL
; p
= strtok (NULL
, ","))
1375 if (strcmp (p
, "i386") == 0)
1385 x86_linux_update_xmltarget ();
1388 /* Common for x86/x86-64. */
1390 static struct regsets_info x86_regsets_info
=
1392 x86_regsets
, /* regsets */
1393 0, /* num_regsets */
1394 NULL
, /* disabled_regsets */
1398 static struct regs_info amd64_linux_regs_info
=
1400 NULL
, /* regset_bitmap */
1401 NULL
, /* usrregs_info */
1405 static struct usrregs_info i386_linux_usrregs_info
=
1411 static struct regs_info i386_linux_regs_info
=
1413 NULL
, /* regset_bitmap */
1414 &i386_linux_usrregs_info
,
1418 const struct regs_info
*
1419 x86_linux_regs_info (void)
1422 if (is_64bit_tdesc ())
1423 return &amd64_linux_regs_info
;
1426 return &i386_linux_regs_info
;
1429 /* Initialize the target description for the architecture of the
1433 x86_arch_setup (void)
1435 current_process ()->tdesc
= x86_linux_read_description ();
1439 x86_supports_tracepoints (void)
1445 append_insns (CORE_ADDR
*to
, size_t len
, const unsigned char *buf
)
1447 write_inferior_memory (*to
, buf
, len
);
1452 push_opcode (unsigned char *buf
, char *op
)
1454 unsigned char *buf_org
= buf
;
1459 unsigned long ul
= strtoul (op
, &endptr
, 16);
1468 return buf
- buf_org
;
1473 /* Build a jump pad that saves registers and calls a collection
1474 function. Writes a jump instruction to the jump pad to
1475 JJUMPAD_INSN. The caller is responsible to write it in at the
1476 tracepoint address. */
1479 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1480 CORE_ADDR collector
,
1483 CORE_ADDR
*jump_entry
,
1484 CORE_ADDR
*trampoline
,
1485 ULONGEST
*trampoline_size
,
1486 unsigned char *jjump_pad_insn
,
1487 ULONGEST
*jjump_pad_insn_size
,
1488 CORE_ADDR
*adjusted_insn_addr
,
1489 CORE_ADDR
*adjusted_insn_addr_end
,
1492 unsigned char buf
[40];
1496 CORE_ADDR buildaddr
= *jump_entry
;
1498 /* Build the jump pad. */
1500 /* First, do tracepoint data collection. Save registers. */
1502 /* Need to ensure stack pointer saved first. */
1503 buf
[i
++] = 0x54; /* push %rsp */
1504 buf
[i
++] = 0x55; /* push %rbp */
1505 buf
[i
++] = 0x57; /* push %rdi */
1506 buf
[i
++] = 0x56; /* push %rsi */
1507 buf
[i
++] = 0x52; /* push %rdx */
1508 buf
[i
++] = 0x51; /* push %rcx */
1509 buf
[i
++] = 0x53; /* push %rbx */
1510 buf
[i
++] = 0x50; /* push %rax */
1511 buf
[i
++] = 0x41; buf
[i
++] = 0x57; /* push %r15 */
1512 buf
[i
++] = 0x41; buf
[i
++] = 0x56; /* push %r14 */
1513 buf
[i
++] = 0x41; buf
[i
++] = 0x55; /* push %r13 */
1514 buf
[i
++] = 0x41; buf
[i
++] = 0x54; /* push %r12 */
1515 buf
[i
++] = 0x41; buf
[i
++] = 0x53; /* push %r11 */
1516 buf
[i
++] = 0x41; buf
[i
++] = 0x52; /* push %r10 */
1517 buf
[i
++] = 0x41; buf
[i
++] = 0x51; /* push %r9 */
1518 buf
[i
++] = 0x41; buf
[i
++] = 0x50; /* push %r8 */
1519 buf
[i
++] = 0x9c; /* pushfq */
1520 buf
[i
++] = 0x48; /* movl <addr>,%rdi */
1522 *((unsigned long *)(buf
+ i
)) = (unsigned long) tpaddr
;
1523 i
+= sizeof (unsigned long);
1524 buf
[i
++] = 0x57; /* push %rdi */
1525 append_insns (&buildaddr
, i
, buf
);
1527 /* Stack space for the collecting_t object. */
1529 i
+= push_opcode (&buf
[i
], "48 83 ec 18"); /* sub $0x18,%rsp */
1530 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov <tpoint>,%rax */
1531 memcpy (buf
+ i
, &tpoint
, 8);
1533 i
+= push_opcode (&buf
[i
], "48 89 04 24"); /* mov %rax,(%rsp) */
1534 i
+= push_opcode (&buf
[i
],
1535 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1536 i
+= push_opcode (&buf
[i
], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1537 append_insns (&buildaddr
, i
, buf
);
1541 i
+= push_opcode (&buf
[i
], "48 be"); /* movl <lockaddr>,%rsi */
1542 memcpy (&buf
[i
], (void *) &lockaddr
, 8);
1544 i
+= push_opcode (&buf
[i
], "48 89 e1"); /* mov %rsp,%rcx */
1545 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1546 i
+= push_opcode (&buf
[i
], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1547 i
+= push_opcode (&buf
[i
], "48 85 c0"); /* test %rax,%rax */
1548 i
+= push_opcode (&buf
[i
], "75 f4"); /* jne <again> */
1549 append_insns (&buildaddr
, i
, buf
);
1551 /* Set up the gdb_collect call. */
1552 /* At this point, (stack pointer + 0x18) is the base of our saved
1556 i
+= push_opcode (&buf
[i
], "48 89 e6"); /* mov %rsp,%rsi */
1557 i
+= push_opcode (&buf
[i
], "48 83 c6 18"); /* add $0x18,%rsi */
1559 /* tpoint address may be 64-bit wide. */
1560 i
+= push_opcode (&buf
[i
], "48 bf"); /* movl <addr>,%rdi */
1561 memcpy (buf
+ i
, &tpoint
, 8);
1563 append_insns (&buildaddr
, i
, buf
);
1565 /* The collector function being in the shared library, may be
1566 >31-bits away off the jump pad. */
1568 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov $collector,%rax */
1569 memcpy (buf
+ i
, &collector
, 8);
1571 i
+= push_opcode (&buf
[i
], "ff d0"); /* callq *%rax */
1572 append_insns (&buildaddr
, i
, buf
);
1574 /* Clear the spin-lock. */
1576 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1577 i
+= push_opcode (&buf
[i
], "48 a3"); /* mov %rax, lockaddr */
1578 memcpy (buf
+ i
, &lockaddr
, 8);
1580 append_insns (&buildaddr
, i
, buf
);
1582 /* Remove stack that had been used for the collect_t object. */
1584 i
+= push_opcode (&buf
[i
], "48 83 c4 18"); /* add $0x18,%rsp */
1585 append_insns (&buildaddr
, i
, buf
);
1587 /* Restore register state. */
1589 buf
[i
++] = 0x48; /* add $0x8,%rsp */
1593 buf
[i
++] = 0x9d; /* popfq */
1594 buf
[i
++] = 0x41; buf
[i
++] = 0x58; /* pop %r8 */
1595 buf
[i
++] = 0x41; buf
[i
++] = 0x59; /* pop %r9 */
1596 buf
[i
++] = 0x41; buf
[i
++] = 0x5a; /* pop %r10 */
1597 buf
[i
++] = 0x41; buf
[i
++] = 0x5b; /* pop %r11 */
1598 buf
[i
++] = 0x41; buf
[i
++] = 0x5c; /* pop %r12 */
1599 buf
[i
++] = 0x41; buf
[i
++] = 0x5d; /* pop %r13 */
1600 buf
[i
++] = 0x41; buf
[i
++] = 0x5e; /* pop %r14 */
1601 buf
[i
++] = 0x41; buf
[i
++] = 0x5f; /* pop %r15 */
1602 buf
[i
++] = 0x58; /* pop %rax */
1603 buf
[i
++] = 0x5b; /* pop %rbx */
1604 buf
[i
++] = 0x59; /* pop %rcx */
1605 buf
[i
++] = 0x5a; /* pop %rdx */
1606 buf
[i
++] = 0x5e; /* pop %rsi */
1607 buf
[i
++] = 0x5f; /* pop %rdi */
1608 buf
[i
++] = 0x5d; /* pop %rbp */
1609 buf
[i
++] = 0x5c; /* pop %rsp */
1610 append_insns (&buildaddr
, i
, buf
);
1612 /* Now, adjust the original instruction to execute in the jump
1614 *adjusted_insn_addr
= buildaddr
;
1615 relocate_instruction (&buildaddr
, tpaddr
);
1616 *adjusted_insn_addr_end
= buildaddr
;
1618 /* Finally, write a jump back to the program. */
1620 loffset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1621 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1624 "E.Jump back from jump pad too far from tracepoint "
1625 "(offset 0x%" PRIx64
" > int32).", loffset
);
1629 offset
= (int) loffset
;
1630 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1631 memcpy (buf
+ 1, &offset
, 4);
1632 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1634 /* The jump pad is now built. Wire in a jump to our jump pad. This
1635 is always done last (by our caller actually), so that we can
1636 install fast tracepoints with threads running. This relies on
1637 the agent's atomic write support. */
1638 loffset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1639 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1642 "E.Jump pad too far from tracepoint "
1643 "(offset 0x%" PRIx64
" > int32).", loffset
);
1647 offset
= (int) loffset
;
1649 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1650 memcpy (buf
+ 1, &offset
, 4);
1651 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1652 *jjump_pad_insn_size
= sizeof (jump_insn
);
1654 /* Return the end address of our pad. */
1655 *jump_entry
= buildaddr
;
1660 #endif /* __x86_64__ */
1662 /* Build a jump pad that saves registers and calls a collection
1663 function. Writes a jump instruction to the jump pad to
1664 JJUMPAD_INSN. The caller is responsible to write it in at the
1665 tracepoint address. */
1668 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1669 CORE_ADDR collector
,
1672 CORE_ADDR
*jump_entry
,
1673 CORE_ADDR
*trampoline
,
1674 ULONGEST
*trampoline_size
,
1675 unsigned char *jjump_pad_insn
,
1676 ULONGEST
*jjump_pad_insn_size
,
1677 CORE_ADDR
*adjusted_insn_addr
,
1678 CORE_ADDR
*adjusted_insn_addr_end
,
1681 unsigned char buf
[0x100];
1683 CORE_ADDR buildaddr
= *jump_entry
;
1685 /* Build the jump pad. */
1687 /* First, do tracepoint data collection. Save registers. */
1689 buf
[i
++] = 0x60; /* pushad */
1690 buf
[i
++] = 0x68; /* push tpaddr aka $pc */
1691 *((int *)(buf
+ i
)) = (int) tpaddr
;
1693 buf
[i
++] = 0x9c; /* pushf */
1694 buf
[i
++] = 0x1e; /* push %ds */
1695 buf
[i
++] = 0x06; /* push %es */
1696 buf
[i
++] = 0x0f; /* push %fs */
1698 buf
[i
++] = 0x0f; /* push %gs */
1700 buf
[i
++] = 0x16; /* push %ss */
1701 buf
[i
++] = 0x0e; /* push %cs */
1702 append_insns (&buildaddr
, i
, buf
);
1704 /* Stack space for the collecting_t object. */
1706 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1708 /* Build the object. */
1709 i
+= push_opcode (&buf
[i
], "b8"); /* mov <tpoint>,%eax */
1710 memcpy (buf
+ i
, &tpoint
, 4);
1712 i
+= push_opcode (&buf
[i
], "89 04 24"); /* mov %eax,(%esp) */
1714 i
+= push_opcode (&buf
[i
], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1715 i
+= push_opcode (&buf
[i
], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1716 append_insns (&buildaddr
, i
, buf
);
1718 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1719 If we cared for it, this could be using xchg alternatively. */
1722 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1723 i
+= push_opcode (&buf
[i
], "f0 0f b1 25"); /* lock cmpxchg
1725 memcpy (&buf
[i
], (void *) &lockaddr
, 4);
1727 i
+= push_opcode (&buf
[i
], "85 c0"); /* test %eax,%eax */
1728 i
+= push_opcode (&buf
[i
], "75 f2"); /* jne <again> */
1729 append_insns (&buildaddr
, i
, buf
);
1732 /* Set up arguments to the gdb_collect call. */
1734 i
+= push_opcode (&buf
[i
], "89 e0"); /* mov %esp,%eax */
1735 i
+= push_opcode (&buf
[i
], "83 c0 08"); /* add $0x08,%eax */
1736 i
+= push_opcode (&buf
[i
], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1737 append_insns (&buildaddr
, i
, buf
);
1740 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1741 append_insns (&buildaddr
, i
, buf
);
1744 i
+= push_opcode (&buf
[i
], "c7 04 24"); /* movl <addr>,(%esp) */
1745 memcpy (&buf
[i
], (void *) &tpoint
, 4);
1747 append_insns (&buildaddr
, i
, buf
);
1749 buf
[0] = 0xe8; /* call <reladdr> */
1750 offset
= collector
- (buildaddr
+ sizeof (jump_insn
));
1751 memcpy (buf
+ 1, &offset
, 4);
1752 append_insns (&buildaddr
, 5, buf
);
1753 /* Clean up after the call. */
1754 buf
[0] = 0x83; /* add $0x8,%esp */
1757 append_insns (&buildaddr
, 3, buf
);
1760 /* Clear the spin-lock. This would need the LOCK prefix on older
1763 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1764 i
+= push_opcode (&buf
[i
], "a3"); /* mov %eax, lockaddr */
1765 memcpy (buf
+ i
, &lockaddr
, 4);
1767 append_insns (&buildaddr
, i
, buf
);
1770 /* Remove stack that had been used for the collect_t object. */
1772 i
+= push_opcode (&buf
[i
], "83 c4 08"); /* add $0x08,%esp */
1773 append_insns (&buildaddr
, i
, buf
);
1776 buf
[i
++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1779 buf
[i
++] = 0x17; /* pop %ss */
1780 buf
[i
++] = 0x0f; /* pop %gs */
1782 buf
[i
++] = 0x0f; /* pop %fs */
1784 buf
[i
++] = 0x07; /* pop %es */
1785 buf
[i
++] = 0x1f; /* pop %ds */
1786 buf
[i
++] = 0x9d; /* popf */
1787 buf
[i
++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1790 buf
[i
++] = 0x61; /* popad */
1791 append_insns (&buildaddr
, i
, buf
);
1793 /* Now, adjust the original instruction to execute in the jump
1795 *adjusted_insn_addr
= buildaddr
;
1796 relocate_instruction (&buildaddr
, tpaddr
);
1797 *adjusted_insn_addr_end
= buildaddr
;
1799 /* Write the jump back to the program. */
1800 offset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1801 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1802 memcpy (buf
+ 1, &offset
, 4);
1803 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1805 /* The jump pad is now built. Wire in a jump to our jump pad. This
1806 is always done last (by our caller actually), so that we can
1807 install fast tracepoints with threads running. This relies on
1808 the agent's atomic write support. */
1811 /* Create a trampoline. */
1812 *trampoline_size
= sizeof (jump_insn
);
1813 if (!claim_trampoline_space (*trampoline_size
, trampoline
))
1815 /* No trampoline space available. */
1817 "E.Cannot allocate trampoline space needed for fast "
1818 "tracepoints on 4-byte instructions.");
1822 offset
= *jump_entry
- (*trampoline
+ sizeof (jump_insn
));
1823 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1824 memcpy (buf
+ 1, &offset
, 4);
1825 write_inferior_memory (*trampoline
, buf
, sizeof (jump_insn
));
1827 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1828 offset
= (*trampoline
- (tpaddr
+ sizeof (small_jump_insn
))) & 0xffff;
1829 memcpy (buf
, small_jump_insn
, sizeof (small_jump_insn
));
1830 memcpy (buf
+ 2, &offset
, 2);
1831 memcpy (jjump_pad_insn
, buf
, sizeof (small_jump_insn
));
1832 *jjump_pad_insn_size
= sizeof (small_jump_insn
);
1836 /* Else use a 32-bit relative jump instruction. */
1837 offset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1838 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1839 memcpy (buf
+ 1, &offset
, 4);
1840 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1841 *jjump_pad_insn_size
= sizeof (jump_insn
);
1844 /* Return the end address of our pad. */
1845 *jump_entry
= buildaddr
;
1851 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1852 CORE_ADDR collector
,
1855 CORE_ADDR
*jump_entry
,
1856 CORE_ADDR
*trampoline
,
1857 ULONGEST
*trampoline_size
,
1858 unsigned char *jjump_pad_insn
,
1859 ULONGEST
*jjump_pad_insn_size
,
1860 CORE_ADDR
*adjusted_insn_addr
,
1861 CORE_ADDR
*adjusted_insn_addr_end
,
1865 if (is_64bit_tdesc ())
1866 return amd64_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1867 collector
, lockaddr
,
1868 orig_size
, jump_entry
,
1869 trampoline
, trampoline_size
,
1871 jjump_pad_insn_size
,
1873 adjusted_insn_addr_end
,
1877 return i386_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1878 collector
, lockaddr
,
1879 orig_size
, jump_entry
,
1880 trampoline
, trampoline_size
,
1882 jjump_pad_insn_size
,
1884 adjusted_insn_addr_end
,
1888 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1892 x86_get_min_fast_tracepoint_insn_len (void)
1894 static int warned_about_fast_tracepoints
= 0;
1897 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1898 used for fast tracepoints. */
1899 if (is_64bit_tdesc ())
1903 if (agent_loaded_p ())
1905 char errbuf
[IPA_BUFSIZ
];
1909 /* On x86, if trampolines are available, then 4-byte jump instructions
1910 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1911 with a 4-byte offset are used instead. */
1912 if (have_fast_tracepoint_trampoline_buffer (errbuf
))
1916 /* GDB has no channel to explain to user why a shorter fast
1917 tracepoint is not possible, but at least make GDBserver
1918 mention that something has gone awry. */
1919 if (!warned_about_fast_tracepoints
)
1921 warning ("4-byte fast tracepoints not available; %s\n", errbuf
);
1922 warned_about_fast_tracepoints
= 1;
1929 /* Indicate that the minimum length is currently unknown since the IPA
1930 has not loaded yet. */
1936 add_insns (unsigned char *start
, int len
)
1938 CORE_ADDR buildaddr
= current_insn_ptr
;
1941 debug_printf ("Adding %d bytes of insn at %s\n",
1942 len
, paddress (buildaddr
));
1944 append_insns (&buildaddr
, len
, start
);
1945 current_insn_ptr
= buildaddr
;
1948 /* Our general strategy for emitting code is to avoid specifying raw
1949 bytes whenever possible, and instead copy a block of inline asm
1950 that is embedded in the function. This is a little messy, because
1951 we need to keep the compiler from discarding what looks like dead
1952 code, plus suppress various warnings. */
1954 #define EMIT_ASM(NAME, INSNS) \
1957 extern unsigned char start_ ## NAME, end_ ## NAME; \
1958 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1959 __asm__ ("jmp end_" #NAME "\n" \
1960 "\t" "start_" #NAME ":" \
1962 "\t" "end_" #NAME ":"); \
1967 #define EMIT_ASM32(NAME,INSNS) \
1970 extern unsigned char start_ ## NAME, end_ ## NAME; \
1971 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1972 __asm__ (".code32\n" \
1973 "\t" "jmp end_" #NAME "\n" \
1974 "\t" "start_" #NAME ":\n" \
1976 "\t" "end_" #NAME ":\n" \
1982 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
1989 amd64_emit_prologue (void)
1991 EMIT_ASM (amd64_prologue
,
1993 "movq %rsp,%rbp\n\t"
1994 "sub $0x20,%rsp\n\t"
1995 "movq %rdi,-8(%rbp)\n\t"
1996 "movq %rsi,-16(%rbp)");
2001 amd64_emit_epilogue (void)
2003 EMIT_ASM (amd64_epilogue
,
2004 "movq -16(%rbp),%rdi\n\t"
2005 "movq %rax,(%rdi)\n\t"
2012 amd64_emit_add (void)
2014 EMIT_ASM (amd64_add
,
2015 "add (%rsp),%rax\n\t"
2016 "lea 0x8(%rsp),%rsp");
2020 amd64_emit_sub (void)
2022 EMIT_ASM (amd64_sub
,
2023 "sub %rax,(%rsp)\n\t"
2028 amd64_emit_mul (void)
2034 amd64_emit_lsh (void)
2040 amd64_emit_rsh_signed (void)
2046 amd64_emit_rsh_unsigned (void)
2052 amd64_emit_ext (int arg
)
2057 EMIT_ASM (amd64_ext_8
,
2063 EMIT_ASM (amd64_ext_16
,
2068 EMIT_ASM (amd64_ext_32
,
2077 amd64_emit_log_not (void)
2079 EMIT_ASM (amd64_log_not
,
2080 "test %rax,%rax\n\t"
2086 amd64_emit_bit_and (void)
2088 EMIT_ASM (amd64_and
,
2089 "and (%rsp),%rax\n\t"
2090 "lea 0x8(%rsp),%rsp");
2094 amd64_emit_bit_or (void)
2097 "or (%rsp),%rax\n\t"
2098 "lea 0x8(%rsp),%rsp");
2102 amd64_emit_bit_xor (void)
2104 EMIT_ASM (amd64_xor
,
2105 "xor (%rsp),%rax\n\t"
2106 "lea 0x8(%rsp),%rsp");
2110 amd64_emit_bit_not (void)
2112 EMIT_ASM (amd64_bit_not
,
2113 "xorq $0xffffffffffffffff,%rax");
2117 amd64_emit_equal (void)
2119 EMIT_ASM (amd64_equal
,
2120 "cmp %rax,(%rsp)\n\t"
2121 "je .Lamd64_equal_true\n\t"
2123 "jmp .Lamd64_equal_end\n\t"
2124 ".Lamd64_equal_true:\n\t"
2126 ".Lamd64_equal_end:\n\t"
2127 "lea 0x8(%rsp),%rsp");
2131 amd64_emit_less_signed (void)
2133 EMIT_ASM (amd64_less_signed
,
2134 "cmp %rax,(%rsp)\n\t"
2135 "jl .Lamd64_less_signed_true\n\t"
2137 "jmp .Lamd64_less_signed_end\n\t"
2138 ".Lamd64_less_signed_true:\n\t"
2140 ".Lamd64_less_signed_end:\n\t"
2141 "lea 0x8(%rsp),%rsp");
2145 amd64_emit_less_unsigned (void)
2147 EMIT_ASM (amd64_less_unsigned
,
2148 "cmp %rax,(%rsp)\n\t"
2149 "jb .Lamd64_less_unsigned_true\n\t"
2151 "jmp .Lamd64_less_unsigned_end\n\t"
2152 ".Lamd64_less_unsigned_true:\n\t"
2154 ".Lamd64_less_unsigned_end:\n\t"
2155 "lea 0x8(%rsp),%rsp");
2159 amd64_emit_ref (int size
)
2164 EMIT_ASM (amd64_ref1
,
2168 EMIT_ASM (amd64_ref2
,
2172 EMIT_ASM (amd64_ref4
,
2173 "movl (%rax),%eax");
2176 EMIT_ASM (amd64_ref8
,
2177 "movq (%rax),%rax");
2183 amd64_emit_if_goto (int *offset_p
, int *size_p
)
2185 EMIT_ASM (amd64_if_goto
,
2189 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2197 amd64_emit_goto (int *offset_p
, int *size_p
)
2199 EMIT_ASM (amd64_goto
,
2200 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2208 amd64_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2210 int diff
= (to
- (from
+ size
));
2211 unsigned char buf
[sizeof (int)];
2219 memcpy (buf
, &diff
, sizeof (int));
2220 write_inferior_memory (from
, buf
, sizeof (int));
2224 amd64_emit_const (LONGEST num
)
2226 unsigned char buf
[16];
2228 CORE_ADDR buildaddr
= current_insn_ptr
;
2231 buf
[i
++] = 0x48; buf
[i
++] = 0xb8; /* mov $<n>,%rax */
2232 memcpy (&buf
[i
], &num
, sizeof (num
));
2234 append_insns (&buildaddr
, i
, buf
);
2235 current_insn_ptr
= buildaddr
;
2239 amd64_emit_call (CORE_ADDR fn
)
2241 unsigned char buf
[16];
2243 CORE_ADDR buildaddr
;
2246 /* The destination function being in the shared library, may be
2247 >31-bits away off the compiled code pad. */
2249 buildaddr
= current_insn_ptr
;
2251 offset64
= fn
- (buildaddr
+ 1 /* call op */ + 4 /* 32-bit offset */);
2255 if (offset64
> INT_MAX
|| offset64
< INT_MIN
)
2257 /* Offset is too large for a call. Use callq, but that requires
2258 a register, so avoid it if possible. Use r10, since it is
2259 call-clobbered, we don't have to push/pop it. */
2260 buf
[i
++] = 0x48; /* mov $fn,%r10 */
2262 memcpy (buf
+ i
, &fn
, 8);
2264 buf
[i
++] = 0xff; /* callq *%r10 */
2269 int offset32
= offset64
; /* we know we can't overflow here. */
2270 memcpy (buf
+ i
, &offset32
, 4);
2274 append_insns (&buildaddr
, i
, buf
);
2275 current_insn_ptr
= buildaddr
;
2279 amd64_emit_reg (int reg
)
2281 unsigned char buf
[16];
2283 CORE_ADDR buildaddr
;
2285 /* Assume raw_regs is still in %rdi. */
2286 buildaddr
= current_insn_ptr
;
2288 buf
[i
++] = 0xbe; /* mov $<n>,%esi */
2289 memcpy (&buf
[i
], ®
, sizeof (reg
));
2291 append_insns (&buildaddr
, i
, buf
);
2292 current_insn_ptr
= buildaddr
;
2293 amd64_emit_call (get_raw_reg_func_addr ());
2297 amd64_emit_pop (void)
2299 EMIT_ASM (amd64_pop
,
2304 amd64_emit_stack_flush (void)
2306 EMIT_ASM (amd64_stack_flush
,
2311 amd64_emit_zero_ext (int arg
)
2316 EMIT_ASM (amd64_zero_ext_8
,
2320 EMIT_ASM (amd64_zero_ext_16
,
2321 "and $0xffff,%rax");
2324 EMIT_ASM (amd64_zero_ext_32
,
2325 "mov $0xffffffff,%rcx\n\t"
2334 amd64_emit_swap (void)
2336 EMIT_ASM (amd64_swap
,
2343 amd64_emit_stack_adjust (int n
)
2345 unsigned char buf
[16];
2347 CORE_ADDR buildaddr
= current_insn_ptr
;
2350 buf
[i
++] = 0x48; /* lea $<n>(%rsp),%rsp */
2354 /* This only handles adjustments up to 16, but we don't expect any more. */
2356 append_insns (&buildaddr
, i
, buf
);
2357 current_insn_ptr
= buildaddr
;
2360 /* FN's prototype is `LONGEST(*fn)(int)'. */
2363 amd64_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2365 unsigned char buf
[16];
2367 CORE_ADDR buildaddr
;
2369 buildaddr
= current_insn_ptr
;
2371 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2372 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2374 append_insns (&buildaddr
, i
, buf
);
2375 current_insn_ptr
= buildaddr
;
2376 amd64_emit_call (fn
);
2379 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2382 amd64_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
2384 unsigned char buf
[16];
2386 CORE_ADDR buildaddr
;
2388 buildaddr
= current_insn_ptr
;
2390 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2391 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2393 append_insns (&buildaddr
, i
, buf
);
2394 current_insn_ptr
= buildaddr
;
2395 EMIT_ASM (amd64_void_call_2_a
,
2396 /* Save away a copy of the stack top. */
2398 /* Also pass top as the second argument. */
2400 amd64_emit_call (fn
);
2401 EMIT_ASM (amd64_void_call_2_b
,
2402 /* Restore the stack top, %rax may have been trashed. */
2407 amd64_emit_eq_goto (int *offset_p
, int *size_p
)
2410 "cmp %rax,(%rsp)\n\t"
2411 "jne .Lamd64_eq_fallthru\n\t"
2412 "lea 0x8(%rsp),%rsp\n\t"
2414 /* jmp, but don't trust the assembler to choose the right jump */
2415 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2416 ".Lamd64_eq_fallthru:\n\t"
2417 "lea 0x8(%rsp),%rsp\n\t"
2427 amd64_emit_ne_goto (int *offset_p
, int *size_p
)
2430 "cmp %rax,(%rsp)\n\t"
2431 "je .Lamd64_ne_fallthru\n\t"
2432 "lea 0x8(%rsp),%rsp\n\t"
2434 /* jmp, but don't trust the assembler to choose the right jump */
2435 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2436 ".Lamd64_ne_fallthru:\n\t"
2437 "lea 0x8(%rsp),%rsp\n\t"
2447 amd64_emit_lt_goto (int *offset_p
, int *size_p
)
2450 "cmp %rax,(%rsp)\n\t"
2451 "jnl .Lamd64_lt_fallthru\n\t"
2452 "lea 0x8(%rsp),%rsp\n\t"
2454 /* jmp, but don't trust the assembler to choose the right jump */
2455 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2456 ".Lamd64_lt_fallthru:\n\t"
2457 "lea 0x8(%rsp),%rsp\n\t"
2467 amd64_emit_le_goto (int *offset_p
, int *size_p
)
2470 "cmp %rax,(%rsp)\n\t"
2471 "jnle .Lamd64_le_fallthru\n\t"
2472 "lea 0x8(%rsp),%rsp\n\t"
2474 /* jmp, but don't trust the assembler to choose the right jump */
2475 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2476 ".Lamd64_le_fallthru:\n\t"
2477 "lea 0x8(%rsp),%rsp\n\t"
2487 amd64_emit_gt_goto (int *offset_p
, int *size_p
)
2490 "cmp %rax,(%rsp)\n\t"
2491 "jng .Lamd64_gt_fallthru\n\t"
2492 "lea 0x8(%rsp),%rsp\n\t"
2494 /* jmp, but don't trust the assembler to choose the right jump */
2495 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2496 ".Lamd64_gt_fallthru:\n\t"
2497 "lea 0x8(%rsp),%rsp\n\t"
2507 amd64_emit_ge_goto (int *offset_p
, int *size_p
)
2510 "cmp %rax,(%rsp)\n\t"
2511 "jnge .Lamd64_ge_fallthru\n\t"
2512 ".Lamd64_ge_jump:\n\t"
2513 "lea 0x8(%rsp),%rsp\n\t"
2515 /* jmp, but don't trust the assembler to choose the right jump */
2516 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2517 ".Lamd64_ge_fallthru:\n\t"
2518 "lea 0x8(%rsp),%rsp\n\t"
2527 struct emit_ops amd64_emit_ops
=
2529 amd64_emit_prologue
,
2530 amd64_emit_epilogue
,
2535 amd64_emit_rsh_signed
,
2536 amd64_emit_rsh_unsigned
,
2544 amd64_emit_less_signed
,
2545 amd64_emit_less_unsigned
,
2549 amd64_write_goto_address
,
2554 amd64_emit_stack_flush
,
2555 amd64_emit_zero_ext
,
2557 amd64_emit_stack_adjust
,
2558 amd64_emit_int_call_1
,
2559 amd64_emit_void_call_2
,
2568 #endif /* __x86_64__ */
2571 i386_emit_prologue (void)
2573 EMIT_ASM32 (i386_prologue
,
2577 /* At this point, the raw regs base address is at 8(%ebp), and the
2578 value pointer is at 12(%ebp). */
2582 i386_emit_epilogue (void)
2584 EMIT_ASM32 (i386_epilogue
,
2585 "mov 12(%ebp),%ecx\n\t"
2586 "mov %eax,(%ecx)\n\t"
2587 "mov %ebx,0x4(%ecx)\n\t"
2595 i386_emit_add (void)
2597 EMIT_ASM32 (i386_add
,
2598 "add (%esp),%eax\n\t"
2599 "adc 0x4(%esp),%ebx\n\t"
2600 "lea 0x8(%esp),%esp");
2604 i386_emit_sub (void)
2606 EMIT_ASM32 (i386_sub
,
2607 "subl %eax,(%esp)\n\t"
2608 "sbbl %ebx,4(%esp)\n\t"
2614 i386_emit_mul (void)
2620 i386_emit_lsh (void)
2626 i386_emit_rsh_signed (void)
2632 i386_emit_rsh_unsigned (void)
2638 i386_emit_ext (int arg
)
2643 EMIT_ASM32 (i386_ext_8
,
2646 "movl %eax,%ebx\n\t"
2650 EMIT_ASM32 (i386_ext_16
,
2652 "movl %eax,%ebx\n\t"
2656 EMIT_ASM32 (i386_ext_32
,
2657 "movl %eax,%ebx\n\t"
2666 i386_emit_log_not (void)
2668 EMIT_ASM32 (i386_log_not
,
2670 "test %eax,%eax\n\t"
2677 i386_emit_bit_and (void)
2679 EMIT_ASM32 (i386_and
,
2680 "and (%esp),%eax\n\t"
2681 "and 0x4(%esp),%ebx\n\t"
2682 "lea 0x8(%esp),%esp");
2686 i386_emit_bit_or (void)
2688 EMIT_ASM32 (i386_or
,
2689 "or (%esp),%eax\n\t"
2690 "or 0x4(%esp),%ebx\n\t"
2691 "lea 0x8(%esp),%esp");
2695 i386_emit_bit_xor (void)
2697 EMIT_ASM32 (i386_xor
,
2698 "xor (%esp),%eax\n\t"
2699 "xor 0x4(%esp),%ebx\n\t"
2700 "lea 0x8(%esp),%esp");
2704 i386_emit_bit_not (void)
2706 EMIT_ASM32 (i386_bit_not
,
2707 "xor $0xffffffff,%eax\n\t"
2708 "xor $0xffffffff,%ebx\n\t");
2712 i386_emit_equal (void)
2714 EMIT_ASM32 (i386_equal
,
2715 "cmpl %ebx,4(%esp)\n\t"
2716 "jne .Li386_equal_false\n\t"
2717 "cmpl %eax,(%esp)\n\t"
2718 "je .Li386_equal_true\n\t"
2719 ".Li386_equal_false:\n\t"
2721 "jmp .Li386_equal_end\n\t"
2722 ".Li386_equal_true:\n\t"
2724 ".Li386_equal_end:\n\t"
2726 "lea 0x8(%esp),%esp");
2730 i386_emit_less_signed (void)
2732 EMIT_ASM32 (i386_less_signed
,
2733 "cmpl %ebx,4(%esp)\n\t"
2734 "jl .Li386_less_signed_true\n\t"
2735 "jne .Li386_less_signed_false\n\t"
2736 "cmpl %eax,(%esp)\n\t"
2737 "jl .Li386_less_signed_true\n\t"
2738 ".Li386_less_signed_false:\n\t"
2740 "jmp .Li386_less_signed_end\n\t"
2741 ".Li386_less_signed_true:\n\t"
2743 ".Li386_less_signed_end:\n\t"
2745 "lea 0x8(%esp),%esp");
2749 i386_emit_less_unsigned (void)
2751 EMIT_ASM32 (i386_less_unsigned
,
2752 "cmpl %ebx,4(%esp)\n\t"
2753 "jb .Li386_less_unsigned_true\n\t"
2754 "jne .Li386_less_unsigned_false\n\t"
2755 "cmpl %eax,(%esp)\n\t"
2756 "jb .Li386_less_unsigned_true\n\t"
2757 ".Li386_less_unsigned_false:\n\t"
2759 "jmp .Li386_less_unsigned_end\n\t"
2760 ".Li386_less_unsigned_true:\n\t"
2762 ".Li386_less_unsigned_end:\n\t"
2764 "lea 0x8(%esp),%esp");
2768 i386_emit_ref (int size
)
2773 EMIT_ASM32 (i386_ref1
,
2777 EMIT_ASM32 (i386_ref2
,
2781 EMIT_ASM32 (i386_ref4
,
2782 "movl (%eax),%eax");
2785 EMIT_ASM32 (i386_ref8
,
2786 "movl 4(%eax),%ebx\n\t"
2787 "movl (%eax),%eax");
2793 i386_emit_if_goto (int *offset_p
, int *size_p
)
2795 EMIT_ASM32 (i386_if_goto
,
2801 /* Don't trust the assembler to choose the right jump */
2802 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2805 *offset_p
= 11; /* be sure that this matches the sequence above */
2811 i386_emit_goto (int *offset_p
, int *size_p
)
2813 EMIT_ASM32 (i386_goto
,
2814 /* Don't trust the assembler to choose the right jump */
2815 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2823 i386_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2825 int diff
= (to
- (from
+ size
));
2826 unsigned char buf
[sizeof (int)];
2828 /* We're only doing 4-byte sizes at the moment. */
2835 memcpy (buf
, &diff
, sizeof (int));
2836 write_inferior_memory (from
, buf
, sizeof (int));
2840 i386_emit_const (LONGEST num
)
2842 unsigned char buf
[16];
2844 CORE_ADDR buildaddr
= current_insn_ptr
;
2847 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2848 lo
= num
& 0xffffffff;
2849 memcpy (&buf
[i
], &lo
, sizeof (lo
));
2851 hi
= ((num
>> 32) & 0xffffffff);
2854 buf
[i
++] = 0xbb; /* mov $<n>,%ebx */
2855 memcpy (&buf
[i
], &hi
, sizeof (hi
));
2860 buf
[i
++] = 0x31; buf
[i
++] = 0xdb; /* xor %ebx,%ebx */
2862 append_insns (&buildaddr
, i
, buf
);
2863 current_insn_ptr
= buildaddr
;
2867 i386_emit_call (CORE_ADDR fn
)
2869 unsigned char buf
[16];
2871 CORE_ADDR buildaddr
;
2873 buildaddr
= current_insn_ptr
;
2875 buf
[i
++] = 0xe8; /* call <reladdr> */
2876 offset
= ((int) fn
) - (buildaddr
+ 5);
2877 memcpy (buf
+ 1, &offset
, 4);
2878 append_insns (&buildaddr
, 5, buf
);
2879 current_insn_ptr
= buildaddr
;
2883 i386_emit_reg (int reg
)
2885 unsigned char buf
[16];
2887 CORE_ADDR buildaddr
;
2889 EMIT_ASM32 (i386_reg_a
,
2891 buildaddr
= current_insn_ptr
;
2893 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2894 memcpy (&buf
[i
], ®
, sizeof (reg
));
2896 append_insns (&buildaddr
, i
, buf
);
2897 current_insn_ptr
= buildaddr
;
2898 EMIT_ASM32 (i386_reg_b
,
2899 "mov %eax,4(%esp)\n\t"
2900 "mov 8(%ebp),%eax\n\t"
2902 i386_emit_call (get_raw_reg_func_addr ());
2903 EMIT_ASM32 (i386_reg_c
,
2905 "lea 0x8(%esp),%esp");
2909 i386_emit_pop (void)
2911 EMIT_ASM32 (i386_pop
,
2917 i386_emit_stack_flush (void)
2919 EMIT_ASM32 (i386_stack_flush
,
2925 i386_emit_zero_ext (int arg
)
2930 EMIT_ASM32 (i386_zero_ext_8
,
2931 "and $0xff,%eax\n\t"
2935 EMIT_ASM32 (i386_zero_ext_16
,
2936 "and $0xffff,%eax\n\t"
2940 EMIT_ASM32 (i386_zero_ext_32
,
2949 i386_emit_swap (void)
2951 EMIT_ASM32 (i386_swap
,
2961 i386_emit_stack_adjust (int n
)
2963 unsigned char buf
[16];
2965 CORE_ADDR buildaddr
= current_insn_ptr
;
2968 buf
[i
++] = 0x8d; /* lea $<n>(%esp),%esp */
2972 append_insns (&buildaddr
, i
, buf
);
2973 current_insn_ptr
= buildaddr
;
2976 /* FN's prototype is `LONGEST(*fn)(int)'. */
2979 i386_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2981 unsigned char buf
[16];
2983 CORE_ADDR buildaddr
;
2985 EMIT_ASM32 (i386_int_call_1_a
,
2986 /* Reserve a bit of stack space. */
2988 /* Put the one argument on the stack. */
2989 buildaddr
= current_insn_ptr
;
2991 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
2994 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2996 append_insns (&buildaddr
, i
, buf
);
2997 current_insn_ptr
= buildaddr
;
2998 i386_emit_call (fn
);
2999 EMIT_ASM32 (i386_int_call_1_c
,
3001 "lea 0x8(%esp),%esp");
3004 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
3007 i386_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
3009 unsigned char buf
[16];
3011 CORE_ADDR buildaddr
;
3013 EMIT_ASM32 (i386_void_call_2_a
,
3014 /* Preserve %eax only; we don't have to worry about %ebx. */
3016 /* Reserve a bit of stack space for arguments. */
3017 "sub $0x10,%esp\n\t"
3018 /* Copy "top" to the second argument position. (Note that
3019 we can't assume function won't scribble on its
3020 arguments, so don't try to restore from this.) */
3021 "mov %eax,4(%esp)\n\t"
3022 "mov %ebx,8(%esp)");
3023 /* Put the first argument on the stack. */
3024 buildaddr
= current_insn_ptr
;
3026 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3029 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3031 append_insns (&buildaddr
, i
, buf
);
3032 current_insn_ptr
= buildaddr
;
3033 i386_emit_call (fn
);
3034 EMIT_ASM32 (i386_void_call_2_b
,
3035 "lea 0x10(%esp),%esp\n\t"
3036 /* Restore original stack top. */
3042 i386_emit_eq_goto (int *offset_p
, int *size_p
)
3045 /* Check low half first, more likely to be decider */
3046 "cmpl %eax,(%esp)\n\t"
3047 "jne .Leq_fallthru\n\t"
3048 "cmpl %ebx,4(%esp)\n\t"
3049 "jne .Leq_fallthru\n\t"
3050 "lea 0x8(%esp),%esp\n\t"
3053 /* jmp, but don't trust the assembler to choose the right jump */
3054 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3055 ".Leq_fallthru:\n\t"
3056 "lea 0x8(%esp),%esp\n\t"
3067 i386_emit_ne_goto (int *offset_p
, int *size_p
)
3070 /* Check low half first, more likely to be decider */
3071 "cmpl %eax,(%esp)\n\t"
3073 "cmpl %ebx,4(%esp)\n\t"
3074 "je .Lne_fallthru\n\t"
3076 "lea 0x8(%esp),%esp\n\t"
3079 /* jmp, but don't trust the assembler to choose the right jump */
3080 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3081 ".Lne_fallthru:\n\t"
3082 "lea 0x8(%esp),%esp\n\t"
3093 i386_emit_lt_goto (int *offset_p
, int *size_p
)
3096 "cmpl %ebx,4(%esp)\n\t"
3098 "jne .Llt_fallthru\n\t"
3099 "cmpl %eax,(%esp)\n\t"
3100 "jnl .Llt_fallthru\n\t"
3102 "lea 0x8(%esp),%esp\n\t"
3105 /* jmp, but don't trust the assembler to choose the right jump */
3106 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3107 ".Llt_fallthru:\n\t"
3108 "lea 0x8(%esp),%esp\n\t"
3119 i386_emit_le_goto (int *offset_p
, int *size_p
)
3122 "cmpl %ebx,4(%esp)\n\t"
3124 "jne .Lle_fallthru\n\t"
3125 "cmpl %eax,(%esp)\n\t"
3126 "jnle .Lle_fallthru\n\t"
3128 "lea 0x8(%esp),%esp\n\t"
3131 /* jmp, but don't trust the assembler to choose the right jump */
3132 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3133 ".Lle_fallthru:\n\t"
3134 "lea 0x8(%esp),%esp\n\t"
3145 i386_emit_gt_goto (int *offset_p
, int *size_p
)
3148 "cmpl %ebx,4(%esp)\n\t"
3150 "jne .Lgt_fallthru\n\t"
3151 "cmpl %eax,(%esp)\n\t"
3152 "jng .Lgt_fallthru\n\t"
3154 "lea 0x8(%esp),%esp\n\t"
3157 /* jmp, but don't trust the assembler to choose the right jump */
3158 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3159 ".Lgt_fallthru:\n\t"
3160 "lea 0x8(%esp),%esp\n\t"
3171 i386_emit_ge_goto (int *offset_p
, int *size_p
)
3174 "cmpl %ebx,4(%esp)\n\t"
3176 "jne .Lge_fallthru\n\t"
3177 "cmpl %eax,(%esp)\n\t"
3178 "jnge .Lge_fallthru\n\t"
3180 "lea 0x8(%esp),%esp\n\t"
3183 /* jmp, but don't trust the assembler to choose the right jump */
3184 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3185 ".Lge_fallthru:\n\t"
3186 "lea 0x8(%esp),%esp\n\t"
3196 struct emit_ops i386_emit_ops
=
3204 i386_emit_rsh_signed
,
3205 i386_emit_rsh_unsigned
,
3213 i386_emit_less_signed
,
3214 i386_emit_less_unsigned
,
3218 i386_write_goto_address
,
3223 i386_emit_stack_flush
,
3226 i386_emit_stack_adjust
,
3227 i386_emit_int_call_1
,
3228 i386_emit_void_call_2
,
3238 static struct emit_ops
*
3242 if (is_64bit_tdesc ())
3243 return &amd64_emit_ops
;
3246 return &i386_emit_ops
;
3250 x86_supports_range_stepping (void)
3255 /* This is initialized assuming an amd64 target.
3256 x86_arch_setup will correct it for i386 or amd64 targets. */
3258 struct linux_target_ops the_low_target
=
3261 x86_linux_regs_info
,
3262 x86_cannot_fetch_register
,
3263 x86_cannot_store_register
,
3264 NULL
, /* fetch_register */
3272 x86_supports_z_point_type
,
3275 x86_stopped_by_watchpoint
,
3276 x86_stopped_data_address
,
3277 /* collect_ptrace_register/supply_ptrace_register are not needed in the
3278 native i386 case (no registers smaller than an xfer unit), and are not
3279 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
3282 /* need to fix up i386 siginfo if host is amd64 */
3284 x86_linux_new_process
,
3285 x86_linux_new_thread
,
3287 x86_linux_prepare_to_resume
,
3288 x86_linux_process_qsupported
,
3289 x86_supports_tracepoints
,
3290 x86_get_thread_area
,
3291 x86_install_fast_tracepoint_jump_pad
,
3293 x86_get_min_fast_tracepoint_insn_len
,
3294 x86_supports_range_stepping
,
3298 initialize_low_arch (void)
3300 /* Initialize the Linux target descriptions. */
3302 init_registers_amd64_linux ();
3303 init_registers_amd64_avx_linux ();
3304 init_registers_amd64_avx512_linux ();
3305 init_registers_amd64_mpx_linux ();
3307 init_registers_x32_linux ();
3308 init_registers_x32_avx_linux ();
3309 init_registers_x32_avx512_linux ();
3311 tdesc_amd64_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3312 copy_target_description (tdesc_amd64_linux_no_xml
, tdesc_amd64_linux
);
3313 tdesc_amd64_linux_no_xml
->xmltarget
= xmltarget_amd64_linux_no_xml
;
3315 init_registers_i386_linux ();
3316 init_registers_i386_mmx_linux ();
3317 init_registers_i386_avx_linux ();
3318 init_registers_i386_avx512_linux ();
3319 init_registers_i386_mpx_linux ();
3321 tdesc_i386_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3322 copy_target_description (tdesc_i386_linux_no_xml
, tdesc_i386_linux
);
3323 tdesc_i386_linux_no_xml
->xmltarget
= xmltarget_i386_linux_no_xml
;
3325 initialize_regsets_info (&x86_regsets_info
);