1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-low.h"
27 #include "x86-xstate.h"
29 #include "gdb_proc_service.h"
30 /* Don't include elf/common.h if linux/elf.h got included by
31 gdb_proc_service.h. */
33 #include "elf/common.h"
38 #include "tracepoint.h"
42 /* Defined in auto-generated file amd64-linux.c. */
43 void init_registers_amd64_linux (void);
44 extern const struct target_desc
*tdesc_amd64_linux
;
46 /* Defined in auto-generated file amd64-avx-linux.c. */
47 void init_registers_amd64_avx_linux (void);
48 extern const struct target_desc
*tdesc_amd64_avx_linux
;
50 /* Defined in auto-generated file amd64-avx512-linux.c. */
51 void init_registers_amd64_avx512_linux (void);
52 extern const struct target_desc
*tdesc_amd64_avx512_linux
;
54 /* Defined in auto-generated file amd64-mpx-linux.c. */
55 void init_registers_amd64_mpx_linux (void);
56 extern const struct target_desc
*tdesc_amd64_mpx_linux
;
58 /* Defined in auto-generated file x32-linux.c. */
59 void init_registers_x32_linux (void);
60 extern const struct target_desc
*tdesc_x32_linux
;
62 /* Defined in auto-generated file x32-avx-linux.c. */
63 void init_registers_x32_avx_linux (void);
64 extern const struct target_desc
*tdesc_x32_avx_linux
;
66 /* Defined in auto-generated file x32-avx512-linux.c. */
67 void init_registers_x32_avx512_linux (void);
68 extern const struct target_desc
*tdesc_x32_avx512_linux
;
72 /* Defined in auto-generated file i386-linux.c. */
73 void init_registers_i386_linux (void);
74 extern const struct target_desc
*tdesc_i386_linux
;
76 /* Defined in auto-generated file i386-mmx-linux.c. */
77 void init_registers_i386_mmx_linux (void);
78 extern const struct target_desc
*tdesc_i386_mmx_linux
;
80 /* Defined in auto-generated file i386-avx-linux.c. */
81 void init_registers_i386_avx_linux (void);
82 extern const struct target_desc
*tdesc_i386_avx_linux
;
84 /* Defined in auto-generated file i386-avx512-linux.c. */
85 void init_registers_i386_avx512_linux (void);
86 extern const struct target_desc
*tdesc_i386_avx512_linux
;
88 /* Defined in auto-generated file i386-mpx-linux.c. */
89 void init_registers_i386_mpx_linux (void);
90 extern const struct target_desc
*tdesc_i386_mpx_linux
;
93 static struct target_desc
*tdesc_amd64_linux_no_xml
;
95 static struct target_desc
*tdesc_i386_linux_no_xml
;
98 static unsigned char jump_insn
[] = { 0xe9, 0, 0, 0, 0 };
99 static unsigned char small_jump_insn
[] = { 0x66, 0xe9, 0, 0 };
101 /* Backward compatibility for gdb without XML support. */
103 static const char *xmltarget_i386_linux_no_xml
= "@<target>\
104 <architecture>i386</architecture>\
105 <osabi>GNU/Linux</osabi>\
109 static const char *xmltarget_amd64_linux_no_xml
= "@<target>\
110 <architecture>i386:x86-64</architecture>\
111 <osabi>GNU/Linux</osabi>\
116 #include <sys/procfs.h>
117 #include <sys/ptrace.h>
120 #ifndef PTRACE_GETREGSET
121 #define PTRACE_GETREGSET 0x4204
124 #ifndef PTRACE_SETREGSET
125 #define PTRACE_SETREGSET 0x4205
129 #ifndef PTRACE_GET_THREAD_AREA
130 #define PTRACE_GET_THREAD_AREA 25
133 /* This definition comes from prctl.h, but some kernels may not have it. */
134 #ifndef PTRACE_ARCH_PRCTL
135 #define PTRACE_ARCH_PRCTL 30
138 /* The following definitions come from prctl.h, but may be absent
139 for certain configurations. */
141 #define ARCH_SET_GS 0x1001
142 #define ARCH_SET_FS 0x1002
143 #define ARCH_GET_FS 0x1003
144 #define ARCH_GET_GS 0x1004
147 /* Per-process arch-specific data we want to keep. */
149 struct arch_process_info
151 struct x86_debug_reg_state debug_reg_state
;
154 /* Per-thread arch-specific data we want to keep. */
158 /* Non-zero if our copy differs from what's recorded in the thread. */
159 int debug_registers_changed
;
164 /* Mapping between the general-purpose registers in `struct user'
165 format and GDB's register array layout.
166 Note that the transfer layout uses 64-bit regs. */
167 static /*const*/ int i386_regmap
[] =
169 RAX
* 8, RCX
* 8, RDX
* 8, RBX
* 8,
170 RSP
* 8, RBP
* 8, RSI
* 8, RDI
* 8,
171 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
172 DS
* 8, ES
* 8, FS
* 8, GS
* 8
175 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
177 /* So code below doesn't have to care, i386 or amd64. */
178 #define ORIG_EAX ORIG_RAX
180 static const int x86_64_regmap
[] =
182 RAX
* 8, RBX
* 8, RCX
* 8, RDX
* 8,
183 RSI
* 8, RDI
* 8, RBP
* 8, RSP
* 8,
184 R8
* 8, R9
* 8, R10
* 8, R11
* 8,
185 R12
* 8, R13
* 8, R14
* 8, R15
* 8,
186 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
187 DS
* 8, ES
* 8, FS
* 8, GS
* 8,
188 -1, -1, -1, -1, -1, -1, -1, -1,
189 -1, -1, -1, -1, -1, -1, -1, -1,
190 -1, -1, -1, -1, -1, -1, -1, -1,
192 -1, -1, -1, -1, -1, -1, -1, -1,
194 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
195 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
196 -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
197 -1, -1, -1, -1, -1, -1, -1, -1,
198 -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
199 -1, -1, -1, -1, -1, -1, -1, -1,
200 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
201 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
202 -1, -1, -1, -1, -1, -1, -1, -1,
203 -1, -1, -1, -1, -1, -1, -1, -1,
204 -1, -1, -1, -1, -1, -1, -1, -1
207 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
208 #define X86_64_USER_REGS (GS + 1)
210 #else /* ! __x86_64__ */
212 /* Mapping between the general-purpose registers in `struct user'
213 format and GDB's register array layout. */
214 static /*const*/ int i386_regmap
[] =
216 EAX
* 4, ECX
* 4, EDX
* 4, EBX
* 4,
217 UESP
* 4, EBP
* 4, ESI
* 4, EDI
* 4,
218 EIP
* 4, EFL
* 4, CS
* 4, SS
* 4,
219 DS
* 4, ES
* 4, FS
* 4, GS
* 4
222 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
228 /* Returns true if the current inferior belongs to a x86-64 process,
232 is_64bit_tdesc (void)
234 struct regcache
*regcache
= get_thread_regcache (current_inferior
, 0);
236 return register_size (regcache
->tdesc
, 0) == 8;
242 /* Called by libthread_db. */
245 ps_get_thread_area (const struct ps_prochandle
*ph
,
246 lwpid_t lwpid
, int idx
, void **base
)
249 int use_64bit
= is_64bit_tdesc ();
256 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
260 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
271 unsigned int desc
[4];
273 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
,
274 (void *) (intptr_t) idx
, (unsigned long) &desc
) < 0)
277 /* Ensure we properly extend the value to 64-bits for x86_64. */
278 *base
= (void *) (uintptr_t) desc
[1];
283 /* Get the thread area address. This is used to recognize which
284 thread is which when tracing with the in-process agent library. We
285 don't read anything from the address, and treat it as opaque; it's
286 the address itself that we assume is unique per-thread. */
289 x86_get_thread_area (int lwpid
, CORE_ADDR
*addr
)
292 int use_64bit
= is_64bit_tdesc ();
297 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
299 *addr
= (CORE_ADDR
) (uintptr_t) base
;
308 struct lwp_info
*lwp
= find_lwp_pid (pid_to_ptid (lwpid
));
309 struct thread_info
*thr
= get_lwp_thread (lwp
);
310 struct regcache
*regcache
= get_thread_regcache (thr
, 1);
311 unsigned int desc
[4];
313 const int reg_thread_area
= 3; /* bits to scale down register value. */
316 collect_register_by_name (regcache
, "gs", &gs
);
318 idx
= gs
>> reg_thread_area
;
320 if (ptrace (PTRACE_GET_THREAD_AREA
,
322 (void *) (long) idx
, (unsigned long) &desc
) < 0)
333 x86_cannot_store_register (int regno
)
336 if (is_64bit_tdesc ())
340 return regno
>= I386_NUM_REGS
;
344 x86_cannot_fetch_register (int regno
)
347 if (is_64bit_tdesc ())
351 return regno
>= I386_NUM_REGS
;
355 x86_fill_gregset (struct regcache
*regcache
, void *buf
)
360 if (register_size (regcache
->tdesc
, 0) == 8)
362 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
363 if (x86_64_regmap
[i
] != -1)
364 collect_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
368 /* 32-bit inferior registers need to be zero-extended.
369 Callers would read uninitialized memory otherwise. */
370 memset (buf
, 0x00, X86_64_USER_REGS
* 8);
373 for (i
= 0; i
< I386_NUM_REGS
; i
++)
374 collect_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
376 collect_register_by_name (regcache
, "orig_eax",
377 ((char *) buf
) + ORIG_EAX
* 4);
381 x86_store_gregset (struct regcache
*regcache
, const void *buf
)
386 if (register_size (regcache
->tdesc
, 0) == 8)
388 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
389 if (x86_64_regmap
[i
] != -1)
390 supply_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
395 for (i
= 0; i
< I386_NUM_REGS
; i
++)
396 supply_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
398 supply_register_by_name (regcache
, "orig_eax",
399 ((char *) buf
) + ORIG_EAX
* 4);
403 x86_fill_fpregset (struct regcache
*regcache
, void *buf
)
406 i387_cache_to_fxsave (regcache
, buf
);
408 i387_cache_to_fsave (regcache
, buf
);
413 x86_store_fpregset (struct regcache
*regcache
, const void *buf
)
416 i387_fxsave_to_cache (regcache
, buf
);
418 i387_fsave_to_cache (regcache
, buf
);
425 x86_fill_fpxregset (struct regcache
*regcache
, void *buf
)
427 i387_cache_to_fxsave (regcache
, buf
);
431 x86_store_fpxregset (struct regcache
*regcache
, const void *buf
)
433 i387_fxsave_to_cache (regcache
, buf
);
439 x86_fill_xstateregset (struct regcache
*regcache
, void *buf
)
441 i387_cache_to_xsave (regcache
, buf
);
445 x86_store_xstateregset (struct regcache
*regcache
, const void *buf
)
447 i387_xsave_to_cache (regcache
, buf
);
450 /* ??? The non-biarch i386 case stores all the i387 regs twice.
451 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
452 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
453 doesn't work. IWBN to avoid the duplication in the case where it
454 does work. Maybe the arch_setup routine could check whether it works
455 and update the supported regsets accordingly. */
457 static struct regset_info x86_regsets
[] =
459 #ifdef HAVE_PTRACE_GETREGS
460 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, sizeof (elf_gregset_t
),
462 x86_fill_gregset
, x86_store_gregset
},
463 { PTRACE_GETREGSET
, PTRACE_SETREGSET
, NT_X86_XSTATE
, 0,
464 EXTENDED_REGS
, x86_fill_xstateregset
, x86_store_xstateregset
},
466 # ifdef HAVE_PTRACE_GETFPXREGS
467 { PTRACE_GETFPXREGS
, PTRACE_SETFPXREGS
, 0, sizeof (elf_fpxregset_t
),
469 x86_fill_fpxregset
, x86_store_fpxregset
},
472 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, sizeof (elf_fpregset_t
),
474 x86_fill_fpregset
, x86_store_fpregset
},
475 #endif /* HAVE_PTRACE_GETREGS */
476 { 0, 0, 0, -1, -1, NULL
, NULL
}
480 x86_get_pc (struct regcache
*regcache
)
482 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
487 collect_register_by_name (regcache
, "rip", &pc
);
488 return (CORE_ADDR
) pc
;
493 collect_register_by_name (regcache
, "eip", &pc
);
494 return (CORE_ADDR
) pc
;
499 x86_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
501 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
505 unsigned long newpc
= pc
;
506 supply_register_by_name (regcache
, "rip", &newpc
);
510 unsigned int newpc
= pc
;
511 supply_register_by_name (regcache
, "eip", &newpc
);
515 static const unsigned char x86_breakpoint
[] = { 0xCC };
516 #define x86_breakpoint_len 1
519 x86_breakpoint_at (CORE_ADDR pc
)
523 (*the_target
->read_memory
) (pc
, &c
, 1);
530 /* Support for debug registers. */
533 x86_linux_dr_get (ptid_t ptid
, int regnum
)
538 tid
= ptid_get_lwp (ptid
);
541 value
= ptrace (PTRACE_PEEKUSER
, tid
,
542 offsetof (struct user
, u_debugreg
[regnum
]), 0);
544 error ("Couldn't read debug register");
550 x86_linux_dr_set (ptid_t ptid
, int regnum
, unsigned long value
)
554 tid
= ptid_get_lwp (ptid
);
557 ptrace (PTRACE_POKEUSER
, tid
,
558 offsetof (struct user
, u_debugreg
[regnum
]), value
);
560 error ("Couldn't write debug register");
564 update_debug_registers_callback (struct inferior_list_entry
*entry
,
567 struct thread_info
*thr
= (struct thread_info
*) entry
;
568 struct lwp_info
*lwp
= get_thread_lwp (thr
);
569 int pid
= *(int *) pid_p
;
571 /* Only update the threads of this process. */
572 if (pid_of (thr
) == pid
)
574 /* The actual update is done later just before resuming the lwp,
575 we just mark that the registers need updating. */
576 lwp
->arch_private
->debug_registers_changed
= 1;
578 /* If the lwp isn't stopped, force it to momentarily pause, so
579 we can update its debug registers. */
581 linux_stop_lwp (lwp
);
587 /* Update the inferior's debug register REGNUM from STATE. */
590 x86_dr_low_set_addr (int regnum
, CORE_ADDR addr
)
592 /* Only update the threads of this process. */
593 int pid
= pid_of (current_inferior
);
595 gdb_assert (DR_FIRSTADDR
<= regnum
&& regnum
<= DR_LASTADDR
);
597 find_inferior (&all_threads
, update_debug_registers_callback
, &pid
);
600 /* Return the inferior's debug register REGNUM. */
603 x86_dr_low_get_addr (int regnum
)
605 ptid_t ptid
= ptid_of (current_inferior
);
607 gdb_assert (DR_FIRSTADDR
<= regnum
&& regnum
<= DR_LASTADDR
);
609 return x86_linux_dr_get (ptid
, regnum
);
612 /* Update the inferior's DR7 debug control register from STATE. */
615 x86_dr_low_set_control (unsigned long control
)
617 /* Only update the threads of this process. */
618 int pid
= pid_of (current_inferior
);
620 find_inferior (&all_threads
, update_debug_registers_callback
, &pid
);
623 /* Return the inferior's DR7 debug control register. */
626 x86_dr_low_get_control (void)
628 ptid_t ptid
= ptid_of (current_inferior
);
630 return x86_linux_dr_get (ptid
, DR_CONTROL
);
633 /* Get the value of the DR6 debug status register from the inferior
634 and record it in STATE. */
637 x86_dr_low_get_status (void)
639 ptid_t ptid
= ptid_of (current_inferior
);
641 return x86_linux_dr_get (ptid
, DR_STATUS
);
644 /* Low-level function vector. */
645 struct x86_dr_low_type x86_dr_low
=
647 x86_dr_low_set_control
,
650 x86_dr_low_get_status
,
651 x86_dr_low_get_control
,
655 /* Breakpoint/Watchpoint support. */
658 x86_supports_z_point_type (char z_type
)
664 case Z_PACKET_WRITE_WP
:
665 case Z_PACKET_ACCESS_WP
:
673 x86_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
674 int size
, struct raw_breakpoint
*bp
)
676 struct process_info
*proc
= current_process ();
680 case raw_bkpt_type_sw
:
681 return insert_memory_breakpoint (bp
);
683 case raw_bkpt_type_hw
:
684 case raw_bkpt_type_write_wp
:
685 case raw_bkpt_type_access_wp
:
687 enum target_hw_bp_type hw_type
688 = raw_bkpt_type_to_target_hw_bp_type (type
);
689 struct x86_debug_reg_state
*state
690 = &proc
->private->arch_private
->debug_reg_state
;
692 return x86_dr_insert_watchpoint (state
, hw_type
, addr
, size
);
702 x86_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
703 int size
, struct raw_breakpoint
*bp
)
705 struct process_info
*proc
= current_process ();
709 case raw_bkpt_type_sw
:
710 return remove_memory_breakpoint (bp
);
712 case raw_bkpt_type_hw
:
713 case raw_bkpt_type_write_wp
:
714 case raw_bkpt_type_access_wp
:
716 enum target_hw_bp_type hw_type
717 = raw_bkpt_type_to_target_hw_bp_type (type
);
718 struct x86_debug_reg_state
*state
719 = &proc
->private->arch_private
->debug_reg_state
;
721 return x86_dr_remove_watchpoint (state
, hw_type
, addr
, size
);
730 x86_stopped_by_watchpoint (void)
732 struct process_info
*proc
= current_process ();
733 return x86_dr_stopped_by_watchpoint (&proc
->private->arch_private
->debug_reg_state
);
737 x86_stopped_data_address (void)
739 struct process_info
*proc
= current_process ();
741 if (x86_dr_stopped_data_address (&proc
->private->arch_private
->debug_reg_state
,
747 /* Called when a new process is created. */
749 static struct arch_process_info
*
750 x86_linux_new_process (void)
752 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
754 x86_low_init_dregs (&info
->debug_reg_state
);
759 /* Called when a new thread is detected. */
761 static struct arch_lwp_info
*
762 x86_linux_new_thread (void)
764 struct arch_lwp_info
*info
= XCNEW (struct arch_lwp_info
);
766 info
->debug_registers_changed
= 1;
771 /* Called when resuming a thread.
772 If the debug regs have changed, update the thread's copies. */
775 x86_linux_prepare_to_resume (struct lwp_info
*lwp
)
777 ptid_t ptid
= ptid_of (get_lwp_thread (lwp
));
778 int clear_status
= 0;
780 if (lwp
->arch_private
->debug_registers_changed
)
783 int pid
= ptid_get_pid (ptid
);
784 struct process_info
*proc
= find_process_pid (pid
);
785 struct x86_debug_reg_state
*state
786 = &proc
->private->arch_private
->debug_reg_state
;
788 x86_linux_dr_set (ptid
, DR_CONTROL
, 0);
790 for (i
= DR_FIRSTADDR
; i
<= DR_LASTADDR
; i
++)
791 if (state
->dr_ref_count
[i
] > 0)
793 x86_linux_dr_set (ptid
, i
, state
->dr_mirror
[i
]);
795 /* If we're setting a watchpoint, any change the inferior
796 had done itself to the debug registers needs to be
797 discarded, otherwise, x86_dr_stopped_data_address can
802 if (state
->dr_control_mirror
!= 0)
803 x86_linux_dr_set (ptid
, DR_CONTROL
, state
->dr_control_mirror
);
805 lwp
->arch_private
->debug_registers_changed
= 0;
808 if (clear_status
|| lwp
->stopped_by_watchpoint
)
809 x86_linux_dr_set (ptid
, DR_STATUS
, 0);
812 /* When GDBSERVER is built as a 64-bit application on linux, the
813 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
814 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
815 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
816 conversion in-place ourselves. */
818 /* These types below (compat_*) define a siginfo type that is layout
819 compatible with the siginfo type exported by the 32-bit userspace
824 typedef int compat_int_t
;
825 typedef unsigned int compat_uptr_t
;
827 typedef int compat_time_t
;
828 typedef int compat_timer_t
;
829 typedef int compat_clock_t
;
831 struct compat_timeval
833 compat_time_t tv_sec
;
837 typedef union compat_sigval
839 compat_int_t sival_int
;
840 compat_uptr_t sival_ptr
;
843 typedef struct compat_siginfo
851 int _pad
[((128 / sizeof (int)) - 3)];
860 /* POSIX.1b timers */
865 compat_sigval_t _sigval
;
868 /* POSIX.1b signals */
873 compat_sigval_t _sigval
;
882 compat_clock_t _utime
;
883 compat_clock_t _stime
;
886 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
901 /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
902 typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t
;
904 typedef struct compat_x32_siginfo
912 int _pad
[((128 / sizeof (int)) - 3)];
921 /* POSIX.1b timers */
926 compat_sigval_t _sigval
;
929 /* POSIX.1b signals */
934 compat_sigval_t _sigval
;
943 compat_x32_clock_t _utime
;
944 compat_x32_clock_t _stime
;
947 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
960 } compat_x32_siginfo_t
__attribute__ ((__aligned__ (8)));
962 #define cpt_si_pid _sifields._kill._pid
963 #define cpt_si_uid _sifields._kill._uid
964 #define cpt_si_timerid _sifields._timer._tid
965 #define cpt_si_overrun _sifields._timer._overrun
966 #define cpt_si_status _sifields._sigchld._status
967 #define cpt_si_utime _sifields._sigchld._utime
968 #define cpt_si_stime _sifields._sigchld._stime
969 #define cpt_si_ptr _sifields._rt._sigval.sival_ptr
970 #define cpt_si_addr _sifields._sigfault._addr
971 #define cpt_si_band _sifields._sigpoll._band
972 #define cpt_si_fd _sifields._sigpoll._fd
974 /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
975 In their place is si_timer1,si_timer2. */
977 #define si_timerid si_timer1
980 #define si_overrun si_timer2
984 compat_siginfo_from_siginfo (compat_siginfo_t
*to
, siginfo_t
*from
)
986 memset (to
, 0, sizeof (*to
));
988 to
->si_signo
= from
->si_signo
;
989 to
->si_errno
= from
->si_errno
;
990 to
->si_code
= from
->si_code
;
992 if (to
->si_code
== SI_TIMER
)
994 to
->cpt_si_timerid
= from
->si_timerid
;
995 to
->cpt_si_overrun
= from
->si_overrun
;
996 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
998 else if (to
->si_code
== SI_USER
)
1000 to
->cpt_si_pid
= from
->si_pid
;
1001 to
->cpt_si_uid
= from
->si_uid
;
1003 else if (to
->si_code
< 0)
1005 to
->cpt_si_pid
= from
->si_pid
;
1006 to
->cpt_si_uid
= from
->si_uid
;
1007 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1011 switch (to
->si_signo
)
1014 to
->cpt_si_pid
= from
->si_pid
;
1015 to
->cpt_si_uid
= from
->si_uid
;
1016 to
->cpt_si_status
= from
->si_status
;
1017 to
->cpt_si_utime
= from
->si_utime
;
1018 to
->cpt_si_stime
= from
->si_stime
;
1024 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
1027 to
->cpt_si_band
= from
->si_band
;
1028 to
->cpt_si_fd
= from
->si_fd
;
1031 to
->cpt_si_pid
= from
->si_pid
;
1032 to
->cpt_si_uid
= from
->si_uid
;
1033 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1040 siginfo_from_compat_siginfo (siginfo_t
*to
, compat_siginfo_t
*from
)
1042 memset (to
, 0, sizeof (*to
));
1044 to
->si_signo
= from
->si_signo
;
1045 to
->si_errno
= from
->si_errno
;
1046 to
->si_code
= from
->si_code
;
1048 if (to
->si_code
== SI_TIMER
)
1050 to
->si_timerid
= from
->cpt_si_timerid
;
1051 to
->si_overrun
= from
->cpt_si_overrun
;
1052 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1054 else if (to
->si_code
== SI_USER
)
1056 to
->si_pid
= from
->cpt_si_pid
;
1057 to
->si_uid
= from
->cpt_si_uid
;
1059 else if (to
->si_code
< 0)
1061 to
->si_pid
= from
->cpt_si_pid
;
1062 to
->si_uid
= from
->cpt_si_uid
;
1063 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1067 switch (to
->si_signo
)
1070 to
->si_pid
= from
->cpt_si_pid
;
1071 to
->si_uid
= from
->cpt_si_uid
;
1072 to
->si_status
= from
->cpt_si_status
;
1073 to
->si_utime
= from
->cpt_si_utime
;
1074 to
->si_stime
= from
->cpt_si_stime
;
1080 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1083 to
->si_band
= from
->cpt_si_band
;
1084 to
->si_fd
= from
->cpt_si_fd
;
1087 to
->si_pid
= from
->cpt_si_pid
;
1088 to
->si_uid
= from
->cpt_si_uid
;
1089 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1096 compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t
*to
,
1099 memset (to
, 0, sizeof (*to
));
1101 to
->si_signo
= from
->si_signo
;
1102 to
->si_errno
= from
->si_errno
;
1103 to
->si_code
= from
->si_code
;
1105 if (to
->si_code
== SI_TIMER
)
1107 to
->cpt_si_timerid
= from
->si_timerid
;
1108 to
->cpt_si_overrun
= from
->si_overrun
;
1109 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1111 else if (to
->si_code
== SI_USER
)
1113 to
->cpt_si_pid
= from
->si_pid
;
1114 to
->cpt_si_uid
= from
->si_uid
;
1116 else if (to
->si_code
< 0)
1118 to
->cpt_si_pid
= from
->si_pid
;
1119 to
->cpt_si_uid
= from
->si_uid
;
1120 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1124 switch (to
->si_signo
)
1127 to
->cpt_si_pid
= from
->si_pid
;
1128 to
->cpt_si_uid
= from
->si_uid
;
1129 to
->cpt_si_status
= from
->si_status
;
1130 to
->cpt_si_utime
= from
->si_utime
;
1131 to
->cpt_si_stime
= from
->si_stime
;
1137 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
1140 to
->cpt_si_band
= from
->si_band
;
1141 to
->cpt_si_fd
= from
->si_fd
;
1144 to
->cpt_si_pid
= from
->si_pid
;
1145 to
->cpt_si_uid
= from
->si_uid
;
1146 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1153 siginfo_from_compat_x32_siginfo (siginfo_t
*to
,
1154 compat_x32_siginfo_t
*from
)
1156 memset (to
, 0, sizeof (*to
));
1158 to
->si_signo
= from
->si_signo
;
1159 to
->si_errno
= from
->si_errno
;
1160 to
->si_code
= from
->si_code
;
1162 if (to
->si_code
== SI_TIMER
)
1164 to
->si_timerid
= from
->cpt_si_timerid
;
1165 to
->si_overrun
= from
->cpt_si_overrun
;
1166 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1168 else if (to
->si_code
== SI_USER
)
1170 to
->si_pid
= from
->cpt_si_pid
;
1171 to
->si_uid
= from
->cpt_si_uid
;
1173 else if (to
->si_code
< 0)
1175 to
->si_pid
= from
->cpt_si_pid
;
1176 to
->si_uid
= from
->cpt_si_uid
;
1177 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1181 switch (to
->si_signo
)
1184 to
->si_pid
= from
->cpt_si_pid
;
1185 to
->si_uid
= from
->cpt_si_uid
;
1186 to
->si_status
= from
->cpt_si_status
;
1187 to
->si_utime
= from
->cpt_si_utime
;
1188 to
->si_stime
= from
->cpt_si_stime
;
1194 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1197 to
->si_band
= from
->cpt_si_band
;
1198 to
->si_fd
= from
->cpt_si_fd
;
1201 to
->si_pid
= from
->cpt_si_pid
;
1202 to
->si_uid
= from
->cpt_si_uid
;
1203 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1209 #endif /* __x86_64__ */
1211 /* Convert a native/host siginfo object, into/from the siginfo in the
1212 layout of the inferiors' architecture. Returns true if any
1213 conversion was done; false otherwise. If DIRECTION is 1, then copy
1214 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
1218 x86_siginfo_fixup (siginfo_t
*native
, void *inf
, int direction
)
1221 unsigned int machine
;
1222 int tid
= lwpid_of (current_inferior
);
1223 int is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1225 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
1226 if (!is_64bit_tdesc ())
1228 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_siginfo_t
));
1231 compat_siginfo_from_siginfo ((struct compat_siginfo
*) inf
, native
);
1233 siginfo_from_compat_siginfo (native
, (struct compat_siginfo
*) inf
);
1237 /* No fixup for native x32 GDB. */
1238 else if (!is_elf64
&& sizeof (void *) == 8)
1240 gdb_assert (sizeof (siginfo_t
) == sizeof (compat_x32_siginfo_t
));
1243 compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo
*) inf
,
1246 siginfo_from_compat_x32_siginfo (native
,
1247 (struct compat_x32_siginfo
*) inf
);
1258 /* Format of XSAVE extended state is:
1261 fxsave_bytes[0..463]
1262 sw_usable_bytes[464..511]
1263 xstate_hdr_bytes[512..575]
1268 Same memory layout will be used for the coredump NT_X86_XSTATE
1269 representing the XSAVE extended state registers.
1271 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
1272 extended state mask, which is the same as the extended control register
1273 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
1274 together with the mask saved in the xstate_hdr_bytes to determine what
1275 states the processor/OS supports and what state, used or initialized,
1276 the process/thread is in. */
1277 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
1279 /* Does the current host support the GETFPXREGS request? The header
1280 file may or may not define it, and even if it is defined, the
1281 kernel will return EIO if it's running on a pre-SSE processor. */
1282 int have_ptrace_getfpxregs
=
1283 #ifdef HAVE_PTRACE_GETFPXREGS
1290 /* Does the current host support PTRACE_GETREGSET? */
1291 static int have_ptrace_getregset
= -1;
1293 /* Get Linux/x86 target description from running target. */
1295 static const struct target_desc
*
1296 x86_linux_read_description (void)
1298 unsigned int machine
;
1302 static uint64_t xcr0
;
1303 struct regset_info
*regset
;
1305 tid
= lwpid_of (current_inferior
);
1307 is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1309 if (sizeof (void *) == 4)
1312 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
1314 else if (machine
== EM_X86_64
)
1315 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
1319 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
1320 if (machine
== EM_386
&& have_ptrace_getfpxregs
== -1)
1322 elf_fpxregset_t fpxregs
;
1324 if (ptrace (PTRACE_GETFPXREGS
, tid
, 0, (long) &fpxregs
) < 0)
1326 have_ptrace_getfpxregs
= 0;
1327 have_ptrace_getregset
= 0;
1328 return tdesc_i386_mmx_linux
;
1331 have_ptrace_getfpxregs
= 1;
1337 x86_xcr0
= X86_XSTATE_SSE_MASK
;
1339 /* Don't use XML. */
1341 if (machine
== EM_X86_64
)
1342 return tdesc_amd64_linux_no_xml
;
1345 return tdesc_i386_linux_no_xml
;
1348 if (have_ptrace_getregset
== -1)
1350 uint64_t xstateregs
[(X86_XSTATE_SSE_SIZE
/ sizeof (uint64_t))];
1353 iov
.iov_base
= xstateregs
;
1354 iov
.iov_len
= sizeof (xstateregs
);
1356 /* Check if PTRACE_GETREGSET works. */
1357 if (ptrace (PTRACE_GETREGSET
, tid
,
1358 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
1359 have_ptrace_getregset
= 0;
1362 have_ptrace_getregset
= 1;
1364 /* Get XCR0 from XSAVE extended state. */
1365 xcr0
= xstateregs
[(I386_LINUX_XSAVE_XCR0_OFFSET
1366 / sizeof (uint64_t))];
1368 /* Use PTRACE_GETREGSET if it is available. */
1369 for (regset
= x86_regsets
;
1370 regset
->fill_function
!= NULL
; regset
++)
1371 if (regset
->get_request
== PTRACE_GETREGSET
)
1372 regset
->size
= X86_XSTATE_SIZE (xcr0
);
1373 else if (regset
->type
!= GENERAL_REGS
)
1378 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
1379 xcr0_features
= (have_ptrace_getregset
1380 && (xcr0
& X86_XSTATE_ALL_MASK
));
1385 if (machine
== EM_X86_64
)
1392 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1394 case X86_XSTATE_AVX512_MASK
:
1395 return tdesc_amd64_avx512_linux
;
1397 case X86_XSTATE_MPX_MASK
:
1398 return tdesc_amd64_mpx_linux
;
1400 case X86_XSTATE_AVX_MASK
:
1401 return tdesc_amd64_avx_linux
;
1404 return tdesc_amd64_linux
;
1408 return tdesc_amd64_linux
;
1414 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1416 case X86_XSTATE_AVX512_MASK
:
1417 return tdesc_x32_avx512_linux
;
1419 case X86_XSTATE_MPX_MASK
: /* No MPX on x32. */
1420 case X86_XSTATE_AVX_MASK
:
1421 return tdesc_x32_avx_linux
;
1424 return tdesc_x32_linux
;
1428 return tdesc_x32_linux
;
1436 switch (xcr0
& X86_XSTATE_ALL_MASK
)
1438 case (X86_XSTATE_AVX512_MASK
):
1439 return tdesc_i386_avx512_linux
;
1441 case (X86_XSTATE_MPX_MASK
):
1442 return tdesc_i386_mpx_linux
;
1444 case (X86_XSTATE_AVX_MASK
):
1445 return tdesc_i386_avx_linux
;
1448 return tdesc_i386_linux
;
1452 return tdesc_i386_linux
;
1455 gdb_assert_not_reached ("failed to return tdesc");
1458 /* Callback for find_inferior. Stops iteration when a thread with a
1459 given PID is found. */
1462 same_process_callback (struct inferior_list_entry
*entry
, void *data
)
1464 int pid
= *(int *) data
;
1466 return (ptid_get_pid (entry
->id
) == pid
);
1469 /* Callback for for_each_inferior. Calls the arch_setup routine for
1473 x86_arch_setup_process_callback (struct inferior_list_entry
*entry
)
1475 int pid
= ptid_get_pid (entry
->id
);
1477 /* Look up any thread of this processes. */
1479 = (struct thread_info
*) find_inferior (&all_threads
,
1480 same_process_callback
, &pid
);
1482 the_low_target
.arch_setup ();
1485 /* Update all the target description of all processes; a new GDB
1486 connected, and it may or not support xml target descriptions. */
1489 x86_linux_update_xmltarget (void)
1491 struct thread_info
*save_inferior
= current_inferior
;
1493 /* Before changing the register cache's internal layout, flush the
1494 contents of the current valid caches back to the threads, and
1495 release the current regcache objects. */
1496 regcache_release ();
1498 for_each_inferior (&all_processes
, x86_arch_setup_process_callback
);
1500 current_inferior
= save_inferior
;
1503 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
1504 PTRACE_GETREGSET. */
1507 x86_linux_process_qsupported (const char *query
)
1509 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
1510 with "i386" in qSupported query, it supports x86 XML target
1513 if (query
!= NULL
&& strncmp (query
, "xmlRegisters=", 13) == 0)
1515 char *copy
= xstrdup (query
+ 13);
1518 for (p
= strtok (copy
, ","); p
!= NULL
; p
= strtok (NULL
, ","))
1520 if (strcmp (p
, "i386") == 0)
1530 x86_linux_update_xmltarget ();
1533 /* Common for x86/x86-64. */
1535 static struct regsets_info x86_regsets_info
=
1537 x86_regsets
, /* regsets */
1538 0, /* num_regsets */
1539 NULL
, /* disabled_regsets */
1543 static struct regs_info amd64_linux_regs_info
=
1545 NULL
, /* regset_bitmap */
1546 NULL
, /* usrregs_info */
1550 static struct usrregs_info i386_linux_usrregs_info
=
1556 static struct regs_info i386_linux_regs_info
=
1558 NULL
, /* regset_bitmap */
1559 &i386_linux_usrregs_info
,
1563 const struct regs_info
*
1564 x86_linux_regs_info (void)
1567 if (is_64bit_tdesc ())
1568 return &amd64_linux_regs_info
;
1571 return &i386_linux_regs_info
;
1574 /* Initialize the target description for the architecture of the
1578 x86_arch_setup (void)
1580 current_process ()->tdesc
= x86_linux_read_description ();
1584 x86_supports_tracepoints (void)
1590 append_insns (CORE_ADDR
*to
, size_t len
, const unsigned char *buf
)
1592 write_inferior_memory (*to
, buf
, len
);
1597 push_opcode (unsigned char *buf
, char *op
)
1599 unsigned char *buf_org
= buf
;
1604 unsigned long ul
= strtoul (op
, &endptr
, 16);
1613 return buf
- buf_org
;
1618 /* Build a jump pad that saves registers and calls a collection
1619 function. Writes a jump instruction to the jump pad to
1620 JJUMPAD_INSN. The caller is responsible to write it in at the
1621 tracepoint address. */
1624 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1625 CORE_ADDR collector
,
1628 CORE_ADDR
*jump_entry
,
1629 CORE_ADDR
*trampoline
,
1630 ULONGEST
*trampoline_size
,
1631 unsigned char *jjump_pad_insn
,
1632 ULONGEST
*jjump_pad_insn_size
,
1633 CORE_ADDR
*adjusted_insn_addr
,
1634 CORE_ADDR
*adjusted_insn_addr_end
,
1637 unsigned char buf
[40];
1641 CORE_ADDR buildaddr
= *jump_entry
;
1643 /* Build the jump pad. */
1645 /* First, do tracepoint data collection. Save registers. */
1647 /* Need to ensure stack pointer saved first. */
1648 buf
[i
++] = 0x54; /* push %rsp */
1649 buf
[i
++] = 0x55; /* push %rbp */
1650 buf
[i
++] = 0x57; /* push %rdi */
1651 buf
[i
++] = 0x56; /* push %rsi */
1652 buf
[i
++] = 0x52; /* push %rdx */
1653 buf
[i
++] = 0x51; /* push %rcx */
1654 buf
[i
++] = 0x53; /* push %rbx */
1655 buf
[i
++] = 0x50; /* push %rax */
1656 buf
[i
++] = 0x41; buf
[i
++] = 0x57; /* push %r15 */
1657 buf
[i
++] = 0x41; buf
[i
++] = 0x56; /* push %r14 */
1658 buf
[i
++] = 0x41; buf
[i
++] = 0x55; /* push %r13 */
1659 buf
[i
++] = 0x41; buf
[i
++] = 0x54; /* push %r12 */
1660 buf
[i
++] = 0x41; buf
[i
++] = 0x53; /* push %r11 */
1661 buf
[i
++] = 0x41; buf
[i
++] = 0x52; /* push %r10 */
1662 buf
[i
++] = 0x41; buf
[i
++] = 0x51; /* push %r9 */
1663 buf
[i
++] = 0x41; buf
[i
++] = 0x50; /* push %r8 */
1664 buf
[i
++] = 0x9c; /* pushfq */
1665 buf
[i
++] = 0x48; /* movl <addr>,%rdi */
1667 *((unsigned long *)(buf
+ i
)) = (unsigned long) tpaddr
;
1668 i
+= sizeof (unsigned long);
1669 buf
[i
++] = 0x57; /* push %rdi */
1670 append_insns (&buildaddr
, i
, buf
);
1672 /* Stack space for the collecting_t object. */
1674 i
+= push_opcode (&buf
[i
], "48 83 ec 18"); /* sub $0x18,%rsp */
1675 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov <tpoint>,%rax */
1676 memcpy (buf
+ i
, &tpoint
, 8);
1678 i
+= push_opcode (&buf
[i
], "48 89 04 24"); /* mov %rax,(%rsp) */
1679 i
+= push_opcode (&buf
[i
],
1680 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1681 i
+= push_opcode (&buf
[i
], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1682 append_insns (&buildaddr
, i
, buf
);
1686 i
+= push_opcode (&buf
[i
], "48 be"); /* movl <lockaddr>,%rsi */
1687 memcpy (&buf
[i
], (void *) &lockaddr
, 8);
1689 i
+= push_opcode (&buf
[i
], "48 89 e1"); /* mov %rsp,%rcx */
1690 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1691 i
+= push_opcode (&buf
[i
], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1692 i
+= push_opcode (&buf
[i
], "48 85 c0"); /* test %rax,%rax */
1693 i
+= push_opcode (&buf
[i
], "75 f4"); /* jne <again> */
1694 append_insns (&buildaddr
, i
, buf
);
1696 /* Set up the gdb_collect call. */
1697 /* At this point, (stack pointer + 0x18) is the base of our saved
1701 i
+= push_opcode (&buf
[i
], "48 89 e6"); /* mov %rsp,%rsi */
1702 i
+= push_opcode (&buf
[i
], "48 83 c6 18"); /* add $0x18,%rsi */
1704 /* tpoint address may be 64-bit wide. */
1705 i
+= push_opcode (&buf
[i
], "48 bf"); /* movl <addr>,%rdi */
1706 memcpy (buf
+ i
, &tpoint
, 8);
1708 append_insns (&buildaddr
, i
, buf
);
1710 /* The collector function being in the shared library, may be
1711 >31-bits away off the jump pad. */
1713 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov $collector,%rax */
1714 memcpy (buf
+ i
, &collector
, 8);
1716 i
+= push_opcode (&buf
[i
], "ff d0"); /* callq *%rax */
1717 append_insns (&buildaddr
, i
, buf
);
1719 /* Clear the spin-lock. */
1721 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1722 i
+= push_opcode (&buf
[i
], "48 a3"); /* mov %rax, lockaddr */
1723 memcpy (buf
+ i
, &lockaddr
, 8);
1725 append_insns (&buildaddr
, i
, buf
);
1727 /* Remove stack that had been used for the collect_t object. */
1729 i
+= push_opcode (&buf
[i
], "48 83 c4 18"); /* add $0x18,%rsp */
1730 append_insns (&buildaddr
, i
, buf
);
1732 /* Restore register state. */
1734 buf
[i
++] = 0x48; /* add $0x8,%rsp */
1738 buf
[i
++] = 0x9d; /* popfq */
1739 buf
[i
++] = 0x41; buf
[i
++] = 0x58; /* pop %r8 */
1740 buf
[i
++] = 0x41; buf
[i
++] = 0x59; /* pop %r9 */
1741 buf
[i
++] = 0x41; buf
[i
++] = 0x5a; /* pop %r10 */
1742 buf
[i
++] = 0x41; buf
[i
++] = 0x5b; /* pop %r11 */
1743 buf
[i
++] = 0x41; buf
[i
++] = 0x5c; /* pop %r12 */
1744 buf
[i
++] = 0x41; buf
[i
++] = 0x5d; /* pop %r13 */
1745 buf
[i
++] = 0x41; buf
[i
++] = 0x5e; /* pop %r14 */
1746 buf
[i
++] = 0x41; buf
[i
++] = 0x5f; /* pop %r15 */
1747 buf
[i
++] = 0x58; /* pop %rax */
1748 buf
[i
++] = 0x5b; /* pop %rbx */
1749 buf
[i
++] = 0x59; /* pop %rcx */
1750 buf
[i
++] = 0x5a; /* pop %rdx */
1751 buf
[i
++] = 0x5e; /* pop %rsi */
1752 buf
[i
++] = 0x5f; /* pop %rdi */
1753 buf
[i
++] = 0x5d; /* pop %rbp */
1754 buf
[i
++] = 0x5c; /* pop %rsp */
1755 append_insns (&buildaddr
, i
, buf
);
1757 /* Now, adjust the original instruction to execute in the jump
1759 *adjusted_insn_addr
= buildaddr
;
1760 relocate_instruction (&buildaddr
, tpaddr
);
1761 *adjusted_insn_addr_end
= buildaddr
;
1763 /* Finally, write a jump back to the program. */
1765 loffset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1766 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1769 "E.Jump back from jump pad too far from tracepoint "
1770 "(offset 0x%" PRIx64
" > int32).", loffset
);
1774 offset
= (int) loffset
;
1775 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1776 memcpy (buf
+ 1, &offset
, 4);
1777 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1779 /* The jump pad is now built. Wire in a jump to our jump pad. This
1780 is always done last (by our caller actually), so that we can
1781 install fast tracepoints with threads running. This relies on
1782 the agent's atomic write support. */
1783 loffset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1784 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1787 "E.Jump pad too far from tracepoint "
1788 "(offset 0x%" PRIx64
" > int32).", loffset
);
1792 offset
= (int) loffset
;
1794 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1795 memcpy (buf
+ 1, &offset
, 4);
1796 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1797 *jjump_pad_insn_size
= sizeof (jump_insn
);
1799 /* Return the end address of our pad. */
1800 *jump_entry
= buildaddr
;
1805 #endif /* __x86_64__ */
1807 /* Build a jump pad that saves registers and calls a collection
1808 function. Writes a jump instruction to the jump pad to
1809 JJUMPAD_INSN. The caller is responsible to write it in at the
1810 tracepoint address. */
1813 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1814 CORE_ADDR collector
,
1817 CORE_ADDR
*jump_entry
,
1818 CORE_ADDR
*trampoline
,
1819 ULONGEST
*trampoline_size
,
1820 unsigned char *jjump_pad_insn
,
1821 ULONGEST
*jjump_pad_insn_size
,
1822 CORE_ADDR
*adjusted_insn_addr
,
1823 CORE_ADDR
*adjusted_insn_addr_end
,
1826 unsigned char buf
[0x100];
1828 CORE_ADDR buildaddr
= *jump_entry
;
1830 /* Build the jump pad. */
1832 /* First, do tracepoint data collection. Save registers. */
1834 buf
[i
++] = 0x60; /* pushad */
1835 buf
[i
++] = 0x68; /* push tpaddr aka $pc */
1836 *((int *)(buf
+ i
)) = (int) tpaddr
;
1838 buf
[i
++] = 0x9c; /* pushf */
1839 buf
[i
++] = 0x1e; /* push %ds */
1840 buf
[i
++] = 0x06; /* push %es */
1841 buf
[i
++] = 0x0f; /* push %fs */
1843 buf
[i
++] = 0x0f; /* push %gs */
1845 buf
[i
++] = 0x16; /* push %ss */
1846 buf
[i
++] = 0x0e; /* push %cs */
1847 append_insns (&buildaddr
, i
, buf
);
1849 /* Stack space for the collecting_t object. */
1851 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1853 /* Build the object. */
1854 i
+= push_opcode (&buf
[i
], "b8"); /* mov <tpoint>,%eax */
1855 memcpy (buf
+ i
, &tpoint
, 4);
1857 i
+= push_opcode (&buf
[i
], "89 04 24"); /* mov %eax,(%esp) */
1859 i
+= push_opcode (&buf
[i
], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1860 i
+= push_opcode (&buf
[i
], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1861 append_insns (&buildaddr
, i
, buf
);
1863 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1864 If we cared for it, this could be using xchg alternatively. */
1867 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1868 i
+= push_opcode (&buf
[i
], "f0 0f b1 25"); /* lock cmpxchg
1870 memcpy (&buf
[i
], (void *) &lockaddr
, 4);
1872 i
+= push_opcode (&buf
[i
], "85 c0"); /* test %eax,%eax */
1873 i
+= push_opcode (&buf
[i
], "75 f2"); /* jne <again> */
1874 append_insns (&buildaddr
, i
, buf
);
1877 /* Set up arguments to the gdb_collect call. */
1879 i
+= push_opcode (&buf
[i
], "89 e0"); /* mov %esp,%eax */
1880 i
+= push_opcode (&buf
[i
], "83 c0 08"); /* add $0x08,%eax */
1881 i
+= push_opcode (&buf
[i
], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1882 append_insns (&buildaddr
, i
, buf
);
1885 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1886 append_insns (&buildaddr
, i
, buf
);
1889 i
+= push_opcode (&buf
[i
], "c7 04 24"); /* movl <addr>,(%esp) */
1890 memcpy (&buf
[i
], (void *) &tpoint
, 4);
1892 append_insns (&buildaddr
, i
, buf
);
1894 buf
[0] = 0xe8; /* call <reladdr> */
1895 offset
= collector
- (buildaddr
+ sizeof (jump_insn
));
1896 memcpy (buf
+ 1, &offset
, 4);
1897 append_insns (&buildaddr
, 5, buf
);
1898 /* Clean up after the call. */
1899 buf
[0] = 0x83; /* add $0x8,%esp */
1902 append_insns (&buildaddr
, 3, buf
);
1905 /* Clear the spin-lock. This would need the LOCK prefix on older
1908 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1909 i
+= push_opcode (&buf
[i
], "a3"); /* mov %eax, lockaddr */
1910 memcpy (buf
+ i
, &lockaddr
, 4);
1912 append_insns (&buildaddr
, i
, buf
);
1915 /* Remove stack that had been used for the collect_t object. */
1917 i
+= push_opcode (&buf
[i
], "83 c4 08"); /* add $0x08,%esp */
1918 append_insns (&buildaddr
, i
, buf
);
1921 buf
[i
++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1924 buf
[i
++] = 0x17; /* pop %ss */
1925 buf
[i
++] = 0x0f; /* pop %gs */
1927 buf
[i
++] = 0x0f; /* pop %fs */
1929 buf
[i
++] = 0x07; /* pop %es */
1930 buf
[i
++] = 0x1f; /* pop %ds */
1931 buf
[i
++] = 0x9d; /* popf */
1932 buf
[i
++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1935 buf
[i
++] = 0x61; /* popad */
1936 append_insns (&buildaddr
, i
, buf
);
1938 /* Now, adjust the original instruction to execute in the jump
1940 *adjusted_insn_addr
= buildaddr
;
1941 relocate_instruction (&buildaddr
, tpaddr
);
1942 *adjusted_insn_addr_end
= buildaddr
;
1944 /* Write the jump back to the program. */
1945 offset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1946 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1947 memcpy (buf
+ 1, &offset
, 4);
1948 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1950 /* The jump pad is now built. Wire in a jump to our jump pad. This
1951 is always done last (by our caller actually), so that we can
1952 install fast tracepoints with threads running. This relies on
1953 the agent's atomic write support. */
1956 /* Create a trampoline. */
1957 *trampoline_size
= sizeof (jump_insn
);
1958 if (!claim_trampoline_space (*trampoline_size
, trampoline
))
1960 /* No trampoline space available. */
1962 "E.Cannot allocate trampoline space needed for fast "
1963 "tracepoints on 4-byte instructions.");
1967 offset
= *jump_entry
- (*trampoline
+ sizeof (jump_insn
));
1968 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1969 memcpy (buf
+ 1, &offset
, 4);
1970 write_inferior_memory (*trampoline
, buf
, sizeof (jump_insn
));
1972 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1973 offset
= (*trampoline
- (tpaddr
+ sizeof (small_jump_insn
))) & 0xffff;
1974 memcpy (buf
, small_jump_insn
, sizeof (small_jump_insn
));
1975 memcpy (buf
+ 2, &offset
, 2);
1976 memcpy (jjump_pad_insn
, buf
, sizeof (small_jump_insn
));
1977 *jjump_pad_insn_size
= sizeof (small_jump_insn
);
1981 /* Else use a 32-bit relative jump instruction. */
1982 offset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1983 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1984 memcpy (buf
+ 1, &offset
, 4);
1985 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1986 *jjump_pad_insn_size
= sizeof (jump_insn
);
1989 /* Return the end address of our pad. */
1990 *jump_entry
= buildaddr
;
1996 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1997 CORE_ADDR collector
,
2000 CORE_ADDR
*jump_entry
,
2001 CORE_ADDR
*trampoline
,
2002 ULONGEST
*trampoline_size
,
2003 unsigned char *jjump_pad_insn
,
2004 ULONGEST
*jjump_pad_insn_size
,
2005 CORE_ADDR
*adjusted_insn_addr
,
2006 CORE_ADDR
*adjusted_insn_addr_end
,
2010 if (is_64bit_tdesc ())
2011 return amd64_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
2012 collector
, lockaddr
,
2013 orig_size
, jump_entry
,
2014 trampoline
, trampoline_size
,
2016 jjump_pad_insn_size
,
2018 adjusted_insn_addr_end
,
2022 return i386_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
2023 collector
, lockaddr
,
2024 orig_size
, jump_entry
,
2025 trampoline
, trampoline_size
,
2027 jjump_pad_insn_size
,
2029 adjusted_insn_addr_end
,
2033 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
2037 x86_get_min_fast_tracepoint_insn_len (void)
2039 static int warned_about_fast_tracepoints
= 0;
2042 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
2043 used for fast tracepoints. */
2044 if (is_64bit_tdesc ())
2048 if (agent_loaded_p ())
2050 char errbuf
[IPA_BUFSIZ
];
2054 /* On x86, if trampolines are available, then 4-byte jump instructions
2055 with a 2-byte offset may be used, otherwise 5-byte jump instructions
2056 with a 4-byte offset are used instead. */
2057 if (have_fast_tracepoint_trampoline_buffer (errbuf
))
2061 /* GDB has no channel to explain to user why a shorter fast
2062 tracepoint is not possible, but at least make GDBserver
2063 mention that something has gone awry. */
2064 if (!warned_about_fast_tracepoints
)
2066 warning ("4-byte fast tracepoints not available; %s\n", errbuf
);
2067 warned_about_fast_tracepoints
= 1;
2074 /* Indicate that the minimum length is currently unknown since the IPA
2075 has not loaded yet. */
2081 add_insns (unsigned char *start
, int len
)
2083 CORE_ADDR buildaddr
= current_insn_ptr
;
2086 debug_printf ("Adding %d bytes of insn at %s\n",
2087 len
, paddress (buildaddr
));
2089 append_insns (&buildaddr
, len
, start
);
2090 current_insn_ptr
= buildaddr
;
2093 /* Our general strategy for emitting code is to avoid specifying raw
2094 bytes whenever possible, and instead copy a block of inline asm
2095 that is embedded in the function. This is a little messy, because
2096 we need to keep the compiler from discarding what looks like dead
2097 code, plus suppress various warnings. */
2099 #define EMIT_ASM(NAME, INSNS) \
2102 extern unsigned char start_ ## NAME, end_ ## NAME; \
2103 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
2104 __asm__ ("jmp end_" #NAME "\n" \
2105 "\t" "start_" #NAME ":" \
2107 "\t" "end_" #NAME ":"); \
2112 #define EMIT_ASM32(NAME,INSNS) \
2115 extern unsigned char start_ ## NAME, end_ ## NAME; \
2116 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
2117 __asm__ (".code32\n" \
2118 "\t" "jmp end_" #NAME "\n" \
2119 "\t" "start_" #NAME ":\n" \
2121 "\t" "end_" #NAME ":\n" \
2127 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
2134 amd64_emit_prologue (void)
2136 EMIT_ASM (amd64_prologue
,
2138 "movq %rsp,%rbp\n\t"
2139 "sub $0x20,%rsp\n\t"
2140 "movq %rdi,-8(%rbp)\n\t"
2141 "movq %rsi,-16(%rbp)");
2146 amd64_emit_epilogue (void)
2148 EMIT_ASM (amd64_epilogue
,
2149 "movq -16(%rbp),%rdi\n\t"
2150 "movq %rax,(%rdi)\n\t"
2157 amd64_emit_add (void)
2159 EMIT_ASM (amd64_add
,
2160 "add (%rsp),%rax\n\t"
2161 "lea 0x8(%rsp),%rsp");
2165 amd64_emit_sub (void)
2167 EMIT_ASM (amd64_sub
,
2168 "sub %rax,(%rsp)\n\t"
2173 amd64_emit_mul (void)
2179 amd64_emit_lsh (void)
2185 amd64_emit_rsh_signed (void)
2191 amd64_emit_rsh_unsigned (void)
2197 amd64_emit_ext (int arg
)
2202 EMIT_ASM (amd64_ext_8
,
2208 EMIT_ASM (amd64_ext_16
,
2213 EMIT_ASM (amd64_ext_32
,
2222 amd64_emit_log_not (void)
2224 EMIT_ASM (amd64_log_not
,
2225 "test %rax,%rax\n\t"
2231 amd64_emit_bit_and (void)
2233 EMIT_ASM (amd64_and
,
2234 "and (%rsp),%rax\n\t"
2235 "lea 0x8(%rsp),%rsp");
2239 amd64_emit_bit_or (void)
2242 "or (%rsp),%rax\n\t"
2243 "lea 0x8(%rsp),%rsp");
2247 amd64_emit_bit_xor (void)
2249 EMIT_ASM (amd64_xor
,
2250 "xor (%rsp),%rax\n\t"
2251 "lea 0x8(%rsp),%rsp");
2255 amd64_emit_bit_not (void)
2257 EMIT_ASM (amd64_bit_not
,
2258 "xorq $0xffffffffffffffff,%rax");
2262 amd64_emit_equal (void)
2264 EMIT_ASM (amd64_equal
,
2265 "cmp %rax,(%rsp)\n\t"
2266 "je .Lamd64_equal_true\n\t"
2268 "jmp .Lamd64_equal_end\n\t"
2269 ".Lamd64_equal_true:\n\t"
2271 ".Lamd64_equal_end:\n\t"
2272 "lea 0x8(%rsp),%rsp");
2276 amd64_emit_less_signed (void)
2278 EMIT_ASM (amd64_less_signed
,
2279 "cmp %rax,(%rsp)\n\t"
2280 "jl .Lamd64_less_signed_true\n\t"
2282 "jmp .Lamd64_less_signed_end\n\t"
2283 ".Lamd64_less_signed_true:\n\t"
2285 ".Lamd64_less_signed_end:\n\t"
2286 "lea 0x8(%rsp),%rsp");
2290 amd64_emit_less_unsigned (void)
2292 EMIT_ASM (amd64_less_unsigned
,
2293 "cmp %rax,(%rsp)\n\t"
2294 "jb .Lamd64_less_unsigned_true\n\t"
2296 "jmp .Lamd64_less_unsigned_end\n\t"
2297 ".Lamd64_less_unsigned_true:\n\t"
2299 ".Lamd64_less_unsigned_end:\n\t"
2300 "lea 0x8(%rsp),%rsp");
2304 amd64_emit_ref (int size
)
2309 EMIT_ASM (amd64_ref1
,
2313 EMIT_ASM (amd64_ref2
,
2317 EMIT_ASM (amd64_ref4
,
2318 "movl (%rax),%eax");
2321 EMIT_ASM (amd64_ref8
,
2322 "movq (%rax),%rax");
2328 amd64_emit_if_goto (int *offset_p
, int *size_p
)
2330 EMIT_ASM (amd64_if_goto
,
2334 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2342 amd64_emit_goto (int *offset_p
, int *size_p
)
2344 EMIT_ASM (amd64_goto
,
2345 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2353 amd64_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2355 int diff
= (to
- (from
+ size
));
2356 unsigned char buf
[sizeof (int)];
2364 memcpy (buf
, &diff
, sizeof (int));
2365 write_inferior_memory (from
, buf
, sizeof (int));
2369 amd64_emit_const (LONGEST num
)
2371 unsigned char buf
[16];
2373 CORE_ADDR buildaddr
= current_insn_ptr
;
2376 buf
[i
++] = 0x48; buf
[i
++] = 0xb8; /* mov $<n>,%rax */
2377 memcpy (&buf
[i
], &num
, sizeof (num
));
2379 append_insns (&buildaddr
, i
, buf
);
2380 current_insn_ptr
= buildaddr
;
2384 amd64_emit_call (CORE_ADDR fn
)
2386 unsigned char buf
[16];
2388 CORE_ADDR buildaddr
;
2391 /* The destination function being in the shared library, may be
2392 >31-bits away off the compiled code pad. */
2394 buildaddr
= current_insn_ptr
;
2396 offset64
= fn
- (buildaddr
+ 1 /* call op */ + 4 /* 32-bit offset */);
2400 if (offset64
> INT_MAX
|| offset64
< INT_MIN
)
2402 /* Offset is too large for a call. Use callq, but that requires
2403 a register, so avoid it if possible. Use r10, since it is
2404 call-clobbered, we don't have to push/pop it. */
2405 buf
[i
++] = 0x48; /* mov $fn,%r10 */
2407 memcpy (buf
+ i
, &fn
, 8);
2409 buf
[i
++] = 0xff; /* callq *%r10 */
2414 int offset32
= offset64
; /* we know we can't overflow here. */
2415 memcpy (buf
+ i
, &offset32
, 4);
2419 append_insns (&buildaddr
, i
, buf
);
2420 current_insn_ptr
= buildaddr
;
2424 amd64_emit_reg (int reg
)
2426 unsigned char buf
[16];
2428 CORE_ADDR buildaddr
;
2430 /* Assume raw_regs is still in %rdi. */
2431 buildaddr
= current_insn_ptr
;
2433 buf
[i
++] = 0xbe; /* mov $<n>,%esi */
2434 memcpy (&buf
[i
], ®
, sizeof (reg
));
2436 append_insns (&buildaddr
, i
, buf
);
2437 current_insn_ptr
= buildaddr
;
2438 amd64_emit_call (get_raw_reg_func_addr ());
2442 amd64_emit_pop (void)
2444 EMIT_ASM (amd64_pop
,
2449 amd64_emit_stack_flush (void)
2451 EMIT_ASM (amd64_stack_flush
,
2456 amd64_emit_zero_ext (int arg
)
2461 EMIT_ASM (amd64_zero_ext_8
,
2465 EMIT_ASM (amd64_zero_ext_16
,
2466 "and $0xffff,%rax");
2469 EMIT_ASM (amd64_zero_ext_32
,
2470 "mov $0xffffffff,%rcx\n\t"
2479 amd64_emit_swap (void)
2481 EMIT_ASM (amd64_swap
,
2488 amd64_emit_stack_adjust (int n
)
2490 unsigned char buf
[16];
2492 CORE_ADDR buildaddr
= current_insn_ptr
;
2495 buf
[i
++] = 0x48; /* lea $<n>(%rsp),%rsp */
2499 /* This only handles adjustments up to 16, but we don't expect any more. */
2501 append_insns (&buildaddr
, i
, buf
);
2502 current_insn_ptr
= buildaddr
;
2505 /* FN's prototype is `LONGEST(*fn)(int)'. */
2508 amd64_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2510 unsigned char buf
[16];
2512 CORE_ADDR buildaddr
;
2514 buildaddr
= current_insn_ptr
;
2516 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2517 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2519 append_insns (&buildaddr
, i
, buf
);
2520 current_insn_ptr
= buildaddr
;
2521 amd64_emit_call (fn
);
2524 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2527 amd64_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
2529 unsigned char buf
[16];
2531 CORE_ADDR buildaddr
;
2533 buildaddr
= current_insn_ptr
;
2535 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2536 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2538 append_insns (&buildaddr
, i
, buf
);
2539 current_insn_ptr
= buildaddr
;
2540 EMIT_ASM (amd64_void_call_2_a
,
2541 /* Save away a copy of the stack top. */
2543 /* Also pass top as the second argument. */
2545 amd64_emit_call (fn
);
2546 EMIT_ASM (amd64_void_call_2_b
,
2547 /* Restore the stack top, %rax may have been trashed. */
2552 amd64_emit_eq_goto (int *offset_p
, int *size_p
)
2555 "cmp %rax,(%rsp)\n\t"
2556 "jne .Lamd64_eq_fallthru\n\t"
2557 "lea 0x8(%rsp),%rsp\n\t"
2559 /* jmp, but don't trust the assembler to choose the right jump */
2560 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2561 ".Lamd64_eq_fallthru:\n\t"
2562 "lea 0x8(%rsp),%rsp\n\t"
2572 amd64_emit_ne_goto (int *offset_p
, int *size_p
)
2575 "cmp %rax,(%rsp)\n\t"
2576 "je .Lamd64_ne_fallthru\n\t"
2577 "lea 0x8(%rsp),%rsp\n\t"
2579 /* jmp, but don't trust the assembler to choose the right jump */
2580 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2581 ".Lamd64_ne_fallthru:\n\t"
2582 "lea 0x8(%rsp),%rsp\n\t"
2592 amd64_emit_lt_goto (int *offset_p
, int *size_p
)
2595 "cmp %rax,(%rsp)\n\t"
2596 "jnl .Lamd64_lt_fallthru\n\t"
2597 "lea 0x8(%rsp),%rsp\n\t"
2599 /* jmp, but don't trust the assembler to choose the right jump */
2600 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2601 ".Lamd64_lt_fallthru:\n\t"
2602 "lea 0x8(%rsp),%rsp\n\t"
2612 amd64_emit_le_goto (int *offset_p
, int *size_p
)
2615 "cmp %rax,(%rsp)\n\t"
2616 "jnle .Lamd64_le_fallthru\n\t"
2617 "lea 0x8(%rsp),%rsp\n\t"
2619 /* jmp, but don't trust the assembler to choose the right jump */
2620 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2621 ".Lamd64_le_fallthru:\n\t"
2622 "lea 0x8(%rsp),%rsp\n\t"
2632 amd64_emit_gt_goto (int *offset_p
, int *size_p
)
2635 "cmp %rax,(%rsp)\n\t"
2636 "jng .Lamd64_gt_fallthru\n\t"
2637 "lea 0x8(%rsp),%rsp\n\t"
2639 /* jmp, but don't trust the assembler to choose the right jump */
2640 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2641 ".Lamd64_gt_fallthru:\n\t"
2642 "lea 0x8(%rsp),%rsp\n\t"
2652 amd64_emit_ge_goto (int *offset_p
, int *size_p
)
2655 "cmp %rax,(%rsp)\n\t"
2656 "jnge .Lamd64_ge_fallthru\n\t"
2657 ".Lamd64_ge_jump:\n\t"
2658 "lea 0x8(%rsp),%rsp\n\t"
2660 /* jmp, but don't trust the assembler to choose the right jump */
2661 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2662 ".Lamd64_ge_fallthru:\n\t"
2663 "lea 0x8(%rsp),%rsp\n\t"
2672 struct emit_ops amd64_emit_ops
=
2674 amd64_emit_prologue
,
2675 amd64_emit_epilogue
,
2680 amd64_emit_rsh_signed
,
2681 amd64_emit_rsh_unsigned
,
2689 amd64_emit_less_signed
,
2690 amd64_emit_less_unsigned
,
2694 amd64_write_goto_address
,
2699 amd64_emit_stack_flush
,
2700 amd64_emit_zero_ext
,
2702 amd64_emit_stack_adjust
,
2703 amd64_emit_int_call_1
,
2704 amd64_emit_void_call_2
,
2713 #endif /* __x86_64__ */
2716 i386_emit_prologue (void)
2718 EMIT_ASM32 (i386_prologue
,
2722 /* At this point, the raw regs base address is at 8(%ebp), and the
2723 value pointer is at 12(%ebp). */
2727 i386_emit_epilogue (void)
2729 EMIT_ASM32 (i386_epilogue
,
2730 "mov 12(%ebp),%ecx\n\t"
2731 "mov %eax,(%ecx)\n\t"
2732 "mov %ebx,0x4(%ecx)\n\t"
2740 i386_emit_add (void)
2742 EMIT_ASM32 (i386_add
,
2743 "add (%esp),%eax\n\t"
2744 "adc 0x4(%esp),%ebx\n\t"
2745 "lea 0x8(%esp),%esp");
2749 i386_emit_sub (void)
2751 EMIT_ASM32 (i386_sub
,
2752 "subl %eax,(%esp)\n\t"
2753 "sbbl %ebx,4(%esp)\n\t"
2759 i386_emit_mul (void)
2765 i386_emit_lsh (void)
2771 i386_emit_rsh_signed (void)
2777 i386_emit_rsh_unsigned (void)
2783 i386_emit_ext (int arg
)
2788 EMIT_ASM32 (i386_ext_8
,
2791 "movl %eax,%ebx\n\t"
2795 EMIT_ASM32 (i386_ext_16
,
2797 "movl %eax,%ebx\n\t"
2801 EMIT_ASM32 (i386_ext_32
,
2802 "movl %eax,%ebx\n\t"
2811 i386_emit_log_not (void)
2813 EMIT_ASM32 (i386_log_not
,
2815 "test %eax,%eax\n\t"
2822 i386_emit_bit_and (void)
2824 EMIT_ASM32 (i386_and
,
2825 "and (%esp),%eax\n\t"
2826 "and 0x4(%esp),%ebx\n\t"
2827 "lea 0x8(%esp),%esp");
2831 i386_emit_bit_or (void)
2833 EMIT_ASM32 (i386_or
,
2834 "or (%esp),%eax\n\t"
2835 "or 0x4(%esp),%ebx\n\t"
2836 "lea 0x8(%esp),%esp");
2840 i386_emit_bit_xor (void)
2842 EMIT_ASM32 (i386_xor
,
2843 "xor (%esp),%eax\n\t"
2844 "xor 0x4(%esp),%ebx\n\t"
2845 "lea 0x8(%esp),%esp");
2849 i386_emit_bit_not (void)
2851 EMIT_ASM32 (i386_bit_not
,
2852 "xor $0xffffffff,%eax\n\t"
2853 "xor $0xffffffff,%ebx\n\t");
2857 i386_emit_equal (void)
2859 EMIT_ASM32 (i386_equal
,
2860 "cmpl %ebx,4(%esp)\n\t"
2861 "jne .Li386_equal_false\n\t"
2862 "cmpl %eax,(%esp)\n\t"
2863 "je .Li386_equal_true\n\t"
2864 ".Li386_equal_false:\n\t"
2866 "jmp .Li386_equal_end\n\t"
2867 ".Li386_equal_true:\n\t"
2869 ".Li386_equal_end:\n\t"
2871 "lea 0x8(%esp),%esp");
2875 i386_emit_less_signed (void)
2877 EMIT_ASM32 (i386_less_signed
,
2878 "cmpl %ebx,4(%esp)\n\t"
2879 "jl .Li386_less_signed_true\n\t"
2880 "jne .Li386_less_signed_false\n\t"
2881 "cmpl %eax,(%esp)\n\t"
2882 "jl .Li386_less_signed_true\n\t"
2883 ".Li386_less_signed_false:\n\t"
2885 "jmp .Li386_less_signed_end\n\t"
2886 ".Li386_less_signed_true:\n\t"
2888 ".Li386_less_signed_end:\n\t"
2890 "lea 0x8(%esp),%esp");
2894 i386_emit_less_unsigned (void)
2896 EMIT_ASM32 (i386_less_unsigned
,
2897 "cmpl %ebx,4(%esp)\n\t"
2898 "jb .Li386_less_unsigned_true\n\t"
2899 "jne .Li386_less_unsigned_false\n\t"
2900 "cmpl %eax,(%esp)\n\t"
2901 "jb .Li386_less_unsigned_true\n\t"
2902 ".Li386_less_unsigned_false:\n\t"
2904 "jmp .Li386_less_unsigned_end\n\t"
2905 ".Li386_less_unsigned_true:\n\t"
2907 ".Li386_less_unsigned_end:\n\t"
2909 "lea 0x8(%esp),%esp");
2913 i386_emit_ref (int size
)
2918 EMIT_ASM32 (i386_ref1
,
2922 EMIT_ASM32 (i386_ref2
,
2926 EMIT_ASM32 (i386_ref4
,
2927 "movl (%eax),%eax");
2930 EMIT_ASM32 (i386_ref8
,
2931 "movl 4(%eax),%ebx\n\t"
2932 "movl (%eax),%eax");
2938 i386_emit_if_goto (int *offset_p
, int *size_p
)
2940 EMIT_ASM32 (i386_if_goto
,
2946 /* Don't trust the assembler to choose the right jump */
2947 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2950 *offset_p
= 11; /* be sure that this matches the sequence above */
2956 i386_emit_goto (int *offset_p
, int *size_p
)
2958 EMIT_ASM32 (i386_goto
,
2959 /* Don't trust the assembler to choose the right jump */
2960 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2968 i386_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2970 int diff
= (to
- (from
+ size
));
2971 unsigned char buf
[sizeof (int)];
2973 /* We're only doing 4-byte sizes at the moment. */
2980 memcpy (buf
, &diff
, sizeof (int));
2981 write_inferior_memory (from
, buf
, sizeof (int));
2985 i386_emit_const (LONGEST num
)
2987 unsigned char buf
[16];
2989 CORE_ADDR buildaddr
= current_insn_ptr
;
2992 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2993 lo
= num
& 0xffffffff;
2994 memcpy (&buf
[i
], &lo
, sizeof (lo
));
2996 hi
= ((num
>> 32) & 0xffffffff);
2999 buf
[i
++] = 0xbb; /* mov $<n>,%ebx */
3000 memcpy (&buf
[i
], &hi
, sizeof (hi
));
3005 buf
[i
++] = 0x31; buf
[i
++] = 0xdb; /* xor %ebx,%ebx */
3007 append_insns (&buildaddr
, i
, buf
);
3008 current_insn_ptr
= buildaddr
;
3012 i386_emit_call (CORE_ADDR fn
)
3014 unsigned char buf
[16];
3016 CORE_ADDR buildaddr
;
3018 buildaddr
= current_insn_ptr
;
3020 buf
[i
++] = 0xe8; /* call <reladdr> */
3021 offset
= ((int) fn
) - (buildaddr
+ 5);
3022 memcpy (buf
+ 1, &offset
, 4);
3023 append_insns (&buildaddr
, 5, buf
);
3024 current_insn_ptr
= buildaddr
;
3028 i386_emit_reg (int reg
)
3030 unsigned char buf
[16];
3032 CORE_ADDR buildaddr
;
3034 EMIT_ASM32 (i386_reg_a
,
3036 buildaddr
= current_insn_ptr
;
3038 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
3039 memcpy (&buf
[i
], ®
, sizeof (reg
));
3041 append_insns (&buildaddr
, i
, buf
);
3042 current_insn_ptr
= buildaddr
;
3043 EMIT_ASM32 (i386_reg_b
,
3044 "mov %eax,4(%esp)\n\t"
3045 "mov 8(%ebp),%eax\n\t"
3047 i386_emit_call (get_raw_reg_func_addr ());
3048 EMIT_ASM32 (i386_reg_c
,
3050 "lea 0x8(%esp),%esp");
3054 i386_emit_pop (void)
3056 EMIT_ASM32 (i386_pop
,
3062 i386_emit_stack_flush (void)
3064 EMIT_ASM32 (i386_stack_flush
,
3070 i386_emit_zero_ext (int arg
)
3075 EMIT_ASM32 (i386_zero_ext_8
,
3076 "and $0xff,%eax\n\t"
3080 EMIT_ASM32 (i386_zero_ext_16
,
3081 "and $0xffff,%eax\n\t"
3085 EMIT_ASM32 (i386_zero_ext_32
,
3094 i386_emit_swap (void)
3096 EMIT_ASM32 (i386_swap
,
3106 i386_emit_stack_adjust (int n
)
3108 unsigned char buf
[16];
3110 CORE_ADDR buildaddr
= current_insn_ptr
;
3113 buf
[i
++] = 0x8d; /* lea $<n>(%esp),%esp */
3117 append_insns (&buildaddr
, i
, buf
);
3118 current_insn_ptr
= buildaddr
;
3121 /* FN's prototype is `LONGEST(*fn)(int)'. */
3124 i386_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
3126 unsigned char buf
[16];
3128 CORE_ADDR buildaddr
;
3130 EMIT_ASM32 (i386_int_call_1_a
,
3131 /* Reserve a bit of stack space. */
3133 /* Put the one argument on the stack. */
3134 buildaddr
= current_insn_ptr
;
3136 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3139 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3141 append_insns (&buildaddr
, i
, buf
);
3142 current_insn_ptr
= buildaddr
;
3143 i386_emit_call (fn
);
3144 EMIT_ASM32 (i386_int_call_1_c
,
3146 "lea 0x8(%esp),%esp");
3149 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
3152 i386_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
3154 unsigned char buf
[16];
3156 CORE_ADDR buildaddr
;
3158 EMIT_ASM32 (i386_void_call_2_a
,
3159 /* Preserve %eax only; we don't have to worry about %ebx. */
3161 /* Reserve a bit of stack space for arguments. */
3162 "sub $0x10,%esp\n\t"
3163 /* Copy "top" to the second argument position. (Note that
3164 we can't assume function won't scribble on its
3165 arguments, so don't try to restore from this.) */
3166 "mov %eax,4(%esp)\n\t"
3167 "mov %ebx,8(%esp)");
3168 /* Put the first argument on the stack. */
3169 buildaddr
= current_insn_ptr
;
3171 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3174 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3176 append_insns (&buildaddr
, i
, buf
);
3177 current_insn_ptr
= buildaddr
;
3178 i386_emit_call (fn
);
3179 EMIT_ASM32 (i386_void_call_2_b
,
3180 "lea 0x10(%esp),%esp\n\t"
3181 /* Restore original stack top. */
3187 i386_emit_eq_goto (int *offset_p
, int *size_p
)
3190 /* Check low half first, more likely to be decider */
3191 "cmpl %eax,(%esp)\n\t"
3192 "jne .Leq_fallthru\n\t"
3193 "cmpl %ebx,4(%esp)\n\t"
3194 "jne .Leq_fallthru\n\t"
3195 "lea 0x8(%esp),%esp\n\t"
3198 /* jmp, but don't trust the assembler to choose the right jump */
3199 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3200 ".Leq_fallthru:\n\t"
3201 "lea 0x8(%esp),%esp\n\t"
3212 i386_emit_ne_goto (int *offset_p
, int *size_p
)
3215 /* Check low half first, more likely to be decider */
3216 "cmpl %eax,(%esp)\n\t"
3218 "cmpl %ebx,4(%esp)\n\t"
3219 "je .Lne_fallthru\n\t"
3221 "lea 0x8(%esp),%esp\n\t"
3224 /* jmp, but don't trust the assembler to choose the right jump */
3225 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3226 ".Lne_fallthru:\n\t"
3227 "lea 0x8(%esp),%esp\n\t"
3238 i386_emit_lt_goto (int *offset_p
, int *size_p
)
3241 "cmpl %ebx,4(%esp)\n\t"
3243 "jne .Llt_fallthru\n\t"
3244 "cmpl %eax,(%esp)\n\t"
3245 "jnl .Llt_fallthru\n\t"
3247 "lea 0x8(%esp),%esp\n\t"
3250 /* jmp, but don't trust the assembler to choose the right jump */
3251 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3252 ".Llt_fallthru:\n\t"
3253 "lea 0x8(%esp),%esp\n\t"
3264 i386_emit_le_goto (int *offset_p
, int *size_p
)
3267 "cmpl %ebx,4(%esp)\n\t"
3269 "jne .Lle_fallthru\n\t"
3270 "cmpl %eax,(%esp)\n\t"
3271 "jnle .Lle_fallthru\n\t"
3273 "lea 0x8(%esp),%esp\n\t"
3276 /* jmp, but don't trust the assembler to choose the right jump */
3277 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3278 ".Lle_fallthru:\n\t"
3279 "lea 0x8(%esp),%esp\n\t"
3290 i386_emit_gt_goto (int *offset_p
, int *size_p
)
3293 "cmpl %ebx,4(%esp)\n\t"
3295 "jne .Lgt_fallthru\n\t"
3296 "cmpl %eax,(%esp)\n\t"
3297 "jng .Lgt_fallthru\n\t"
3299 "lea 0x8(%esp),%esp\n\t"
3302 /* jmp, but don't trust the assembler to choose the right jump */
3303 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3304 ".Lgt_fallthru:\n\t"
3305 "lea 0x8(%esp),%esp\n\t"
3316 i386_emit_ge_goto (int *offset_p
, int *size_p
)
3319 "cmpl %ebx,4(%esp)\n\t"
3321 "jne .Lge_fallthru\n\t"
3322 "cmpl %eax,(%esp)\n\t"
3323 "jnge .Lge_fallthru\n\t"
3325 "lea 0x8(%esp),%esp\n\t"
3328 /* jmp, but don't trust the assembler to choose the right jump */
3329 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3330 ".Lge_fallthru:\n\t"
3331 "lea 0x8(%esp),%esp\n\t"
3341 struct emit_ops i386_emit_ops
=
3349 i386_emit_rsh_signed
,
3350 i386_emit_rsh_unsigned
,
3358 i386_emit_less_signed
,
3359 i386_emit_less_unsigned
,
3363 i386_write_goto_address
,
3368 i386_emit_stack_flush
,
3371 i386_emit_stack_adjust
,
3372 i386_emit_int_call_1
,
3373 i386_emit_void_call_2
,
3383 static struct emit_ops
*
3387 if (is_64bit_tdesc ())
3388 return &amd64_emit_ops
;
3391 return &i386_emit_ops
;
3395 x86_supports_range_stepping (void)
3400 /* This is initialized assuming an amd64 target.
3401 x86_arch_setup will correct it for i386 or amd64 targets. */
3403 struct linux_target_ops the_low_target
=
3406 x86_linux_regs_info
,
3407 x86_cannot_fetch_register
,
3408 x86_cannot_store_register
,
3409 NULL
, /* fetch_register */
3417 x86_supports_z_point_type
,
3420 x86_stopped_by_watchpoint
,
3421 x86_stopped_data_address
,
3422 /* collect_ptrace_register/supply_ptrace_register are not needed in the
3423 native i386 case (no registers smaller than an xfer unit), and are not
3424 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
3427 /* need to fix up i386 siginfo if host is amd64 */
3429 x86_linux_new_process
,
3430 x86_linux_new_thread
,
3431 x86_linux_prepare_to_resume
,
3432 x86_linux_process_qsupported
,
3433 x86_supports_tracepoints
,
3434 x86_get_thread_area
,
3435 x86_install_fast_tracepoint_jump_pad
,
3437 x86_get_min_fast_tracepoint_insn_len
,
3438 x86_supports_range_stepping
,
3442 initialize_low_arch (void)
3444 /* Initialize the Linux target descriptions. */
3446 init_registers_amd64_linux ();
3447 init_registers_amd64_avx_linux ();
3448 init_registers_amd64_avx512_linux ();
3449 init_registers_amd64_mpx_linux ();
3451 init_registers_x32_linux ();
3452 init_registers_x32_avx_linux ();
3453 init_registers_x32_avx512_linux ();
3455 tdesc_amd64_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3456 copy_target_description (tdesc_amd64_linux_no_xml
, tdesc_amd64_linux
);
3457 tdesc_amd64_linux_no_xml
->xmltarget
= xmltarget_amd64_linux_no_xml
;
3459 init_registers_i386_linux ();
3460 init_registers_i386_mmx_linux ();
3461 init_registers_i386_avx_linux ();
3462 init_registers_i386_avx512_linux ();
3463 init_registers_i386_mpx_linux ();
3465 tdesc_i386_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3466 copy_target_description (tdesc_i386_linux_no_xml
, tdesc_i386_linux
);
3467 tdesc_i386_linux_no_xml
->xmltarget
= xmltarget_i386_linux_no_xml
;
3469 initialize_regsets_info (&x86_regsets_info
);