1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "linux-low.h"
28 #include "i386-xstate.h"
29 #include "elf/common.h"
31 #include "gdb_proc_service.h"
34 #include "tracepoint.h"
38 /* Defined in auto-generated file amd64-linux.c. */
39 void init_registers_amd64_linux (void);
40 extern const struct target_desc
*tdesc_amd64_linux
;
42 /* Defined in auto-generated file amd64-avx-linux.c. */
43 void init_registers_amd64_avx_linux (void);
44 extern const struct target_desc
*tdesc_amd64_avx_linux
;
46 /* Defined in auto-generated file x32-linux.c. */
47 void init_registers_x32_linux (void);
48 extern const struct target_desc
*tdesc_x32_linux
;
50 /* Defined in auto-generated file x32-avx-linux.c. */
51 void init_registers_x32_avx_linux (void);
52 extern const struct target_desc
*tdesc_x32_avx_linux
;
55 /* Defined in auto-generated file i386-linux.c. */
56 void init_registers_i386_linux (void);
57 extern const struct target_desc
*tdesc_i386_linux
;
59 /* Defined in auto-generated file i386-mmx-linux.c. */
60 void init_registers_i386_mmx_linux (void);
61 extern const struct target_desc
*tdesc_i386_mmx_linux
;
63 /* Defined in auto-generated file i386-avx-linux.c. */
64 void init_registers_i386_avx_linux (void);
65 extern const struct target_desc
*tdesc_i386_avx_linux
;
68 static struct target_desc
*tdesc_amd64_linux_no_xml
;
70 static struct target_desc
*tdesc_i386_linux_no_xml
;
73 static unsigned char jump_insn
[] = { 0xe9, 0, 0, 0, 0 };
74 static unsigned char small_jump_insn
[] = { 0x66, 0xe9, 0, 0 };
76 /* Backward compatibility for gdb without XML support. */
78 static const char *xmltarget_i386_linux_no_xml
= "@<target>\
79 <architecture>i386</architecture>\
80 <osabi>GNU/Linux</osabi>\
84 static const char *xmltarget_amd64_linux_no_xml
= "@<target>\
85 <architecture>i386:x86-64</architecture>\
86 <osabi>GNU/Linux</osabi>\
91 #include <sys/procfs.h>
92 #include <sys/ptrace.h>
95 #ifndef PTRACE_GETREGSET
96 #define PTRACE_GETREGSET 0x4204
99 #ifndef PTRACE_SETREGSET
100 #define PTRACE_SETREGSET 0x4205
104 #ifndef PTRACE_GET_THREAD_AREA
105 #define PTRACE_GET_THREAD_AREA 25
108 /* This definition comes from prctl.h, but some kernels may not have it. */
109 #ifndef PTRACE_ARCH_PRCTL
110 #define PTRACE_ARCH_PRCTL 30
113 /* The following definitions come from prctl.h, but may be absent
114 for certain configurations. */
116 #define ARCH_SET_GS 0x1001
117 #define ARCH_SET_FS 0x1002
118 #define ARCH_GET_FS 0x1003
119 #define ARCH_GET_GS 0x1004
122 /* Per-process arch-specific data we want to keep. */
124 struct arch_process_info
126 struct i386_debug_reg_state debug_reg_state
;
129 /* Per-thread arch-specific data we want to keep. */
133 /* Non-zero if our copy differs from what's recorded in the thread. */
134 int debug_registers_changed
;
139 /* Mapping between the general-purpose registers in `struct user'
140 format and GDB's register array layout.
141 Note that the transfer layout uses 64-bit regs. */
142 static /*const*/ int i386_regmap
[] =
144 RAX
* 8, RCX
* 8, RDX
* 8, RBX
* 8,
145 RSP
* 8, RBP
* 8, RSI
* 8, RDI
* 8,
146 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
147 DS
* 8, ES
* 8, FS
* 8, GS
* 8
150 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
152 /* So code below doesn't have to care, i386 or amd64. */
153 #define ORIG_EAX ORIG_RAX
155 static const int x86_64_regmap
[] =
157 RAX
* 8, RBX
* 8, RCX
* 8, RDX
* 8,
158 RSI
* 8, RDI
* 8, RBP
* 8, RSP
* 8,
159 R8
* 8, R9
* 8, R10
* 8, R11
* 8,
160 R12
* 8, R13
* 8, R14
* 8, R15
* 8,
161 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
162 DS
* 8, ES
* 8, FS
* 8, GS
* 8,
163 -1, -1, -1, -1, -1, -1, -1, -1,
164 -1, -1, -1, -1, -1, -1, -1, -1,
165 -1, -1, -1, -1, -1, -1, -1, -1,
166 -1, -1, -1, -1, -1, -1, -1, -1, -1,
170 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
172 #else /* ! __x86_64__ */
174 /* Mapping between the general-purpose registers in `struct user'
175 format and GDB's register array layout. */
176 static /*const*/ int i386_regmap
[] =
178 EAX
* 4, ECX
* 4, EDX
* 4, EBX
* 4,
179 UESP
* 4, EBP
* 4, ESI
* 4, EDI
* 4,
180 EIP
* 4, EFL
* 4, CS
* 4, SS
* 4,
181 DS
* 4, ES
* 4, FS
* 4, GS
* 4
184 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
190 /* Returns true if the current inferior belongs to a x86-64 process,
194 is_64bit_tdesc (void)
196 struct regcache
*regcache
= get_thread_regcache (current_inferior
, 0);
198 return register_size (regcache
->tdesc
, 0) == 8;
204 /* Called by libthread_db. */
207 ps_get_thread_area (const struct ps_prochandle
*ph
,
208 lwpid_t lwpid
, int idx
, void **base
)
211 int use_64bit
= is_64bit_tdesc ();
218 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
222 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
233 unsigned int desc
[4];
235 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
,
236 (void *) (intptr_t) idx
, (unsigned long) &desc
) < 0)
239 /* Ensure we properly extend the value to 64-bits for x86_64. */
240 *base
= (void *) (uintptr_t) desc
[1];
245 /* Get the thread area address. This is used to recognize which
246 thread is which when tracing with the in-process agent library. We
247 don't read anything from the address, and treat it as opaque; it's
248 the address itself that we assume is unique per-thread. */
251 x86_get_thread_area (int lwpid
, CORE_ADDR
*addr
)
254 int use_64bit
= is_64bit_tdesc ();
259 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
261 *addr
= (CORE_ADDR
) (uintptr_t) base
;
270 struct lwp_info
*lwp
= find_lwp_pid (pid_to_ptid (lwpid
));
271 struct regcache
*regcache
= get_thread_regcache (get_lwp_thread (lwp
), 1);
272 unsigned int desc
[4];
274 const int reg_thread_area
= 3; /* bits to scale down register value. */
277 collect_register_by_name (regcache
, "gs", &gs
);
279 idx
= gs
>> reg_thread_area
;
281 if (ptrace (PTRACE_GET_THREAD_AREA
,
283 (void *) (long) idx
, (unsigned long) &desc
) < 0)
294 x86_cannot_store_register (int regno
)
297 if (is_64bit_tdesc ())
301 return regno
>= I386_NUM_REGS
;
305 x86_cannot_fetch_register (int regno
)
308 if (is_64bit_tdesc ())
312 return regno
>= I386_NUM_REGS
;
316 x86_fill_gregset (struct regcache
*regcache
, void *buf
)
321 if (register_size (regcache
->tdesc
, 0) == 8)
323 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
324 if (x86_64_regmap
[i
] != -1)
325 collect_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
330 for (i
= 0; i
< I386_NUM_REGS
; i
++)
331 collect_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
333 collect_register_by_name (regcache
, "orig_eax",
334 ((char *) buf
) + ORIG_EAX
* 4);
338 x86_store_gregset (struct regcache
*regcache
, const void *buf
)
343 if (register_size (regcache
->tdesc
, 0) == 8)
345 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
346 if (x86_64_regmap
[i
] != -1)
347 supply_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
352 for (i
= 0; i
< I386_NUM_REGS
; i
++)
353 supply_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
355 supply_register_by_name (regcache
, "orig_eax",
356 ((char *) buf
) + ORIG_EAX
* 4);
360 x86_fill_fpregset (struct regcache
*regcache
, void *buf
)
363 i387_cache_to_fxsave (regcache
, buf
);
365 i387_cache_to_fsave (regcache
, buf
);
370 x86_store_fpregset (struct regcache
*regcache
, const void *buf
)
373 i387_fxsave_to_cache (regcache
, buf
);
375 i387_fsave_to_cache (regcache
, buf
);
382 x86_fill_fpxregset (struct regcache
*regcache
, void *buf
)
384 i387_cache_to_fxsave (regcache
, buf
);
388 x86_store_fpxregset (struct regcache
*regcache
, const void *buf
)
390 i387_fxsave_to_cache (regcache
, buf
);
396 x86_fill_xstateregset (struct regcache
*regcache
, void *buf
)
398 i387_cache_to_xsave (regcache
, buf
);
402 x86_store_xstateregset (struct regcache
*regcache
, const void *buf
)
404 i387_xsave_to_cache (regcache
, buf
);
407 /* ??? The non-biarch i386 case stores all the i387 regs twice.
408 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
409 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
410 doesn't work. IWBN to avoid the duplication in the case where it
411 does work. Maybe the arch_setup routine could check whether it works
412 and update the supported regsets accordingly. */
414 static struct regset_info x86_regsets
[] =
416 #ifdef HAVE_PTRACE_GETREGS
417 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, sizeof (elf_gregset_t
),
419 x86_fill_gregset
, x86_store_gregset
},
420 { PTRACE_GETREGSET
, PTRACE_SETREGSET
, NT_X86_XSTATE
, 0,
421 EXTENDED_REGS
, x86_fill_xstateregset
, x86_store_xstateregset
},
423 # ifdef HAVE_PTRACE_GETFPXREGS
424 { PTRACE_GETFPXREGS
, PTRACE_SETFPXREGS
, 0, sizeof (elf_fpxregset_t
),
426 x86_fill_fpxregset
, x86_store_fpxregset
},
429 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, sizeof (elf_fpregset_t
),
431 x86_fill_fpregset
, x86_store_fpregset
},
432 #endif /* HAVE_PTRACE_GETREGS */
433 { 0, 0, 0, -1, -1, NULL
, NULL
}
437 x86_get_pc (struct regcache
*regcache
)
439 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
444 collect_register_by_name (regcache
, "rip", &pc
);
445 return (CORE_ADDR
) pc
;
450 collect_register_by_name (regcache
, "eip", &pc
);
451 return (CORE_ADDR
) pc
;
456 x86_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
458 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
462 unsigned long newpc
= pc
;
463 supply_register_by_name (regcache
, "rip", &newpc
);
467 unsigned int newpc
= pc
;
468 supply_register_by_name (regcache
, "eip", &newpc
);
472 static const unsigned char x86_breakpoint
[] = { 0xCC };
473 #define x86_breakpoint_len 1
476 x86_breakpoint_at (CORE_ADDR pc
)
480 (*the_target
->read_memory
) (pc
, &c
, 1);
487 /* Support for debug registers. */
490 x86_linux_dr_get (ptid_t ptid
, int regnum
)
495 tid
= ptid_get_lwp (ptid
);
498 value
= ptrace (PTRACE_PEEKUSER
, tid
,
499 offsetof (struct user
, u_debugreg
[regnum
]), 0);
501 error ("Couldn't read debug register");
507 x86_linux_dr_set (ptid_t ptid
, int regnum
, unsigned long value
)
511 tid
= ptid_get_lwp (ptid
);
514 ptrace (PTRACE_POKEUSER
, tid
,
515 offsetof (struct user
, u_debugreg
[regnum
]), value
);
517 error ("Couldn't write debug register");
521 update_debug_registers_callback (struct inferior_list_entry
*entry
,
524 struct lwp_info
*lwp
= (struct lwp_info
*) entry
;
525 int pid
= *(int *) pid_p
;
527 /* Only update the threads of this process. */
528 if (pid_of (lwp
) == pid
)
530 /* The actual update is done later just before resuming the lwp,
531 we just mark that the registers need updating. */
532 lwp
->arch_private
->debug_registers_changed
= 1;
534 /* If the lwp isn't stopped, force it to momentarily pause, so
535 we can update its debug registers. */
537 linux_stop_lwp (lwp
);
543 /* Update the inferior's debug register REGNUM from STATE. */
546 i386_dr_low_set_addr (const struct i386_debug_reg_state
*state
, int regnum
)
548 /* Only update the threads of this process. */
549 int pid
= pid_of (get_thread_lwp (current_inferior
));
551 if (! (regnum
>= 0 && regnum
<= DR_LASTADDR
- DR_FIRSTADDR
))
552 fatal ("Invalid debug register %d", regnum
);
554 find_inferior (&all_lwps
, update_debug_registers_callback
, &pid
);
557 /* Return the inferior's debug register REGNUM. */
560 i386_dr_low_get_addr (int regnum
)
562 struct lwp_info
*lwp
= get_thread_lwp (current_inferior
);
563 ptid_t ptid
= ptid_of (lwp
);
565 /* DR6 and DR7 are retrieved with some other way. */
566 gdb_assert (DR_FIRSTADDR
<= regnum
&& regnum
<= DR_LASTADDR
);
568 return x86_linux_dr_get (ptid
, regnum
);
571 /* Update the inferior's DR7 debug control register from STATE. */
574 i386_dr_low_set_control (const struct i386_debug_reg_state
*state
)
576 /* Only update the threads of this process. */
577 int pid
= pid_of (get_thread_lwp (current_inferior
));
579 find_inferior (&all_lwps
, update_debug_registers_callback
, &pid
);
582 /* Return the inferior's DR7 debug control register. */
585 i386_dr_low_get_control (void)
587 struct lwp_info
*lwp
= get_thread_lwp (current_inferior
);
588 ptid_t ptid
= ptid_of (lwp
);
590 return x86_linux_dr_get (ptid
, DR_CONTROL
);
593 /* Get the value of the DR6 debug status register from the inferior
594 and record it in STATE. */
597 i386_dr_low_get_status (void)
599 struct lwp_info
*lwp
= get_thread_lwp (current_inferior
);
600 ptid_t ptid
= ptid_of (lwp
);
602 return x86_linux_dr_get (ptid
, DR_STATUS
);
605 /* Breakpoint/Watchpoint support. */
608 x86_insert_point (char type
, CORE_ADDR addr
, int len
)
610 struct process_info
*proc
= current_process ();
613 case '0': /* software-breakpoint */
617 ret
= prepare_to_access_memory ();
620 ret
= set_gdb_breakpoint_at (addr
);
621 done_accessing_memory ();
624 case '1': /* hardware-breakpoint */
625 case '2': /* write watchpoint */
626 case '3': /* read watchpoint */
627 case '4': /* access watchpoint */
628 return i386_low_insert_watchpoint (&proc
->private->arch_private
->debug_reg_state
,
638 x86_remove_point (char type
, CORE_ADDR addr
, int len
)
640 struct process_info
*proc
= current_process ();
643 case '0': /* software-breakpoint */
647 ret
= prepare_to_access_memory ();
650 ret
= delete_gdb_breakpoint_at (addr
);
651 done_accessing_memory ();
654 case '1': /* hardware-breakpoint */
655 case '2': /* write watchpoint */
656 case '3': /* read watchpoint */
657 case '4': /* access watchpoint */
658 return i386_low_remove_watchpoint (&proc
->private->arch_private
->debug_reg_state
,
667 x86_stopped_by_watchpoint (void)
669 struct process_info
*proc
= current_process ();
670 return i386_low_stopped_by_watchpoint (&proc
->private->arch_private
->debug_reg_state
);
674 x86_stopped_data_address (void)
676 struct process_info
*proc
= current_process ();
678 if (i386_low_stopped_data_address (&proc
->private->arch_private
->debug_reg_state
,
684 /* Called when a new process is created. */
686 static struct arch_process_info
*
687 x86_linux_new_process (void)
689 struct arch_process_info
*info
= xcalloc (1, sizeof (*info
));
691 i386_low_init_dregs (&info
->debug_reg_state
);
696 /* Called when a new thread is detected. */
698 static struct arch_lwp_info
*
699 x86_linux_new_thread (void)
701 struct arch_lwp_info
*info
= xcalloc (1, sizeof (*info
));
703 info
->debug_registers_changed
= 1;
708 /* Called when resuming a thread.
709 If the debug regs have changed, update the thread's copies. */
712 x86_linux_prepare_to_resume (struct lwp_info
*lwp
)
714 ptid_t ptid
= ptid_of (lwp
);
715 int clear_status
= 0;
717 if (lwp
->arch_private
->debug_registers_changed
)
720 int pid
= ptid_get_pid (ptid
);
721 struct process_info
*proc
= find_process_pid (pid
);
722 struct i386_debug_reg_state
*state
723 = &proc
->private->arch_private
->debug_reg_state
;
725 for (i
= DR_FIRSTADDR
; i
<= DR_LASTADDR
; i
++)
726 if (state
->dr_ref_count
[i
] > 0)
728 x86_linux_dr_set (ptid
, i
, state
->dr_mirror
[i
]);
730 /* If we're setting a watchpoint, any change the inferior
731 had done itself to the debug registers needs to be
732 discarded, otherwise, i386_low_stopped_data_address can
737 x86_linux_dr_set (ptid
, DR_CONTROL
, state
->dr_control_mirror
);
739 lwp
->arch_private
->debug_registers_changed
= 0;
742 if (clear_status
|| lwp
->stopped_by_watchpoint
)
743 x86_linux_dr_set (ptid
, DR_STATUS
, 0);
746 /* When GDBSERVER is built as a 64-bit application on linux, the
747 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
748 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
749 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
750 conversion in-place ourselves. */
752 /* These types below (compat_*) define a siginfo type that is layout
753 compatible with the siginfo type exported by the 32-bit userspace
758 typedef int compat_int_t
;
759 typedef unsigned int compat_uptr_t
;
761 typedef int compat_time_t
;
762 typedef int compat_timer_t
;
763 typedef int compat_clock_t
;
765 struct compat_timeval
767 compat_time_t tv_sec
;
771 typedef union compat_sigval
773 compat_int_t sival_int
;
774 compat_uptr_t sival_ptr
;
777 typedef struct compat_siginfo
785 int _pad
[((128 / sizeof (int)) - 3)];
794 /* POSIX.1b timers */
799 compat_sigval_t _sigval
;
802 /* POSIX.1b signals */
807 compat_sigval_t _sigval
;
816 compat_clock_t _utime
;
817 compat_clock_t _stime
;
820 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
835 /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
836 typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t
;
838 typedef struct compat_x32_siginfo
846 int _pad
[((128 / sizeof (int)) - 3)];
855 /* POSIX.1b timers */
860 compat_sigval_t _sigval
;
863 /* POSIX.1b signals */
868 compat_sigval_t _sigval
;
877 compat_x32_clock_t _utime
;
878 compat_x32_clock_t _stime
;
881 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
894 } compat_x32_siginfo_t
__attribute__ ((__aligned__ (8)));
896 #define cpt_si_pid _sifields._kill._pid
897 #define cpt_si_uid _sifields._kill._uid
898 #define cpt_si_timerid _sifields._timer._tid
899 #define cpt_si_overrun _sifields._timer._overrun
900 #define cpt_si_status _sifields._sigchld._status
901 #define cpt_si_utime _sifields._sigchld._utime
902 #define cpt_si_stime _sifields._sigchld._stime
903 #define cpt_si_ptr _sifields._rt._sigval.sival_ptr
904 #define cpt_si_addr _sifields._sigfault._addr
905 #define cpt_si_band _sifields._sigpoll._band
906 #define cpt_si_fd _sifields._sigpoll._fd
908 /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
909 In their place is si_timer1,si_timer2. */
911 #define si_timerid si_timer1
914 #define si_overrun si_timer2
918 compat_siginfo_from_siginfo (compat_siginfo_t
*to
, siginfo_t
*from
)
920 memset (to
, 0, sizeof (*to
));
922 to
->si_signo
= from
->si_signo
;
923 to
->si_errno
= from
->si_errno
;
924 to
->si_code
= from
->si_code
;
926 if (to
->si_code
== SI_TIMER
)
928 to
->cpt_si_timerid
= from
->si_timerid
;
929 to
->cpt_si_overrun
= from
->si_overrun
;
930 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
932 else if (to
->si_code
== SI_USER
)
934 to
->cpt_si_pid
= from
->si_pid
;
935 to
->cpt_si_uid
= from
->si_uid
;
937 else if (to
->si_code
< 0)
939 to
->cpt_si_pid
= from
->si_pid
;
940 to
->cpt_si_uid
= from
->si_uid
;
941 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
945 switch (to
->si_signo
)
948 to
->cpt_si_pid
= from
->si_pid
;
949 to
->cpt_si_uid
= from
->si_uid
;
950 to
->cpt_si_status
= from
->si_status
;
951 to
->cpt_si_utime
= from
->si_utime
;
952 to
->cpt_si_stime
= from
->si_stime
;
958 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
961 to
->cpt_si_band
= from
->si_band
;
962 to
->cpt_si_fd
= from
->si_fd
;
965 to
->cpt_si_pid
= from
->si_pid
;
966 to
->cpt_si_uid
= from
->si_uid
;
967 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
974 siginfo_from_compat_siginfo (siginfo_t
*to
, compat_siginfo_t
*from
)
976 memset (to
, 0, sizeof (*to
));
978 to
->si_signo
= from
->si_signo
;
979 to
->si_errno
= from
->si_errno
;
980 to
->si_code
= from
->si_code
;
982 if (to
->si_code
== SI_TIMER
)
984 to
->si_timerid
= from
->cpt_si_timerid
;
985 to
->si_overrun
= from
->cpt_si_overrun
;
986 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
988 else if (to
->si_code
== SI_USER
)
990 to
->si_pid
= from
->cpt_si_pid
;
991 to
->si_uid
= from
->cpt_si_uid
;
993 else if (to
->si_code
< 0)
995 to
->si_pid
= from
->cpt_si_pid
;
996 to
->si_uid
= from
->cpt_si_uid
;
997 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1001 switch (to
->si_signo
)
1004 to
->si_pid
= from
->cpt_si_pid
;
1005 to
->si_uid
= from
->cpt_si_uid
;
1006 to
->si_status
= from
->cpt_si_status
;
1007 to
->si_utime
= from
->cpt_si_utime
;
1008 to
->si_stime
= from
->cpt_si_stime
;
1014 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1017 to
->si_band
= from
->cpt_si_band
;
1018 to
->si_fd
= from
->cpt_si_fd
;
1021 to
->si_pid
= from
->cpt_si_pid
;
1022 to
->si_uid
= from
->cpt_si_uid
;
1023 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1030 compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t
*to
,
1033 memset (to
, 0, sizeof (*to
));
1035 to
->si_signo
= from
->si_signo
;
1036 to
->si_errno
= from
->si_errno
;
1037 to
->si_code
= from
->si_code
;
1039 if (to
->si_code
== SI_TIMER
)
1041 to
->cpt_si_timerid
= from
->si_timerid
;
1042 to
->cpt_si_overrun
= from
->si_overrun
;
1043 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1045 else if (to
->si_code
== SI_USER
)
1047 to
->cpt_si_pid
= from
->si_pid
;
1048 to
->cpt_si_uid
= from
->si_uid
;
1050 else if (to
->si_code
< 0)
1052 to
->cpt_si_pid
= from
->si_pid
;
1053 to
->cpt_si_uid
= from
->si_uid
;
1054 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1058 switch (to
->si_signo
)
1061 to
->cpt_si_pid
= from
->si_pid
;
1062 to
->cpt_si_uid
= from
->si_uid
;
1063 to
->cpt_si_status
= from
->si_status
;
1064 to
->cpt_si_utime
= from
->si_utime
;
1065 to
->cpt_si_stime
= from
->si_stime
;
1071 to
->cpt_si_addr
= (intptr_t) from
->si_addr
;
1074 to
->cpt_si_band
= from
->si_band
;
1075 to
->cpt_si_fd
= from
->si_fd
;
1078 to
->cpt_si_pid
= from
->si_pid
;
1079 to
->cpt_si_uid
= from
->si_uid
;
1080 to
->cpt_si_ptr
= (intptr_t) from
->si_ptr
;
1087 siginfo_from_compat_x32_siginfo (siginfo_t
*to
,
1088 compat_x32_siginfo_t
*from
)
1090 memset (to
, 0, sizeof (*to
));
1092 to
->si_signo
= from
->si_signo
;
1093 to
->si_errno
= from
->si_errno
;
1094 to
->si_code
= from
->si_code
;
1096 if (to
->si_code
== SI_TIMER
)
1098 to
->si_timerid
= from
->cpt_si_timerid
;
1099 to
->si_overrun
= from
->cpt_si_overrun
;
1100 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1102 else if (to
->si_code
== SI_USER
)
1104 to
->si_pid
= from
->cpt_si_pid
;
1105 to
->si_uid
= from
->cpt_si_uid
;
1107 else if (to
->si_code
< 0)
1109 to
->si_pid
= from
->cpt_si_pid
;
1110 to
->si_uid
= from
->cpt_si_uid
;
1111 to
->si_ptr
= (void *) (intptr_t) from
->cpt_si_ptr
;
1115 switch (to
->si_signo
)
1118 to
->si_pid
= from
->cpt_si_pid
;
1119 to
->si_uid
= from
->cpt_si_uid
;
1120 to
->si_status
= from
->cpt_si_status
;
1121 to
->si_utime
= from
->cpt_si_utime
;
1122 to
->si_stime
= from
->cpt_si_stime
;
1128 to
->si_addr
= (void *) (intptr_t) from
->cpt_si_addr
;
1131 to
->si_band
= from
->cpt_si_band
;
1132 to
->si_fd
= from
->cpt_si_fd
;
1135 to
->si_pid
= from
->cpt_si_pid
;
1136 to
->si_uid
= from
->cpt_si_uid
;
1137 to
->si_ptr
= (void* ) (intptr_t) from
->cpt_si_ptr
;
1143 #endif /* __x86_64__ */
1145 /* Convert a native/host siginfo object, into/from the siginfo in the
1146 layout of the inferiors' architecture. Returns true if any
1147 conversion was done; false otherwise. If DIRECTION is 1, then copy
1148 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
1152 x86_siginfo_fixup (siginfo_t
*native
, void *inf
, int direction
)
1155 unsigned int machine
;
1156 int tid
= lwpid_of (get_thread_lwp (current_inferior
));
1157 int is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1159 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
1160 if (!is_64bit_tdesc ())
1162 if (sizeof (siginfo_t
) != sizeof (compat_siginfo_t
))
1163 fatal ("unexpected difference in siginfo");
1166 compat_siginfo_from_siginfo ((struct compat_siginfo
*) inf
, native
);
1168 siginfo_from_compat_siginfo (native
, (struct compat_siginfo
*) inf
);
1172 /* No fixup for native x32 GDB. */
1173 else if (!is_elf64
&& sizeof (void *) == 8)
1175 if (sizeof (siginfo_t
) != sizeof (compat_x32_siginfo_t
))
1176 fatal ("unexpected difference in siginfo");
1179 compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo
*) inf
,
1182 siginfo_from_compat_x32_siginfo (native
,
1183 (struct compat_x32_siginfo
*) inf
);
1194 /* Format of XSAVE extended state is:
1197 fxsave_bytes[0..463]
1198 sw_usable_bytes[464..511]
1199 xstate_hdr_bytes[512..575]
1204 Same memory layout will be used for the coredump NT_X86_XSTATE
1205 representing the XSAVE extended state registers.
1207 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
1208 extended state mask, which is the same as the extended control register
1209 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
1210 together with the mask saved in the xstate_hdr_bytes to determine what
1211 states the processor/OS supports and what state, used or initialized,
1212 the process/thread is in. */
1213 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
1215 /* Does the current host support the GETFPXREGS request? The header
1216 file may or may not define it, and even if it is defined, the
1217 kernel will return EIO if it's running on a pre-SSE processor. */
1218 int have_ptrace_getfpxregs
=
1219 #ifdef HAVE_PTRACE_GETFPXREGS
1226 /* Does the current host support PTRACE_GETREGSET? */
1227 static int have_ptrace_getregset
= -1;
1229 /* Get Linux/x86 target description from running target. */
1231 static const struct target_desc
*
1232 x86_linux_read_description (void)
1234 unsigned int machine
;
1238 static uint64_t xcr0
;
1239 struct regset_info
*regset
;
1241 tid
= lwpid_of (get_thread_lwp (current_inferior
));
1243 is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
1245 if (sizeof (void *) == 4)
1248 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
1250 else if (machine
== EM_X86_64
)
1251 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
1255 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
1256 if (machine
== EM_386
&& have_ptrace_getfpxregs
== -1)
1258 elf_fpxregset_t fpxregs
;
1260 if (ptrace (PTRACE_GETFPXREGS
, tid
, 0, (long) &fpxregs
) < 0)
1262 have_ptrace_getfpxregs
= 0;
1263 have_ptrace_getregset
= 0;
1264 return tdesc_i386_mmx_linux
;
1267 have_ptrace_getfpxregs
= 1;
1273 x86_xcr0
= I386_XSTATE_SSE_MASK
;
1275 /* Don't use XML. */
1277 if (machine
== EM_X86_64
)
1278 return tdesc_amd64_linux_no_xml
;
1281 return tdesc_i386_linux_no_xml
;
1284 if (have_ptrace_getregset
== -1)
1286 uint64_t xstateregs
[(I386_XSTATE_SSE_SIZE
/ sizeof (uint64_t))];
1289 iov
.iov_base
= xstateregs
;
1290 iov
.iov_len
= sizeof (xstateregs
);
1292 /* Check if PTRACE_GETREGSET works. */
1293 if (ptrace (PTRACE_GETREGSET
, tid
,
1294 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
1295 have_ptrace_getregset
= 0;
1298 have_ptrace_getregset
= 1;
1300 /* Get XCR0 from XSAVE extended state. */
1301 xcr0
= xstateregs
[(I386_LINUX_XSAVE_XCR0_OFFSET
1302 / sizeof (uint64_t))];
1304 /* Use PTRACE_GETREGSET if it is available. */
1305 for (regset
= x86_regsets
;
1306 regset
->fill_function
!= NULL
; regset
++)
1307 if (regset
->get_request
== PTRACE_GETREGSET
)
1308 regset
->size
= I386_XSTATE_SIZE (xcr0
);
1309 else if (regset
->type
!= GENERAL_REGS
)
1314 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
1315 avx
= (have_ptrace_getregset
1316 && (xcr0
& I386_XSTATE_AVX_MASK
) == I386_XSTATE_AVX_MASK
);
1318 /* AVX is the highest feature we support. */
1322 if (machine
== EM_X86_64
)
1328 return tdesc_x32_avx_linux
;
1330 return tdesc_amd64_avx_linux
;
1335 return tdesc_x32_linux
;
1337 return tdesc_amd64_linux
;
1344 return tdesc_i386_avx_linux
;
1346 return tdesc_i386_linux
;
1349 gdb_assert_not_reached ("failed to return tdesc");
1352 /* Callback for find_inferior. Stops iteration when a thread with a
1353 given PID is found. */
1356 same_process_callback (struct inferior_list_entry
*entry
, void *data
)
1358 int pid
= *(int *) data
;
1360 return (ptid_get_pid (entry
->id
) == pid
);
1363 /* Callback for for_each_inferior. Calls the arch_setup routine for
1367 x86_arch_setup_process_callback (struct inferior_list_entry
*entry
)
1369 int pid
= ptid_get_pid (entry
->id
);
1371 /* Look up any thread of this processes. */
1373 = (struct thread_info
*) find_inferior (&all_threads
,
1374 same_process_callback
, &pid
);
1376 the_low_target
.arch_setup ();
1379 /* Update all the target description of all processes; a new GDB
1380 connected, and it may or not support xml target descriptions. */
1383 x86_linux_update_xmltarget (void)
1385 struct thread_info
*save_inferior
= current_inferior
;
1387 /* Before changing the register cache's internal layout, flush the
1388 contents of the current valid caches back to the threads, and
1389 release the current regcache objects. */
1390 regcache_release ();
1392 for_each_inferior (&all_processes
, x86_arch_setup_process_callback
);
1394 current_inferior
= save_inferior
;
1397 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
1398 PTRACE_GETREGSET. */
1401 x86_linux_process_qsupported (const char *query
)
1403 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
1404 with "i386" in qSupported query, it supports x86 XML target
1407 if (query
!= NULL
&& strncmp (query
, "xmlRegisters=", 13) == 0)
1409 char *copy
= xstrdup (query
+ 13);
1412 for (p
= strtok (copy
, ","); p
!= NULL
; p
= strtok (NULL
, ","))
1414 if (strcmp (p
, "i386") == 0)
1424 x86_linux_update_xmltarget ();
1427 /* Common for x86/x86-64. */
1429 static struct regsets_info x86_regsets_info
=
1431 x86_regsets
, /* regsets */
1432 0, /* num_regsets */
1433 NULL
, /* disabled_regsets */
1437 static struct regs_info amd64_linux_regs_info
=
1439 NULL
, /* regset_bitmap */
1440 NULL
, /* usrregs_info */
1444 static struct usrregs_info i386_linux_usrregs_info
=
1450 static struct regs_info i386_linux_regs_info
=
1452 NULL
, /* regset_bitmap */
1453 &i386_linux_usrregs_info
,
1457 const struct regs_info
*
1458 x86_linux_regs_info (void)
1461 if (is_64bit_tdesc ())
1462 return &amd64_linux_regs_info
;
1465 return &i386_linux_regs_info
;
1468 /* Initialize the target description for the architecture of the
1472 x86_arch_setup (void)
1474 current_process ()->tdesc
= x86_linux_read_description ();
1478 x86_supports_tracepoints (void)
1484 append_insns (CORE_ADDR
*to
, size_t len
, const unsigned char *buf
)
1486 write_inferior_memory (*to
, buf
, len
);
1491 push_opcode (unsigned char *buf
, char *op
)
1493 unsigned char *buf_org
= buf
;
1498 unsigned long ul
= strtoul (op
, &endptr
, 16);
1507 return buf
- buf_org
;
1512 /* Build a jump pad that saves registers and calls a collection
1513 function. Writes a jump instruction to the jump pad to
1514 JJUMPAD_INSN. The caller is responsible to write it in at the
1515 tracepoint address. */
1518 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1519 CORE_ADDR collector
,
1522 CORE_ADDR
*jump_entry
,
1523 CORE_ADDR
*trampoline
,
1524 ULONGEST
*trampoline_size
,
1525 unsigned char *jjump_pad_insn
,
1526 ULONGEST
*jjump_pad_insn_size
,
1527 CORE_ADDR
*adjusted_insn_addr
,
1528 CORE_ADDR
*adjusted_insn_addr_end
,
1531 unsigned char buf
[40];
1535 CORE_ADDR buildaddr
= *jump_entry
;
1537 /* Build the jump pad. */
1539 /* First, do tracepoint data collection. Save registers. */
1541 /* Need to ensure stack pointer saved first. */
1542 buf
[i
++] = 0x54; /* push %rsp */
1543 buf
[i
++] = 0x55; /* push %rbp */
1544 buf
[i
++] = 0x57; /* push %rdi */
1545 buf
[i
++] = 0x56; /* push %rsi */
1546 buf
[i
++] = 0x52; /* push %rdx */
1547 buf
[i
++] = 0x51; /* push %rcx */
1548 buf
[i
++] = 0x53; /* push %rbx */
1549 buf
[i
++] = 0x50; /* push %rax */
1550 buf
[i
++] = 0x41; buf
[i
++] = 0x57; /* push %r15 */
1551 buf
[i
++] = 0x41; buf
[i
++] = 0x56; /* push %r14 */
1552 buf
[i
++] = 0x41; buf
[i
++] = 0x55; /* push %r13 */
1553 buf
[i
++] = 0x41; buf
[i
++] = 0x54; /* push %r12 */
1554 buf
[i
++] = 0x41; buf
[i
++] = 0x53; /* push %r11 */
1555 buf
[i
++] = 0x41; buf
[i
++] = 0x52; /* push %r10 */
1556 buf
[i
++] = 0x41; buf
[i
++] = 0x51; /* push %r9 */
1557 buf
[i
++] = 0x41; buf
[i
++] = 0x50; /* push %r8 */
1558 buf
[i
++] = 0x9c; /* pushfq */
1559 buf
[i
++] = 0x48; /* movl <addr>,%rdi */
1561 *((unsigned long *)(buf
+ i
)) = (unsigned long) tpaddr
;
1562 i
+= sizeof (unsigned long);
1563 buf
[i
++] = 0x57; /* push %rdi */
1564 append_insns (&buildaddr
, i
, buf
);
1566 /* Stack space for the collecting_t object. */
1568 i
+= push_opcode (&buf
[i
], "48 83 ec 18"); /* sub $0x18,%rsp */
1569 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov <tpoint>,%rax */
1570 memcpy (buf
+ i
, &tpoint
, 8);
1572 i
+= push_opcode (&buf
[i
], "48 89 04 24"); /* mov %rax,(%rsp) */
1573 i
+= push_opcode (&buf
[i
],
1574 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1575 i
+= push_opcode (&buf
[i
], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1576 append_insns (&buildaddr
, i
, buf
);
1580 i
+= push_opcode (&buf
[i
], "48 be"); /* movl <lockaddr>,%rsi */
1581 memcpy (&buf
[i
], (void *) &lockaddr
, 8);
1583 i
+= push_opcode (&buf
[i
], "48 89 e1"); /* mov %rsp,%rcx */
1584 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1585 i
+= push_opcode (&buf
[i
], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1586 i
+= push_opcode (&buf
[i
], "48 85 c0"); /* test %rax,%rax */
1587 i
+= push_opcode (&buf
[i
], "75 f4"); /* jne <again> */
1588 append_insns (&buildaddr
, i
, buf
);
1590 /* Set up the gdb_collect call. */
1591 /* At this point, (stack pointer + 0x18) is the base of our saved
1595 i
+= push_opcode (&buf
[i
], "48 89 e6"); /* mov %rsp,%rsi */
1596 i
+= push_opcode (&buf
[i
], "48 83 c6 18"); /* add $0x18,%rsi */
1598 /* tpoint address may be 64-bit wide. */
1599 i
+= push_opcode (&buf
[i
], "48 bf"); /* movl <addr>,%rdi */
1600 memcpy (buf
+ i
, &tpoint
, 8);
1602 append_insns (&buildaddr
, i
, buf
);
1604 /* The collector function being in the shared library, may be
1605 >31-bits away off the jump pad. */
1607 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov $collector,%rax */
1608 memcpy (buf
+ i
, &collector
, 8);
1610 i
+= push_opcode (&buf
[i
], "ff d0"); /* callq *%rax */
1611 append_insns (&buildaddr
, i
, buf
);
1613 /* Clear the spin-lock. */
1615 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1616 i
+= push_opcode (&buf
[i
], "48 a3"); /* mov %rax, lockaddr */
1617 memcpy (buf
+ i
, &lockaddr
, 8);
1619 append_insns (&buildaddr
, i
, buf
);
1621 /* Remove stack that had been used for the collect_t object. */
1623 i
+= push_opcode (&buf
[i
], "48 83 c4 18"); /* add $0x18,%rsp */
1624 append_insns (&buildaddr
, i
, buf
);
1626 /* Restore register state. */
1628 buf
[i
++] = 0x48; /* add $0x8,%rsp */
1632 buf
[i
++] = 0x9d; /* popfq */
1633 buf
[i
++] = 0x41; buf
[i
++] = 0x58; /* pop %r8 */
1634 buf
[i
++] = 0x41; buf
[i
++] = 0x59; /* pop %r9 */
1635 buf
[i
++] = 0x41; buf
[i
++] = 0x5a; /* pop %r10 */
1636 buf
[i
++] = 0x41; buf
[i
++] = 0x5b; /* pop %r11 */
1637 buf
[i
++] = 0x41; buf
[i
++] = 0x5c; /* pop %r12 */
1638 buf
[i
++] = 0x41; buf
[i
++] = 0x5d; /* pop %r13 */
1639 buf
[i
++] = 0x41; buf
[i
++] = 0x5e; /* pop %r14 */
1640 buf
[i
++] = 0x41; buf
[i
++] = 0x5f; /* pop %r15 */
1641 buf
[i
++] = 0x58; /* pop %rax */
1642 buf
[i
++] = 0x5b; /* pop %rbx */
1643 buf
[i
++] = 0x59; /* pop %rcx */
1644 buf
[i
++] = 0x5a; /* pop %rdx */
1645 buf
[i
++] = 0x5e; /* pop %rsi */
1646 buf
[i
++] = 0x5f; /* pop %rdi */
1647 buf
[i
++] = 0x5d; /* pop %rbp */
1648 buf
[i
++] = 0x5c; /* pop %rsp */
1649 append_insns (&buildaddr
, i
, buf
);
1651 /* Now, adjust the original instruction to execute in the jump
1653 *adjusted_insn_addr
= buildaddr
;
1654 relocate_instruction (&buildaddr
, tpaddr
);
1655 *adjusted_insn_addr_end
= buildaddr
;
1657 /* Finally, write a jump back to the program. */
1659 loffset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1660 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1663 "E.Jump back from jump pad too far from tracepoint "
1664 "(offset 0x%" PRIx64
" > int32).", loffset
);
1668 offset
= (int) loffset
;
1669 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1670 memcpy (buf
+ 1, &offset
, 4);
1671 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1673 /* The jump pad is now built. Wire in a jump to our jump pad. This
1674 is always done last (by our caller actually), so that we can
1675 install fast tracepoints with threads running. This relies on
1676 the agent's atomic write support. */
1677 loffset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1678 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1681 "E.Jump pad too far from tracepoint "
1682 "(offset 0x%" PRIx64
" > int32).", loffset
);
1686 offset
= (int) loffset
;
1688 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1689 memcpy (buf
+ 1, &offset
, 4);
1690 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1691 *jjump_pad_insn_size
= sizeof (jump_insn
);
1693 /* Return the end address of our pad. */
1694 *jump_entry
= buildaddr
;
1699 #endif /* __x86_64__ */
1701 /* Build a jump pad that saves registers and calls a collection
1702 function. Writes a jump instruction to the jump pad to
1703 JJUMPAD_INSN. The caller is responsible to write it in at the
1704 tracepoint address. */
1707 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1708 CORE_ADDR collector
,
1711 CORE_ADDR
*jump_entry
,
1712 CORE_ADDR
*trampoline
,
1713 ULONGEST
*trampoline_size
,
1714 unsigned char *jjump_pad_insn
,
1715 ULONGEST
*jjump_pad_insn_size
,
1716 CORE_ADDR
*adjusted_insn_addr
,
1717 CORE_ADDR
*adjusted_insn_addr_end
,
1720 unsigned char buf
[0x100];
1722 CORE_ADDR buildaddr
= *jump_entry
;
1724 /* Build the jump pad. */
1726 /* First, do tracepoint data collection. Save registers. */
1728 buf
[i
++] = 0x60; /* pushad */
1729 buf
[i
++] = 0x68; /* push tpaddr aka $pc */
1730 *((int *)(buf
+ i
)) = (int) tpaddr
;
1732 buf
[i
++] = 0x9c; /* pushf */
1733 buf
[i
++] = 0x1e; /* push %ds */
1734 buf
[i
++] = 0x06; /* push %es */
1735 buf
[i
++] = 0x0f; /* push %fs */
1737 buf
[i
++] = 0x0f; /* push %gs */
1739 buf
[i
++] = 0x16; /* push %ss */
1740 buf
[i
++] = 0x0e; /* push %cs */
1741 append_insns (&buildaddr
, i
, buf
);
1743 /* Stack space for the collecting_t object. */
1745 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1747 /* Build the object. */
1748 i
+= push_opcode (&buf
[i
], "b8"); /* mov <tpoint>,%eax */
1749 memcpy (buf
+ i
, &tpoint
, 4);
1751 i
+= push_opcode (&buf
[i
], "89 04 24"); /* mov %eax,(%esp) */
1753 i
+= push_opcode (&buf
[i
], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1754 i
+= push_opcode (&buf
[i
], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1755 append_insns (&buildaddr
, i
, buf
);
1757 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1758 If we cared for it, this could be using xchg alternatively. */
1761 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1762 i
+= push_opcode (&buf
[i
], "f0 0f b1 25"); /* lock cmpxchg
1764 memcpy (&buf
[i
], (void *) &lockaddr
, 4);
1766 i
+= push_opcode (&buf
[i
], "85 c0"); /* test %eax,%eax */
1767 i
+= push_opcode (&buf
[i
], "75 f2"); /* jne <again> */
1768 append_insns (&buildaddr
, i
, buf
);
1771 /* Set up arguments to the gdb_collect call. */
1773 i
+= push_opcode (&buf
[i
], "89 e0"); /* mov %esp,%eax */
1774 i
+= push_opcode (&buf
[i
], "83 c0 08"); /* add $0x08,%eax */
1775 i
+= push_opcode (&buf
[i
], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1776 append_insns (&buildaddr
, i
, buf
);
1779 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1780 append_insns (&buildaddr
, i
, buf
);
1783 i
+= push_opcode (&buf
[i
], "c7 04 24"); /* movl <addr>,(%esp) */
1784 memcpy (&buf
[i
], (void *) &tpoint
, 4);
1786 append_insns (&buildaddr
, i
, buf
);
1788 buf
[0] = 0xe8; /* call <reladdr> */
1789 offset
= collector
- (buildaddr
+ sizeof (jump_insn
));
1790 memcpy (buf
+ 1, &offset
, 4);
1791 append_insns (&buildaddr
, 5, buf
);
1792 /* Clean up after the call. */
1793 buf
[0] = 0x83; /* add $0x8,%esp */
1796 append_insns (&buildaddr
, 3, buf
);
1799 /* Clear the spin-lock. This would need the LOCK prefix on older
1802 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1803 i
+= push_opcode (&buf
[i
], "a3"); /* mov %eax, lockaddr */
1804 memcpy (buf
+ i
, &lockaddr
, 4);
1806 append_insns (&buildaddr
, i
, buf
);
1809 /* Remove stack that had been used for the collect_t object. */
1811 i
+= push_opcode (&buf
[i
], "83 c4 08"); /* add $0x08,%esp */
1812 append_insns (&buildaddr
, i
, buf
);
1815 buf
[i
++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1818 buf
[i
++] = 0x17; /* pop %ss */
1819 buf
[i
++] = 0x0f; /* pop %gs */
1821 buf
[i
++] = 0x0f; /* pop %fs */
1823 buf
[i
++] = 0x07; /* pop %es */
1824 buf
[i
++] = 0x1f; /* pop %ds */
1825 buf
[i
++] = 0x9d; /* popf */
1826 buf
[i
++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1829 buf
[i
++] = 0x61; /* popad */
1830 append_insns (&buildaddr
, i
, buf
);
1832 /* Now, adjust the original instruction to execute in the jump
1834 *adjusted_insn_addr
= buildaddr
;
1835 relocate_instruction (&buildaddr
, tpaddr
);
1836 *adjusted_insn_addr_end
= buildaddr
;
1838 /* Write the jump back to the program. */
1839 offset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1840 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1841 memcpy (buf
+ 1, &offset
, 4);
1842 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1844 /* The jump pad is now built. Wire in a jump to our jump pad. This
1845 is always done last (by our caller actually), so that we can
1846 install fast tracepoints with threads running. This relies on
1847 the agent's atomic write support. */
1850 /* Create a trampoline. */
1851 *trampoline_size
= sizeof (jump_insn
);
1852 if (!claim_trampoline_space (*trampoline_size
, trampoline
))
1854 /* No trampoline space available. */
1856 "E.Cannot allocate trampoline space needed for fast "
1857 "tracepoints on 4-byte instructions.");
1861 offset
= *jump_entry
- (*trampoline
+ sizeof (jump_insn
));
1862 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1863 memcpy (buf
+ 1, &offset
, 4);
1864 write_inferior_memory (*trampoline
, buf
, sizeof (jump_insn
));
1866 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1867 offset
= (*trampoline
- (tpaddr
+ sizeof (small_jump_insn
))) & 0xffff;
1868 memcpy (buf
, small_jump_insn
, sizeof (small_jump_insn
));
1869 memcpy (buf
+ 2, &offset
, 2);
1870 memcpy (jjump_pad_insn
, buf
, sizeof (small_jump_insn
));
1871 *jjump_pad_insn_size
= sizeof (small_jump_insn
);
1875 /* Else use a 32-bit relative jump instruction. */
1876 offset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1877 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1878 memcpy (buf
+ 1, &offset
, 4);
1879 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1880 *jjump_pad_insn_size
= sizeof (jump_insn
);
1883 /* Return the end address of our pad. */
1884 *jump_entry
= buildaddr
;
1890 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1891 CORE_ADDR collector
,
1894 CORE_ADDR
*jump_entry
,
1895 CORE_ADDR
*trampoline
,
1896 ULONGEST
*trampoline_size
,
1897 unsigned char *jjump_pad_insn
,
1898 ULONGEST
*jjump_pad_insn_size
,
1899 CORE_ADDR
*adjusted_insn_addr
,
1900 CORE_ADDR
*adjusted_insn_addr_end
,
1904 if (is_64bit_tdesc ())
1905 return amd64_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1906 collector
, lockaddr
,
1907 orig_size
, jump_entry
,
1908 trampoline
, trampoline_size
,
1910 jjump_pad_insn_size
,
1912 adjusted_insn_addr_end
,
1916 return i386_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1917 collector
, lockaddr
,
1918 orig_size
, jump_entry
,
1919 trampoline
, trampoline_size
,
1921 jjump_pad_insn_size
,
1923 adjusted_insn_addr_end
,
1927 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1931 x86_get_min_fast_tracepoint_insn_len (void)
1933 static int warned_about_fast_tracepoints
= 0;
1936 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1937 used for fast tracepoints. */
1938 if (is_64bit_tdesc ())
1942 if (agent_loaded_p ())
1944 char errbuf
[IPA_BUFSIZ
];
1948 /* On x86, if trampolines are available, then 4-byte jump instructions
1949 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1950 with a 4-byte offset are used instead. */
1951 if (have_fast_tracepoint_trampoline_buffer (errbuf
))
1955 /* GDB has no channel to explain to user why a shorter fast
1956 tracepoint is not possible, but at least make GDBserver
1957 mention that something has gone awry. */
1958 if (!warned_about_fast_tracepoints
)
1960 warning ("4-byte fast tracepoints not available; %s\n", errbuf
);
1961 warned_about_fast_tracepoints
= 1;
1968 /* Indicate that the minimum length is currently unknown since the IPA
1969 has not loaded yet. */
1975 add_insns (unsigned char *start
, int len
)
1977 CORE_ADDR buildaddr
= current_insn_ptr
;
1980 fprintf (stderr
, "Adding %d bytes of insn at %s\n",
1981 len
, paddress (buildaddr
));
1983 append_insns (&buildaddr
, len
, start
);
1984 current_insn_ptr
= buildaddr
;
1987 /* Our general strategy for emitting code is to avoid specifying raw
1988 bytes whenever possible, and instead copy a block of inline asm
1989 that is embedded in the function. This is a little messy, because
1990 we need to keep the compiler from discarding what looks like dead
1991 code, plus suppress various warnings. */
1993 #define EMIT_ASM(NAME, INSNS) \
1996 extern unsigned char start_ ## NAME, end_ ## NAME; \
1997 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1998 __asm__ ("jmp end_" #NAME "\n" \
1999 "\t" "start_" #NAME ":" \
2001 "\t" "end_" #NAME ":"); \
2006 #define EMIT_ASM32(NAME,INSNS) \
2009 extern unsigned char start_ ## NAME, end_ ## NAME; \
2010 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
2011 __asm__ (".code32\n" \
2012 "\t" "jmp end_" #NAME "\n" \
2013 "\t" "start_" #NAME ":\n" \
2015 "\t" "end_" #NAME ":\n" \
2021 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
2028 amd64_emit_prologue (void)
2030 EMIT_ASM (amd64_prologue
,
2032 "movq %rsp,%rbp\n\t"
2033 "sub $0x20,%rsp\n\t"
2034 "movq %rdi,-8(%rbp)\n\t"
2035 "movq %rsi,-16(%rbp)");
2040 amd64_emit_epilogue (void)
2042 EMIT_ASM (amd64_epilogue
,
2043 "movq -16(%rbp),%rdi\n\t"
2044 "movq %rax,(%rdi)\n\t"
2051 amd64_emit_add (void)
2053 EMIT_ASM (amd64_add
,
2054 "add (%rsp),%rax\n\t"
2055 "lea 0x8(%rsp),%rsp");
2059 amd64_emit_sub (void)
2061 EMIT_ASM (amd64_sub
,
2062 "sub %rax,(%rsp)\n\t"
2067 amd64_emit_mul (void)
2073 amd64_emit_lsh (void)
2079 amd64_emit_rsh_signed (void)
2085 amd64_emit_rsh_unsigned (void)
2091 amd64_emit_ext (int arg
)
2096 EMIT_ASM (amd64_ext_8
,
2102 EMIT_ASM (amd64_ext_16
,
2107 EMIT_ASM (amd64_ext_32
,
2116 amd64_emit_log_not (void)
2118 EMIT_ASM (amd64_log_not
,
2119 "test %rax,%rax\n\t"
2125 amd64_emit_bit_and (void)
2127 EMIT_ASM (amd64_and
,
2128 "and (%rsp),%rax\n\t"
2129 "lea 0x8(%rsp),%rsp");
2133 amd64_emit_bit_or (void)
2136 "or (%rsp),%rax\n\t"
2137 "lea 0x8(%rsp),%rsp");
2141 amd64_emit_bit_xor (void)
2143 EMIT_ASM (amd64_xor
,
2144 "xor (%rsp),%rax\n\t"
2145 "lea 0x8(%rsp),%rsp");
2149 amd64_emit_bit_not (void)
2151 EMIT_ASM (amd64_bit_not
,
2152 "xorq $0xffffffffffffffff,%rax");
2156 amd64_emit_equal (void)
2158 EMIT_ASM (amd64_equal
,
2159 "cmp %rax,(%rsp)\n\t"
2160 "je .Lamd64_equal_true\n\t"
2162 "jmp .Lamd64_equal_end\n\t"
2163 ".Lamd64_equal_true:\n\t"
2165 ".Lamd64_equal_end:\n\t"
2166 "lea 0x8(%rsp),%rsp");
2170 amd64_emit_less_signed (void)
2172 EMIT_ASM (amd64_less_signed
,
2173 "cmp %rax,(%rsp)\n\t"
2174 "jl .Lamd64_less_signed_true\n\t"
2176 "jmp .Lamd64_less_signed_end\n\t"
2177 ".Lamd64_less_signed_true:\n\t"
2179 ".Lamd64_less_signed_end:\n\t"
2180 "lea 0x8(%rsp),%rsp");
2184 amd64_emit_less_unsigned (void)
2186 EMIT_ASM (amd64_less_unsigned
,
2187 "cmp %rax,(%rsp)\n\t"
2188 "jb .Lamd64_less_unsigned_true\n\t"
2190 "jmp .Lamd64_less_unsigned_end\n\t"
2191 ".Lamd64_less_unsigned_true:\n\t"
2193 ".Lamd64_less_unsigned_end:\n\t"
2194 "lea 0x8(%rsp),%rsp");
2198 amd64_emit_ref (int size
)
2203 EMIT_ASM (amd64_ref1
,
2207 EMIT_ASM (amd64_ref2
,
2211 EMIT_ASM (amd64_ref4
,
2212 "movl (%rax),%eax");
2215 EMIT_ASM (amd64_ref8
,
2216 "movq (%rax),%rax");
2222 amd64_emit_if_goto (int *offset_p
, int *size_p
)
2224 EMIT_ASM (amd64_if_goto
,
2228 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2236 amd64_emit_goto (int *offset_p
, int *size_p
)
2238 EMIT_ASM (amd64_goto
,
2239 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2247 amd64_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2249 int diff
= (to
- (from
+ size
));
2250 unsigned char buf
[sizeof (int)];
2258 memcpy (buf
, &diff
, sizeof (int));
2259 write_inferior_memory (from
, buf
, sizeof (int));
2263 amd64_emit_const (LONGEST num
)
2265 unsigned char buf
[16];
2267 CORE_ADDR buildaddr
= current_insn_ptr
;
2270 buf
[i
++] = 0x48; buf
[i
++] = 0xb8; /* mov $<n>,%rax */
2271 memcpy (&buf
[i
], &num
, sizeof (num
));
2273 append_insns (&buildaddr
, i
, buf
);
2274 current_insn_ptr
= buildaddr
;
2278 amd64_emit_call (CORE_ADDR fn
)
2280 unsigned char buf
[16];
2282 CORE_ADDR buildaddr
;
2285 /* The destination function being in the shared library, may be
2286 >31-bits away off the compiled code pad. */
2288 buildaddr
= current_insn_ptr
;
2290 offset64
= fn
- (buildaddr
+ 1 /* call op */ + 4 /* 32-bit offset */);
2294 if (offset64
> INT_MAX
|| offset64
< INT_MIN
)
2296 /* Offset is too large for a call. Use callq, but that requires
2297 a register, so avoid it if possible. Use r10, since it is
2298 call-clobbered, we don't have to push/pop it. */
2299 buf
[i
++] = 0x48; /* mov $fn,%r10 */
2301 memcpy (buf
+ i
, &fn
, 8);
2303 buf
[i
++] = 0xff; /* callq *%r10 */
2308 int offset32
= offset64
; /* we know we can't overflow here. */
2309 memcpy (buf
+ i
, &offset32
, 4);
2313 append_insns (&buildaddr
, i
, buf
);
2314 current_insn_ptr
= buildaddr
;
2318 amd64_emit_reg (int reg
)
2320 unsigned char buf
[16];
2322 CORE_ADDR buildaddr
;
2324 /* Assume raw_regs is still in %rdi. */
2325 buildaddr
= current_insn_ptr
;
2327 buf
[i
++] = 0xbe; /* mov $<n>,%esi */
2328 memcpy (&buf
[i
], ®
, sizeof (reg
));
2330 append_insns (&buildaddr
, i
, buf
);
2331 current_insn_ptr
= buildaddr
;
2332 amd64_emit_call (get_raw_reg_func_addr ());
2336 amd64_emit_pop (void)
2338 EMIT_ASM (amd64_pop
,
2343 amd64_emit_stack_flush (void)
2345 EMIT_ASM (amd64_stack_flush
,
2350 amd64_emit_zero_ext (int arg
)
2355 EMIT_ASM (amd64_zero_ext_8
,
2359 EMIT_ASM (amd64_zero_ext_16
,
2360 "and $0xffff,%rax");
2363 EMIT_ASM (amd64_zero_ext_32
,
2364 "mov $0xffffffff,%rcx\n\t"
2373 amd64_emit_swap (void)
2375 EMIT_ASM (amd64_swap
,
2382 amd64_emit_stack_adjust (int n
)
2384 unsigned char buf
[16];
2386 CORE_ADDR buildaddr
= current_insn_ptr
;
2389 buf
[i
++] = 0x48; /* lea $<n>(%rsp),%rsp */
2393 /* This only handles adjustments up to 16, but we don't expect any more. */
2395 append_insns (&buildaddr
, i
, buf
);
2396 current_insn_ptr
= buildaddr
;
2399 /* FN's prototype is `LONGEST(*fn)(int)'. */
2402 amd64_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2404 unsigned char buf
[16];
2406 CORE_ADDR buildaddr
;
2408 buildaddr
= current_insn_ptr
;
2410 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2411 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2413 append_insns (&buildaddr
, i
, buf
);
2414 current_insn_ptr
= buildaddr
;
2415 amd64_emit_call (fn
);
2418 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2421 amd64_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
2423 unsigned char buf
[16];
2425 CORE_ADDR buildaddr
;
2427 buildaddr
= current_insn_ptr
;
2429 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
2430 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2432 append_insns (&buildaddr
, i
, buf
);
2433 current_insn_ptr
= buildaddr
;
2434 EMIT_ASM (amd64_void_call_2_a
,
2435 /* Save away a copy of the stack top. */
2437 /* Also pass top as the second argument. */
2439 amd64_emit_call (fn
);
2440 EMIT_ASM (amd64_void_call_2_b
,
2441 /* Restore the stack top, %rax may have been trashed. */
2446 amd64_emit_eq_goto (int *offset_p
, int *size_p
)
2449 "cmp %rax,(%rsp)\n\t"
2450 "jne .Lamd64_eq_fallthru\n\t"
2451 "lea 0x8(%rsp),%rsp\n\t"
2453 /* jmp, but don't trust the assembler to choose the right jump */
2454 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2455 ".Lamd64_eq_fallthru:\n\t"
2456 "lea 0x8(%rsp),%rsp\n\t"
2466 amd64_emit_ne_goto (int *offset_p
, int *size_p
)
2469 "cmp %rax,(%rsp)\n\t"
2470 "je .Lamd64_ne_fallthru\n\t"
2471 "lea 0x8(%rsp),%rsp\n\t"
2473 /* jmp, but don't trust the assembler to choose the right jump */
2474 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2475 ".Lamd64_ne_fallthru:\n\t"
2476 "lea 0x8(%rsp),%rsp\n\t"
2486 amd64_emit_lt_goto (int *offset_p
, int *size_p
)
2489 "cmp %rax,(%rsp)\n\t"
2490 "jnl .Lamd64_lt_fallthru\n\t"
2491 "lea 0x8(%rsp),%rsp\n\t"
2493 /* jmp, but don't trust the assembler to choose the right jump */
2494 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2495 ".Lamd64_lt_fallthru:\n\t"
2496 "lea 0x8(%rsp),%rsp\n\t"
2506 amd64_emit_le_goto (int *offset_p
, int *size_p
)
2509 "cmp %rax,(%rsp)\n\t"
2510 "jnle .Lamd64_le_fallthru\n\t"
2511 "lea 0x8(%rsp),%rsp\n\t"
2513 /* jmp, but don't trust the assembler to choose the right jump */
2514 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2515 ".Lamd64_le_fallthru:\n\t"
2516 "lea 0x8(%rsp),%rsp\n\t"
2526 amd64_emit_gt_goto (int *offset_p
, int *size_p
)
2529 "cmp %rax,(%rsp)\n\t"
2530 "jng .Lamd64_gt_fallthru\n\t"
2531 "lea 0x8(%rsp),%rsp\n\t"
2533 /* jmp, but don't trust the assembler to choose the right jump */
2534 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2535 ".Lamd64_gt_fallthru:\n\t"
2536 "lea 0x8(%rsp),%rsp\n\t"
2546 amd64_emit_ge_goto (int *offset_p
, int *size_p
)
2549 "cmp %rax,(%rsp)\n\t"
2550 "jnge .Lamd64_ge_fallthru\n\t"
2551 ".Lamd64_ge_jump:\n\t"
2552 "lea 0x8(%rsp),%rsp\n\t"
2554 /* jmp, but don't trust the assembler to choose the right jump */
2555 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2556 ".Lamd64_ge_fallthru:\n\t"
2557 "lea 0x8(%rsp),%rsp\n\t"
2566 struct emit_ops amd64_emit_ops
=
2568 amd64_emit_prologue
,
2569 amd64_emit_epilogue
,
2574 amd64_emit_rsh_signed
,
2575 amd64_emit_rsh_unsigned
,
2583 amd64_emit_less_signed
,
2584 amd64_emit_less_unsigned
,
2588 amd64_write_goto_address
,
2593 amd64_emit_stack_flush
,
2594 amd64_emit_zero_ext
,
2596 amd64_emit_stack_adjust
,
2597 amd64_emit_int_call_1
,
2598 amd64_emit_void_call_2
,
2607 #endif /* __x86_64__ */
2610 i386_emit_prologue (void)
2612 EMIT_ASM32 (i386_prologue
,
2616 /* At this point, the raw regs base address is at 8(%ebp), and the
2617 value pointer is at 12(%ebp). */
2621 i386_emit_epilogue (void)
2623 EMIT_ASM32 (i386_epilogue
,
2624 "mov 12(%ebp),%ecx\n\t"
2625 "mov %eax,(%ecx)\n\t"
2626 "mov %ebx,0x4(%ecx)\n\t"
2634 i386_emit_add (void)
2636 EMIT_ASM32 (i386_add
,
2637 "add (%esp),%eax\n\t"
2638 "adc 0x4(%esp),%ebx\n\t"
2639 "lea 0x8(%esp),%esp");
2643 i386_emit_sub (void)
2645 EMIT_ASM32 (i386_sub
,
2646 "subl %eax,(%esp)\n\t"
2647 "sbbl %ebx,4(%esp)\n\t"
2653 i386_emit_mul (void)
2659 i386_emit_lsh (void)
2665 i386_emit_rsh_signed (void)
2671 i386_emit_rsh_unsigned (void)
2677 i386_emit_ext (int arg
)
2682 EMIT_ASM32 (i386_ext_8
,
2685 "movl %eax,%ebx\n\t"
2689 EMIT_ASM32 (i386_ext_16
,
2691 "movl %eax,%ebx\n\t"
2695 EMIT_ASM32 (i386_ext_32
,
2696 "movl %eax,%ebx\n\t"
2705 i386_emit_log_not (void)
2707 EMIT_ASM32 (i386_log_not
,
2709 "test %eax,%eax\n\t"
2716 i386_emit_bit_and (void)
2718 EMIT_ASM32 (i386_and
,
2719 "and (%esp),%eax\n\t"
2720 "and 0x4(%esp),%ebx\n\t"
2721 "lea 0x8(%esp),%esp");
2725 i386_emit_bit_or (void)
2727 EMIT_ASM32 (i386_or
,
2728 "or (%esp),%eax\n\t"
2729 "or 0x4(%esp),%ebx\n\t"
2730 "lea 0x8(%esp),%esp");
2734 i386_emit_bit_xor (void)
2736 EMIT_ASM32 (i386_xor
,
2737 "xor (%esp),%eax\n\t"
2738 "xor 0x4(%esp),%ebx\n\t"
2739 "lea 0x8(%esp),%esp");
2743 i386_emit_bit_not (void)
2745 EMIT_ASM32 (i386_bit_not
,
2746 "xor $0xffffffff,%eax\n\t"
2747 "xor $0xffffffff,%ebx\n\t");
2751 i386_emit_equal (void)
2753 EMIT_ASM32 (i386_equal
,
2754 "cmpl %ebx,4(%esp)\n\t"
2755 "jne .Li386_equal_false\n\t"
2756 "cmpl %eax,(%esp)\n\t"
2757 "je .Li386_equal_true\n\t"
2758 ".Li386_equal_false:\n\t"
2760 "jmp .Li386_equal_end\n\t"
2761 ".Li386_equal_true:\n\t"
2763 ".Li386_equal_end:\n\t"
2765 "lea 0x8(%esp),%esp");
2769 i386_emit_less_signed (void)
2771 EMIT_ASM32 (i386_less_signed
,
2772 "cmpl %ebx,4(%esp)\n\t"
2773 "jl .Li386_less_signed_true\n\t"
2774 "jne .Li386_less_signed_false\n\t"
2775 "cmpl %eax,(%esp)\n\t"
2776 "jl .Li386_less_signed_true\n\t"
2777 ".Li386_less_signed_false:\n\t"
2779 "jmp .Li386_less_signed_end\n\t"
2780 ".Li386_less_signed_true:\n\t"
2782 ".Li386_less_signed_end:\n\t"
2784 "lea 0x8(%esp),%esp");
2788 i386_emit_less_unsigned (void)
2790 EMIT_ASM32 (i386_less_unsigned
,
2791 "cmpl %ebx,4(%esp)\n\t"
2792 "jb .Li386_less_unsigned_true\n\t"
2793 "jne .Li386_less_unsigned_false\n\t"
2794 "cmpl %eax,(%esp)\n\t"
2795 "jb .Li386_less_unsigned_true\n\t"
2796 ".Li386_less_unsigned_false:\n\t"
2798 "jmp .Li386_less_unsigned_end\n\t"
2799 ".Li386_less_unsigned_true:\n\t"
2801 ".Li386_less_unsigned_end:\n\t"
2803 "lea 0x8(%esp),%esp");
2807 i386_emit_ref (int size
)
2812 EMIT_ASM32 (i386_ref1
,
2816 EMIT_ASM32 (i386_ref2
,
2820 EMIT_ASM32 (i386_ref4
,
2821 "movl (%eax),%eax");
2824 EMIT_ASM32 (i386_ref8
,
2825 "movl 4(%eax),%ebx\n\t"
2826 "movl (%eax),%eax");
2832 i386_emit_if_goto (int *offset_p
, int *size_p
)
2834 EMIT_ASM32 (i386_if_goto
,
2840 /* Don't trust the assembler to choose the right jump */
2841 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2844 *offset_p
= 11; /* be sure that this matches the sequence above */
2850 i386_emit_goto (int *offset_p
, int *size_p
)
2852 EMIT_ASM32 (i386_goto
,
2853 /* Don't trust the assembler to choose the right jump */
2854 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2862 i386_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2864 int diff
= (to
- (from
+ size
));
2865 unsigned char buf
[sizeof (int)];
2867 /* We're only doing 4-byte sizes at the moment. */
2874 memcpy (buf
, &diff
, sizeof (int));
2875 write_inferior_memory (from
, buf
, sizeof (int));
2879 i386_emit_const (LONGEST num
)
2881 unsigned char buf
[16];
2883 CORE_ADDR buildaddr
= current_insn_ptr
;
2886 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2887 lo
= num
& 0xffffffff;
2888 memcpy (&buf
[i
], &lo
, sizeof (lo
));
2890 hi
= ((num
>> 32) & 0xffffffff);
2893 buf
[i
++] = 0xbb; /* mov $<n>,%ebx */
2894 memcpy (&buf
[i
], &hi
, sizeof (hi
));
2899 buf
[i
++] = 0x31; buf
[i
++] = 0xdb; /* xor %ebx,%ebx */
2901 append_insns (&buildaddr
, i
, buf
);
2902 current_insn_ptr
= buildaddr
;
2906 i386_emit_call (CORE_ADDR fn
)
2908 unsigned char buf
[16];
2910 CORE_ADDR buildaddr
;
2912 buildaddr
= current_insn_ptr
;
2914 buf
[i
++] = 0xe8; /* call <reladdr> */
2915 offset
= ((int) fn
) - (buildaddr
+ 5);
2916 memcpy (buf
+ 1, &offset
, 4);
2917 append_insns (&buildaddr
, 5, buf
);
2918 current_insn_ptr
= buildaddr
;
2922 i386_emit_reg (int reg
)
2924 unsigned char buf
[16];
2926 CORE_ADDR buildaddr
;
2928 EMIT_ASM32 (i386_reg_a
,
2930 buildaddr
= current_insn_ptr
;
2932 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2933 memcpy (&buf
[i
], ®
, sizeof (reg
));
2935 append_insns (&buildaddr
, i
, buf
);
2936 current_insn_ptr
= buildaddr
;
2937 EMIT_ASM32 (i386_reg_b
,
2938 "mov %eax,4(%esp)\n\t"
2939 "mov 8(%ebp),%eax\n\t"
2941 i386_emit_call (get_raw_reg_func_addr ());
2942 EMIT_ASM32 (i386_reg_c
,
2944 "lea 0x8(%esp),%esp");
2948 i386_emit_pop (void)
2950 EMIT_ASM32 (i386_pop
,
2956 i386_emit_stack_flush (void)
2958 EMIT_ASM32 (i386_stack_flush
,
2964 i386_emit_zero_ext (int arg
)
2969 EMIT_ASM32 (i386_zero_ext_8
,
2970 "and $0xff,%eax\n\t"
2974 EMIT_ASM32 (i386_zero_ext_16
,
2975 "and $0xffff,%eax\n\t"
2979 EMIT_ASM32 (i386_zero_ext_32
,
2988 i386_emit_swap (void)
2990 EMIT_ASM32 (i386_swap
,
3000 i386_emit_stack_adjust (int n
)
3002 unsigned char buf
[16];
3004 CORE_ADDR buildaddr
= current_insn_ptr
;
3007 buf
[i
++] = 0x8d; /* lea $<n>(%esp),%esp */
3011 append_insns (&buildaddr
, i
, buf
);
3012 current_insn_ptr
= buildaddr
;
3015 /* FN's prototype is `LONGEST(*fn)(int)'. */
3018 i386_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
3020 unsigned char buf
[16];
3022 CORE_ADDR buildaddr
;
3024 EMIT_ASM32 (i386_int_call_1_a
,
3025 /* Reserve a bit of stack space. */
3027 /* Put the one argument on the stack. */
3028 buildaddr
= current_insn_ptr
;
3030 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3033 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3035 append_insns (&buildaddr
, i
, buf
);
3036 current_insn_ptr
= buildaddr
;
3037 i386_emit_call (fn
);
3038 EMIT_ASM32 (i386_int_call_1_c
,
3040 "lea 0x8(%esp),%esp");
3043 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
3046 i386_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
3048 unsigned char buf
[16];
3050 CORE_ADDR buildaddr
;
3052 EMIT_ASM32 (i386_void_call_2_a
,
3053 /* Preserve %eax only; we don't have to worry about %ebx. */
3055 /* Reserve a bit of stack space for arguments. */
3056 "sub $0x10,%esp\n\t"
3057 /* Copy "top" to the second argument position. (Note that
3058 we can't assume function won't scribble on its
3059 arguments, so don't try to restore from this.) */
3060 "mov %eax,4(%esp)\n\t"
3061 "mov %ebx,8(%esp)");
3062 /* Put the first argument on the stack. */
3063 buildaddr
= current_insn_ptr
;
3065 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
3068 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
3070 append_insns (&buildaddr
, i
, buf
);
3071 current_insn_ptr
= buildaddr
;
3072 i386_emit_call (fn
);
3073 EMIT_ASM32 (i386_void_call_2_b
,
3074 "lea 0x10(%esp),%esp\n\t"
3075 /* Restore original stack top. */
3081 i386_emit_eq_goto (int *offset_p
, int *size_p
)
3084 /* Check low half first, more likely to be decider */
3085 "cmpl %eax,(%esp)\n\t"
3086 "jne .Leq_fallthru\n\t"
3087 "cmpl %ebx,4(%esp)\n\t"
3088 "jne .Leq_fallthru\n\t"
3089 "lea 0x8(%esp),%esp\n\t"
3092 /* jmp, but don't trust the assembler to choose the right jump */
3093 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3094 ".Leq_fallthru:\n\t"
3095 "lea 0x8(%esp),%esp\n\t"
3106 i386_emit_ne_goto (int *offset_p
, int *size_p
)
3109 /* Check low half first, more likely to be decider */
3110 "cmpl %eax,(%esp)\n\t"
3112 "cmpl %ebx,4(%esp)\n\t"
3113 "je .Lne_fallthru\n\t"
3115 "lea 0x8(%esp),%esp\n\t"
3118 /* jmp, but don't trust the assembler to choose the right jump */
3119 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3120 ".Lne_fallthru:\n\t"
3121 "lea 0x8(%esp),%esp\n\t"
3132 i386_emit_lt_goto (int *offset_p
, int *size_p
)
3135 "cmpl %ebx,4(%esp)\n\t"
3137 "jne .Llt_fallthru\n\t"
3138 "cmpl %eax,(%esp)\n\t"
3139 "jnl .Llt_fallthru\n\t"
3141 "lea 0x8(%esp),%esp\n\t"
3144 /* jmp, but don't trust the assembler to choose the right jump */
3145 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3146 ".Llt_fallthru:\n\t"
3147 "lea 0x8(%esp),%esp\n\t"
3158 i386_emit_le_goto (int *offset_p
, int *size_p
)
3161 "cmpl %ebx,4(%esp)\n\t"
3163 "jne .Lle_fallthru\n\t"
3164 "cmpl %eax,(%esp)\n\t"
3165 "jnle .Lle_fallthru\n\t"
3167 "lea 0x8(%esp),%esp\n\t"
3170 /* jmp, but don't trust the assembler to choose the right jump */
3171 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3172 ".Lle_fallthru:\n\t"
3173 "lea 0x8(%esp),%esp\n\t"
3184 i386_emit_gt_goto (int *offset_p
, int *size_p
)
3187 "cmpl %ebx,4(%esp)\n\t"
3189 "jne .Lgt_fallthru\n\t"
3190 "cmpl %eax,(%esp)\n\t"
3191 "jng .Lgt_fallthru\n\t"
3193 "lea 0x8(%esp),%esp\n\t"
3196 /* jmp, but don't trust the assembler to choose the right jump */
3197 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3198 ".Lgt_fallthru:\n\t"
3199 "lea 0x8(%esp),%esp\n\t"
3210 i386_emit_ge_goto (int *offset_p
, int *size_p
)
3213 "cmpl %ebx,4(%esp)\n\t"
3215 "jne .Lge_fallthru\n\t"
3216 "cmpl %eax,(%esp)\n\t"
3217 "jnge .Lge_fallthru\n\t"
3219 "lea 0x8(%esp),%esp\n\t"
3222 /* jmp, but don't trust the assembler to choose the right jump */
3223 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3224 ".Lge_fallthru:\n\t"
3225 "lea 0x8(%esp),%esp\n\t"
3235 struct emit_ops i386_emit_ops
=
3243 i386_emit_rsh_signed
,
3244 i386_emit_rsh_unsigned
,
3252 i386_emit_less_signed
,
3253 i386_emit_less_unsigned
,
3257 i386_write_goto_address
,
3262 i386_emit_stack_flush
,
3265 i386_emit_stack_adjust
,
3266 i386_emit_int_call_1
,
3267 i386_emit_void_call_2
,
3277 static struct emit_ops
*
3281 if (is_64bit_tdesc ())
3282 return &amd64_emit_ops
;
3285 return &i386_emit_ops
;
3289 x86_supports_range_stepping (void)
3294 /* This is initialized assuming an amd64 target.
3295 x86_arch_setup will correct it for i386 or amd64 targets. */
3297 struct linux_target_ops the_low_target
=
3300 x86_linux_regs_info
,
3301 x86_cannot_fetch_register
,
3302 x86_cannot_store_register
,
3303 NULL
, /* fetch_register */
3313 x86_stopped_by_watchpoint
,
3314 x86_stopped_data_address
,
3315 /* collect_ptrace_register/supply_ptrace_register are not needed in the
3316 native i386 case (no registers smaller than an xfer unit), and are not
3317 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
3320 /* need to fix up i386 siginfo if host is amd64 */
3322 x86_linux_new_process
,
3323 x86_linux_new_thread
,
3324 x86_linux_prepare_to_resume
,
3325 x86_linux_process_qsupported
,
3326 x86_supports_tracepoints
,
3327 x86_get_thread_area
,
3328 x86_install_fast_tracepoint_jump_pad
,
3330 x86_get_min_fast_tracepoint_insn_len
,
3331 x86_supports_range_stepping
,
3335 initialize_low_arch (void)
3337 /* Initialize the Linux target descriptions. */
3339 init_registers_amd64_linux ();
3340 init_registers_amd64_avx_linux ();
3341 init_registers_x32_linux ();
3342 init_registers_x32_avx_linux ();
3344 tdesc_amd64_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3345 copy_target_description (tdesc_amd64_linux_no_xml
, tdesc_amd64_linux
);
3346 tdesc_amd64_linux_no_xml
->xmltarget
= xmltarget_amd64_linux_no_xml
;
3348 init_registers_i386_linux ();
3349 init_registers_i386_mmx_linux ();
3350 init_registers_i386_avx_linux ();
3352 tdesc_i386_linux_no_xml
= xmalloc (sizeof (struct target_desc
));
3353 copy_target_description (tdesc_i386_linux_no_xml
, tdesc_i386_linux
);
3354 tdesc_i386_linux_no_xml
->xmltarget
= xmltarget_i386_linux_no_xml
;
3356 initialize_regsets_info (&x86_regsets_info
);