* gdbint.texinfo (POP_FRAME): Document use by return_command.
[deliverable/binutils-gdb.git] / gdb / gdbserver / low-linux.c
1 /* Low level interface to ptrace, for the remote server for GDB.
2 Copyright (C) 1995, 1996 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include "defs.h"
22 #include <sys/wait.h>
23 #include "frame.h"
24 #include "inferior.h"
25
26 #include <stdio.h>
27 #include <sys/param.h>
28 #include <sys/dir.h>
29 #include <sys/ptrace.h>
30 #include <sys/user.h>
31 #include <signal.h>
32 #include <sys/ioctl.h>
33 #include <fcntl.h>
34
35 /***************Begin MY defs*********************/
36 static char my_registers[REGISTER_BYTES];
37 char *registers = my_registers;
38 /***************End MY defs*********************/
39
40 #ifdef HAVE_SYS_REG_H
41 #include <sys/reg.h>
42 #endif
43
44 /* Default the type of the ptrace transfer to int. */
45 #ifndef PTRACE_XFER_TYPE
46 #define PTRACE_XFER_TYPE int
47 #endif
48
49 extern int errno;
50 extern int inferior_pid;
51 void perror_with_name ();
52
53 static void initialize_arch (void);
54
55 /* Start an inferior process and returns its pid.
56 ALLARGS is a vector of program-name and args. */
57
58 int
59 create_inferior (char *program, char **allargs)
60 {
61 int pid;
62
63 pid = fork ();
64 if (pid < 0)
65 perror_with_name ("fork");
66
67 if (pid == 0)
68 {
69 ptrace (PTRACE_TRACEME, 0, 0, 0);
70
71 execv (program, allargs);
72
73 fprintf (stderr, "Cannot exec %s: %s.\n", program,
74 errno < sys_nerr ? sys_errlist[errno] : "unknown error");
75 fflush (stderr);
76 _exit (0177);
77 }
78
79 return pid;
80 }
81
82 /* Kill the inferior process. Make us have no inferior. */
83
84 void
85 kill_inferior (void)
86 {
87 if (inferior_pid == 0)
88 return;
89 ptrace (PTRACE_KILL, inferior_pid, 0, 0);
90 wait (0);
91 /*************inferior_died ();****VK**************/
92 }
93
94 /* Return nonzero if the given thread is still alive. */
95 int
96 mythread_alive (int pid)
97 {
98 return 1;
99 }
100
101 /* Wait for process, returns status */
102
103 unsigned char
104 mywait (char *status)
105 {
106 int pid;
107 union wait w;
108
109 pid = wait (&w);
110 if (pid != inferior_pid)
111 perror_with_name ("wait");
112
113 if (WIFEXITED (w))
114 {
115 fprintf (stderr, "\nChild exited with retcode = %x \n", WEXITSTATUS (w));
116 *status = 'W';
117 return ((unsigned char) WEXITSTATUS (w));
118 }
119 else if (!WIFSTOPPED (w))
120 {
121 fprintf (stderr, "\nChild terminated with signal = %x \n", WTERMSIG (w));
122 *status = 'X';
123 return ((unsigned char) WTERMSIG (w));
124 }
125
126 fetch_inferior_registers (0);
127
128 *status = 'T';
129 return ((unsigned char) WSTOPSIG (w));
130 }
131
132 /* Resume execution of the inferior process.
133 If STEP is nonzero, single-step it.
134 If SIGNAL is nonzero, give it that signal. */
135
136 void
137 myresume (int step, int signal)
138 {
139 errno = 0;
140 ptrace (step ? PTRACE_SINGLESTEP : PTRACE_CONT, inferior_pid, 1, signal);
141 if (errno)
142 perror_with_name ("ptrace");
143 }
144
145
146 #if !defined (offsetof)
147 #define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
148 #endif
149
150 /* U_REGS_OFFSET is the offset of the registers within the u area. */
151 #if !defined (U_REGS_OFFSET)
152 #define U_REGS_OFFSET \
153 ptrace (PT_READ_U, inferior_pid, \
154 (PTRACE_ARG3_TYPE) (offsetof (struct user, u_ar0)), 0) \
155 - KERNEL_U_ADDR
156 #endif
157
158 #ifdef I386_GNULINUX_TARGET
159 /* i386_register_raw_size[i] is the number of bytes of storage in the
160 actual machine representation for register i. */
161 int i386_register_raw_size[MAX_NUM_REGS] = {
162 4, 4, 4, 4,
163 4, 4, 4, 4,
164 4, 4, 4, 4,
165 4, 4, 4, 4,
166 10, 10, 10, 10,
167 10, 10, 10, 10,
168 4, 4, 4, 4,
169 4, 4, 4, 4,
170 16, 16, 16, 16,
171 16, 16, 16, 16,
172 4
173 };
174
175 int i386_register_byte[MAX_NUM_REGS];
176
177 static void
178 initialize_arch (void)
179 {
180 /* Initialize the table saying where each register starts in the
181 register file. */
182 {
183 int i, offset;
184
185 offset = 0;
186 for (i = 0; i < MAX_NUM_REGS; i++)
187 {
188 i386_register_byte[i] = offset;
189 offset += i386_register_raw_size[i];
190 }
191 }
192 }
193
194 /* this table must line up with REGISTER_NAMES in tm-i386v.h */
195 /* symbols like 'EAX' come from <sys/reg.h> */
196 static int regmap[] =
197 {
198 EAX, ECX, EDX, EBX,
199 UESP, EBP, ESI, EDI,
200 EIP, EFL, CS, SS,
201 DS, ES, FS, GS,
202 };
203
204 int
205 i386_register_u_addr (int blockend, int regnum)
206 {
207 #if 0
208 /* this will be needed if fp registers are reinstated */
209 /* for now, you can look at them with 'info float'
210 * sys5 wont let you change them with ptrace anyway
211 */
212 if (regnum >= FP0_REGNUM && regnum <= FP7_REGNUM)
213 {
214 int ubase, fpstate;
215 struct user u;
216 ubase = blockend + 4 * (SS + 1) - KSTKSZ;
217 fpstate = ubase + ((char *) &u.u_fpstate - (char *) &u);
218 return (fpstate + 0x1c + 10 * (regnum - FP0_REGNUM));
219 }
220 else
221 #endif
222 return (blockend + 4 * regmap[regnum]);
223
224 }
225 #elif defined(TARGET_M68K)
226 static void
227 initialize_arch (void)
228 {
229 return;
230 }
231
232 /* This table must line up with REGISTER_NAMES in tm-m68k.h */
233 static int regmap[] =
234 {
235 #ifdef PT_D0
236 PT_D0, PT_D1, PT_D2, PT_D3, PT_D4, PT_D5, PT_D6, PT_D7,
237 PT_A0, PT_A1, PT_A2, PT_A3, PT_A4, PT_A5, PT_A6, PT_USP,
238 PT_SR, PT_PC,
239 #else
240 14, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15,
241 17, 18,
242 #endif
243 #ifdef PT_FP0
244 PT_FP0, PT_FP1, PT_FP2, PT_FP3, PT_FP4, PT_FP5, PT_FP6, PT_FP7,
245 PT_FPCR, PT_FPSR, PT_FPIAR
246 #else
247 21, 24, 27, 30, 33, 36, 39, 42, 45, 46, 47
248 #endif
249 };
250
251 /* BLOCKEND is the value of u.u_ar0, and points to the place where GS
252 is stored. */
253
254 int
255 m68k_linux_register_u_addr (int blockend, int regnum)
256 {
257 return (blockend + 4 * regmap[regnum]);
258 }
259 #elif defined(IA64_GNULINUX_TARGET)
260 #undef NUM_FREGS
261 #define NUM_FREGS 0
262
263 #include <asm/ptrace_offsets.h>
264
265 static int u_offsets[] =
266 {
267 /* general registers */
268 -1, /* gr0 not available; i.e, it's always zero */
269 PT_R1,
270 PT_R2,
271 PT_R3,
272 PT_R4,
273 PT_R5,
274 PT_R6,
275 PT_R7,
276 PT_R8,
277 PT_R9,
278 PT_R10,
279 PT_R11,
280 PT_R12,
281 PT_R13,
282 PT_R14,
283 PT_R15,
284 PT_R16,
285 PT_R17,
286 PT_R18,
287 PT_R19,
288 PT_R20,
289 PT_R21,
290 PT_R22,
291 PT_R23,
292 PT_R24,
293 PT_R25,
294 PT_R26,
295 PT_R27,
296 PT_R28,
297 PT_R29,
298 PT_R30,
299 PT_R31,
300 /* gr32 through gr127 not directly available via the ptrace interface */
301 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
302 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
303 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
304 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
305 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
306 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
307 /* Floating point registers */
308 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
309 PT_F2,
310 PT_F3,
311 PT_F4,
312 PT_F5,
313 PT_F6,
314 PT_F7,
315 PT_F8,
316 PT_F9,
317 PT_F10,
318 PT_F11,
319 PT_F12,
320 PT_F13,
321 PT_F14,
322 PT_F15,
323 PT_F16,
324 PT_F17,
325 PT_F18,
326 PT_F19,
327 PT_F20,
328 PT_F21,
329 PT_F22,
330 PT_F23,
331 PT_F24,
332 PT_F25,
333 PT_F26,
334 PT_F27,
335 PT_F28,
336 PT_F29,
337 PT_F30,
338 PT_F31,
339 PT_F32,
340 PT_F33,
341 PT_F34,
342 PT_F35,
343 PT_F36,
344 PT_F37,
345 PT_F38,
346 PT_F39,
347 PT_F40,
348 PT_F41,
349 PT_F42,
350 PT_F43,
351 PT_F44,
352 PT_F45,
353 PT_F46,
354 PT_F47,
355 PT_F48,
356 PT_F49,
357 PT_F50,
358 PT_F51,
359 PT_F52,
360 PT_F53,
361 PT_F54,
362 PT_F55,
363 PT_F56,
364 PT_F57,
365 PT_F58,
366 PT_F59,
367 PT_F60,
368 PT_F61,
369 PT_F62,
370 PT_F63,
371 PT_F64,
372 PT_F65,
373 PT_F66,
374 PT_F67,
375 PT_F68,
376 PT_F69,
377 PT_F70,
378 PT_F71,
379 PT_F72,
380 PT_F73,
381 PT_F74,
382 PT_F75,
383 PT_F76,
384 PT_F77,
385 PT_F78,
386 PT_F79,
387 PT_F80,
388 PT_F81,
389 PT_F82,
390 PT_F83,
391 PT_F84,
392 PT_F85,
393 PT_F86,
394 PT_F87,
395 PT_F88,
396 PT_F89,
397 PT_F90,
398 PT_F91,
399 PT_F92,
400 PT_F93,
401 PT_F94,
402 PT_F95,
403 PT_F96,
404 PT_F97,
405 PT_F98,
406 PT_F99,
407 PT_F100,
408 PT_F101,
409 PT_F102,
410 PT_F103,
411 PT_F104,
412 PT_F105,
413 PT_F106,
414 PT_F107,
415 PT_F108,
416 PT_F109,
417 PT_F110,
418 PT_F111,
419 PT_F112,
420 PT_F113,
421 PT_F114,
422 PT_F115,
423 PT_F116,
424 PT_F117,
425 PT_F118,
426 PT_F119,
427 PT_F120,
428 PT_F121,
429 PT_F122,
430 PT_F123,
431 PT_F124,
432 PT_F125,
433 PT_F126,
434 PT_F127,
435 /* predicate registers - we don't fetch these individually */
436 -1, -1, -1, -1, -1, -1, -1, -1,
437 -1, -1, -1, -1, -1, -1, -1, -1,
438 -1, -1, -1, -1, -1, -1, -1, -1,
439 -1, -1, -1, -1, -1, -1, -1, -1,
440 -1, -1, -1, -1, -1, -1, -1, -1,
441 -1, -1, -1, -1, -1, -1, -1, -1,
442 -1, -1, -1, -1, -1, -1, -1, -1,
443 -1, -1, -1, -1, -1, -1, -1, -1,
444 /* branch registers */
445 PT_B0,
446 PT_B1,
447 PT_B2,
448 PT_B3,
449 PT_B4,
450 PT_B5,
451 PT_B6,
452 PT_B7,
453 /* virtual frame pointer and virtual return address pointer */
454 -1, -1,
455 /* other registers */
456 PT_PR,
457 PT_CR_IIP, /* ip */
458 PT_CR_IPSR, /* psr */
459 PT_CFM, /* cfm */
460 /* kernel registers not visible via ptrace interface (?) */
461 -1, -1, -1, -1, -1, -1, -1, -1,
462 /* hole */
463 -1, -1, -1, -1, -1, -1, -1, -1,
464 PT_AR_RSC,
465 PT_AR_BSP,
466 PT_AR_BSPSTORE,
467 PT_AR_RNAT,
468 -1,
469 -1, /* Not available: FCR, IA32 floating control register */
470 -1, -1,
471 -1, /* Not available: EFLAG */
472 -1, /* Not available: CSD */
473 -1, /* Not available: SSD */
474 -1, /* Not available: CFLG */
475 -1, /* Not available: FSR */
476 -1, /* Not available: FIR */
477 -1, /* Not available: FDR */
478 -1,
479 PT_AR_CCV,
480 -1, -1, -1,
481 PT_AR_UNAT,
482 -1, -1, -1,
483 PT_AR_FPSR,
484 -1, -1, -1,
485 -1, /* Not available: ITC */
486 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
487 -1, -1, -1, -1, -1, -1, -1, -1, -1,
488 PT_AR_PFS,
489 PT_AR_LC,
490 -1, /* Not available: EC, the Epilog Count register */
491 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
492 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
493 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
494 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
495 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
496 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
497 -1,
498 /* nat bits - not fetched directly; instead we obtain these bits from
499 either rnat or unat or from memory. */
500 -1, -1, -1, -1, -1, -1, -1, -1,
501 -1, -1, -1, -1, -1, -1, -1, -1,
502 -1, -1, -1, -1, -1, -1, -1, -1,
503 -1, -1, -1, -1, -1, -1, -1, -1,
504 -1, -1, -1, -1, -1, -1, -1, -1,
505 -1, -1, -1, -1, -1, -1, -1, -1,
506 -1, -1, -1, -1, -1, -1, -1, -1,
507 -1, -1, -1, -1, -1, -1, -1, -1,
508 -1, -1, -1, -1, -1, -1, -1, -1,
509 -1, -1, -1, -1, -1, -1, -1, -1,
510 -1, -1, -1, -1, -1, -1, -1, -1,
511 -1, -1, -1, -1, -1, -1, -1, -1,
512 -1, -1, -1, -1, -1, -1, -1, -1,
513 -1, -1, -1, -1, -1, -1, -1, -1,
514 -1, -1, -1, -1, -1, -1, -1, -1,
515 -1, -1, -1, -1, -1, -1, -1, -1,
516 };
517
518 int
519 ia64_register_u_addr (int blockend, int regnum)
520 {
521 int addr;
522
523 if (regnum < 0 || regnum >= NUM_REGS)
524 error ("Invalid register number %d.", regnum);
525
526 addr = u_offsets[regnum];
527 if (addr == -1)
528 addr = 0;
529
530 return addr;
531 }
532
533 static void
534 initialize_arch (void)
535 {
536 return;
537 }
538 #endif
539
540 CORE_ADDR
541 register_addr (int regno, CORE_ADDR blockend)
542 {
543 CORE_ADDR addr;
544
545 if (regno < 0 || regno >= ARCH_NUM_REGS)
546 error ("Invalid register number %d.", regno);
547
548 REGISTER_U_ADDR (addr, blockend, regno);
549
550 return addr;
551 }
552
553 /* Fetch one register. */
554
555 static void
556 fetch_register (int regno)
557 {
558 CORE_ADDR regaddr;
559 register int i;
560
561 /* Offset of registers within the u area. */
562 unsigned int offset;
563
564 offset = U_REGS_OFFSET;
565
566 regaddr = register_addr (regno, offset);
567 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
568 {
569 errno = 0;
570 *(PTRACE_XFER_TYPE *) &registers[REGISTER_BYTE (regno) + i] =
571 ptrace (PTRACE_PEEKUSER, inferior_pid, (PTRACE_ARG3_TYPE) regaddr, 0);
572 regaddr += sizeof (PTRACE_XFER_TYPE);
573 if (errno != 0)
574 {
575 /* Warning, not error, in case we are attached; sometimes the
576 kernel doesn't let us at the registers. */
577 char *err = strerror (errno);
578 char *msg = alloca (strlen (err) + 128);
579 sprintf (msg, "reading register %d: %s", regno, err);
580 error (msg);
581 goto error_exit;
582 }
583 }
584 error_exit:;
585 }
586
587 /* Fetch all registers, or just one, from the child process. */
588
589 void
590 fetch_inferior_registers (int regno)
591 {
592 if (regno == -1 || regno == 0)
593 for (regno = 0; regno < NUM_REGS - NUM_FREGS; regno++)
594 fetch_register (regno);
595 else
596 fetch_register (regno);
597 }
598
599 /* Store our register values back into the inferior.
600 If REGNO is -1, do this for all registers.
601 Otherwise, REGNO specifies which register (so we can save time). */
602
603 void
604 store_inferior_registers (int regno)
605 {
606 CORE_ADDR regaddr;
607 int i;
608 unsigned int offset = U_REGS_OFFSET;
609
610 if (regno >= 0)
611 {
612 #if 0
613 if (CANNOT_STORE_REGISTER (regno))
614 return;
615 #endif
616 regaddr = register_addr (regno, offset);
617 errno = 0;
618 #if 0
619 if (regno == PCOQ_HEAD_REGNUM || regno == PCOQ_TAIL_REGNUM)
620 {
621 scratch = *(int *) &registers[REGISTER_BYTE (regno)] | 0x3;
622 ptrace (PT_WUREGS, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
623 scratch, 0);
624 if (errno != 0)
625 {
626 /* Error, even if attached. Failing to write these two
627 registers is pretty serious. */
628 sprintf (buf, "writing register number %d", regno);
629 perror_with_name (buf);
630 }
631 }
632 else
633 #endif
634 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
635 {
636 errno = 0;
637 ptrace (PTRACE_POKEUSER, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
638 *(int *) &registers[REGISTER_BYTE (regno) + i]);
639 if (errno != 0)
640 {
641 /* Warning, not error, in case we are attached; sometimes the
642 kernel doesn't let us at the registers. */
643 char *err = strerror (errno);
644 char *msg = alloca (strlen (err) + 128);
645 sprintf (msg, "writing register %d: %s",
646 regno, err);
647 error (msg);
648 return;
649 }
650 regaddr += sizeof (int);
651 }
652 }
653 else
654 for (regno = 0; regno < NUM_REGS - NUM_FREGS; regno++)
655 store_inferior_registers (regno);
656 }
657
658 /* NOTE! I tried using PTRACE_READDATA, etc., to read and write memory
659 in the NEW_SUN_PTRACE case.
660 It ought to be straightforward. But it appears that writing did
661 not write the data that I specified. I cannot understand where
662 it got the data that it actually did write. */
663
664 /* Copy LEN bytes from inferior's memory starting at MEMADDR
665 to debugger memory starting at MYADDR. */
666
667 void
668 read_inferior_memory (CORE_ADDR memaddr, char *myaddr, int len)
669 {
670 register int i;
671 /* Round starting address down to longword boundary. */
672 register CORE_ADDR addr = memaddr & -sizeof (PTRACE_XFER_TYPE);
673 /* Round ending address up; get number of longwords that makes. */
674 register int count
675 = (((memaddr + len) - addr) + sizeof (PTRACE_XFER_TYPE) - 1)
676 / sizeof (PTRACE_XFER_TYPE);
677 /* Allocate buffer of that many longwords. */
678 register PTRACE_XFER_TYPE *buffer
679 = (PTRACE_XFER_TYPE *) alloca (count * sizeof (PTRACE_XFER_TYPE));
680
681 /* Read all the longwords */
682 for (i = 0; i < count; i++, addr += sizeof (PTRACE_XFER_TYPE))
683 {
684 buffer[i] = ptrace (PTRACE_PEEKTEXT, inferior_pid, addr, 0);
685 }
686
687 /* Copy appropriate bytes out of the buffer. */
688 memcpy (myaddr, (char *) buffer + (memaddr & (sizeof (PTRACE_XFER_TYPE) - 1)), len);
689 }
690
691 /* Copy LEN bytes of data from debugger memory at MYADDR
692 to inferior's memory at MEMADDR.
693 On failure (cannot write the inferior)
694 returns the value of errno. */
695
696 int
697 write_inferior_memory (CORE_ADDR memaddr, char *myaddr, int len)
698 {
699 register int i;
700 /* Round starting address down to longword boundary. */
701 register CORE_ADDR addr = memaddr & -sizeof (PTRACE_XFER_TYPE);
702 /* Round ending address up; get number of longwords that makes. */
703 register int count
704 = (((memaddr + len) - addr) + sizeof (PTRACE_XFER_TYPE) - 1) / sizeof (PTRACE_XFER_TYPE);
705 /* Allocate buffer of that many longwords. */
706 register PTRACE_XFER_TYPE *buffer = (PTRACE_XFER_TYPE *) alloca (count * sizeof (PTRACE_XFER_TYPE));
707 extern int errno;
708
709 /* Fill start and end extra bytes of buffer with existing memory data. */
710
711 buffer[0] = ptrace (PTRACE_PEEKTEXT, inferior_pid, addr, 0);
712
713 if (count > 1)
714 {
715 buffer[count - 1]
716 = ptrace (PTRACE_PEEKTEXT, inferior_pid,
717 addr + (count - 1) * sizeof (PTRACE_XFER_TYPE), 0);
718 }
719
720 /* Copy data to be written over corresponding part of buffer */
721
722 memcpy ((char *) buffer + (memaddr & (sizeof (PTRACE_XFER_TYPE) - 1)), myaddr, len);
723
724 /* Write the entire buffer. */
725
726 for (i = 0; i < count; i++, addr += sizeof (PTRACE_XFER_TYPE))
727 {
728 errno = 0;
729 ptrace (PTRACE_POKETEXT, inferior_pid, addr, buffer[i]);
730 if (errno)
731 return errno;
732 }
733
734 return 0;
735 }
736 \f
737 void
738 initialize_low (void)
739 {
740 initialize_arch ();
741 }
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