1 /* Native-dependent code for the i386.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "breakpoint.h"
26 #include "gdb_assert.h"
29 /* Support for hardware watchpoints and breakpoints using the i386
32 This provides several functions for inserting and removing
33 hardware-assisted breakpoints and watchpoints, testing if one or
34 more of the watchpoints triggered and at what address, checking
35 whether a given region can be watched, etc.
37 The functions below implement debug registers sharing by reference
38 counts, and allow to watch regions up to 16 bytes long. */
40 /* Whether or not to print the mirrored debug registers. */
41 static int debug_hw_points
;
43 /* Function used for printing mirrored debug registers. */
44 #define debug_printf(fmt, args...) \
45 fprintf_unfiltered (gdb_stdlog, fmt, ##args);
47 /* Low-level function vector. */
48 struct i386_dr_low_type i386_dr_low
;
50 #define i386_dr_low_can_set_addr() (i386_dr_low.set_addr != NULL)
51 #define i386_dr_low_can_set_control() (i386_dr_low.set_control != NULL)
53 #define i386_dr_low_set_addr(new_state, i) \
54 (i386_dr_low.set_addr ((i), (new_state)->dr_mirror[(i)]))
56 #define i386_dr_low_set_control(new_state) \
57 (i386_dr_low.set_control ((new_state)->dr_control_mirror))
59 #define i386_dr_low_get_addr(i) (i386_dr_low.get_addr ((i)))
60 #define i386_dr_low_get_status() (i386_dr_low.get_status ())
61 #define i386_dr_low_get_control() (i386_dr_low.get_control ())
63 /* Debug register size, in bytes. */
64 #define i386_get_debug_register_length() \
65 (i386_dr_low.debug_register_length)
67 /* Support for 8-byte wide hw watchpoints. */
68 #define TARGET_HAS_DR_LEN_8 (i386_get_debug_register_length () == 8)
70 /* DR7 Debug Control register fields. */
72 /* How many bits to skip in DR7 to get to R/W and LEN fields. */
73 #define DR_CONTROL_SHIFT 16
74 /* How many bits in DR7 per R/W and LEN field for each watchpoint. */
75 #define DR_CONTROL_SIZE 4
77 /* Watchpoint/breakpoint read/write fields in DR7. */
78 #define DR_RW_EXECUTE (0x0) /* Break on instruction execution. */
79 #define DR_RW_WRITE (0x1) /* Break on data writes. */
80 #define DR_RW_READ (0x3) /* Break on data reads or writes. */
82 /* This is here for completeness. No platform supports this
83 functionality yet (as of March 2001). Note that the DE flag in the
84 CR4 register needs to be set to support this. */
86 #define DR_RW_IORW (0x2) /* Break on I/O reads or writes. */
89 /* Watchpoint/breakpoint length fields in DR7. The 2-bit left shift
90 is so we could OR this with the read/write field defined above. */
91 #define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpoint. */
92 #define DR_LEN_2 (0x1 << 2) /* 2-byte region watch. */
93 #define DR_LEN_4 (0x3 << 2) /* 4-byte region watch. */
94 #define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (AMD64). */
96 /* Local and Global Enable flags in DR7.
98 When the Local Enable flag is set, the breakpoint/watchpoint is
99 enabled only for the current task; the processor automatically
100 clears this flag on every task switch. When the Global Enable flag
101 is set, the breakpoint/watchpoint is enabled for all tasks; the
102 processor never clears this flag.
104 Currently, all watchpoint are locally enabled. If you need to
105 enable them globally, read the comment which pertains to this in
106 i386_dr_insert_aligned_watchpoint below. */
107 #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit. */
108 #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit. */
109 #define DR_ENABLE_SIZE 2 /* Two enable bits per debug register. */
111 /* Local and global exact breakpoint enable flags (a.k.a. slowdown
112 flags). These are only required on i386, to allow detection of the
113 exact instruction which caused a watchpoint to break; i486 and
114 later processors do that automatically. We set these flags for
115 backwards compatibility. */
116 #define DR_LOCAL_SLOWDOWN (0x100)
117 #define DR_GLOBAL_SLOWDOWN (0x200)
119 /* Fields reserved by Intel. This includes the GD (General Detect
120 Enable) flag, which causes a debug exception to be generated when a
121 MOV instruction accesses one of the debug registers.
123 FIXME: My Intel manual says we should use 0xF800, not 0xFC00. */
124 #define DR_CONTROL_RESERVED (0xFC00)
126 /* Auxiliary helper macros. */
128 /* A value that masks all fields in DR7 that are reserved by Intel. */
129 #define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
131 /* The I'th debug register is vacant if its Local and Global Enable
132 bits are reset in the Debug Control register. */
133 #define I386_DR_VACANT(state, i) \
134 (((state)->dr_control_mirror & (3 << (DR_ENABLE_SIZE * (i)))) == 0)
136 /* Locally enable the break/watchpoint in the I'th debug register. */
137 #define I386_DR_LOCAL_ENABLE(state, i) \
139 (state)->dr_control_mirror |= \
140 (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
143 /* Globally enable the break/watchpoint in the I'th debug register. */
144 #define I386_DR_GLOBAL_ENABLE(state, i) \
146 (state)->dr_control_mirror |= \
147 (1 << (DR_GLOBAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
150 /* Disable the break/watchpoint in the I'th debug register. */
151 #define I386_DR_DISABLE(state, i) \
153 (state)->dr_control_mirror &= \
154 ~(3 << (DR_ENABLE_SIZE * (i))); \
157 /* Set in DR7 the RW and LEN fields for the I'th debug register. */
158 #define I386_DR_SET_RW_LEN(state, i, rwlen) \
160 (state)->dr_control_mirror &= \
161 ~(0x0f << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
162 (state)->dr_control_mirror |= \
163 ((rwlen) << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
166 /* Get from DR7 the RW and LEN fields for the I'th debug register. */
167 #define I386_DR_GET_RW_LEN(dr7, i) \
169 >> (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))) & 0x0f)
171 /* Did the watchpoint whose address is in the I'th register break? */
172 #define I386_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i)))
174 /* Per-process data. We don't bind this to a per-inferior registry
175 because of targets like x86 GNU/Linux that need to keep track of
176 processes that aren't bound to any inferior (e.g., fork children,
179 struct i386_process_info
182 struct i386_process_info
*next
;
184 /* The process identifier. */
187 /* Copy of i386 hardware debug registers. */
188 struct i386_debug_reg_state state
;
191 static struct i386_process_info
*i386_process_list
= NULL
;
193 /* Find process data for process PID. */
195 static struct i386_process_info
*
196 i386_find_process_pid (pid_t pid
)
198 struct i386_process_info
*proc
;
200 for (proc
= i386_process_list
; proc
; proc
= proc
->next
)
201 if (proc
->pid
== pid
)
207 /* Add process data for process PID. Returns newly allocated info
210 static struct i386_process_info
*
211 i386_add_process (pid_t pid
)
213 struct i386_process_info
*proc
;
215 proc
= xcalloc (1, sizeof (*proc
));
218 proc
->next
= i386_process_list
;
219 i386_process_list
= proc
;
224 /* Get data specific info for process PID, creating it if necessary.
225 Never returns NULL. */
227 static struct i386_process_info
*
228 i386_process_info_get (pid_t pid
)
230 struct i386_process_info
*proc
;
232 proc
= i386_find_process_pid (pid
);
234 proc
= i386_add_process (pid
);
239 /* Get debug registers state for process PID. */
241 struct i386_debug_reg_state
*
242 i386_debug_reg_state (pid_t pid
)
244 return &i386_process_info_get (pid
)->state
;
247 /* See declaration in i386-nat.h. */
250 i386_forget_process (pid_t pid
)
252 struct i386_process_info
*proc
, **proc_link
;
254 proc
= i386_process_list
;
255 proc_link
= &i386_process_list
;
259 if (proc
->pid
== pid
)
261 *proc_link
= proc
->next
;
267 proc_link
= &proc
->next
;
272 /* Types of operations supported by i386_handle_nonaligned_watchpoint. */
273 typedef enum { WP_INSERT
, WP_REMOVE
, WP_COUNT
} i386_wp_op_t
;
275 /* Implementation. */
277 /* Clear the reference counts and forget everything we knew about the
281 i386_cleanup_dregs (void)
283 /* Starting from scratch has the same effect. */
284 i386_forget_process (ptid_get_pid (inferior_ptid
));
287 /* Print the values of the mirrored debug registers. */
290 i386_dr_show (struct i386_debug_reg_state
*state
,
291 const char *func
, CORE_ADDR addr
,
292 int len
, enum target_hw_bp_type type
)
296 debug_printf ("%s", func
);
298 debug_printf (" (addr=%s, len=%d, type=%s)",
300 type
== hw_write
? "data-write"
301 : (type
== hw_read
? "data-read"
302 : (type
== hw_access
? "data-read/write"
303 : (type
== hw_execute
? "instruction-execute"
304 /* FIXME: if/when I/O read/write
305 watchpoints are supported, add them
308 debug_printf (":\n");
309 debug_printf ("\tCONTROL (DR7): %s STATUS (DR6): %s\n",
310 phex (state
->dr_control_mirror
, 8),
311 phex (state
->dr_status_mirror
, 8));
312 ALL_DEBUG_REGISTERS (i
)
315 \tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
316 i
, phex (state
->dr_mirror
[i
],
317 i386_get_debug_register_length ()),
318 state
->dr_ref_count
[i
],
319 i
+ 1, phex (state
->dr_mirror
[i
+ 1],
320 i386_get_debug_register_length ()),
321 state
->dr_ref_count
[i
+ 1]);
326 /* Return the value of a 4-bit field for DR7 suitable for watching a
327 region of LEN bytes for accesses of type TYPE. LEN is assumed to
328 have the value of 1, 2, or 4. */
331 i386_dr_length_and_rw_bits (int len
, enum target_hw_bp_type type
)
344 internal_error (__FILE__
, __LINE__
,
345 _("The i386 doesn't support "
346 "data-read watchpoints.\n"));
351 /* Not yet supported. */
357 internal_error (__FILE__
, __LINE__
, _("\
358 Invalid hardware breakpoint type %d in i386_dr_length_and_rw_bits.\n"),
365 return (DR_LEN_1
| rw
);
367 return (DR_LEN_2
| rw
);
369 return (DR_LEN_4
| rw
);
371 if (TARGET_HAS_DR_LEN_8
)
372 return (DR_LEN_8
| rw
);
373 /* ELSE FALL THROUGH */
375 internal_error (__FILE__
, __LINE__
, _("\
376 Invalid hardware breakpoint length %d in i386_dr_length_and_rw_bits.\n"), len
);
380 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
381 according to the length of the region to watch. LEN_RW_BITS is the
382 value of the bits from DR7 which describes the length and access
383 type of the region to be watched by this watchpoint. Return 0 on
384 success, -1 on failure. */
387 i386_dr_insert_aligned_watchpoint (struct i386_debug_reg_state
*state
,
388 CORE_ADDR addr
, unsigned len_rw_bits
)
392 if (!i386_dr_low_can_set_addr () || !i386_dr_low_can_set_control ())
395 /* First, look for an occupied debug register with the same address
396 and the same RW and LEN definitions. If we find one, we can
397 reuse it for this watchpoint as well (and save a register). */
398 ALL_DEBUG_REGISTERS (i
)
400 if (!I386_DR_VACANT (state
, i
)
401 && state
->dr_mirror
[i
] == addr
402 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
404 state
->dr_ref_count
[i
]++;
409 /* Next, look for a vacant debug register. */
410 ALL_DEBUG_REGISTERS (i
)
412 if (I386_DR_VACANT (state
, i
))
416 /* No more debug registers! */
420 /* Now set up the register I to watch our region. */
422 /* Record the info in our local mirrored array. */
423 state
->dr_mirror
[i
] = addr
;
424 state
->dr_ref_count
[i
] = 1;
425 I386_DR_SET_RW_LEN (state
, i
, len_rw_bits
);
426 /* Note: we only enable the watchpoint locally, i.e. in the current
427 task. Currently, no i386 target allows or supports global
428 watchpoints; however, if any target would want that in the
429 future, GDB should probably provide a command to control whether
430 to enable watchpoints globally or locally, and the code below
431 should use global or local enable and slow-down flags as
433 I386_DR_LOCAL_ENABLE (state
, i
);
434 state
->dr_control_mirror
|= DR_LOCAL_SLOWDOWN
;
435 state
->dr_control_mirror
&= I386_DR_CONTROL_MASK
;
440 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
441 according to the length of the region to watch. LEN_RW_BITS is the
442 value of the bits from DR7 which describes the length and access
443 type of the region watched by this watchpoint. Return 0 on
444 success, -1 on failure. */
447 i386_dr_remove_aligned_watchpoint (struct i386_debug_reg_state
*state
,
448 CORE_ADDR addr
, unsigned len_rw_bits
)
452 ALL_DEBUG_REGISTERS (i
)
454 if (!I386_DR_VACANT (state
, i
)
455 && state
->dr_mirror
[i
] == addr
456 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
458 if (--state
->dr_ref_count
[i
] == 0) /* No longer in use? */
460 /* Reset our mirror. */
461 state
->dr_mirror
[i
] = 0;
462 I386_DR_DISABLE (state
, i
);
471 /* Insert or remove a (possibly non-aligned) watchpoint, or count the
472 number of debug registers required to watch a region at address
473 ADDR whose length is LEN for accesses of type TYPE. Return 0 on
474 successful insertion or removal, a positive number when queried
475 about the number of registers, or -1 on failure. If WHAT is not a
476 valid value, bombs through internal_error. */
479 i386_handle_nonaligned_watchpoint (struct i386_debug_reg_state
*state
,
480 i386_wp_op_t what
, CORE_ADDR addr
, int len
,
481 enum target_hw_bp_type type
)
484 int max_wp_len
= TARGET_HAS_DR_LEN_8
? 8 : 4;
486 static const int size_try_array
[8][8] =
488 {1, 1, 1, 1, 1, 1, 1, 1}, /* Trying size one. */
489 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size two. */
490 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size three. */
491 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size four. */
492 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size five. */
493 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size six. */
494 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size seven. */
495 {8, 1, 2, 1, 4, 1, 2, 1}, /* Trying size eight. */
500 int align
= addr
% max_wp_len
;
501 /* Four (eight on AMD64) is the maximum length a debug register
503 int try = (len
> max_wp_len
? (max_wp_len
- 1) : len
- 1);
504 int size
= size_try_array
[try][align
];
506 if (what
== WP_COUNT
)
508 /* size_try_array[] is defined such that each iteration
509 through the loop is guaranteed to produce an address and a
510 size that can be watched with a single debug register.
511 Thus, for counting the registers required to watch a
512 region, we simply need to increment the count on each
518 unsigned len_rw
= i386_dr_length_and_rw_bits (size
, type
);
520 if (what
== WP_INSERT
)
521 retval
= i386_dr_insert_aligned_watchpoint (state
, addr
, len_rw
);
522 else if (what
== WP_REMOVE
)
523 retval
= i386_dr_remove_aligned_watchpoint (state
, addr
, len_rw
);
525 internal_error (__FILE__
, __LINE__
, _("\
526 Invalid value %d of operation in i386_handle_nonaligned_watchpoint.\n"),
539 /* Update the inferior debug registers state, in STATE, with the
540 new debug registers state, in NEW_STATE. */
543 i386_dr_update_inferior_debug_regs (struct i386_debug_reg_state
*state
,
544 struct i386_debug_reg_state
*new_state
)
548 ALL_DEBUG_REGISTERS (i
)
550 if (I386_DR_VACANT (new_state
, i
) != I386_DR_VACANT (state
, i
))
551 i386_dr_low_set_addr (new_state
, i
);
553 gdb_assert (new_state
->dr_mirror
[i
] == state
->dr_mirror
[i
]);
556 if (new_state
->dr_control_mirror
!= state
->dr_control_mirror
)
557 i386_dr_low_set_control (new_state
);
562 /* Insert a watchpoint to watch a memory region which starts at
563 address ADDR and whose length is LEN bytes. Watch memory accesses
564 of the type TYPE. Return 0 on success, -1 on failure. */
567 i386_insert_watchpoint (struct target_ops
*self
,
568 CORE_ADDR addr
, int len
, int type
,
569 struct expression
*cond
)
571 struct i386_debug_reg_state
*state
572 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
574 /* Work on a local copy of the debug registers, and on success,
575 commit the change back to the inferior. */
576 struct i386_debug_reg_state local_state
= *state
;
579 return 1; /* unsupported */
581 if (((len
!= 1 && len
!= 2 && len
!= 4)
582 && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
585 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
591 unsigned len_rw
= i386_dr_length_and_rw_bits (len
, type
);
593 retval
= i386_dr_insert_aligned_watchpoint (&local_state
,
598 i386_dr_update_inferior_debug_regs (state
, &local_state
);
601 i386_dr_show (state
, "insert_watchpoint", addr
, len
, type
);
606 /* Remove a watchpoint that watched the memory region which starts at
607 address ADDR, whose length is LEN bytes, and for accesses of the
608 type TYPE. Return 0 on success, -1 on failure. */
610 i386_remove_watchpoint (struct target_ops
*self
,
611 CORE_ADDR addr
, int len
, int type
,
612 struct expression
*cond
)
614 struct i386_debug_reg_state
*state
615 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
617 /* Work on a local copy of the debug registers, and on success,
618 commit the change back to the inferior. */
619 struct i386_debug_reg_state local_state
= *state
;
621 if (((len
!= 1 && len
!= 2 && len
!= 4)
622 && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
625 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
631 unsigned len_rw
= i386_dr_length_and_rw_bits (len
, type
);
633 retval
= i386_dr_remove_aligned_watchpoint (&local_state
,
638 i386_dr_update_inferior_debug_regs (state
, &local_state
);
641 i386_dr_show (state
, "remove_watchpoint", addr
, len
, type
);
646 /* Return non-zero if we can watch a memory region that starts at
647 address ADDR and whose length is LEN bytes. */
650 i386_region_ok_for_watchpoint (struct target_ops
*self
,
651 CORE_ADDR addr
, int len
)
653 struct i386_debug_reg_state
*state
654 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
657 /* Compute how many aligned watchpoints we would need to cover this
659 nregs
= i386_handle_nonaligned_watchpoint (state
, WP_COUNT
,
660 addr
, len
, hw_write
);
661 return nregs
<= DR_NADDR
? 1 : 0;
664 /* If the inferior has some break/watchpoint that triggered, set the
665 address associated with that break/watchpoint and return non-zero.
666 Otherwise, return zero. */
669 i386_stopped_data_address (struct target_ops
*ops
, CORE_ADDR
*addr_p
)
671 struct i386_debug_reg_state
*state
672 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
676 /* The current thread's DR_STATUS. We always need to read this to
677 check whether some watchpoint caused the trap. */
679 /* We need DR_CONTROL as well, but only iff DR_STATUS indicates a
680 data breakpoint trap. Only fetch it when necessary, to avoid an
681 unnecessary extra syscall when no watchpoint triggered. */
683 unsigned control
= 0;
685 /* In non-stop/async, threads can be running while we change the
686 global dr_mirror (and friends). Say, we set a watchpoint, and
687 let threads resume. Now, say you delete the watchpoint, or
688 add/remove watchpoints such that dr_mirror changes while threads
689 are running. On targets that support non-stop,
690 inserting/deleting watchpoints updates the global dr_mirror only.
691 It does not update the real thread's debug registers; that's only
692 done prior to resume. Instead, if threads are running when the
693 mirror changes, a temporary and transparent stop on all threads
694 is forced so they can get their copy of the debug registers
695 updated on re-resume. Now, say, a thread hit a watchpoint before
696 having been updated with the new dr_mirror contents, and we
697 haven't yet handled the corresponding SIGTRAP. If we trusted
698 dr_mirror below, we'd mistake the real trapped address (from the
699 last time we had updated debug registers in the thread) with
700 whatever was currently in dr_mirror. So to fix this, dr_mirror
701 always represents intention, what we _want_ threads to have in
702 debug registers. To get at the address and cause of the trap, we
703 need to read the state the thread still has in its debug
706 In sum, always get the current debug register values the current
707 thread has, instead of trusting the global mirror. If the thread
708 was running when we last changed watchpoints, the mirror no
709 longer represents what was set in this thread's debug
711 status
= i386_dr_low_get_status ();
713 ALL_DEBUG_REGISTERS (i
)
715 if (!I386_DR_WATCH_HIT (status
, i
))
720 control
= i386_dr_low_get_control ();
724 /* This second condition makes sure DRi is set up for a data
725 watchpoint, not a hardware breakpoint. The reason is that
726 GDB doesn't call the target_stopped_data_address method
727 except for data watchpoints. In other words, I'm being
729 if (I386_DR_GET_RW_LEN (control
, i
) != 0)
731 addr
= i386_dr_low_get_addr (i
);
734 i386_dr_show (state
, "watchpoint_hit", addr
, -1, hw_write
);
738 if (debug_hw_points
&& addr
== 0)
739 i386_dr_show (state
, "stopped_data_addr", 0, 0, hw_write
);
746 /* Return non-zero if the inferior has some watchpoint that triggered.
747 Otherwise return zero. */
750 i386_stopped_by_watchpoint (struct target_ops
*ops
)
753 return i386_stopped_data_address (ops
, &addr
);
756 /* Insert a hardware-assisted breakpoint at BP_TGT->placed_address.
757 Return 0 on success, EBUSY on failure. */
759 i386_insert_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
760 struct bp_target_info
*bp_tgt
)
762 struct i386_debug_reg_state
*state
763 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
764 unsigned len_rw
= i386_dr_length_and_rw_bits (1, hw_execute
);
765 CORE_ADDR addr
= bp_tgt
->placed_address
;
766 /* Work on a local copy of the debug registers, and on success,
767 commit the change back to the inferior. */
768 struct i386_debug_reg_state local_state
= *state
;
769 int retval
= i386_dr_insert_aligned_watchpoint (&local_state
,
774 i386_dr_update_inferior_debug_regs (state
, &local_state
);
777 i386_dr_show (state
, "insert_hwbp", addr
, 1, hw_execute
);
782 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
783 Return 0 on success, -1 on failure. */
786 i386_remove_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
787 struct bp_target_info
*bp_tgt
)
789 struct i386_debug_reg_state
*state
790 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
791 unsigned len_rw
= i386_dr_length_and_rw_bits (1, hw_execute
);
792 CORE_ADDR addr
= bp_tgt
->placed_address
;
793 /* Work on a local copy of the debug registers, and on success,
794 commit the change back to the inferior. */
795 struct i386_debug_reg_state local_state
= *state
;
796 int retval
= i386_dr_remove_aligned_watchpoint (&local_state
,
800 i386_dr_update_inferior_debug_regs (state
, &local_state
);
803 i386_dr_show (state
, "remove_hwbp", addr
, 1, hw_execute
);
808 /* Returns the number of hardware watchpoints of type TYPE that we can
809 set. Value is positive if we can set CNT watchpoints, zero if
810 setting watchpoints of type TYPE is not supported, and negative if
811 CNT is more than the maximum number of watchpoints of type TYPE
812 that we can support. TYPE is one of bp_hardware_watchpoint,
813 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
814 CNT is the number of such watchpoints used so far (including this
815 one). OTHERTYPE is non-zero if other types of watchpoints are
818 We always return 1 here because we don't have enough information
819 about possible overlap of addresses that they want to watch. As an
820 extreme example, consider the case where all the watchpoints watch
821 the same address and the same region length: then we can handle a
822 virtually unlimited number of watchpoints, due to debug register
823 sharing implemented via reference counts in i386-nat.c. */
826 i386_can_use_hw_breakpoint (struct target_ops
*self
,
827 int type
, int cnt
, int othertype
)
833 add_show_debug_regs_command (void)
835 /* A maintenance command to enable printing the internal DRi mirror
837 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
838 &debug_hw_points
, _("\
839 Set whether to show variables that mirror the x86 debug registers."), _("\
840 Show whether to show variables that mirror the x86 debug registers."), _("\
841 Use \"on\" to enable, \"off\" to disable.\n\
842 If enabled, the debug registers values are shown when GDB inserts\n\
843 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
844 triggers a breakpoint or watchpoint."),
847 &maintenance_set_cmdlist
,
848 &maintenance_show_cmdlist
);
851 /* There are only two global functions left. */
854 i386_use_watchpoints (struct target_ops
*t
)
856 /* After a watchpoint trap, the PC points to the instruction after the
857 one that caused the trap. Therefore we don't need to step over it.
858 But we do need to reset the status register to avoid another trap. */
859 t
->to_have_continuable_watchpoint
= 1;
861 t
->to_can_use_hw_breakpoint
= i386_can_use_hw_breakpoint
;
862 t
->to_region_ok_for_hw_watchpoint
= i386_region_ok_for_watchpoint
;
863 t
->to_stopped_by_watchpoint
= i386_stopped_by_watchpoint
;
864 t
->to_stopped_data_address
= i386_stopped_data_address
;
865 t
->to_insert_watchpoint
= i386_insert_watchpoint
;
866 t
->to_remove_watchpoint
= i386_remove_watchpoint
;
867 t
->to_insert_hw_breakpoint
= i386_insert_hw_breakpoint
;
868 t
->to_remove_hw_breakpoint
= i386_remove_hw_breakpoint
;
872 i386_set_debug_register_length (int len
)
874 /* This function should be called only once for each native target. */
875 gdb_assert (i386_dr_low
.debug_register_length
== 0);
876 gdb_assert (len
== 4 || len
== 8);
877 i386_dr_low
.debug_register_length
= len
;
878 add_show_debug_regs_command ();