1 /* Native-dependent code for the i386.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "breakpoint.h"
26 #include "gdb_assert.h"
29 /* Support for hardware watchpoints and breakpoints using the i386
32 This provides several functions for inserting and removing
33 hardware-assisted breakpoints and watchpoints, testing if one or
34 more of the watchpoints triggered and at what address, checking
35 whether a given region can be watched, etc.
37 The functions below implement debug registers sharing by reference
38 counts, and allow to watch regions up to 16 bytes long. */
40 struct i386_dr_low_type i386_dr_low
;
43 /* Support for 8-byte wide hw watchpoints. */
44 #define TARGET_HAS_DR_LEN_8 (i386_dr_low.debug_register_length == 8)
46 /* DR7 Debug Control register fields. */
48 /* How many bits to skip in DR7 to get to R/W and LEN fields. */
49 #define DR_CONTROL_SHIFT 16
50 /* How many bits in DR7 per R/W and LEN field for each watchpoint. */
51 #define DR_CONTROL_SIZE 4
53 /* Watchpoint/breakpoint read/write fields in DR7. */
54 #define DR_RW_EXECUTE (0x0) /* Break on instruction execution. */
55 #define DR_RW_WRITE (0x1) /* Break on data writes. */
56 #define DR_RW_READ (0x3) /* Break on data reads or writes. */
58 /* This is here for completeness. No platform supports this
59 functionality yet (as of March 2001). Note that the DE flag in the
60 CR4 register needs to be set to support this. */
62 #define DR_RW_IORW (0x2) /* Break on I/O reads or writes. */
65 /* Watchpoint/breakpoint length fields in DR7. The 2-bit left shift
66 is so we could OR this with the read/write field defined above. */
67 #define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpoint. */
68 #define DR_LEN_2 (0x1 << 2) /* 2-byte region watch. */
69 #define DR_LEN_4 (0x3 << 2) /* 4-byte region watch. */
70 #define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (AMD64). */
72 /* Local and Global Enable flags in DR7.
74 When the Local Enable flag is set, the breakpoint/watchpoint is
75 enabled only for the current task; the processor automatically
76 clears this flag on every task switch. When the Global Enable flag
77 is set, the breakpoint/watchpoint is enabled for all tasks; the
78 processor never clears this flag.
80 Currently, all watchpoint are locally enabled. If you need to
81 enable them globally, read the comment which pertains to this in
82 i386_insert_aligned_watchpoint below. */
83 #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit. */
84 #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit. */
85 #define DR_ENABLE_SIZE 2 /* Two enable bits per debug register. */
87 /* Local and global exact breakpoint enable flags (a.k.a. slowdown
88 flags). These are only required on i386, to allow detection of the
89 exact instruction which caused a watchpoint to break; i486 and
90 later processors do that automatically. We set these flags for
91 backwards compatibility. */
92 #define DR_LOCAL_SLOWDOWN (0x100)
93 #define DR_GLOBAL_SLOWDOWN (0x200)
95 /* Fields reserved by Intel. This includes the GD (General Detect
96 Enable) flag, which causes a debug exception to be generated when a
97 MOV instruction accesses one of the debug registers.
99 FIXME: My Intel manual says we should use 0xF800, not 0xFC00. */
100 #define DR_CONTROL_RESERVED (0xFC00)
102 /* Auxiliary helper macros. */
104 /* A value that masks all fields in DR7 that are reserved by Intel. */
105 #define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
107 /* The I'th debug register is vacant if its Local and Global Enable
108 bits are reset in the Debug Control register. */
109 #define I386_DR_VACANT(state, i) \
110 (((state)->dr_control_mirror & (3 << (DR_ENABLE_SIZE * (i)))) == 0)
112 /* Locally enable the break/watchpoint in the I'th debug register. */
113 #define I386_DR_LOCAL_ENABLE(state, i) \
115 (state)->dr_control_mirror |= \
116 (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
119 /* Globally enable the break/watchpoint in the I'th debug register. */
120 #define I386_DR_GLOBAL_ENABLE(state, i) \
122 (state)->dr_control_mirror |= \
123 (1 << (DR_GLOBAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
126 /* Disable the break/watchpoint in the I'th debug register. */
127 #define I386_DR_DISABLE(state, i) \
129 (state)->dr_control_mirror &= \
130 ~(3 << (DR_ENABLE_SIZE * (i))); \
133 /* Set in DR7 the RW and LEN fields for the I'th debug register. */
134 #define I386_DR_SET_RW_LEN(state, i, rwlen) \
136 (state)->dr_control_mirror &= \
137 ~(0x0f << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
138 (state)->dr_control_mirror |= \
139 ((rwlen) << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
142 /* Get from DR7 the RW and LEN fields for the I'th debug register. */
143 #define I386_DR_GET_RW_LEN(dr7, i) \
145 >> (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))) & 0x0f)
147 /* Mask that this I'th watchpoint has triggered. */
148 #define I386_DR_WATCH_MASK(i) (1 << (i))
150 /* Did the watchpoint whose address is in the I'th register break? */
151 #define I386_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i)))
153 /* A macro to loop over all debug registers. */
154 #define ALL_DEBUG_REGISTERS(i) for (i = 0; i < DR_NADDR; i++)
156 /* Per-process data. We don't bind this to a per-inferior registry
157 because of targets like x86 GNU/Linux that need to keep track of
158 processes that aren't bound to any inferior (e.g., fork children,
161 struct i386_process_info
164 struct i386_process_info
*next
;
166 /* The process identifier. */
169 /* Copy of i386 hardware debug registers. */
170 struct i386_debug_reg_state state
;
173 static struct i386_process_info
*i386_process_list
= NULL
;
175 /* Find process data for process PID. */
177 static struct i386_process_info
*
178 i386_find_process_pid (pid_t pid
)
180 struct i386_process_info
*proc
;
182 for (proc
= i386_process_list
; proc
; proc
= proc
->next
)
183 if (proc
->pid
== pid
)
189 /* Add process data for process PID. Returns newly allocated info
192 static struct i386_process_info
*
193 i386_add_process (pid_t pid
)
195 struct i386_process_info
*proc
;
197 proc
= xcalloc (1, sizeof (*proc
));
200 proc
->next
= i386_process_list
;
201 i386_process_list
= proc
;
206 /* Get data specific info for process PID, creating it if necessary.
207 Never returns NULL. */
209 static struct i386_process_info
*
210 i386_process_info_get (pid_t pid
)
212 struct i386_process_info
*proc
;
214 proc
= i386_find_process_pid (pid
);
216 proc
= i386_add_process (pid
);
221 /* Get debug registers state for process PID. */
223 struct i386_debug_reg_state
*
224 i386_debug_reg_state (pid_t pid
)
226 return &i386_process_info_get (pid
)->state
;
229 /* See declaration in i386-nat.h. */
232 i386_forget_process (pid_t pid
)
234 struct i386_process_info
*proc
, **proc_link
;
236 proc
= i386_process_list
;
237 proc_link
= &i386_process_list
;
241 if (proc
->pid
== pid
)
243 *proc_link
= proc
->next
;
249 proc_link
= &proc
->next
;
254 /* Whether or not to print the mirrored debug registers. */
255 static int maint_show_dr
;
257 /* Types of operations supported by i386_handle_nonaligned_watchpoint. */
258 typedef enum { WP_INSERT
, WP_REMOVE
, WP_COUNT
} i386_wp_op_t
;
260 /* Internal functions. */
262 /* Return the value of a 4-bit field for DR7 suitable for watching a
263 region of LEN bytes for accesses of type TYPE. LEN is assumed to
264 have the value of 1, 2, or 4. */
265 static unsigned i386_length_and_rw_bits (int len
, enum target_hw_bp_type type
);
267 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
268 according to the length of the region to watch. LEN_RW_BITS is the
269 value of the bit-field from DR7 which describes the length and
270 access type of the region to be watched by this watchpoint. Return
271 0 on success, -1 on failure. */
272 static int i386_insert_aligned_watchpoint (struct i386_debug_reg_state
*state
,
274 unsigned len_rw_bits
);
276 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
277 according to the length of the region to watch. LEN_RW_BITS is the
278 value of the bits from DR7 which describes the length and access
279 type of the region watched by this watchpoint. Return 0 on
280 success, -1 on failure. */
281 static int i386_remove_aligned_watchpoint (struct i386_debug_reg_state
*state
,
283 unsigned len_rw_bits
);
285 /* Insert or remove a (possibly non-aligned) watchpoint, or count the
286 number of debug registers required to watch a region at address
287 ADDR whose length is LEN for accesses of type TYPE. Return 0 on
288 successful insertion or removal, a positive number when queried
289 about the number of registers, or -1 on failure. If WHAT is not a
290 valid value, bombs through internal_error. */
291 static int i386_handle_nonaligned_watchpoint (struct i386_debug_reg_state
*state
,
293 CORE_ADDR addr
, int len
,
294 enum target_hw_bp_type type
);
296 /* Implementation. */
298 /* Clear the reference counts and forget everything we knew about the
302 i386_cleanup_dregs (void)
304 /* Starting from scratch has the same effect. */
305 i386_forget_process (ptid_get_pid (inferior_ptid
));
308 /* Print the values of the mirrored debug registers. This is called
309 when maint_show_dr is non-zero. To set that up, type "maint
310 show-debug-regs" at GDB's prompt. */
313 i386_show_dr (struct i386_debug_reg_state
*state
,
314 const char *func
, CORE_ADDR addr
,
315 int len
, enum target_hw_bp_type type
)
317 int addr_size
= gdbarch_addr_bit (target_gdbarch ()) / 8;
320 puts_unfiltered (func
);
322 printf_unfiltered (" (addr=%lx, len=%d, type=%s)",
323 /* This code is for ia32, so casting CORE_ADDR
324 to unsigned long should be okay. */
325 (unsigned long)addr
, len
,
326 type
== hw_write
? "data-write"
327 : (type
== hw_read
? "data-read"
328 : (type
== hw_access
? "data-read/write"
329 : (type
== hw_execute
? "instruction-execute"
330 /* FIXME: if/when I/O read/write
331 watchpoints are supported, add them
334 puts_unfiltered (":\n");
335 printf_unfiltered ("\tCONTROL (DR7): %s STATUS (DR6): %s\n",
336 phex (state
->dr_control_mirror
, 8),
337 phex (state
->dr_status_mirror
, 8));
338 ALL_DEBUG_REGISTERS(i
)
340 printf_unfiltered ("\
341 \tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
342 i
, phex (state
->dr_mirror
[i
], addr_size
),
343 state
->dr_ref_count
[i
],
344 i
+ 1, phex (state
->dr_mirror
[i
+ 1], addr_size
),
345 state
->dr_ref_count
[i
+1]);
350 /* Return the value of a 4-bit field for DR7 suitable for watching a
351 region of LEN bytes for accesses of type TYPE. LEN is assumed to
352 have the value of 1, 2, or 4. */
355 i386_length_and_rw_bits (int len
, enum target_hw_bp_type type
)
368 internal_error (__FILE__
, __LINE__
,
369 _("The i386 doesn't support "
370 "data-read watchpoints.\n"));
375 /* Not yet supported. */
381 internal_error (__FILE__
, __LINE__
, _("\
382 Invalid hardware breakpoint type %d in i386_length_and_rw_bits.\n"),
389 return (DR_LEN_1
| rw
);
391 return (DR_LEN_2
| rw
);
393 return (DR_LEN_4
| rw
);
395 if (TARGET_HAS_DR_LEN_8
)
396 return (DR_LEN_8
| rw
);
397 /* ELSE FALL THROUGH */
399 internal_error (__FILE__
, __LINE__
, _("\
400 Invalid hardware breakpoint length %d in i386_length_and_rw_bits.\n"), len
);
404 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
405 according to the length of the region to watch. LEN_RW_BITS is the
406 value of the bits from DR7 which describes the length and access
407 type of the region to be watched by this watchpoint. Return 0 on
408 success, -1 on failure. */
411 i386_insert_aligned_watchpoint (struct i386_debug_reg_state
*state
,
412 CORE_ADDR addr
, unsigned len_rw_bits
)
416 if (!i386_dr_low
.set_addr
|| !i386_dr_low
.set_control
)
419 /* First, look for an occupied debug register with the same address
420 and the same RW and LEN definitions. If we find one, we can
421 reuse it for this watchpoint as well (and save a register). */
422 ALL_DEBUG_REGISTERS(i
)
424 if (!I386_DR_VACANT (state
, i
)
425 && state
->dr_mirror
[i
] == addr
426 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
428 state
->dr_ref_count
[i
]++;
433 /* Next, look for a vacant debug register. */
434 ALL_DEBUG_REGISTERS(i
)
436 if (I386_DR_VACANT (state
, i
))
440 /* No more debug registers! */
444 /* Now set up the register I to watch our region. */
446 /* Record the info in our local mirrored array. */
447 state
->dr_mirror
[i
] = addr
;
448 state
->dr_ref_count
[i
] = 1;
449 I386_DR_SET_RW_LEN (state
, i
, len_rw_bits
);
450 /* Note: we only enable the watchpoint locally, i.e. in the current
451 task. Currently, no i386 target allows or supports global
452 watchpoints; however, if any target would want that in the
453 future, GDB should probably provide a command to control whether
454 to enable watchpoints globally or locally, and the code below
455 should use global or local enable and slow-down flags as
457 I386_DR_LOCAL_ENABLE (state
, i
);
458 state
->dr_control_mirror
|= DR_LOCAL_SLOWDOWN
;
459 state
->dr_control_mirror
&= I386_DR_CONTROL_MASK
;
464 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
465 according to the length of the region to watch. LEN_RW_BITS is the
466 value of the bits from DR7 which describes the length and access
467 type of the region watched by this watchpoint. Return 0 on
468 success, -1 on failure. */
471 i386_remove_aligned_watchpoint (struct i386_debug_reg_state
*state
,
472 CORE_ADDR addr
, unsigned len_rw_bits
)
476 ALL_DEBUG_REGISTERS(i
)
478 if (!I386_DR_VACANT (state
, i
)
479 && state
->dr_mirror
[i
] == addr
480 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
482 if (--state
->dr_ref_count
[i
] == 0) /* no longer in use? */
484 /* Reset our mirror. */
485 state
->dr_mirror
[i
] = 0;
486 I386_DR_DISABLE (state
, i
);
495 /* Insert or remove a (possibly non-aligned) watchpoint, or count the
496 number of debug registers required to watch a region at address
497 ADDR whose length is LEN for accesses of type TYPE. Return 0 on
498 successful insertion or removal, a positive number when queried
499 about the number of registers, or -1 on failure. If WHAT is not a
500 valid value, bombs through internal_error. */
503 i386_handle_nonaligned_watchpoint (struct i386_debug_reg_state
*state
,
504 i386_wp_op_t what
, CORE_ADDR addr
, int len
,
505 enum target_hw_bp_type type
)
508 int max_wp_len
= TARGET_HAS_DR_LEN_8
? 8 : 4;
510 static int size_try_array
[8][8] =
512 {1, 1, 1, 1, 1, 1, 1, 1}, /* Trying size one. */
513 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size two. */
514 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size three. */
515 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size four. */
516 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size five. */
517 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size six. */
518 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size seven. */
519 {8, 1, 2, 1, 4, 1, 2, 1}, /* Trying size eight. */
524 int align
= addr
% max_wp_len
;
525 /* Four (eight on AMD64) is the maximum length a debug register
527 int try = (len
> max_wp_len
? (max_wp_len
- 1) : len
- 1);
528 int size
= size_try_array
[try][align
];
530 if (what
== WP_COUNT
)
532 /* size_try_array[] is defined such that each iteration
533 through the loop is guaranteed to produce an address and a
534 size that can be watched with a single debug register.
535 Thus, for counting the registers required to watch a
536 region, we simply need to increment the count on each
542 unsigned len_rw
= i386_length_and_rw_bits (size
, type
);
544 if (what
== WP_INSERT
)
545 retval
= i386_insert_aligned_watchpoint (state
, addr
, len_rw
);
546 else if (what
== WP_REMOVE
)
547 retval
= i386_remove_aligned_watchpoint (state
, addr
, len_rw
);
549 internal_error (__FILE__
, __LINE__
, _("\
550 Invalid value %d of operation in i386_handle_nonaligned_watchpoint.\n"),
563 /* Update the inferior's debug registers with the new debug registers
564 state, in NEW_STATE, and then update our local mirror to match. */
567 i386_update_inferior_debug_regs (struct i386_debug_reg_state
*new_state
)
569 struct i386_debug_reg_state
*state
570 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
573 ALL_DEBUG_REGISTERS (i
)
575 if (I386_DR_VACANT (new_state
, i
) != I386_DR_VACANT (state
, i
))
576 i386_dr_low
.set_addr (i
, new_state
->dr_mirror
[i
]);
578 gdb_assert (new_state
->dr_mirror
[i
] == state
->dr_mirror
[i
]);
581 if (new_state
->dr_control_mirror
!= state
->dr_control_mirror
)
582 i386_dr_low
.set_control (new_state
->dr_control_mirror
);
587 /* Insert a watchpoint to watch a memory region which starts at
588 address ADDR and whose length is LEN bytes. Watch memory accesses
589 of the type TYPE. Return 0 on success, -1 on failure. */
592 i386_insert_watchpoint (struct target_ops
*self
,
593 CORE_ADDR addr
, int len
, int type
,
594 struct expression
*cond
)
596 struct i386_debug_reg_state
*state
597 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
599 /* Work on a local copy of the debug registers, and on success,
600 commit the change back to the inferior. */
601 struct i386_debug_reg_state local_state
= *state
;
604 return 1; /* unsupported */
606 if (((len
!= 1 && len
!=2 && len
!=4) && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
608 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
609 WP_INSERT
, addr
, len
, type
);
612 unsigned len_rw
= i386_length_and_rw_bits (len
, type
);
614 retval
= i386_insert_aligned_watchpoint (&local_state
,
619 i386_update_inferior_debug_regs (&local_state
);
622 i386_show_dr (state
, "insert_watchpoint", addr
, len
, type
);
627 /* Remove a watchpoint that watched the memory region which starts at
628 address ADDR, whose length is LEN bytes, and for accesses of the
629 type TYPE. Return 0 on success, -1 on failure. */
631 i386_remove_watchpoint (struct target_ops
*self
,
632 CORE_ADDR addr
, int len
, int type
,
633 struct expression
*cond
)
635 struct i386_debug_reg_state
*state
636 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
638 /* Work on a local copy of the debug registers, and on success,
639 commit the change back to the inferior. */
640 struct i386_debug_reg_state local_state
= *state
;
642 if (((len
!= 1 && len
!=2 && len
!=4) && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
644 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
645 WP_REMOVE
, addr
, len
, type
);
648 unsigned len_rw
= i386_length_and_rw_bits (len
, type
);
650 retval
= i386_remove_aligned_watchpoint (&local_state
,
655 i386_update_inferior_debug_regs (&local_state
);
658 i386_show_dr (state
, "remove_watchpoint", addr
, len
, type
);
663 /* Return non-zero if we can watch a memory region that starts at
664 address ADDR and whose length is LEN bytes. */
667 i386_region_ok_for_watchpoint (struct target_ops
*self
,
668 CORE_ADDR addr
, int len
)
670 struct i386_debug_reg_state
*state
671 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
674 /* Compute how many aligned watchpoints we would need to cover this
676 nregs
= i386_handle_nonaligned_watchpoint (state
,
677 WP_COUNT
, addr
, len
, hw_write
);
678 return nregs
<= DR_NADDR
? 1 : 0;
681 /* If the inferior has some watchpoint that triggered, set the
682 address associated with that watchpoint and return non-zero.
683 Otherwise, return zero. */
686 i386_stopped_data_address (struct target_ops
*ops
, CORE_ADDR
*addr_p
)
688 struct i386_debug_reg_state
*state
689 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
693 /* The current thread's DR_STATUS. We always need to read this to
694 check whether some watchpoint caused the trap. */
696 /* We need DR_CONTROL as well, but only iff DR_STATUS indicates a
697 data breakpoint trap. Only fetch it when necessary, to avoid an
698 unnecessary extra syscall when no watchpoint triggered. */
700 unsigned control
= 0;
702 /* In non-stop/async, threads can be running while we change the
703 STATE (and friends). Say, we set a watchpoint, and let threads
704 resume. Now, say you delete the watchpoint, or add/remove
705 watchpoints such that STATE changes while threads are running.
706 On targets that support non-stop, inserting/deleting watchpoints
707 updates the STATE only. It does not update the real thread's
708 debug registers; that's only done prior to resume. Instead, if
709 threads are running when the mirror changes, a temporary and
710 transparent stop on all threads is forced so they can get their
711 copy of the debug registers updated on re-resume. Now, say,
712 a thread hit a watchpoint before having been updated with the new
713 STATE contents, and we haven't yet handled the corresponding
714 SIGTRAP. If we trusted STATE below, we'd mistake the real
715 trapped address (from the last time we had updated debug
716 registers in the thread) with whatever was currently in STATE.
717 So to fix this, STATE always represents intention, what we _want_
718 threads to have in debug registers. To get at the address and
719 cause of the trap, we need to read the state the thread still has
720 in its debug registers.
722 In sum, always get the current debug register values the current
723 thread has, instead of trusting the global mirror. If the thread
724 was running when we last changed watchpoints, the mirror no
725 longer represents what was set in this thread's debug
727 status
= i386_dr_low
.get_status ();
729 ALL_DEBUG_REGISTERS(i
)
731 if (!I386_DR_WATCH_HIT (status
, i
))
736 control
= i386_dr_low
.get_control ();
740 /* This second condition makes sure DRi is set up for a data
741 watchpoint, not a hardware breakpoint. The reason is that
742 GDB doesn't call the target_stopped_data_address method
743 except for data watchpoints. In other words, I'm being
745 if (I386_DR_GET_RW_LEN (control
, i
) != 0)
747 addr
= i386_dr_low
.get_addr (i
);
750 i386_show_dr (state
, "watchpoint_hit", addr
, -1, hw_write
);
753 if (maint_show_dr
&& addr
== 0)
754 i386_show_dr (state
, "stopped_data_addr", 0, 0, hw_write
);
762 i386_stopped_by_watchpoint (struct target_ops
*ops
)
765 return i386_stopped_data_address (ops
, &addr
);
768 /* Insert a hardware-assisted breakpoint at BP_TGT->placed_address.
769 Return 0 on success, EBUSY on failure. */
771 i386_insert_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
772 struct bp_target_info
*bp_tgt
)
774 struct i386_debug_reg_state
*state
775 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
776 unsigned len_rw
= i386_length_and_rw_bits (1, hw_execute
);
777 CORE_ADDR addr
= bp_tgt
->placed_address
;
778 /* Work on a local copy of the debug registers, and on success,
779 commit the change back to the inferior. */
780 struct i386_debug_reg_state local_state
= *state
;
781 int retval
= i386_insert_aligned_watchpoint (&local_state
,
782 addr
, len_rw
) ? EBUSY
: 0;
785 i386_update_inferior_debug_regs (&local_state
);
788 i386_show_dr (state
, "insert_hwbp", addr
, 1, hw_execute
);
793 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
794 Return 0 on success, -1 on failure. */
797 i386_remove_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
798 struct bp_target_info
*bp_tgt
)
800 struct i386_debug_reg_state
*state
801 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
802 unsigned len_rw
= i386_length_and_rw_bits (1, hw_execute
);
803 CORE_ADDR addr
= bp_tgt
->placed_address
;
804 /* Work on a local copy of the debug registers, and on success,
805 commit the change back to the inferior. */
806 struct i386_debug_reg_state local_state
= *state
;
807 int retval
= i386_remove_aligned_watchpoint (&local_state
,
811 i386_update_inferior_debug_regs (&local_state
);
814 i386_show_dr (state
, "remove_hwbp", addr
, 1, hw_execute
);
819 /* Returns the number of hardware watchpoints of type TYPE that we can
820 set. Value is positive if we can set CNT watchpoints, zero if
821 setting watchpoints of type TYPE is not supported, and negative if
822 CNT is more than the maximum number of watchpoints of type TYPE
823 that we can support. TYPE is one of bp_hardware_watchpoint,
824 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
825 CNT is the number of such watchpoints used so far (including this
826 one). OTHERTYPE is non-zero if other types of watchpoints are
829 We always return 1 here because we don't have enough information
830 about possible overlap of addresses that they want to watch. As an
831 extreme example, consider the case where all the watchpoints watch
832 the same address and the same region length: then we can handle a
833 virtually unlimited number of watchpoints, due to debug register
834 sharing implemented via reference counts in i386-nat.c. */
837 i386_can_use_hw_breakpoint (struct target_ops
*self
,
838 int type
, int cnt
, int othertype
)
844 add_show_debug_regs_command (void)
846 /* A maintenance command to enable printing the internal DRi mirror
848 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
850 Set whether to show variables that mirror the x86 debug registers."), _("\
851 Show whether to show variables that mirror the x86 debug registers."), _("\
852 Use \"on\" to enable, \"off\" to disable.\n\
853 If enabled, the debug registers values are shown when GDB inserts\n\
854 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
855 triggers a breakpoint or watchpoint."),
858 &maintenance_set_cmdlist
,
859 &maintenance_show_cmdlist
);
862 /* There are only two global functions left. */
865 i386_use_watchpoints (struct target_ops
*t
)
867 /* After a watchpoint trap, the PC points to the instruction after the
868 one that caused the trap. Therefore we don't need to step over it.
869 But we do need to reset the status register to avoid another trap. */
870 t
->to_have_continuable_watchpoint
= 1;
872 t
->to_can_use_hw_breakpoint
= i386_can_use_hw_breakpoint
;
873 t
->to_region_ok_for_hw_watchpoint
= i386_region_ok_for_watchpoint
;
874 t
->to_stopped_by_watchpoint
= i386_stopped_by_watchpoint
;
875 t
->to_stopped_data_address
= i386_stopped_data_address
;
876 t
->to_insert_watchpoint
= i386_insert_watchpoint
;
877 t
->to_remove_watchpoint
= i386_remove_watchpoint
;
878 t
->to_insert_hw_breakpoint
= i386_insert_hw_breakpoint
;
879 t
->to_remove_hw_breakpoint
= i386_remove_hw_breakpoint
;
883 i386_set_debug_register_length (int len
)
885 /* This function should be called only once for each native target. */
886 gdb_assert (i386_dr_low
.debug_register_length
== 0);
887 gdb_assert (len
== 4 || len
== 8);
888 i386_dr_low
.debug_register_length
= len
;
889 add_show_debug_regs_command ();