1 /* Native-dependent code for the i386.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "breakpoint.h"
26 #include "gdb_assert.h"
29 /* Support for hardware watchpoints and breakpoints using the i386
32 This provides several functions for inserting and removing
33 hardware-assisted breakpoints and watchpoints, testing if one or
34 more of the watchpoints triggered and at what address, checking
35 whether a given region can be watched, etc.
37 The functions below implement debug registers sharing by reference
38 counts, and allow to watch regions up to 16 bytes long. */
40 /* Function used for printing mirrored debug registers. */
41 #define debug_printf(fmt, args...) \
42 fprintf_unfiltered (gdb_stdlog, fmt, ##args);
44 /* Low-level function vector. */
45 struct i386_dr_low_type i386_dr_low
;
47 /* Debug register size, in bytes. */
48 #define i386_get_debug_register_length() \
49 (i386_dr_low.debug_register_length)
51 /* Support for 8-byte wide hw watchpoints. */
52 #define TARGET_HAS_DR_LEN_8 (i386_get_debug_register_length () == 8)
54 /* DR7 Debug Control register fields. */
56 /* How many bits to skip in DR7 to get to R/W and LEN fields. */
57 #define DR_CONTROL_SHIFT 16
58 /* How many bits in DR7 per R/W and LEN field for each watchpoint. */
59 #define DR_CONTROL_SIZE 4
61 /* Watchpoint/breakpoint read/write fields in DR7. */
62 #define DR_RW_EXECUTE (0x0) /* Break on instruction execution. */
63 #define DR_RW_WRITE (0x1) /* Break on data writes. */
64 #define DR_RW_READ (0x3) /* Break on data reads or writes. */
66 /* This is here for completeness. No platform supports this
67 functionality yet (as of March 2001). Note that the DE flag in the
68 CR4 register needs to be set to support this. */
70 #define DR_RW_IORW (0x2) /* Break on I/O reads or writes. */
73 /* Watchpoint/breakpoint length fields in DR7. The 2-bit left shift
74 is so we could OR this with the read/write field defined above. */
75 #define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpoint. */
76 #define DR_LEN_2 (0x1 << 2) /* 2-byte region watch. */
77 #define DR_LEN_4 (0x3 << 2) /* 4-byte region watch. */
78 #define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (AMD64). */
80 /* Local and Global Enable flags in DR7.
82 When the Local Enable flag is set, the breakpoint/watchpoint is
83 enabled only for the current task; the processor automatically
84 clears this flag on every task switch. When the Global Enable flag
85 is set, the breakpoint/watchpoint is enabled for all tasks; the
86 processor never clears this flag.
88 Currently, all watchpoint are locally enabled. If you need to
89 enable them globally, read the comment which pertains to this in
90 i386_insert_aligned_watchpoint below. */
91 #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit. */
92 #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit. */
93 #define DR_ENABLE_SIZE 2 /* Two enable bits per debug register. */
95 /* Local and global exact breakpoint enable flags (a.k.a. slowdown
96 flags). These are only required on i386, to allow detection of the
97 exact instruction which caused a watchpoint to break; i486 and
98 later processors do that automatically. We set these flags for
99 backwards compatibility. */
100 #define DR_LOCAL_SLOWDOWN (0x100)
101 #define DR_GLOBAL_SLOWDOWN (0x200)
103 /* Fields reserved by Intel. This includes the GD (General Detect
104 Enable) flag, which causes a debug exception to be generated when a
105 MOV instruction accesses one of the debug registers.
107 FIXME: My Intel manual says we should use 0xF800, not 0xFC00. */
108 #define DR_CONTROL_RESERVED (0xFC00)
110 /* Auxiliary helper macros. */
112 /* A value that masks all fields in DR7 that are reserved by Intel. */
113 #define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
115 /* The I'th debug register is vacant if its Local and Global Enable
116 bits are reset in the Debug Control register. */
117 #define I386_DR_VACANT(state, i) \
118 (((state)->dr_control_mirror & (3 << (DR_ENABLE_SIZE * (i)))) == 0)
120 /* Locally enable the break/watchpoint in the I'th debug register. */
121 #define I386_DR_LOCAL_ENABLE(state, i) \
123 (state)->dr_control_mirror |= \
124 (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
127 /* Globally enable the break/watchpoint in the I'th debug register. */
128 #define I386_DR_GLOBAL_ENABLE(state, i) \
130 (state)->dr_control_mirror |= \
131 (1 << (DR_GLOBAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
134 /* Disable the break/watchpoint in the I'th debug register. */
135 #define I386_DR_DISABLE(state, i) \
137 (state)->dr_control_mirror &= \
138 ~(3 << (DR_ENABLE_SIZE * (i))); \
141 /* Set in DR7 the RW and LEN fields for the I'th debug register. */
142 #define I386_DR_SET_RW_LEN(state, i, rwlen) \
144 (state)->dr_control_mirror &= \
145 ~(0x0f << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
146 (state)->dr_control_mirror |= \
147 ((rwlen) << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
150 /* Get from DR7 the RW and LEN fields for the I'th debug register. */
151 #define I386_DR_GET_RW_LEN(dr7, i) \
153 >> (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))) & 0x0f)
155 /* Did the watchpoint whose address is in the I'th register break? */
156 #define I386_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i)))
158 /* A macro to loop over all debug registers. */
159 #define ALL_DEBUG_REGISTERS(i) for (i = 0; i < DR_NADDR; i++)
161 /* Per-process data. We don't bind this to a per-inferior registry
162 because of targets like x86 GNU/Linux that need to keep track of
163 processes that aren't bound to any inferior (e.g., fork children,
166 struct i386_process_info
169 struct i386_process_info
*next
;
171 /* The process identifier. */
174 /* Copy of i386 hardware debug registers. */
175 struct i386_debug_reg_state state
;
178 static struct i386_process_info
*i386_process_list
= NULL
;
180 /* Find process data for process PID. */
182 static struct i386_process_info
*
183 i386_find_process_pid (pid_t pid
)
185 struct i386_process_info
*proc
;
187 for (proc
= i386_process_list
; proc
; proc
= proc
->next
)
188 if (proc
->pid
== pid
)
194 /* Add process data for process PID. Returns newly allocated info
197 static struct i386_process_info
*
198 i386_add_process (pid_t pid
)
200 struct i386_process_info
*proc
;
202 proc
= xcalloc (1, sizeof (*proc
));
205 proc
->next
= i386_process_list
;
206 i386_process_list
= proc
;
211 /* Get data specific info for process PID, creating it if necessary.
212 Never returns NULL. */
214 static struct i386_process_info
*
215 i386_process_info_get (pid_t pid
)
217 struct i386_process_info
*proc
;
219 proc
= i386_find_process_pid (pid
);
221 proc
= i386_add_process (pid
);
226 /* Get debug registers state for process PID. */
228 struct i386_debug_reg_state
*
229 i386_debug_reg_state (pid_t pid
)
231 return &i386_process_info_get (pid
)->state
;
234 /* See declaration in i386-nat.h. */
237 i386_forget_process (pid_t pid
)
239 struct i386_process_info
*proc
, **proc_link
;
241 proc
= i386_process_list
;
242 proc_link
= &i386_process_list
;
246 if (proc
->pid
== pid
)
248 *proc_link
= proc
->next
;
254 proc_link
= &proc
->next
;
259 /* Whether or not to print the mirrored debug registers. */
260 static int maint_show_dr
;
262 /* Types of operations supported by i386_handle_nonaligned_watchpoint. */
263 typedef enum { WP_INSERT
, WP_REMOVE
, WP_COUNT
} i386_wp_op_t
;
265 /* Implementation. */
267 /* Clear the reference counts and forget everything we knew about the
271 i386_cleanup_dregs (void)
273 /* Starting from scratch has the same effect. */
274 i386_forget_process (ptid_get_pid (inferior_ptid
));
277 /* Print the values of the mirrored debug registers. */
280 i386_show_dr (struct i386_debug_reg_state
*state
,
281 const char *func
, CORE_ADDR addr
,
282 int len
, enum target_hw_bp_type type
)
286 debug_printf ("%s", func
);
288 debug_printf (" (addr=%s, len=%d, type=%s)",
290 type
== hw_write
? "data-write"
291 : (type
== hw_read
? "data-read"
292 : (type
== hw_access
? "data-read/write"
293 : (type
== hw_execute
? "instruction-execute"
294 /* FIXME: if/when I/O read/write
295 watchpoints are supported, add them
298 debug_printf (":\n");
299 debug_printf ("\tCONTROL (DR7): %s STATUS (DR6): %s\n",
300 phex (state
->dr_control_mirror
, 8),
301 phex (state
->dr_status_mirror
, 8));
302 ALL_DEBUG_REGISTERS (i
)
305 \tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
306 i
, phex (state
->dr_mirror
[i
],
307 i386_get_debug_register_length ()),
308 state
->dr_ref_count
[i
],
309 i
+ 1, phex (state
->dr_mirror
[i
+ 1],
310 i386_get_debug_register_length ()),
311 state
->dr_ref_count
[i
+ 1]);
316 /* Return the value of a 4-bit field for DR7 suitable for watching a
317 region of LEN bytes for accesses of type TYPE. LEN is assumed to
318 have the value of 1, 2, or 4. */
321 i386_length_and_rw_bits (int len
, enum target_hw_bp_type type
)
334 internal_error (__FILE__
, __LINE__
,
335 _("The i386 doesn't support "
336 "data-read watchpoints.\n"));
341 /* Not yet supported. */
347 internal_error (__FILE__
, __LINE__
, _("\
348 Invalid hardware breakpoint type %d in i386_length_and_rw_bits.\n"),
355 return (DR_LEN_1
| rw
);
357 return (DR_LEN_2
| rw
);
359 return (DR_LEN_4
| rw
);
361 if (TARGET_HAS_DR_LEN_8
)
362 return (DR_LEN_8
| rw
);
363 /* ELSE FALL THROUGH */
365 internal_error (__FILE__
, __LINE__
, _("\
366 Invalid hardware breakpoint length %d in i386_length_and_rw_bits.\n"), len
);
370 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
371 according to the length of the region to watch. LEN_RW_BITS is the
372 value of the bits from DR7 which describes the length and access
373 type of the region to be watched by this watchpoint. Return 0 on
374 success, -1 on failure. */
377 i386_insert_aligned_watchpoint (struct i386_debug_reg_state
*state
,
378 CORE_ADDR addr
, unsigned len_rw_bits
)
382 if (!i386_dr_low
.set_addr
|| !i386_dr_low
.set_control
)
385 /* First, look for an occupied debug register with the same address
386 and the same RW and LEN definitions. If we find one, we can
387 reuse it for this watchpoint as well (and save a register). */
388 ALL_DEBUG_REGISTERS (i
)
390 if (!I386_DR_VACANT (state
, i
)
391 && state
->dr_mirror
[i
] == addr
392 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
394 state
->dr_ref_count
[i
]++;
399 /* Next, look for a vacant debug register. */
400 ALL_DEBUG_REGISTERS (i
)
402 if (I386_DR_VACANT (state
, i
))
406 /* No more debug registers! */
410 /* Now set up the register I to watch our region. */
412 /* Record the info in our local mirrored array. */
413 state
->dr_mirror
[i
] = addr
;
414 state
->dr_ref_count
[i
] = 1;
415 I386_DR_SET_RW_LEN (state
, i
, len_rw_bits
);
416 /* Note: we only enable the watchpoint locally, i.e. in the current
417 task. Currently, no i386 target allows or supports global
418 watchpoints; however, if any target would want that in the
419 future, GDB should probably provide a command to control whether
420 to enable watchpoints globally or locally, and the code below
421 should use global or local enable and slow-down flags as
423 I386_DR_LOCAL_ENABLE (state
, i
);
424 state
->dr_control_mirror
|= DR_LOCAL_SLOWDOWN
;
425 state
->dr_control_mirror
&= I386_DR_CONTROL_MASK
;
430 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
431 according to the length of the region to watch. LEN_RW_BITS is the
432 value of the bits from DR7 which describes the length and access
433 type of the region watched by this watchpoint. Return 0 on
434 success, -1 on failure. */
437 i386_remove_aligned_watchpoint (struct i386_debug_reg_state
*state
,
438 CORE_ADDR addr
, unsigned len_rw_bits
)
442 ALL_DEBUG_REGISTERS (i
)
444 if (!I386_DR_VACANT (state
, i
)
445 && state
->dr_mirror
[i
] == addr
446 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
448 if (--state
->dr_ref_count
[i
] == 0) /* No longer in use? */
450 /* Reset our mirror. */
451 state
->dr_mirror
[i
] = 0;
452 I386_DR_DISABLE (state
, i
);
461 /* Insert or remove a (possibly non-aligned) watchpoint, or count the
462 number of debug registers required to watch a region at address
463 ADDR whose length is LEN for accesses of type TYPE. Return 0 on
464 successful insertion or removal, a positive number when queried
465 about the number of registers, or -1 on failure. If WHAT is not a
466 valid value, bombs through internal_error. */
469 i386_handle_nonaligned_watchpoint (struct i386_debug_reg_state
*state
,
470 i386_wp_op_t what
, CORE_ADDR addr
, int len
,
471 enum target_hw_bp_type type
)
474 int max_wp_len
= TARGET_HAS_DR_LEN_8
? 8 : 4;
476 static const int size_try_array
[8][8] =
478 {1, 1, 1, 1, 1, 1, 1, 1}, /* Trying size one. */
479 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size two. */
480 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size three. */
481 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size four. */
482 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size five. */
483 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size six. */
484 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size seven. */
485 {8, 1, 2, 1, 4, 1, 2, 1}, /* Trying size eight. */
490 int align
= addr
% max_wp_len
;
491 /* Four (eight on AMD64) is the maximum length a debug register
493 int try = (len
> max_wp_len
? (max_wp_len
- 1) : len
- 1);
494 int size
= size_try_array
[try][align
];
496 if (what
== WP_COUNT
)
498 /* size_try_array[] is defined such that each iteration
499 through the loop is guaranteed to produce an address and a
500 size that can be watched with a single debug register.
501 Thus, for counting the registers required to watch a
502 region, we simply need to increment the count on each
508 unsigned len_rw
= i386_length_and_rw_bits (size
, type
);
510 if (what
== WP_INSERT
)
511 retval
= i386_insert_aligned_watchpoint (state
, addr
, len_rw
);
512 else if (what
== WP_REMOVE
)
513 retval
= i386_remove_aligned_watchpoint (state
, addr
, len_rw
);
515 internal_error (__FILE__
, __LINE__
, _("\
516 Invalid value %d of operation in i386_handle_nonaligned_watchpoint.\n"),
529 /* Update the inferior's debug registers with the new debug registers
530 state, in NEW_STATE, and then update our local mirror to match. */
533 i386_update_inferior_debug_regs (struct i386_debug_reg_state
*new_state
)
535 struct i386_debug_reg_state
*state
536 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
539 ALL_DEBUG_REGISTERS (i
)
541 if (I386_DR_VACANT (new_state
, i
) != I386_DR_VACANT (state
, i
))
542 i386_dr_low
.set_addr (i
, new_state
->dr_mirror
[i
]);
544 gdb_assert (new_state
->dr_mirror
[i
] == state
->dr_mirror
[i
]);
547 if (new_state
->dr_control_mirror
!= state
->dr_control_mirror
)
548 i386_dr_low
.set_control (new_state
->dr_control_mirror
);
553 /* Insert a watchpoint to watch a memory region which starts at
554 address ADDR and whose length is LEN bytes. Watch memory accesses
555 of the type TYPE. Return 0 on success, -1 on failure. */
558 i386_insert_watchpoint (struct target_ops
*self
,
559 CORE_ADDR addr
, int len
, int type
,
560 struct expression
*cond
)
562 struct i386_debug_reg_state
*state
563 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
565 /* Work on a local copy of the debug registers, and on success,
566 commit the change back to the inferior. */
567 struct i386_debug_reg_state local_state
= *state
;
570 return 1; /* unsupported */
572 if (((len
!= 1 && len
!= 2 && len
!= 4)
573 && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
576 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
582 unsigned len_rw
= i386_length_and_rw_bits (len
, type
);
584 retval
= i386_insert_aligned_watchpoint (&local_state
,
589 i386_update_inferior_debug_regs (&local_state
);
592 i386_show_dr (state
, "insert_watchpoint", addr
, len
, type
);
597 /* Remove a watchpoint that watched the memory region which starts at
598 address ADDR, whose length is LEN bytes, and for accesses of the
599 type TYPE. Return 0 on success, -1 on failure. */
601 i386_remove_watchpoint (struct target_ops
*self
,
602 CORE_ADDR addr
, int len
, int type
,
603 struct expression
*cond
)
605 struct i386_debug_reg_state
*state
606 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
608 /* Work on a local copy of the debug registers, and on success,
609 commit the change back to the inferior. */
610 struct i386_debug_reg_state local_state
= *state
;
612 if (((len
!= 1 && len
!= 2 && len
!= 4)
613 && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
616 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
622 unsigned len_rw
= i386_length_and_rw_bits (len
, type
);
624 retval
= i386_remove_aligned_watchpoint (&local_state
,
629 i386_update_inferior_debug_regs (&local_state
);
632 i386_show_dr (state
, "remove_watchpoint", addr
, len
, type
);
637 /* Return non-zero if we can watch a memory region that starts at
638 address ADDR and whose length is LEN bytes. */
641 i386_region_ok_for_watchpoint (struct target_ops
*self
,
642 CORE_ADDR addr
, int len
)
644 struct i386_debug_reg_state
*state
645 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
648 /* Compute how many aligned watchpoints we would need to cover this
650 nregs
= i386_handle_nonaligned_watchpoint (state
, WP_COUNT
,
651 addr
, len
, hw_write
);
652 return nregs
<= DR_NADDR
? 1 : 0;
655 /* If the inferior has some break/watchpoint that triggered, set the
656 address associated with that break/watchpoint and return non-zero.
657 Otherwise, return zero. */
660 i386_stopped_data_address (struct target_ops
*ops
, CORE_ADDR
*addr_p
)
662 struct i386_debug_reg_state
*state
663 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
667 /* The current thread's DR_STATUS. We always need to read this to
668 check whether some watchpoint caused the trap. */
670 /* We need DR_CONTROL as well, but only iff DR_STATUS indicates a
671 data breakpoint trap. Only fetch it when necessary, to avoid an
672 unnecessary extra syscall when no watchpoint triggered. */
674 unsigned control
= 0;
676 /* In non-stop/async, threads can be running while we change the
677 global dr_mirror (and friends). Say, we set a watchpoint, and
678 let threads resume. Now, say you delete the watchpoint, or
679 add/remove watchpoints such that dr_mirror changes while threads
680 are running. On targets that support non-stop,
681 inserting/deleting watchpoints updates the global dr_mirror only.
682 It does not update the real thread's debug registers; that's only
683 done prior to resume. Instead, if threads are running when the
684 mirror changes, a temporary and transparent stop on all threads
685 is forced so they can get their copy of the debug registers
686 updated on re-resume. Now, say, a thread hit a watchpoint before
687 having been updated with the new dr_mirror contents, and we
688 haven't yet handled the corresponding SIGTRAP. If we trusted
689 dr_mirror below, we'd mistake the real trapped address (from the
690 last time we had updated debug registers in the thread) with
691 whatever was currently in dr_mirror. So to fix this, dr_mirror
692 always represents intention, what we _want_ threads to have in
693 debug registers. To get at the address and cause of the trap, we
694 need to read the state the thread still has in its debug
697 In sum, always get the current debug register values the current
698 thread has, instead of trusting the global mirror. If the thread
699 was running when we last changed watchpoints, the mirror no
700 longer represents what was set in this thread's debug
702 status
= i386_dr_low
.get_status ();
704 ALL_DEBUG_REGISTERS (i
)
706 if (!I386_DR_WATCH_HIT (status
, i
))
711 control
= i386_dr_low
.get_control ();
715 /* This second condition makes sure DRi is set up for a data
716 watchpoint, not a hardware breakpoint. The reason is that
717 GDB doesn't call the target_stopped_data_address method
718 except for data watchpoints. In other words, I'm being
720 if (I386_DR_GET_RW_LEN (control
, i
) != 0)
722 addr
= i386_dr_low
.get_addr (i
);
725 i386_show_dr (state
, "watchpoint_hit", addr
, -1, hw_write
);
729 if (maint_show_dr
&& addr
== 0)
730 i386_show_dr (state
, "stopped_data_addr", 0, 0, hw_write
);
737 /* Return non-zero if the inferior has some watchpoint that triggered.
738 Otherwise return zero. */
741 i386_stopped_by_watchpoint (struct target_ops
*ops
)
744 return i386_stopped_data_address (ops
, &addr
);
747 /* Insert a hardware-assisted breakpoint at BP_TGT->placed_address.
748 Return 0 on success, EBUSY on failure. */
750 i386_insert_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
751 struct bp_target_info
*bp_tgt
)
753 struct i386_debug_reg_state
*state
754 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
755 unsigned len_rw
= i386_length_and_rw_bits (1, hw_execute
);
756 CORE_ADDR addr
= bp_tgt
->placed_address
;
757 /* Work on a local copy of the debug registers, and on success,
758 commit the change back to the inferior. */
759 struct i386_debug_reg_state local_state
= *state
;
760 int retval
= i386_insert_aligned_watchpoint (&local_state
,
761 addr
, len_rw
) ? EBUSY
: 0;
764 i386_update_inferior_debug_regs (&local_state
);
767 i386_show_dr (state
, "insert_hwbp", addr
, 1, hw_execute
);
772 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
773 Return 0 on success, -1 on failure. */
776 i386_remove_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
777 struct bp_target_info
*bp_tgt
)
779 struct i386_debug_reg_state
*state
780 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
781 unsigned len_rw
= i386_length_and_rw_bits (1, hw_execute
);
782 CORE_ADDR addr
= bp_tgt
->placed_address
;
783 /* Work on a local copy of the debug registers, and on success,
784 commit the change back to the inferior. */
785 struct i386_debug_reg_state local_state
= *state
;
786 int retval
= i386_remove_aligned_watchpoint (&local_state
,
790 i386_update_inferior_debug_regs (&local_state
);
793 i386_show_dr (state
, "remove_hwbp", addr
, 1, hw_execute
);
798 /* Returns the number of hardware watchpoints of type TYPE that we can
799 set. Value is positive if we can set CNT watchpoints, zero if
800 setting watchpoints of type TYPE is not supported, and negative if
801 CNT is more than the maximum number of watchpoints of type TYPE
802 that we can support. TYPE is one of bp_hardware_watchpoint,
803 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
804 CNT is the number of such watchpoints used so far (including this
805 one). OTHERTYPE is non-zero if other types of watchpoints are
808 We always return 1 here because we don't have enough information
809 about possible overlap of addresses that they want to watch. As an
810 extreme example, consider the case where all the watchpoints watch
811 the same address and the same region length: then we can handle a
812 virtually unlimited number of watchpoints, due to debug register
813 sharing implemented via reference counts in i386-nat.c. */
816 i386_can_use_hw_breakpoint (struct target_ops
*self
,
817 int type
, int cnt
, int othertype
)
823 add_show_debug_regs_command (void)
825 /* A maintenance command to enable printing the internal DRi mirror
827 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
829 Set whether to show variables that mirror the x86 debug registers."), _("\
830 Show whether to show variables that mirror the x86 debug registers."), _("\
831 Use \"on\" to enable, \"off\" to disable.\n\
832 If enabled, the debug registers values are shown when GDB inserts\n\
833 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
834 triggers a breakpoint or watchpoint."),
837 &maintenance_set_cmdlist
,
838 &maintenance_show_cmdlist
);
841 /* There are only two global functions left. */
844 i386_use_watchpoints (struct target_ops
*t
)
846 /* After a watchpoint trap, the PC points to the instruction after the
847 one that caused the trap. Therefore we don't need to step over it.
848 But we do need to reset the status register to avoid another trap. */
849 t
->to_have_continuable_watchpoint
= 1;
851 t
->to_can_use_hw_breakpoint
= i386_can_use_hw_breakpoint
;
852 t
->to_region_ok_for_hw_watchpoint
= i386_region_ok_for_watchpoint
;
853 t
->to_stopped_by_watchpoint
= i386_stopped_by_watchpoint
;
854 t
->to_stopped_data_address
= i386_stopped_data_address
;
855 t
->to_insert_watchpoint
= i386_insert_watchpoint
;
856 t
->to_remove_watchpoint
= i386_remove_watchpoint
;
857 t
->to_insert_hw_breakpoint
= i386_insert_hw_breakpoint
;
858 t
->to_remove_hw_breakpoint
= i386_remove_hw_breakpoint
;
862 i386_set_debug_register_length (int len
)
864 /* This function should be called only once for each native target. */
865 gdb_assert (i386_dr_low
.debug_register_length
== 0);
866 gdb_assert (len
== 4 || len
== 8);
867 i386_dr_low
.debug_register_length
= len
;
868 add_show_debug_regs_command ();