1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
25 #include "dummy-frame.h"
26 #include "dwarf2-frame.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
38 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
54 static char *i386_register_names
[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
71 /* Register names for MMX pseudo-registers. */
73 static char *i386_mmx_names
[] =
75 "mm0", "mm1", "mm2", "mm3",
76 "mm4", "mm5", "mm6", "mm7"
79 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
82 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
84 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
89 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
95 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
97 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
99 if (I387_NUM_XMM_REGS (tdep
) == 0)
102 return (I387_XMM0_REGNUM (tdep
) <= regnum
103 && regnum
< I387_MXCSR_REGNUM (tdep
));
107 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
109 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
111 if (I387_NUM_XMM_REGS (tdep
) == 0)
114 return (regnum
== I387_MXCSR_REGNUM (tdep
));
120 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
122 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
124 if (I387_ST0_REGNUM (tdep
) < 0)
127 return (I387_ST0_REGNUM (tdep
) <= regnum
128 && regnum
< I387_FCTRL_REGNUM (tdep
));
132 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
134 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
136 if (I387_ST0_REGNUM (tdep
) < 0)
139 return (I387_FCTRL_REGNUM (tdep
) <= regnum
140 && regnum
< I387_XMM0_REGNUM (tdep
));
143 /* Return the name of register REGNUM. */
146 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
148 if (i386_mmx_regnum_p (gdbarch
, regnum
))
149 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (gdbarch_tdep (gdbarch
))];
151 if (regnum
>= 0 && regnum
< i386_num_register_names
)
152 return i386_register_names
[regnum
];
157 /* Convert a dbx register number REG to the appropriate register
158 number used by GDB. */
161 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
163 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
165 /* This implements what GCC calls the "default" register map
166 (dbx_register_map[]). */
168 if (reg
>= 0 && reg
<= 7)
170 /* General-purpose registers. The debug info calls %ebp
171 register 4, and %esp register 5. */
178 else if (reg
>= 12 && reg
<= 19)
180 /* Floating-point registers. */
181 return reg
- 12 + I387_ST0_REGNUM (tdep
);
183 else if (reg
>= 21 && reg
<= 28)
186 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
188 else if (reg
>= 29 && reg
<= 36)
191 return reg
- 29 + I387_MM0_REGNUM (tdep
);
194 /* This will hopefully provoke a warning. */
195 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
198 /* Convert SVR4 register number REG to the appropriate register number
202 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
204 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
206 /* This implements the GCC register map that tries to be compatible
207 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
209 /* The SVR4 register numbering includes %eip and %eflags, and
210 numbers the floating point registers differently. */
211 if (reg
>= 0 && reg
<= 9)
213 /* General-purpose registers. */
216 else if (reg
>= 11 && reg
<= 18)
218 /* Floating-point registers. */
219 return reg
- 11 + I387_ST0_REGNUM (tdep
);
221 else if (reg
>= 21 && reg
<= 36)
223 /* The SSE and MMX registers have the same numbers as with dbx. */
224 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
229 case 37: return I387_FCTRL_REGNUM (tdep
);
230 case 38: return I387_FSTAT_REGNUM (tdep
);
231 case 39: return I387_MXCSR_REGNUM (tdep
);
232 case 40: return I386_ES_REGNUM
;
233 case 41: return I386_CS_REGNUM
;
234 case 42: return I386_SS_REGNUM
;
235 case 43: return I386_DS_REGNUM
;
236 case 44: return I386_FS_REGNUM
;
237 case 45: return I386_GS_REGNUM
;
240 /* This will hopefully provoke a warning. */
241 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
246 /* This is the variable that is set with "set disassembly-flavor", and
247 its legitimate values. */
248 static const char att_flavor
[] = "att";
249 static const char intel_flavor
[] = "intel";
250 static const char *valid_flavors
[] =
256 static const char *disassembly_flavor
= att_flavor
;
259 /* Use the program counter to determine the contents and size of a
260 breakpoint instruction. Return a pointer to a string of bytes that
261 encode a breakpoint instruction, store the length of the string in
262 *LEN and optionally adjust *PC to point to the correct memory
263 location for inserting the breakpoint.
265 On the i386 we have a single breakpoint that fits in a single byte
266 and can be inserted anywhere.
268 This function is 64-bit safe. */
270 static const gdb_byte
*
271 i386_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
273 static gdb_byte break_insn
[] = { 0xcc }; /* int 3 */
275 *len
= sizeof (break_insn
);
279 /* Displaced instruction handling. */
283 i386_absolute_jmp_p (gdb_byte
*insn
)
285 /* jmp far (absolute address in operand) */
291 /* jump near, absolute indirect (/4) */
292 if ((insn
[1] & 0x38) == 0x20)
295 /* jump far, absolute indirect (/5) */
296 if ((insn
[1] & 0x38) == 0x28)
304 i386_absolute_call_p (gdb_byte
*insn
)
306 /* call far, absolute */
312 /* Call near, absolute indirect (/2) */
313 if ((insn
[1] & 0x38) == 0x10)
316 /* Call far, absolute indirect (/3) */
317 if ((insn
[1] & 0x38) == 0x18)
325 i386_ret_p (gdb_byte
*insn
)
329 case 0xc2: /* ret near, pop N bytes */
330 case 0xc3: /* ret near */
331 case 0xca: /* ret far, pop N bytes */
332 case 0xcb: /* ret far */
333 case 0xcf: /* iret */
342 i386_call_p (gdb_byte
*insn
)
344 if (i386_absolute_call_p (insn
))
347 /* call near, relative */
355 i386_breakpoint_p (gdb_byte
*insn
)
357 return insn
[0] == 0xcc; /* int 3 */
360 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
361 length in bytes. Otherwise, return zero. */
363 i386_syscall_p (gdb_byte
*insn
, ULONGEST
*lengthp
)
374 /* Fix up the state of registers and memory after having single-stepped
375 a displaced instruction. */
377 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
378 struct displaced_step_closure
*closure
,
379 CORE_ADDR from
, CORE_ADDR to
,
380 struct regcache
*regs
)
382 /* The offset we applied to the instruction's address.
383 This could well be negative (when viewed as a signed 32-bit
384 value), but ULONGEST won't reflect that, so take care when
386 ULONGEST insn_offset
= to
- from
;
388 /* Since we use simple_displaced_step_copy_insn, our closure is a
389 copy of the instruction. */
390 gdb_byte
*insn
= (gdb_byte
*) closure
;
393 fprintf_unfiltered (gdb_stdlog
,
394 "displaced: fixup (0x%s, 0x%s), "
395 "insn = 0x%02x 0x%02x ...\n",
396 paddr_nz (from
), paddr_nz (to
), insn
[0], insn
[1]);
398 /* The list of issues to contend with here is taken from
399 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
400 Yay for Free Software! */
402 /* Relocate the %eip, if necessary. */
404 /* Except in the case of absolute or indirect jump or call
405 instructions, or a return instruction, the new eip is relative to
406 the displaced instruction; make it relative. Well, signal
407 handler returns don't need relocation either, but we use the
408 value of %eip to recognize those; see below. */
409 if (! i386_absolute_jmp_p (insn
)
410 && ! i386_absolute_call_p (insn
)
411 && ! i386_ret_p (insn
))
416 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
418 /* A signal trampoline system call changes the %eip, resuming
419 execution of the main program after the signal handler has
420 returned. That makes them like 'return' instructions; we
421 shouldn't relocate %eip.
423 But most system calls don't, and we do need to relocate %eip.
425 Our heuristic for distinguishing these cases: if stepping
426 over the system call instruction left control directly after
427 the instruction, the we relocate --- control almost certainly
428 doesn't belong in the displaced copy. Otherwise, we assume
429 the instruction has put control where it belongs, and leave
430 it unrelocated. Goodness help us if there are PC-relative
432 if (i386_syscall_p (insn
, &insn_len
)
433 && orig_eip
!= to
+ insn_len
)
436 fprintf_unfiltered (gdb_stdlog
,
437 "displaced: syscall changed %%eip; "
442 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
444 /* If we have stepped over a breakpoint, set the %eip to
445 point at the breakpoint instruction itself.
447 (gdbarch_decr_pc_after_break was never something the core
448 of GDB should have been concerned with; arch-specific
449 code should be making PC values consistent before
450 presenting them to GDB.) */
451 if (i386_breakpoint_p (insn
))
453 fprintf_unfiltered (gdb_stdlog
,
454 "displaced: stepped breakpoint\n");
458 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
461 fprintf_unfiltered (gdb_stdlog
,
463 "relocated %%eip from 0x%s to 0x%s\n",
464 paddr_nz (orig_eip
), paddr_nz (eip
));
468 /* If the instruction was PUSHFL, then the TF bit will be set in the
469 pushed value, and should be cleared. We'll leave this for later,
470 since GDB already messes up the TF flag when stepping over a
473 /* If the instruction was a call, the return address now atop the
474 stack is the address following the copied instruction. We need
475 to make it the address following the original instruction. */
476 if (i386_call_p (insn
))
480 const ULONGEST retaddr_len
= 4;
482 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
483 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
);
484 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
485 write_memory_unsigned_integer (esp
, retaddr_len
, retaddr
);
488 fprintf_unfiltered (gdb_stdlog
,
489 "displaced: relocated return addr at 0x%s "
498 #ifdef I386_REGNO_TO_SYMMETRY
499 #error "The Sequent Symmetry is no longer supported."
502 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
503 and %esp "belong" to the calling function. Therefore these
504 registers should be saved if they're going to be modified. */
506 /* The maximum number of saved registers. This should include all
507 registers mentioned above, and %eip. */
508 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
510 struct i386_frame_cache
517 /* Saved registers. */
518 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
523 /* Stack space reserved for local variables. */
527 /* Allocate and initialize a frame cache. */
529 static struct i386_frame_cache
*
530 i386_alloc_frame_cache (void)
532 struct i386_frame_cache
*cache
;
535 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
539 cache
->sp_offset
= -4;
542 /* Saved registers. We initialize these to -1 since zero is a valid
543 offset (that's where %ebp is supposed to be stored). */
544 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
545 cache
->saved_regs
[i
] = -1;
547 cache
->stack_align
= 0;
548 cache
->pc_in_eax
= 0;
550 /* Frameless until proven otherwise. */
556 /* If the instruction at PC is a jump, return the address of its
557 target. Otherwise, return PC. */
560 i386_follow_jump (CORE_ADDR pc
)
566 target_read_memory (pc
, &op
, 1);
570 op
= read_memory_unsigned_integer (pc
+ 1, 1);
576 /* Relative jump: if data16 == 0, disp32, else disp16. */
579 delta
= read_memory_integer (pc
+ 2, 2);
581 /* Include the size of the jmp instruction (including the
587 delta
= read_memory_integer (pc
+ 1, 4);
589 /* Include the size of the jmp instruction. */
594 /* Relative jump, disp8 (ignore data16). */
595 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
604 /* Check whether PC points at a prologue for a function returning a
605 structure or union. If so, it updates CACHE and returns the
606 address of the first instruction after the code sequence that
607 removes the "hidden" argument from the stack or CURRENT_PC,
608 whichever is smaller. Otherwise, return PC. */
611 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
612 struct i386_frame_cache
*cache
)
614 /* Functions that return a structure or union start with:
617 xchgl %eax, (%esp) 0x87 0x04 0x24
618 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
620 (the System V compiler puts out the second `xchg' instruction,
621 and the assembler doesn't try to optimize it, so the 'sib' form
622 gets generated). This sequence is used to get the address of the
623 return buffer for a function that returns a structure. */
624 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
625 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
629 if (current_pc
<= pc
)
632 target_read_memory (pc
, &op
, 1);
634 if (op
!= 0x58) /* popl %eax */
637 target_read_memory (pc
+ 1, buf
, 4);
638 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
641 if (current_pc
== pc
)
643 cache
->sp_offset
+= 4;
647 if (current_pc
== pc
+ 1)
649 cache
->pc_in_eax
= 1;
653 if (buf
[1] == proto1
[1])
660 i386_skip_probe (CORE_ADDR pc
)
662 /* A function may start with
676 target_read_memory (pc
, &op
, 1);
678 if (op
== 0x68 || op
== 0x6a)
682 /* Skip past the `pushl' instruction; it has either a one-byte or a
683 four-byte operand, depending on the opcode. */
689 /* Read the following 8 bytes, which should be `call _probe' (6
690 bytes) followed by `addl $4,%esp' (2 bytes). */
691 read_memory (pc
+ delta
, buf
, sizeof (buf
));
692 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
693 pc
+= delta
+ sizeof (buf
);
699 /* GCC 4.1 and later, can put code in the prologue to realign the
700 stack pointer. Check whether PC points to such code, and update
701 CACHE accordingly. Return the first instruction after the code
702 sequence or CURRENT_PC, whichever is smaller. If we don't
703 recognize the code, return PC. */
706 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
707 struct i386_frame_cache
*cache
)
709 /* The register used by the compiler to perform the stack re-alignment
710 is, in order of preference, either %ecx, %edx, or %eax. GCC should
711 never use %ebx as it always treats it as callee-saved, whereas
712 the compiler can only use caller-saved registers. */
713 static const gdb_byte insns_ecx
[10] = {
714 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
715 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
716 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
718 static const gdb_byte insns_edx
[10] = {
719 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
720 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
721 0xff, 0x72, 0xfc /* pushl -4(%edx) */
723 static const gdb_byte insns_eax
[10] = {
724 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
725 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
726 0xff, 0x70, 0xfc /* pushl -4(%eax) */
730 if (target_read_memory (pc
, buf
, sizeof buf
)
731 || (memcmp (buf
, insns_ecx
, sizeof buf
) != 0
732 && memcmp (buf
, insns_edx
, sizeof buf
) != 0
733 && memcmp (buf
, insns_eax
, sizeof buf
) != 0))
736 if (current_pc
> pc
+ 4)
737 cache
->stack_align
= 1;
739 return min (pc
+ 10, current_pc
);
742 /* Maximum instruction length we need to handle. */
743 #define I386_MAX_MATCHED_INSN_LEN 6
745 /* Instruction description. */
749 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
750 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
753 /* Search for the instruction at PC in the list SKIP_INSNS. Return
754 the first instruction description that matches. Otherwise, return
757 static struct i386_insn
*
758 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*skip_insns
)
760 struct i386_insn
*insn
;
763 target_read_memory (pc
, &op
, 1);
765 for (insn
= skip_insns
; insn
->len
> 0; insn
++)
767 if ((op
& insn
->mask
[0]) == insn
->insn
[0])
769 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
770 int insn_matched
= 1;
773 gdb_assert (insn
->len
> 1);
774 gdb_assert (insn
->len
<= I386_MAX_MATCHED_INSN_LEN
);
776 target_read_memory (pc
+ 1, buf
, insn
->len
- 1);
777 for (i
= 1; i
< insn
->len
; i
++)
779 if ((buf
[i
- 1] & insn
->mask
[i
]) != insn
->insn
[i
])
791 /* Some special instructions that might be migrated by GCC into the
792 part of the prologue that sets up the new stack frame. Because the
793 stack frame hasn't been setup yet, no registers have been saved
794 yet, and only the scratch registers %eax, %ecx and %edx can be
797 struct i386_insn i386_frame_setup_skip_insns
[] =
799 /* Check for `movb imm8, r' and `movl imm32, r'.
801 ??? Should we handle 16-bit operand-sizes here? */
803 /* `movb imm8, %al' and `movb imm8, %ah' */
804 /* `movb imm8, %cl' and `movb imm8, %ch' */
805 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
806 /* `movb imm8, %dl' and `movb imm8, %dh' */
807 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
808 /* `movl imm32, %eax' and `movl imm32, %ecx' */
809 { 5, { 0xb8 }, { 0xfe } },
810 /* `movl imm32, %edx' */
811 { 5, { 0xba }, { 0xff } },
813 /* Check for `mov imm32, r32'. Note that there is an alternative
814 encoding for `mov m32, %eax'.
816 ??? Should we handle SIB adressing here?
817 ??? Should we handle 16-bit operand-sizes here? */
819 /* `movl m32, %eax' */
820 { 5, { 0xa1 }, { 0xff } },
821 /* `movl m32, %eax' and `mov; m32, %ecx' */
822 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
823 /* `movl m32, %edx' */
824 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
826 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
827 Because of the symmetry, there are actually two ways to encode
828 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
829 opcode bytes 0x31 and 0x33 for `xorl'. */
831 /* `subl %eax, %eax' */
832 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
833 /* `subl %ecx, %ecx' */
834 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
835 /* `subl %edx, %edx' */
836 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
837 /* `xorl %eax, %eax' */
838 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
839 /* `xorl %ecx, %ecx' */
840 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
841 /* `xorl %edx, %edx' */
842 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
847 /* Check whether PC points to a no-op instruction. */
849 i386_skip_noop (CORE_ADDR pc
)
854 target_read_memory (pc
, &op
, 1);
859 /* Ignore `nop' instruction. */
863 target_read_memory (pc
, &op
, 1);
866 /* Ignore no-op instruction `mov %edi, %edi'.
867 Microsoft system dlls often start with
868 a `mov %edi,%edi' instruction.
869 The 5 bytes before the function start are
870 filled with `nop' instructions.
871 This pattern can be used for hot-patching:
872 The `mov %edi, %edi' instruction can be replaced by a
873 near jump to the location of the 5 `nop' instructions
874 which can be replaced by a 32-bit jump to anywhere
875 in the 32-bit address space. */
879 target_read_memory (pc
+ 1, &op
, 1);
883 target_read_memory (pc
, &op
, 1);
891 /* Check whether PC points at a code that sets up a new stack frame.
892 If so, it updates CACHE and returns the address of the first
893 instruction after the sequence that sets up the frame or LIMIT,
894 whichever is smaller. If we don't recognize the code, return PC. */
897 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR limit
,
898 struct i386_frame_cache
*cache
)
900 struct i386_insn
*insn
;
907 target_read_memory (pc
, &op
, 1);
909 if (op
== 0x55) /* pushl %ebp */
911 /* Take into account that we've executed the `pushl %ebp' that
912 starts this instruction sequence. */
913 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
914 cache
->sp_offset
+= 4;
917 /* If that's all, return now. */
921 /* Check for some special instructions that might be migrated by
922 GCC into the prologue and skip them. At this point in the
923 prologue, code should only touch the scratch registers %eax,
924 %ecx and %edx, so while the number of posibilities is sheer,
927 Make sure we only skip these instructions if we later see the
928 `movl %esp, %ebp' that actually sets up the frame. */
929 while (pc
+ skip
< limit
)
931 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
938 /* If that's all, return now. */
939 if (limit
<= pc
+ skip
)
942 target_read_memory (pc
+ skip
, &op
, 1);
944 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
948 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xec)
952 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xe5)
959 /* OK, we actually have a frame. We just don't know how large
960 it is yet. Set its size to zero. We'll adjust it if
961 necessary. We also now commit to skipping the special
962 instructions mentioned before. */
966 /* If that's all, return now. */
970 /* Check for stack adjustment
974 NOTE: You can't subtract a 16-bit immediate from a 32-bit
975 reg, so we don't have to worry about a data16 prefix. */
976 target_read_memory (pc
, &op
, 1);
979 /* `subl' with 8-bit immediate. */
980 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
981 /* Some instruction starting with 0x83 other than `subl'. */
984 /* `subl' with signed 8-bit immediate (though it wouldn't
985 make sense to be negative). */
986 cache
->locals
= read_memory_integer (pc
+ 2, 1);
991 /* Maybe it is `subl' with a 32-bit immediate. */
992 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
993 /* Some instruction starting with 0x81 other than `subl'. */
996 /* It is `subl' with a 32-bit immediate. */
997 cache
->locals
= read_memory_integer (pc
+ 2, 4);
1002 /* Some instruction other than `subl'. */
1006 else if (op
== 0xc8) /* enter */
1008 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
1015 /* Check whether PC points at code that saves registers on the stack.
1016 If so, it updates CACHE and returns the address of the first
1017 instruction after the register saves or CURRENT_PC, whichever is
1018 smaller. Otherwise, return PC. */
1021 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1022 struct i386_frame_cache
*cache
)
1024 CORE_ADDR offset
= 0;
1028 if (cache
->locals
> 0)
1029 offset
-= cache
->locals
;
1030 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1032 target_read_memory (pc
, &op
, 1);
1033 if (op
< 0x50 || op
> 0x57)
1037 cache
->saved_regs
[op
- 0x50] = offset
;
1038 cache
->sp_offset
+= 4;
1045 /* Do a full analysis of the prologue at PC and update CACHE
1046 accordingly. Bail out early if CURRENT_PC is reached. Return the
1047 address where the analysis stopped.
1049 We handle these cases:
1051 The startup sequence can be at the start of the function, or the
1052 function can start with a branch to startup code at the end.
1054 %ebp can be set up with either the 'enter' instruction, or "pushl
1055 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1056 once used in the System V compiler).
1058 Local space is allocated just below the saved %ebp by either the
1059 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1060 16-bit unsigned argument for space to allocate, and the 'addl'
1061 instruction could have either a signed byte, or 32-bit immediate.
1063 Next, the registers used by this function are pushed. With the
1064 System V compiler they will always be in the order: %edi, %esi,
1065 %ebx (and sometimes a harmless bug causes it to also save but not
1066 restore %eax); however, the code below is willing to see the pushes
1067 in any order, and will handle up to 8 of them.
1069 If the setup sequence is at the end of the function, then the next
1070 instruction will be a branch back to the start. */
1073 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
1074 struct i386_frame_cache
*cache
)
1076 pc
= i386_skip_noop (pc
);
1077 pc
= i386_follow_jump (pc
);
1078 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1079 pc
= i386_skip_probe (pc
);
1080 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1081 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
1082 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1085 /* Return PC of first real instruction. */
1088 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1090 static gdb_byte pic_pat
[6] =
1092 0xe8, 0, 0, 0, 0, /* call 0x0 */
1093 0x5b, /* popl %ebx */
1095 struct i386_frame_cache cache
;
1101 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
1102 if (cache
.locals
< 0)
1105 /* Found valid frame setup. */
1107 /* The native cc on SVR4 in -K PIC mode inserts the following code
1108 to get the address of the global offset table (GOT) into register
1113 movl %ebx,x(%ebp) (optional)
1116 This code is with the rest of the prologue (at the end of the
1117 function), so we have to skip it to get to the first real
1118 instruction at the start of the function. */
1120 for (i
= 0; i
< 6; i
++)
1122 target_read_memory (pc
+ i
, &op
, 1);
1123 if (pic_pat
[i
] != op
)
1130 target_read_memory (pc
+ delta
, &op
, 1);
1132 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1134 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
1136 if (op
== 0x5d) /* One byte offset from %ebp. */
1138 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1140 else /* Unexpected instruction. */
1143 target_read_memory (pc
+ delta
, &op
, 1);
1147 if (delta
> 0 && op
== 0x81
1148 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3)
1154 /* If the function starts with a branch (to startup code at the end)
1155 the last instruction should bring us back to the first
1156 instruction of the real code. */
1157 if (i386_follow_jump (start_pc
) != start_pc
)
1158 pc
= i386_follow_jump (pc
);
1163 /* This function is 64-bit safe. */
1166 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1170 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1171 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
1175 /* Normal frames. */
1177 static struct i386_frame_cache
*
1178 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1180 struct i386_frame_cache
*cache
;
1187 cache
= i386_alloc_frame_cache ();
1188 *this_cache
= cache
;
1190 /* In principle, for normal frames, %ebp holds the frame pointer,
1191 which holds the base address for the current stack frame.
1192 However, for functions that don't need it, the frame pointer is
1193 optional. For these "frameless" functions the frame pointer is
1194 actually the frame pointer of the calling frame. Signal
1195 trampolines are just a special case of a "frameless" function.
1196 They (usually) share their frame pointer with the frame that was
1197 in progress when the signal occurred. */
1199 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
1200 cache
->base
= extract_unsigned_integer (buf
, 4);
1201 if (cache
->base
== 0)
1204 /* For normal frames, %eip is stored at 4(%ebp). */
1205 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
1207 cache
->pc
= get_frame_func (this_frame
);
1209 i386_analyze_prologue (cache
->pc
, get_frame_pc (this_frame
), cache
);
1211 if (cache
->stack_align
)
1213 /* Saved stack pointer has been saved in %ecx. */
1214 get_frame_register (this_frame
, I386_ECX_REGNUM
, buf
);
1215 cache
->saved_sp
= extract_unsigned_integer(buf
, 4);
1218 if (cache
->locals
< 0)
1220 /* We didn't find a valid frame, which means that CACHE->base
1221 currently holds the frame pointer for our calling frame. If
1222 we're at the start of a function, or somewhere half-way its
1223 prologue, the function's frame probably hasn't been fully
1224 setup yet. Try to reconstruct the base address for the stack
1225 frame by looking at the stack pointer. For truly "frameless"
1226 functions this might work too. */
1228 if (cache
->stack_align
)
1230 /* We're halfway aligning the stack. */
1231 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
1232 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
1234 /* This will be added back below. */
1235 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
1239 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
1240 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
1244 /* Now that we have the base address for the stack frame we can
1245 calculate the value of %esp in the calling frame. */
1246 if (cache
->saved_sp
== 0)
1247 cache
->saved_sp
= cache
->base
+ 8;
1249 /* Adjust all the saved registers such that they contain addresses
1250 instead of offsets. */
1251 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1252 if (cache
->saved_regs
[i
] != -1)
1253 cache
->saved_regs
[i
] += cache
->base
;
1259 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1260 struct frame_id
*this_id
)
1262 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
1264 /* This marks the outermost frame. */
1265 if (cache
->base
== 0)
1268 /* See the end of i386_push_dummy_call. */
1269 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
1272 static struct value
*
1273 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1276 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
1278 gdb_assert (regnum
>= 0);
1280 /* The System V ABI says that:
1282 "The flags register contains the system flags, such as the
1283 direction flag and the carry flag. The direction flag must be
1284 set to the forward (that is, zero) direction before entry and
1285 upon exit from a function. Other user flags have no specified
1286 role in the standard calling sequence and are not preserved."
1288 To guarantee the "upon exit" part of that statement we fake a
1289 saved flags register that has its direction flag cleared.
1291 Note that GCC doesn't seem to rely on the fact that the direction
1292 flag is cleared after a function return; it always explicitly
1293 clears the flag before operations where it matters.
1295 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1296 right thing to do. The way we fake the flags register here makes
1297 it impossible to change it. */
1299 if (regnum
== I386_EFLAGS_REGNUM
)
1303 val
= get_frame_register_unsigned (this_frame
, regnum
);
1305 return frame_unwind_got_constant (this_frame
, regnum
, val
);
1308 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
1309 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
1311 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
1312 return frame_unwind_got_constant (this_frame
, regnum
, cache
->saved_sp
);
1314 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1315 return frame_unwind_got_memory (this_frame
, regnum
,
1316 cache
->saved_regs
[regnum
]);
1318 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1321 static const struct frame_unwind i386_frame_unwind
=
1325 i386_frame_prev_register
,
1327 default_frame_sniffer
1331 /* Signal trampolines. */
1333 static struct i386_frame_cache
*
1334 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1336 struct i386_frame_cache
*cache
;
1337 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1344 cache
= i386_alloc_frame_cache ();
1346 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
1347 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
1349 addr
= tdep
->sigcontext_addr (this_frame
);
1350 if (tdep
->sc_reg_offset
)
1354 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1356 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1357 if (tdep
->sc_reg_offset
[i
] != -1)
1358 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1362 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1363 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1366 *this_cache
= cache
;
1371 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1372 struct frame_id
*this_id
)
1374 struct i386_frame_cache
*cache
=
1375 i386_sigtramp_frame_cache (this_frame
, this_cache
);
1377 /* See the end of i386_push_dummy_call. */
1378 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
1381 static struct value
*
1382 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
1383 void **this_cache
, int regnum
)
1385 /* Make sure we've initialized the cache. */
1386 i386_sigtramp_frame_cache (this_frame
, this_cache
);
1388 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
1392 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
1393 struct frame_info
*this_frame
,
1394 void **this_prologue_cache
)
1396 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1398 /* We shouldn't even bother if we don't have a sigcontext_addr
1400 if (tdep
->sigcontext_addr
== NULL
)
1403 if (tdep
->sigtramp_p
!= NULL
)
1405 if (tdep
->sigtramp_p (this_frame
))
1409 if (tdep
->sigtramp_start
!= 0)
1411 CORE_ADDR pc
= get_frame_pc (this_frame
);
1413 gdb_assert (tdep
->sigtramp_end
!= 0);
1414 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1421 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1424 i386_sigtramp_frame_this_id
,
1425 i386_sigtramp_frame_prev_register
,
1427 i386_sigtramp_frame_sniffer
1432 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1434 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
1439 static const struct frame_base i386_frame_base
=
1442 i386_frame_base_address
,
1443 i386_frame_base_address
,
1444 i386_frame_base_address
1447 static struct frame_id
1448 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1452 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
1454 /* See the end of i386_push_dummy_call. */
1455 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
1459 /* Figure out where the longjmp will land. Slurp the args out of the
1460 stack. We expect the first arg to be a pointer to the jmp_buf
1461 structure from which we extract the address that we will land at.
1462 This address is copied into PC. This routine returns non-zero on
1466 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1469 CORE_ADDR sp
, jb_addr
;
1470 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1471 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
1473 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1474 longjmp will land. */
1475 if (jb_pc_offset
== -1)
1478 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
1479 sp
= extract_unsigned_integer (buf
, 4);
1480 if (target_read_memory (sp
+ 4, buf
, 4))
1483 jb_addr
= extract_unsigned_integer (buf
, 4);
1484 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
1487 *pc
= extract_unsigned_integer (buf
, 4);
1493 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1494 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1495 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1496 CORE_ADDR struct_addr
)
1501 /* Push arguments in reverse order. */
1502 for (i
= nargs
- 1; i
>= 0; i
--)
1504 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
1506 /* The System V ABI says that:
1508 "An argument's size is increased, if necessary, to make it a
1509 multiple of [32-bit] words. This may require tail padding,
1510 depending on the size of the argument."
1512 This makes sure the stack stays word-aligned. */
1513 sp
-= (len
+ 3) & ~3;
1514 write_memory (sp
, value_contents_all (args
[i
]), len
);
1517 /* Push value address. */
1521 store_unsigned_integer (buf
, 4, struct_addr
);
1522 write_memory (sp
, buf
, 4);
1525 /* Store return address. */
1527 store_unsigned_integer (buf
, 4, bp_addr
);
1528 write_memory (sp
, buf
, 4);
1530 /* Finally, update the stack pointer... */
1531 store_unsigned_integer (buf
, 4, sp
);
1532 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1534 /* ...and fake a frame pointer. */
1535 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1537 /* MarkK wrote: This "+ 8" is all over the place:
1538 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1539 i386_dummy_id). It's there, since all frame unwinders for
1540 a given target have to agree (within a certain margin) on the
1541 definition of the stack address of a frame. Otherwise
1542 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1543 stack address *before* the function call as a frame's CFA. On
1544 the i386, when %ebp is used as a frame pointer, the offset
1545 between the contents %ebp and the CFA as defined by GCC. */
1549 /* These registers are used for returning integers (and on some
1550 targets also for returning `struct' and `union' values when their
1551 size and alignment match an integer type). */
1552 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1553 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1555 /* Read, for architecture GDBARCH, a function return value of TYPE
1556 from REGCACHE, and copy that into VALBUF. */
1559 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1560 struct regcache
*regcache
, gdb_byte
*valbuf
)
1562 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1563 int len
= TYPE_LENGTH (type
);
1564 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1566 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1568 if (tdep
->st0_regnum
< 0)
1570 warning (_("Cannot find floating-point return value."));
1571 memset (valbuf
, 0, len
);
1575 /* Floating-point return values can be found in %st(0). Convert
1576 its contents to the desired type. This is probably not
1577 exactly how it would happen on the target itself, but it is
1578 the best we can do. */
1579 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1580 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1584 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1585 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1587 if (len
<= low_size
)
1589 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1590 memcpy (valbuf
, buf
, len
);
1592 else if (len
<= (low_size
+ high_size
))
1594 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1595 memcpy (valbuf
, buf
, low_size
);
1596 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1597 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1600 internal_error (__FILE__
, __LINE__
,
1601 _("Cannot extract return value of %d bytes long."), len
);
1605 /* Write, for architecture GDBARCH, a function return value of TYPE
1606 from VALBUF into REGCACHE. */
1609 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1610 struct regcache
*regcache
, const gdb_byte
*valbuf
)
1612 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1613 int len
= TYPE_LENGTH (type
);
1615 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1618 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1620 if (tdep
->st0_regnum
< 0)
1622 warning (_("Cannot set floating-point return value."));
1626 /* Returning floating-point values is a bit tricky. Apart from
1627 storing the return value in %st(0), we have to simulate the
1628 state of the FPU at function return point. */
1630 /* Convert the value found in VALBUF to the extended
1631 floating-point format used by the FPU. This is probably
1632 not exactly how it would happen on the target itself, but
1633 it is the best we can do. */
1634 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1635 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1637 /* Set the top of the floating-point register stack to 7. The
1638 actual value doesn't really matter, but 7 is what a normal
1639 function return would end up with if the program started out
1640 with a freshly initialized FPU. */
1641 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1643 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1645 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1646 the floating-point register stack to 7, the appropriate value
1647 for the tag word is 0x3fff. */
1648 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
1652 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1653 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1655 if (len
<= low_size
)
1656 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1657 else if (len
<= (low_size
+ high_size
))
1659 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1660 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1661 len
- low_size
, valbuf
+ low_size
);
1664 internal_error (__FILE__
, __LINE__
,
1665 _("Cannot store return value of %d bytes long."), len
);
1670 /* This is the variable that is set with "set struct-convention", and
1671 its legitimate values. */
1672 static const char default_struct_convention
[] = "default";
1673 static const char pcc_struct_convention
[] = "pcc";
1674 static const char reg_struct_convention
[] = "reg";
1675 static const char *valid_conventions
[] =
1677 default_struct_convention
,
1678 pcc_struct_convention
,
1679 reg_struct_convention
,
1682 static const char *struct_convention
= default_struct_convention
;
1684 /* Return non-zero if TYPE, which is assumed to be a structure,
1685 a union type, or an array type, should be returned in registers
1686 for architecture GDBARCH. */
1689 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1691 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1692 enum type_code code
= TYPE_CODE (type
);
1693 int len
= TYPE_LENGTH (type
);
1695 gdb_assert (code
== TYPE_CODE_STRUCT
1696 || code
== TYPE_CODE_UNION
1697 || code
== TYPE_CODE_ARRAY
);
1699 if (struct_convention
== pcc_struct_convention
1700 || (struct_convention
== default_struct_convention
1701 && tdep
->struct_return
== pcc_struct_return
))
1704 /* Structures consisting of a single `float', `double' or 'long
1705 double' member are returned in %st(0). */
1706 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1708 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1709 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1710 return (len
== 4 || len
== 8 || len
== 12);
1713 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1716 /* Determine, for architecture GDBARCH, how a return value of TYPE
1717 should be returned. If it is supposed to be returned in registers,
1718 and READBUF is non-zero, read the appropriate value from REGCACHE,
1719 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1720 from WRITEBUF into REGCACHE. */
1722 static enum return_value_convention
1723 i386_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1724 struct type
*type
, struct regcache
*regcache
,
1725 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1727 enum type_code code
= TYPE_CODE (type
);
1729 if (((code
== TYPE_CODE_STRUCT
1730 || code
== TYPE_CODE_UNION
1731 || code
== TYPE_CODE_ARRAY
)
1732 && !i386_reg_struct_return_p (gdbarch
, type
))
1733 /* 128-bit decimal float uses the struct return convention. */
1734 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
1736 /* The System V ABI says that:
1738 "A function that returns a structure or union also sets %eax
1739 to the value of the original address of the caller's area
1740 before it returns. Thus when the caller receives control
1741 again, the address of the returned object resides in register
1742 %eax and can be used to access the object."
1744 So the ABI guarantees that we can always find the return
1745 value just after the function has returned. */
1747 /* Note that the ABI doesn't mention functions returning arrays,
1748 which is something possible in certain languages such as Ada.
1749 In this case, the value is returned as if it was wrapped in
1750 a record, so the convention applied to records also applies
1757 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
1758 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1761 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
1764 /* This special case is for structures consisting of a single
1765 `float', `double' or 'long double' member. These structures are
1766 returned in %st(0). For these structures, we call ourselves
1767 recursively, changing TYPE into the type of the first member of
1768 the structure. Since that should work for all structures that
1769 have only one member, we don't bother to check the member's type
1771 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1773 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1774 return i386_return_value (gdbarch
, func_type
, type
, regcache
,
1779 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1781 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1783 return RETURN_VALUE_REGISTER_CONVENTION
;
1787 /* Type for %eflags. */
1788 struct type
*i386_eflags_type
;
1790 /* Type for %mxcsr. */
1791 struct type
*i386_mxcsr_type
;
1793 /* Construct types for ISA-specific registers. */
1795 i386_init_types (void)
1799 type
= init_flags_type ("builtin_type_i386_eflags", 4);
1800 append_flags_type_flag (type
, 0, "CF");
1801 append_flags_type_flag (type
, 1, NULL
);
1802 append_flags_type_flag (type
, 2, "PF");
1803 append_flags_type_flag (type
, 4, "AF");
1804 append_flags_type_flag (type
, 6, "ZF");
1805 append_flags_type_flag (type
, 7, "SF");
1806 append_flags_type_flag (type
, 8, "TF");
1807 append_flags_type_flag (type
, 9, "IF");
1808 append_flags_type_flag (type
, 10, "DF");
1809 append_flags_type_flag (type
, 11, "OF");
1810 append_flags_type_flag (type
, 14, "NT");
1811 append_flags_type_flag (type
, 16, "RF");
1812 append_flags_type_flag (type
, 17, "VM");
1813 append_flags_type_flag (type
, 18, "AC");
1814 append_flags_type_flag (type
, 19, "VIF");
1815 append_flags_type_flag (type
, 20, "VIP");
1816 append_flags_type_flag (type
, 21, "ID");
1817 i386_eflags_type
= type
;
1819 type
= init_flags_type ("builtin_type_i386_mxcsr", 4);
1820 append_flags_type_flag (type
, 0, "IE");
1821 append_flags_type_flag (type
, 1, "DE");
1822 append_flags_type_flag (type
, 2, "ZE");
1823 append_flags_type_flag (type
, 3, "OE");
1824 append_flags_type_flag (type
, 4, "UE");
1825 append_flags_type_flag (type
, 5, "PE");
1826 append_flags_type_flag (type
, 6, "DAZ");
1827 append_flags_type_flag (type
, 7, "IM");
1828 append_flags_type_flag (type
, 8, "DM");
1829 append_flags_type_flag (type
, 9, "ZM");
1830 append_flags_type_flag (type
, 10, "OM");
1831 append_flags_type_flag (type
, 11, "UM");
1832 append_flags_type_flag (type
, 12, "PM");
1833 append_flags_type_flag (type
, 15, "FZ");
1834 i386_mxcsr_type
= type
;
1837 /* Construct vector type for MMX registers. */
1839 i386_mmx_type (struct gdbarch
*gdbarch
)
1841 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1843 if (!tdep
->i386_mmx_type
)
1845 /* The type we're building is this: */
1847 union __gdb_builtin_type_vec64i
1850 int32_t v2_int32
[2];
1851 int16_t v4_int16
[4];
1858 t
= init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
1859 append_composite_type_field (t
, "uint64", builtin_type_int64
);
1860 append_composite_type_field (t
, "v2_int32",
1861 init_vector_type (builtin_type_int32
, 2));
1862 append_composite_type_field (t
, "v4_int16",
1863 init_vector_type (builtin_type_int16
, 4));
1864 append_composite_type_field (t
, "v8_int8",
1865 init_vector_type (builtin_type_int8
, 8));
1867 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1868 TYPE_NAME (t
) = "builtin_type_vec64i";
1869 tdep
->i386_mmx_type
= t
;
1872 return tdep
->i386_mmx_type
;
1876 i386_sse_type (struct gdbarch
*gdbarch
)
1878 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1880 if (!tdep
->i386_sse_type
)
1882 /* The type we're building is this: */
1884 union __gdb_builtin_type_vec128i
1887 int64_t v2_int64
[2];
1888 int32_t v4_int32
[4];
1889 int16_t v8_int16
[8];
1890 int8_t v16_int8
[16];
1891 double v2_double
[2];
1898 t
= init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION
);
1899 append_composite_type_field (t
, "v4_float",
1900 init_vector_type (builtin_type_float
, 4));
1901 append_composite_type_field (t
, "v2_double",
1902 init_vector_type (builtin_type_double
, 2));
1903 append_composite_type_field (t
, "v16_int8",
1904 init_vector_type (builtin_type_int8
, 16));
1905 append_composite_type_field (t
, "v8_int16",
1906 init_vector_type (builtin_type_int16
, 8));
1907 append_composite_type_field (t
, "v4_int32",
1908 init_vector_type (builtin_type_int32
, 4));
1909 append_composite_type_field (t
, "v2_int64",
1910 init_vector_type (builtin_type_int64
, 2));
1911 append_composite_type_field (t
, "uint128", builtin_type_int128
);
1913 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1914 TYPE_NAME (t
) = "builtin_type_vec128i";
1915 tdep
->i386_sse_type
= t
;
1918 return tdep
->i386_sse_type
;
1921 /* Return the GDB type object for the "standard" data type of data in
1922 register REGNUM. Perhaps %esi and %edi should go here, but
1923 potentially they could be used for things other than address. */
1925 static struct type
*
1926 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1928 if (regnum
== I386_EIP_REGNUM
)
1929 return builtin_type_void_func_ptr
;
1931 if (regnum
== I386_EFLAGS_REGNUM
)
1932 return i386_eflags_type
;
1934 if (regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1935 return builtin_type_void_data_ptr
;
1937 if (i386_fp_regnum_p (gdbarch
, regnum
))
1938 return builtin_type_i387_ext
;
1940 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1941 return i386_mmx_type (gdbarch
);
1943 if (i386_sse_regnum_p (gdbarch
, regnum
))
1944 return i386_sse_type (gdbarch
);
1946 if (regnum
== I387_MXCSR_REGNUM (gdbarch_tdep (gdbarch
)))
1947 return i386_mxcsr_type
;
1949 return builtin_type_int
;
1952 /* Map a cooked register onto a raw register or memory. For the i386,
1953 the MMX registers need to be mapped onto floating point registers. */
1956 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1958 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1963 mmxreg
= regnum
- tdep
->mm0_regnum
;
1964 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1965 tos
= (fstat
>> 11) & 0x7;
1966 fpreg
= (mmxreg
+ tos
) % 8;
1968 return (I387_ST0_REGNUM (tdep
) + fpreg
);
1972 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1973 int regnum
, gdb_byte
*buf
)
1975 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1977 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1978 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1980 /* Extract (always little endian). */
1981 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1982 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1985 regcache_raw_read (regcache
, regnum
, buf
);
1989 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1990 int regnum
, const gdb_byte
*buf
)
1992 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1994 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1995 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1998 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1999 /* ... Modify ... (always little endian). */
2000 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
2002 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
2005 regcache_raw_write (regcache
, regnum
, buf
);
2009 /* Return the register number of the register allocated by GCC after
2010 REGNUM, or -1 if there is no such register. */
2013 i386_next_regnum (int regnum
)
2015 /* GCC allocates the registers in the order:
2017 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
2019 Since storing a variable in %esp doesn't make any sense we return
2020 -1 for %ebp and for %esp itself. */
2021 static int next_regnum
[] =
2023 I386_EDX_REGNUM
, /* Slot for %eax. */
2024 I386_EBX_REGNUM
, /* Slot for %ecx. */
2025 I386_ECX_REGNUM
, /* Slot for %edx. */
2026 I386_ESI_REGNUM
, /* Slot for %ebx. */
2027 -1, -1, /* Slots for %esp and %ebp. */
2028 I386_EDI_REGNUM
, /* Slot for %esi. */
2029 I386_EBP_REGNUM
/* Slot for %edi. */
2032 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
2033 return next_regnum
[regnum
];
2038 /* Return nonzero if a value of type TYPE stored in register REGNUM
2039 needs any special handling. */
2042 i386_convert_register_p (struct gdbarch
*gdbarch
, int regnum
, struct type
*type
)
2044 int len
= TYPE_LENGTH (type
);
2046 /* Values may be spread across multiple registers. Most debugging
2047 formats aren't expressive enough to specify the locations, so
2048 some heuristics is involved. Right now we only handle types that
2049 have a length that is a multiple of the word size, since GCC
2050 doesn't seem to put any other types into registers. */
2051 if (len
> 4 && len
% 4 == 0)
2053 int last_regnum
= regnum
;
2057 last_regnum
= i386_next_regnum (last_regnum
);
2061 if (last_regnum
!= -1)
2065 return i387_convert_register_p (gdbarch
, regnum
, type
);
2068 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
2069 return its contents in TO. */
2072 i386_register_to_value (struct frame_info
*frame
, int regnum
,
2073 struct type
*type
, gdb_byte
*to
)
2075 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2076 int len
= TYPE_LENGTH (type
);
2078 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
2079 available in FRAME (i.e. if it wasn't saved)? */
2081 if (i386_fp_regnum_p (gdbarch
, regnum
))
2083 i387_register_to_value (frame
, regnum
, type
, to
);
2087 /* Read a value spread across multiple registers. */
2089 gdb_assert (len
> 4 && len
% 4 == 0);
2093 gdb_assert (regnum
!= -1);
2094 gdb_assert (register_size (gdbarch
, regnum
) == 4);
2096 get_frame_register (frame
, regnum
, to
);
2097 regnum
= i386_next_regnum (regnum
);
2103 /* Write the contents FROM of a value of type TYPE into register
2104 REGNUM in frame FRAME. */
2107 i386_value_to_register (struct frame_info
*frame
, int regnum
,
2108 struct type
*type
, const gdb_byte
*from
)
2110 int len
= TYPE_LENGTH (type
);
2112 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
2114 i387_value_to_register (frame
, regnum
, type
, from
);
2118 /* Write a value spread across multiple registers. */
2120 gdb_assert (len
> 4 && len
% 4 == 0);
2124 gdb_assert (regnum
!= -1);
2125 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
2127 put_frame_register (frame
, regnum
, from
);
2128 regnum
= i386_next_regnum (regnum
);
2134 /* Supply register REGNUM from the buffer specified by GREGS and LEN
2135 in the general-purpose register set REGSET to register cache
2136 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2139 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
2140 int regnum
, const void *gregs
, size_t len
)
2142 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2143 const gdb_byte
*regs
= gregs
;
2146 gdb_assert (len
== tdep
->sizeof_gregset
);
2148 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
2150 if ((regnum
== i
|| regnum
== -1)
2151 && tdep
->gregset_reg_offset
[i
] != -1)
2152 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
2156 /* Collect register REGNUM from the register cache REGCACHE and store
2157 it in the buffer specified by GREGS and LEN as described by the
2158 general-purpose register set REGSET. If REGNUM is -1, do this for
2159 all registers in REGSET. */
2162 i386_collect_gregset (const struct regset
*regset
,
2163 const struct regcache
*regcache
,
2164 int regnum
, void *gregs
, size_t len
)
2166 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2167 gdb_byte
*regs
= gregs
;
2170 gdb_assert (len
== tdep
->sizeof_gregset
);
2172 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
2174 if ((regnum
== i
|| regnum
== -1)
2175 && tdep
->gregset_reg_offset
[i
] != -1)
2176 regcache_raw_collect (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
2180 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
2181 in the floating-point register set REGSET to register cache
2182 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2185 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
2186 int regnum
, const void *fpregs
, size_t len
)
2188 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2190 if (len
== I387_SIZEOF_FXSAVE
)
2192 i387_supply_fxsave (regcache
, regnum
, fpregs
);
2196 gdb_assert (len
== tdep
->sizeof_fpregset
);
2197 i387_supply_fsave (regcache
, regnum
, fpregs
);
2200 /* Collect register REGNUM from the register cache REGCACHE and store
2201 it in the buffer specified by FPREGS and LEN as described by the
2202 floating-point register set REGSET. If REGNUM is -1, do this for
2203 all registers in REGSET. */
2206 i386_collect_fpregset (const struct regset
*regset
,
2207 const struct regcache
*regcache
,
2208 int regnum
, void *fpregs
, size_t len
)
2210 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2212 if (len
== I387_SIZEOF_FXSAVE
)
2214 i387_collect_fxsave (regcache
, regnum
, fpregs
);
2218 gdb_assert (len
== tdep
->sizeof_fpregset
);
2219 i387_collect_fsave (regcache
, regnum
, fpregs
);
2222 /* Return the appropriate register set for the core section identified
2223 by SECT_NAME and SECT_SIZE. */
2225 const struct regset
*
2226 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
2227 const char *sect_name
, size_t sect_size
)
2229 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2231 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
2233 if (tdep
->gregset
== NULL
)
2234 tdep
->gregset
= regset_alloc (gdbarch
, i386_supply_gregset
,
2235 i386_collect_gregset
);
2236 return tdep
->gregset
;
2239 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
2240 || (strcmp (sect_name
, ".reg-xfp") == 0
2241 && sect_size
== I387_SIZEOF_FXSAVE
))
2243 if (tdep
->fpregset
== NULL
)
2244 tdep
->fpregset
= regset_alloc (gdbarch
, i386_supply_fpregset
,
2245 i386_collect_fpregset
);
2246 return tdep
->fpregset
;
2253 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2256 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
2258 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
2260 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
2261 struct minimal_symbol
*indsym
=
2262 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
2263 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
2267 if (strncmp (symname
, "__imp_", 6) == 0
2268 || strncmp (symname
, "_imp_", 5) == 0)
2269 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
2272 return 0; /* Not a trampoline. */
2276 /* Return whether the THIS_FRAME corresponds to a sigtramp
2280 i386_sigtramp_p (struct frame_info
*this_frame
)
2282 CORE_ADDR pc
= get_frame_pc (this_frame
);
2285 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2286 return (name
&& strcmp ("_sigtramp", name
) == 0);
2290 /* We have two flavours of disassembly. The machinery on this page
2291 deals with switching between those. */
2294 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
2296 gdb_assert (disassembly_flavor
== att_flavor
2297 || disassembly_flavor
== intel_flavor
);
2299 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2300 constified, cast to prevent a compiler warning. */
2301 info
->disassembler_options
= (char *) disassembly_flavor
;
2303 return print_insn_i386 (pc
, info
);
2307 /* There are a few i386 architecture variants that differ only
2308 slightly from the generic i386 target. For now, we don't give them
2309 their own source file, but include them here. As a consequence,
2310 they'll always be included. */
2312 /* System V Release 4 (SVR4). */
2314 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
2318 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
2320 CORE_ADDR pc
= get_frame_pc (this_frame
);
2323 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2324 currently unknown. */
2325 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2326 return (name
&& (strcmp ("_sigreturn", name
) == 0
2327 || strcmp ("_sigacthandler", name
) == 0
2328 || strcmp ("sigvechandler", name
) == 0));
2331 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
2332 address of the associated sigcontext (ucontext) structure. */
2335 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
2340 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2341 sp
= extract_unsigned_integer (buf
, 4);
2343 return read_memory_unsigned_integer (sp
+ 8, 4);
2350 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2352 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2353 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2356 /* System V Release 4 (SVR4). */
2359 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2361 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2363 /* System V Release 4 uses ELF. */
2364 i386_elf_init_abi (info
, gdbarch
);
2366 /* System V Release 4 has shared libraries. */
2367 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
2369 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
2370 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
2371 tdep
->sc_pc_offset
= 36 + 14 * 4;
2372 tdep
->sc_sp_offset
= 36 + 17 * 4;
2374 tdep
->jb_pc_offset
= 20;
2380 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2382 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2384 /* DJGPP doesn't have any special frames for signal handlers. */
2385 tdep
->sigtramp_p
= NULL
;
2387 tdep
->jb_pc_offset
= 36;
2391 /* i386 register groups. In addition to the normal groups, add "mmx"
2394 static struct reggroup
*i386_sse_reggroup
;
2395 static struct reggroup
*i386_mmx_reggroup
;
2398 i386_init_reggroups (void)
2400 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
2401 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
2405 i386_add_reggroups (struct gdbarch
*gdbarch
)
2407 reggroup_add (gdbarch
, i386_sse_reggroup
);
2408 reggroup_add (gdbarch
, i386_mmx_reggroup
);
2409 reggroup_add (gdbarch
, general_reggroup
);
2410 reggroup_add (gdbarch
, float_reggroup
);
2411 reggroup_add (gdbarch
, all_reggroup
);
2412 reggroup_add (gdbarch
, save_reggroup
);
2413 reggroup_add (gdbarch
, restore_reggroup
);
2414 reggroup_add (gdbarch
, vector_reggroup
);
2415 reggroup_add (gdbarch
, system_reggroup
);
2419 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
2420 struct reggroup
*group
)
2422 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
2423 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
2424 int fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
2425 || i386_fpc_regnum_p (gdbarch
, regnum
));
2426 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
2428 if (group
== i386_mmx_reggroup
)
2429 return mmx_regnum_p
;
2430 if (group
== i386_sse_reggroup
)
2431 return sse_regnum_p
;
2432 if (group
== vector_reggroup
)
2433 return (mmx_regnum_p
|| sse_regnum_p
);
2434 if (group
== float_reggroup
)
2436 if (group
== general_reggroup
)
2437 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
2439 return default_register_reggroup_p (gdbarch
, regnum
, group
);
2443 /* Get the ARGIth function argument for the current function. */
2446 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
2449 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
2450 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
2454 static struct gdbarch
*
2455 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2457 struct gdbarch_tdep
*tdep
;
2458 struct gdbarch
*gdbarch
;
2460 /* If there is already a candidate, use it. */
2461 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2463 return arches
->gdbarch
;
2465 /* Allocate space for the new architecture. */
2466 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2467 gdbarch
= gdbarch_alloc (&info
, tdep
);
2469 /* General-purpose registers. */
2470 tdep
->gregset
= NULL
;
2471 tdep
->gregset_reg_offset
= NULL
;
2472 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
2473 tdep
->sizeof_gregset
= 0;
2475 /* Floating-point registers. */
2476 tdep
->fpregset
= NULL
;
2477 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
2479 /* The default settings include the FPU registers, the MMX registers
2480 and the SSE registers. This can be overridden for a specific ABI
2481 by adjusting the members `st0_regnum', `mm0_regnum' and
2482 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2483 will show up in the output of "info all-registers". Ideally we
2484 should try to autodetect whether they are available, such that we
2485 can prevent "info all-registers" from displaying registers that
2488 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2489 [the SSE registers] always (even when they don't exist) or never
2490 showing them to the user (even when they do exist), I prefer the
2491 former over the latter. */
2493 tdep
->st0_regnum
= I386_ST0_REGNUM
;
2495 /* The MMX registers are implemented as pseudo-registers. Put off
2496 calculating the register number for %mm0 until we know the number
2497 of raw registers. */
2498 tdep
->mm0_regnum
= 0;
2500 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2501 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
2503 tdep
->jb_pc_offset
= -1;
2504 tdep
->struct_return
= pcc_struct_return
;
2505 tdep
->sigtramp_start
= 0;
2506 tdep
->sigtramp_end
= 0;
2507 tdep
->sigtramp_p
= i386_sigtramp_p
;
2508 tdep
->sigcontext_addr
= NULL
;
2509 tdep
->sc_reg_offset
= NULL
;
2510 tdep
->sc_pc_offset
= -1;
2511 tdep
->sc_sp_offset
= -1;
2513 /* The format used for `long double' on almost all i386 targets is
2514 the i387 extended floating-point format. In fact, of all targets
2515 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2516 on having a `long double' that's not `long' at all. */
2517 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
2519 /* Although the i387 extended floating-point has only 80 significant
2520 bits, a `long double' actually takes up 96, probably to enforce
2522 set_gdbarch_long_double_bit (gdbarch
, 96);
2524 /* The default ABI includes general-purpose registers,
2525 floating-point registers, and the SSE registers. */
2526 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2527 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2528 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2530 /* Register numbers of various important registers. */
2531 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2532 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2533 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2534 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2536 /* NOTE: kettenis/20040418: GCC does have two possible register
2537 numbering schemes on the i386: dbx and SVR4. These schemes
2538 differ in how they number %ebp, %esp, %eflags, and the
2539 floating-point registers, and are implemented by the arrays
2540 dbx_register_map[] and svr4_dbx_register_map in
2541 gcc/config/i386.c. GCC also defines a third numbering scheme in
2542 gcc/config/i386.c, which it designates as the "default" register
2543 map used in 64bit mode. This last register numbering scheme is
2544 implemented in dbx64_register_map, and is used for AMD64; see
2547 Currently, each GCC i386 target always uses the same register
2548 numbering scheme across all its supported debugging formats
2549 i.e. SDB (COFF), stabs and DWARF 2. This is because
2550 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2551 DBX_REGISTER_NUMBER macro which is defined by each target's
2552 respective config header in a manner independent of the requested
2553 output debugging format.
2555 This does not match the arrangement below, which presumes that
2556 the SDB and stabs numbering schemes differ from the DWARF and
2557 DWARF 2 ones. The reason for this arrangement is that it is
2558 likely to get the numbering scheme for the target's
2559 default/native debug format right. For targets where GCC is the
2560 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2561 targets where the native toolchain uses a different numbering
2562 scheme for a particular debug format (stabs-in-ELF on Solaris)
2563 the defaults below will have to be overridden, like
2564 i386_elf_init_abi() does. */
2566 /* Use the dbx register numbering scheme for stabs and COFF. */
2567 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2568 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2570 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2571 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2572 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2574 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
2575 be in use on any of the supported i386 targets. */
2577 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2579 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2581 /* Call dummy code. */
2582 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2584 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2585 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2586 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2588 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2590 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2592 /* Stack grows downward. */
2593 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2595 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2596 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2597 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
2599 set_gdbarch_frame_args_skip (gdbarch
, 8);
2601 /* Wire in the MMX registers. */
2602 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2603 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2604 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2606 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2608 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
2610 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2612 /* Add the i386 register groups. */
2613 i386_add_reggroups (gdbarch
);
2614 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2616 /* Helper for function argument information. */
2617 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2619 /* Hook in the DWARF CFI frame unwinder. */
2620 dwarf2_append_unwinders (gdbarch
);
2622 frame_base_set_default (gdbarch
, &i386_frame_base
);
2624 /* Hook in ABI-specific overrides, if they have been registered. */
2625 gdbarch_init_osabi (info
, gdbarch
);
2627 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
2628 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
2630 /* If we have a register mapping, enable the generic core file
2631 support, unless it has already been enabled. */
2632 if (tdep
->gregset_reg_offset
2633 && !gdbarch_regset_from_core_section_p (gdbarch
))
2634 set_gdbarch_regset_from_core_section (gdbarch
,
2635 i386_regset_from_core_section
);
2637 /* Unless support for MMX has been disabled, make %mm0 the first
2639 if (tdep
->mm0_regnum
== 0)
2640 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2645 static enum gdb_osabi
2646 i386_coff_osabi_sniffer (bfd
*abfd
)
2648 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2649 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2650 return GDB_OSABI_GO32
;
2652 return GDB_OSABI_UNKNOWN
;
2656 /* Provide a prototype to silence -Wmissing-prototypes. */
2657 void _initialize_i386_tdep (void);
2660 _initialize_i386_tdep (void)
2662 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2664 /* Add the variable that controls the disassembly flavor. */
2665 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
2666 &disassembly_flavor
, _("\
2667 Set the disassembly flavor."), _("\
2668 Show the disassembly flavor."), _("\
2669 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2671 NULL
, /* FIXME: i18n: */
2672 &setlist
, &showlist
);
2674 /* Add the variable that controls the convention for returning
2676 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
2677 &struct_convention
, _("\
2678 Set the convention for returning small structs."), _("\
2679 Show the convention for returning small structs."), _("\
2680 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2683 NULL
, /* FIXME: i18n: */
2684 &setlist
, &showlist
);
2686 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2687 i386_coff_osabi_sniffer
);
2689 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2690 i386_svr4_init_abi
);
2691 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2692 i386_go32_init_abi
);
2694 /* Initialize the i386-specific register groups & types. */
2695 i386_init_reggroups ();