1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
47 #include "gdb_assert.h"
48 #include "gdb_string.h"
50 #include "i386-tdep.h"
51 #include "i387-tdep.h"
53 /* Names of the registers. The first 10 registers match the register
54 numbering scheme used by GCC for stabs and DWARF. */
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REG. */
157 i386_register_name (int reg
)
159 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
160 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
162 if (reg
>= 0 && reg
< i386_num_register_names
)
163 return i386_register_names
[reg
];
168 /* Convert stabs register number REG to the appropriate register
169 number used by GDB. */
172 i386_stab_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map. */
175 if (reg
>= 0 && reg
<= 7)
177 /* General-purpose registers. */
180 else if (reg
>= 12 && reg
<= 19)
182 /* Floating-point registers. */
183 return reg
- 12 + I387_ST0_REGNUM
;
185 else if (reg
>= 21 && reg
<= 28)
188 return reg
- 21 + I387_XMM0_REGNUM
;
190 else if (reg
>= 29 && reg
<= 36)
193 return reg
- 29 + I387_MM0_REGNUM
;
196 /* This will hopefully provoke a warning. */
197 return NUM_REGS
+ NUM_PSEUDO_REGS
;
200 /* Convert DWARF register number REG to the appropriate register
201 number used by GDB. */
204 i386_dwarf_reg_to_regnum (int reg
)
206 /* The DWARF register numbering includes %eip and %eflags, and
207 numbers the floating point registers differently. */
208 if (reg
>= 0 && reg
<= 9)
210 /* General-purpose registers. */
213 else if (reg
>= 11 && reg
<= 18)
215 /* Floating-point registers. */
216 return reg
- 11 + I387_ST0_REGNUM
;
220 /* The SSE and MMX registers have identical numbers as in stabs. */
221 return i386_stab_reg_to_regnum (reg
);
224 /* This will hopefully provoke a warning. */
225 return NUM_REGS
+ NUM_PSEUDO_REGS
;
228 #undef I387_ST0_REGNUM
229 #undef I387_MM0_REGNUM
230 #undef I387_NUM_XMM_REGS
233 /* This is the variable that is set with "set disassembly-flavor", and
234 its legitimate values. */
235 static const char att_flavor
[] = "att";
236 static const char intel_flavor
[] = "intel";
237 static const char *valid_flavors
[] =
243 static const char *disassembly_flavor
= att_flavor
;
246 /* Use the program counter to determine the contents and size of a
247 breakpoint instruction. Return a pointer to a string of bytes that
248 encode a breakpoint instruction, store the length of the string in
249 *LEN and optionally adjust *PC to point to the correct memory
250 location for inserting the breakpoint.
252 On the i386 we have a single breakpoint that fits in a single byte
253 and can be inserted anywhere.
255 This function is 64-bit safe. */
257 static const unsigned char *
258 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
260 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
262 *len
= sizeof (break_insn
);
266 #ifdef I386_REGNO_TO_SYMMETRY
267 #error "The Sequent Symmetry is no longer supported."
270 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
271 and %esp "belong" to the calling function. Therefore these
272 registers should be saved if they're going to be modified. */
274 /* The maximum number of saved registers. This should include all
275 registers mentioned above, and %eip. */
276 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
278 struct i386_frame_cache
285 /* Saved registers. */
286 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
290 /* Stack space reserved for local variables. */
294 /* Allocate and initialize a frame cache. */
296 static struct i386_frame_cache
*
297 i386_alloc_frame_cache (void)
299 struct i386_frame_cache
*cache
;
302 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
306 cache
->sp_offset
= -4;
309 /* Saved registers. We initialize these to -1 since zero is a valid
310 offset (that's where %ebp is supposed to be stored). */
311 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
312 cache
->saved_regs
[i
] = -1;
314 cache
->pc_in_eax
= 0;
316 /* Frameless until proven otherwise. */
322 /* If the instruction at PC is a jump, return the address of its
323 target. Otherwise, return PC. */
326 i386_follow_jump (CORE_ADDR pc
)
332 op
= read_memory_unsigned_integer (pc
, 1);
336 op
= read_memory_unsigned_integer (pc
+ 1, 1);
342 /* Relative jump: if data16 == 0, disp32, else disp16. */
345 delta
= read_memory_integer (pc
+ 2, 2);
347 /* Include the size of the jmp instruction (including the
353 delta
= read_memory_integer (pc
+ 1, 4);
355 /* Include the size of the jmp instruction. */
360 /* Relative jump, disp8 (ignore data16). */
361 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
370 /* Check whether PC points at a prologue for a function returning a
371 structure or union. If so, it updates CACHE and returns the
372 address of the first instruction after the code sequence that
373 removes the "hidden" argument from the stack or CURRENT_PC,
374 whichever is smaller. Otherwise, return PC. */
377 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
378 struct i386_frame_cache
*cache
)
380 /* Functions that return a structure or union start with:
383 xchgl %eax, (%esp) 0x87 0x04 0x24
384 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
386 (the System V compiler puts out the second `xchg' instruction,
387 and the assembler doesn't try to optimize it, so the 'sib' form
388 gets generated). This sequence is used to get the address of the
389 return buffer for a function that returns a structure. */
390 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
391 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
392 unsigned char buf
[4];
395 if (current_pc
<= pc
)
398 op
= read_memory_unsigned_integer (pc
, 1);
400 if (op
!= 0x58) /* popl %eax */
403 read_memory (pc
+ 1, buf
, 4);
404 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
407 if (current_pc
== pc
)
409 cache
->sp_offset
+= 4;
413 if (current_pc
== pc
+ 1)
415 cache
->pc_in_eax
= 1;
419 if (buf
[1] == proto1
[1])
426 i386_skip_probe (CORE_ADDR pc
)
428 /* A function may start with
439 unsigned char buf
[8];
442 op
= read_memory_unsigned_integer (pc
, 1);
444 if (op
== 0x68 || op
== 0x6a)
448 /* Skip past the `pushl' instruction; it has either a one-byte or a
449 four-byte operand, depending on the opcode. */
455 /* Read the following 8 bytes, which should be `call _probe' (6
456 bytes) followed by `addl $4,%esp' (2 bytes). */
457 read_memory (pc
+ delta
, buf
, sizeof (buf
));
458 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
459 pc
+= delta
+ sizeof (buf
);
465 /* Check whether PC points at a code that sets up a new stack frame.
466 If so, it updates CACHE and returns the address of the first
467 instruction after the sequence that sets removes the "hidden"
468 argument from the stack or CURRENT_PC, whichever is smaller.
469 Otherwise, return PC. */
472 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
473 struct i386_frame_cache
*cache
)
478 if (current_pc
<= pc
)
481 op
= read_memory_unsigned_integer (pc
, 1);
483 if (op
== 0x55) /* pushl %ebp */
485 /* Take into account that we've executed the `pushl %ebp' that
486 starts this instruction sequence. */
487 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
488 cache
->sp_offset
+= 4;
490 /* If that's all, return now. */
491 if (current_pc
<= pc
+ 1)
494 op
= read_memory_unsigned_integer (pc
+ 1, 1);
496 /* Check for some special instructions that might be migrated
497 by GCC into the prologue. We check for
509 Make sure we only skip these instructions if we later see the
510 `movl %esp, %ebp' that actually sets up the frame. */
511 while (op
== 0x29 || op
== 0x31)
513 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
516 case 0xdb: /* %ebx */
517 case 0xc9: /* %ecx */
518 case 0xd2: /* %edx */
525 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
528 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
532 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
536 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
543 /* OK, we actually have a frame. We just don't know how large
544 it is yet. Set its size to zero. We'll adjust it if
545 necessary. We also now commit to skipping the special
546 instructions mentioned before. */
550 /* If that's all, return now. */
551 if (current_pc
<= pc
+ 3)
554 /* Check for stack adjustment
558 NOTE: You can't subtract a 16 bit immediate from a 32 bit
559 reg, so we don't have to worry about a data16 prefix. */
560 op
= read_memory_unsigned_integer (pc
+ 3, 1);
563 /* `subl' with 8 bit immediate. */
564 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
565 /* Some instruction starting with 0x83 other than `subl'. */
568 /* `subl' with signed byte immediate (though it wouldn't make
569 sense to be negative). */
570 cache
->locals
= read_memory_integer (pc
+ 5, 1);
575 /* Maybe it is `subl' with a 32 bit immedediate. */
576 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
577 /* Some instruction starting with 0x81 other than `subl'. */
580 /* It is `subl' with a 32 bit immediate. */
581 cache
->locals
= read_memory_integer (pc
+ 5, 4);
586 /* Some instruction other than `subl'. */
590 else if (op
== 0xc8) /* enter $XXX */
592 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
599 /* Check whether PC points at code that saves registers on the stack.
600 If so, it updates CACHE and returns the address of the first
601 instruction after the register saves or CURRENT_PC, whichever is
602 smaller. Otherwise, return PC. */
605 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
606 struct i386_frame_cache
*cache
)
608 CORE_ADDR offset
= 0;
612 if (cache
->locals
> 0)
613 offset
-= cache
->locals
;
614 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
616 op
= read_memory_unsigned_integer (pc
, 1);
617 if (op
< 0x50 || op
> 0x57)
621 cache
->saved_regs
[op
- 0x50] = offset
;
622 cache
->sp_offset
+= 4;
629 /* Do a full analysis of the prologue at PC and update CACHE
630 accordingly. Bail out early if CURRENT_PC is reached. Return the
631 address where the analysis stopped.
633 We handle these cases:
635 The startup sequence can be at the start of the function, or the
636 function can start with a branch to startup code at the end.
638 %ebp can be set up with either the 'enter' instruction, or "pushl
639 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
640 once used in the System V compiler).
642 Local space is allocated just below the saved %ebp by either the
643 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
644 bit unsigned argument for space to allocate, and the 'addl'
645 instruction could have either a signed byte, or 32 bit immediate.
647 Next, the registers used by this function are pushed. With the
648 System V compiler they will always be in the order: %edi, %esi,
649 %ebx (and sometimes a harmless bug causes it to also save but not
650 restore %eax); however, the code below is willing to see the pushes
651 in any order, and will handle up to 8 of them.
653 If the setup sequence is at the end of the function, then the next
654 instruction will be a branch back to the start. */
657 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
658 struct i386_frame_cache
*cache
)
660 pc
= i386_follow_jump (pc
);
661 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
662 pc
= i386_skip_probe (pc
);
663 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
664 return i386_analyze_register_saves (pc
, current_pc
, cache
);
667 /* Return PC of first real instruction. */
670 i386_skip_prologue (CORE_ADDR start_pc
)
672 static unsigned char pic_pat
[6] =
674 0xe8, 0, 0, 0, 0, /* call 0x0 */
675 0x5b, /* popl %ebx */
677 struct i386_frame_cache cache
;
683 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
684 if (cache
.locals
< 0)
687 /* Found valid frame setup. */
689 /* The native cc on SVR4 in -K PIC mode inserts the following code
690 to get the address of the global offset table (GOT) into register
695 movl %ebx,x(%ebp) (optional)
698 This code is with the rest of the prologue (at the end of the
699 function), so we have to skip it to get to the first real
700 instruction at the start of the function. */
702 for (i
= 0; i
< 6; i
++)
704 op
= read_memory_unsigned_integer (pc
+ i
, 1);
705 if (pic_pat
[i
] != op
)
712 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
714 if (op
== 0x89) /* movl %ebx, x(%ebp) */
716 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
718 if (op
== 0x5d) /* One byte offset from %ebp. */
720 else if (op
== 0x9d) /* Four byte offset from %ebp. */
722 else /* Unexpected instruction. */
725 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
729 if (delta
> 0 && op
== 0x81
730 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
736 return i386_follow_jump (pc
);
739 /* This function is 64-bit safe. */
742 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
746 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
747 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
753 static struct i386_frame_cache
*
754 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
756 struct i386_frame_cache
*cache
;
763 cache
= i386_alloc_frame_cache ();
766 /* In principle, for normal frames, %ebp holds the frame pointer,
767 which holds the base address for the current stack frame.
768 However, for functions that don't need it, the frame pointer is
769 optional. For these "frameless" functions the frame pointer is
770 actually the frame pointer of the calling frame. Signal
771 trampolines are just a special case of a "frameless" function.
772 They (usually) share their frame pointer with the frame that was
773 in progress when the signal occurred. */
775 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
776 cache
->base
= extract_unsigned_integer (buf
, 4);
777 if (cache
->base
== 0)
780 /* For normal frames, %eip is stored at 4(%ebp). */
781 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
783 cache
->pc
= frame_func_unwind (next_frame
);
785 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
787 if (cache
->locals
< 0)
789 /* We didn't find a valid frame, which means that CACHE->base
790 currently holds the frame pointer for our calling frame. If
791 we're at the start of a function, or somewhere half-way its
792 prologue, the function's frame probably hasn't been fully
793 setup yet. Try to reconstruct the base address for the stack
794 frame by looking at the stack pointer. For truly "frameless"
795 functions this might work too. */
797 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
798 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
801 /* Now that we have the base address for the stack frame we can
802 calculate the value of %esp in the calling frame. */
803 cache
->saved_sp
= cache
->base
+ 8;
805 /* Adjust all the saved registers such that they contain addresses
806 instead of offsets. */
807 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
808 if (cache
->saved_regs
[i
] != -1)
809 cache
->saved_regs
[i
] += cache
->base
;
815 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
816 struct frame_id
*this_id
)
818 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
820 /* This marks the outermost frame. */
821 if (cache
->base
== 0)
824 /* See the end of i386_push_dummy_call. */
825 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
829 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
830 int regnum
, int *optimizedp
,
831 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
832 int *realnump
, void *valuep
)
834 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
836 gdb_assert (regnum
>= 0);
838 /* The System V ABI says that:
840 "The flags register contains the system flags, such as the
841 direction flag and the carry flag. The direction flag must be
842 set to the forward (that is, zero) direction before entry and
843 upon exit from a function. Other user flags have no specified
844 role in the standard calling sequence and are not preserved."
846 To guarantee the "upon exit" part of that statement we fake a
847 saved flags register that has its direction flag cleared.
849 Note that GCC doesn't seem to rely on the fact that the direction
850 flag is cleared after a function return; it always explicitly
851 clears the flag before operations where it matters.
853 FIXME: kettenis/20030316: I'm not quite sure whether this is the
854 right thing to do. The way we fake the flags register here makes
855 it impossible to change it. */
857 if (regnum
== I386_EFLAGS_REGNUM
)
867 /* Clear the direction flag. */
868 val
= frame_unwind_register_unsigned (next_frame
,
871 store_unsigned_integer (valuep
, 4, val
);
877 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
879 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
880 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
884 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
892 /* Store the value. */
893 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
898 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
901 *lvalp
= lval_memory
;
902 *addrp
= cache
->saved_regs
[regnum
];
906 /* Read the value in from memory. */
907 read_memory (*addrp
, valuep
,
908 register_size (current_gdbarch
, regnum
));
913 frame_register_unwind (next_frame
, regnum
,
914 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
917 static const struct frame_unwind i386_frame_unwind
=
921 i386_frame_prev_register
924 static const struct frame_unwind
*
925 i386_frame_sniffer (struct frame_info
*next_frame
)
927 return &i386_frame_unwind
;
931 /* Signal trampolines. */
933 static struct i386_frame_cache
*
934 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
936 struct i386_frame_cache
*cache
;
937 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
944 cache
= i386_alloc_frame_cache ();
946 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
947 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
949 addr
= tdep
->sigcontext_addr (next_frame
);
950 if (tdep
->sc_reg_offset
)
954 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
956 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
957 if (tdep
->sc_reg_offset
[i
] != -1)
958 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
962 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
963 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
971 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
972 struct frame_id
*this_id
)
974 struct i386_frame_cache
*cache
=
975 i386_sigtramp_frame_cache (next_frame
, this_cache
);
977 /* See the end of i386_push_dummy_call. */
978 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
982 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
984 int regnum
, int *optimizedp
,
985 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
986 int *realnump
, void *valuep
)
988 /* Make sure we've initialized the cache. */
989 i386_sigtramp_frame_cache (next_frame
, this_cache
);
991 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
992 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
995 static const struct frame_unwind i386_sigtramp_frame_unwind
=
998 i386_sigtramp_frame_this_id
,
999 i386_sigtramp_frame_prev_register
1002 static const struct frame_unwind
*
1003 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1005 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1008 /* We shouldn't even bother to try if the OSABI didn't register
1009 a sigcontext_addr handler. */
1010 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
1013 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1014 if (PC_IN_SIGTRAMP (pc
, name
))
1015 return &i386_sigtramp_frame_unwind
;
1022 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1024 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1029 static const struct frame_base i386_frame_base
=
1032 i386_frame_base_address
,
1033 i386_frame_base_address
,
1034 i386_frame_base_address
1037 static struct frame_id
1038 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1043 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1044 fp
= extract_unsigned_integer (buf
, 4);
1046 /* See the end of i386_push_dummy_call. */
1047 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1051 /* Figure out where the longjmp will land. Slurp the args out of the
1052 stack. We expect the first arg to be a pointer to the jmp_buf
1053 structure from which we extract the address that we will land at.
1054 This address is copied into PC. This routine returns non-zero on
1057 This function is 64-bit safe. */
1060 i386_get_longjmp_target (CORE_ADDR
*pc
)
1063 CORE_ADDR sp
, jb_addr
;
1064 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1065 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1067 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1068 longjmp will land. */
1069 if (jb_pc_offset
== -1)
1072 /* Don't use I386_ESP_REGNUM here, since this function is also used
1074 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1075 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1076 if (target_read_memory (sp
+ len
, buf
, len
))
1079 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1080 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1083 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1089 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1090 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1091 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1092 CORE_ADDR struct_addr
)
1097 /* Push arguments in reverse order. */
1098 for (i
= nargs
- 1; i
>= 0; i
--)
1100 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1102 /* The System V ABI says that:
1104 "An argument's size is increased, if necessary, to make it a
1105 multiple of [32-bit] words. This may require tail padding,
1106 depending on the size of the argument."
1108 This makes sure the stack says word-aligned. */
1109 sp
-= (len
+ 3) & ~3;
1110 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1113 /* Push value address. */
1117 store_unsigned_integer (buf
, 4, struct_addr
);
1118 write_memory (sp
, buf
, 4);
1121 /* Store return address. */
1123 store_unsigned_integer (buf
, 4, bp_addr
);
1124 write_memory (sp
, buf
, 4);
1126 /* Finally, update the stack pointer... */
1127 store_unsigned_integer (buf
, 4, sp
);
1128 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1130 /* ...and fake a frame pointer. */
1131 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1133 /* MarkK wrote: This "+ 8" is all over the place:
1134 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1135 i386_unwind_dummy_id). It's there, since all frame unwinders for
1136 a given target have to agree (within a certain margin) on the
1137 defenition of the stack address of a frame. Otherwise
1138 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1139 stack address *before* the function call as a frame's CFA. On
1140 the i386, when %ebp is used as a frame pointer, the offset
1141 between the contents %ebp and the CFA as defined by GCC. */
1145 /* These registers are used for returning integers (and on some
1146 targets also for returning `struct' and `union' values when their
1147 size and alignment match an integer type). */
1148 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1149 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1151 /* Extract from an array REGBUF containing the (raw) register state, a
1152 function return value of TYPE, and copy that, in virtual format,
1156 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1159 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1160 bfd_byte
*valbuf
= dst
;
1161 int len
= TYPE_LENGTH (type
);
1162 char buf
[I386_MAX_REGISTER_SIZE
];
1164 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1165 && TYPE_NFIELDS (type
) == 1)
1167 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1171 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1173 if (tdep
->st0_regnum
< 0)
1175 warning ("Cannot find floating-point return value.");
1176 memset (valbuf
, 0, len
);
1180 /* Floating-point return values can be found in %st(0). Convert
1181 its contents to the desired type. This is probably not
1182 exactly how it would happen on the target itself, but it is
1183 the best we can do. */
1184 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1185 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1189 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1190 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1192 if (len
<= low_size
)
1194 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1195 memcpy (valbuf
, buf
, len
);
1197 else if (len
<= (low_size
+ high_size
))
1199 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1200 memcpy (valbuf
, buf
, low_size
);
1201 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1202 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1205 internal_error (__FILE__
, __LINE__
,
1206 "Cannot extract return value of %d bytes long.", len
);
1210 /* Write into the appropriate registers a function return value stored
1211 in VALBUF of type TYPE, given in virtual format. */
1214 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1217 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1218 int len
= TYPE_LENGTH (type
);
1220 /* Define I387_ST0_REGNUM such that we use the proper definitions
1221 for the architecture. */
1222 #define I387_ST0_REGNUM I386_ST0_REGNUM
1224 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1225 && TYPE_NFIELDS (type
) == 1)
1227 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1231 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1234 char buf
[I386_MAX_REGISTER_SIZE
];
1236 if (tdep
->st0_regnum
< 0)
1238 warning ("Cannot set floating-point return value.");
1242 /* Returning floating-point values is a bit tricky. Apart from
1243 storing the return value in %st(0), we have to simulate the
1244 state of the FPU at function return point. */
1246 /* Convert the value found in VALBUF to the extended
1247 floating-point format used by the FPU. This is probably
1248 not exactly how it would happen on the target itself, but
1249 it is the best we can do. */
1250 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1251 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1253 /* Set the top of the floating-point register stack to 7. The
1254 actual value doesn't really matter, but 7 is what a normal
1255 function return would end up with if the program started out
1256 with a freshly initialized FPU. */
1257 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1259 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1261 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1262 the floating-point register stack to 7, the appropriate value
1263 for the tag word is 0x3fff. */
1264 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1268 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1269 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1271 if (len
<= low_size
)
1272 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1273 else if (len
<= (low_size
+ high_size
))
1275 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1276 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1277 len
- low_size
, (char *) valbuf
+ low_size
);
1280 internal_error (__FILE__
, __LINE__
,
1281 "Cannot store return value of %d bytes long.", len
);
1284 #undef I387_ST0_REGNUM
1287 /* Extract from REGCACHE, which contains the (raw) register state, the
1288 address in which a function should return its structure value, as a
1292 i386_extract_struct_value_address (struct regcache
*regcache
)
1296 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1297 return extract_unsigned_integer (buf
, 4);
1301 /* This is the variable that is set with "set struct-convention", and
1302 its legitimate values. */
1303 static const char default_struct_convention
[] = "default";
1304 static const char pcc_struct_convention
[] = "pcc";
1305 static const char reg_struct_convention
[] = "reg";
1306 static const char *valid_conventions
[] =
1308 default_struct_convention
,
1309 pcc_struct_convention
,
1310 reg_struct_convention
,
1313 static const char *struct_convention
= default_struct_convention
;
1316 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1318 enum struct_return struct_return
;
1320 if (struct_convention
== default_struct_convention
)
1321 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1322 else if (struct_convention
== pcc_struct_convention
)
1323 struct_return
= pcc_struct_return
;
1325 struct_return
= reg_struct_return
;
1327 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1332 /* Return the GDB type object for the "standard" data type of data in
1333 register REGNUM. Perhaps %esi and %edi should go here, but
1334 potentially they could be used for things other than address. */
1336 static struct type
*
1337 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1339 if (regnum
== I386_EIP_REGNUM
1340 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1341 return lookup_pointer_type (builtin_type_void
);
1343 if (i386_fp_regnum_p (regnum
))
1344 return builtin_type_i387_ext
;
1346 if (i386_sse_regnum_p (gdbarch
, regnum
))
1347 return builtin_type_vec128i
;
1349 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1350 return builtin_type_vec64i
;
1352 return builtin_type_int
;
1355 /* Map a cooked register onto a raw register or memory. For the i386,
1356 the MMX registers need to be mapped onto floating point registers. */
1359 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1361 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1366 /* Define I387_ST0_REGNUM such that we use the proper definitions
1367 for REGCACHE's architecture. */
1368 #define I387_ST0_REGNUM tdep->st0_regnum
1370 mmxreg
= regnum
- tdep
->mm0_regnum
;
1371 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1372 tos
= (fstat
>> 11) & 0x7;
1373 fpreg
= (mmxreg
+ tos
) % 8;
1375 return (I387_ST0_REGNUM
+ fpreg
);
1377 #undef I387_ST0_REGNUM
1381 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1382 int regnum
, void *buf
)
1384 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1386 char mmx_buf
[MAX_REGISTER_SIZE
];
1387 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1389 /* Extract (always little endian). */
1390 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1391 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1394 regcache_raw_read (regcache
, regnum
, buf
);
1398 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1399 int regnum
, const void *buf
)
1401 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1403 char mmx_buf
[MAX_REGISTER_SIZE
];
1404 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1407 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1408 /* ... Modify ... (always little endian). */
1409 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1411 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1414 regcache_raw_write (regcache
, regnum
, buf
);
1418 /* These registers don't have pervasive standard uses. Move them to
1419 i386-tdep.h if necessary. */
1421 #define I386_EBX_REGNUM 3 /* %ebx */
1422 #define I386_ECX_REGNUM 1 /* %ecx */
1423 #define I386_ESI_REGNUM 6 /* %esi */
1424 #define I386_EDI_REGNUM 7 /* %edi */
1426 /* Return the register number of the register allocated by GCC after
1427 REGNUM, or -1 if there is no such register. */
1430 i386_next_regnum (int regnum
)
1432 /* GCC allocates the registers in the order:
1434 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1436 Since storing a variable in %esp doesn't make any sense we return
1437 -1 for %ebp and for %esp itself. */
1438 static int next_regnum
[] =
1440 I386_EDX_REGNUM
, /* Slot for %eax. */
1441 I386_EBX_REGNUM
, /* Slot for %ecx. */
1442 I386_ECX_REGNUM
, /* Slot for %edx. */
1443 I386_ESI_REGNUM
, /* Slot for %ebx. */
1444 -1, -1, /* Slots for %esp and %ebp. */
1445 I386_EDI_REGNUM
, /* Slot for %esi. */
1446 I386_EBP_REGNUM
/* Slot for %edi. */
1449 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1450 return next_regnum
[regnum
];
1455 /* Return nonzero if a value of type TYPE stored in register REGNUM
1456 needs any special handling. */
1459 i386_convert_register_p (int regnum
, struct type
*type
)
1461 int len
= TYPE_LENGTH (type
);
1463 /* Values may be spread across multiple registers. Most debugging
1464 formats aren't expressive enough to specify the locations, so
1465 some heuristics is involved. Right now we only handle types that
1466 have a length that is a multiple of the word size, since GCC
1467 doesn't seem to put any other types into registers. */
1468 if (len
> 4 && len
% 4 == 0)
1470 int last_regnum
= regnum
;
1474 last_regnum
= i386_next_regnum (last_regnum
);
1478 if (last_regnum
!= -1)
1482 return i386_fp_regnum_p (regnum
);
1485 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1486 return its contents in TO. */
1489 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1490 struct type
*type
, void *to
)
1492 int len
= TYPE_LENGTH (type
);
1495 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1496 available in FRAME (i.e. if it wasn't saved)? */
1498 if (i386_fp_regnum_p (regnum
))
1500 i387_register_to_value (frame
, regnum
, type
, to
);
1504 /* Read a value spread accross multiple registers. */
1506 gdb_assert (len
> 4 && len
% 4 == 0);
1510 gdb_assert (regnum
!= -1);
1511 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1513 get_frame_register (frame
, regnum
, buf
);
1514 regnum
= i386_next_regnum (regnum
);
1520 /* Write the contents FROM of a value of type TYPE into register
1521 REGNUM in frame FRAME. */
1524 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1525 struct type
*type
, const void *from
)
1527 int len
= TYPE_LENGTH (type
);
1528 const char *buf
= from
;
1530 if (i386_fp_regnum_p (regnum
))
1532 i387_value_to_register (frame
, regnum
, type
, from
);
1536 /* Write a value spread accross multiple registers. */
1538 gdb_assert (len
> 4 && len
% 4 == 0);
1542 gdb_assert (regnum
!= -1);
1543 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1545 put_frame_register (frame
, regnum
, buf
);
1546 regnum
= i386_next_regnum (regnum
);
1552 /* Supply register REGNUM from the general-purpose register set REGSET
1553 to register cache REGCACHE. If REGNUM is -1, do this for all
1554 registers in REGSET. */
1557 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1558 int regnum
, const void *gregs
, size_t len
)
1560 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1561 const char *regs
= gregs
;
1564 gdb_assert (len
== tdep
->sizeof_gregset
);
1566 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1568 if ((regnum
== i
|| regnum
== -1)
1569 && tdep
->gregset_reg_offset
[i
] != -1)
1570 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1574 /* Supply register REGNUM from the floating-point register set REGSET
1575 to register cache REGCACHE. If REGNUM is -1, do this for all
1576 registers in REGSET. */
1579 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1580 int regnum
, const void *fpregs
, size_t len
)
1582 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1584 gdb_assert (len
== tdep
->sizeof_fpregset
);
1585 i387_supply_fsave (regcache
, regnum
, fpregs
);
1589 #ifdef STATIC_TRANSFORM_NAME
1590 /* SunPRO encodes the static variables. This is not related to C++
1591 mangling, it is done for C too. */
1594 sunpro_static_transform_name (char *name
)
1597 if (IS_STATIC_TRANSFORM_NAME (name
))
1599 /* For file-local statics there will be a period, a bunch of
1600 junk (the contents of which match a string given in the
1601 N_OPT), a period and the name. For function-local statics
1602 there will be a bunch of junk (which seems to change the
1603 second character from 'A' to 'B'), a period, the name of the
1604 function, and the name. So just skip everything before the
1606 p
= strrchr (name
, '.');
1612 #endif /* STATIC_TRANSFORM_NAME */
1615 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1618 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1620 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1622 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1623 struct minimal_symbol
*indsym
=
1624 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1625 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1629 if (strncmp (symname
, "__imp_", 6) == 0
1630 || strncmp (symname
, "_imp_", 5) == 0)
1631 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1634 return 0; /* Not a trampoline. */
1638 /* Return non-zero if PC and NAME show that we are in a signal
1642 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1644 return (name
&& strcmp ("_sigtramp", name
) == 0);
1648 /* We have two flavours of disassembly. The machinery on this page
1649 deals with switching between those. */
1652 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1654 gdb_assert (disassembly_flavor
== att_flavor
1655 || disassembly_flavor
== intel_flavor
);
1657 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1658 constified, cast to prevent a compiler warning. */
1659 info
->disassembler_options
= (char *) disassembly_flavor
;
1660 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1662 return print_insn_i386 (pc
, info
);
1666 /* There are a few i386 architecture variants that differ only
1667 slightly from the generic i386 target. For now, we don't give them
1668 their own source file, but include them here. As a consequence,
1669 they'll always be included. */
1671 /* System V Release 4 (SVR4). */
1674 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1676 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1677 currently unknown. */
1678 return (name
&& (strcmp ("_sigreturn", name
) == 0
1679 || strcmp ("_sigacthandler", name
) == 0
1680 || strcmp ("sigvechandler", name
) == 0));
1683 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1684 routine, return the address of the associated sigcontext (ucontext)
1688 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1693 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1694 sp
= extract_unsigned_integer (buf
, 4);
1696 return read_memory_unsigned_integer (sp
+ 8, 4);
1703 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1705 /* DJGPP doesn't have any special frames for signal handlers. */
1713 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1715 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1716 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1719 /* System V Release 4 (SVR4). */
1722 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1724 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1726 /* System V Release 4 uses ELF. */
1727 i386_elf_init_abi (info
, gdbarch
);
1729 /* System V Release 4 has shared libraries. */
1730 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1731 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1733 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1734 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1735 tdep
->sc_pc_offset
= 36 + 14 * 4;
1736 tdep
->sc_sp_offset
= 36 + 17 * 4;
1738 tdep
->jb_pc_offset
= 20;
1744 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1746 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1748 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1750 tdep
->jb_pc_offset
= 36;
1756 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1758 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1760 tdep
->jb_pc_offset
= 24;
1764 /* i386 register groups. In addition to the normal groups, add "mmx"
1767 static struct reggroup
*i386_sse_reggroup
;
1768 static struct reggroup
*i386_mmx_reggroup
;
1771 i386_init_reggroups (void)
1773 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1774 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1778 i386_add_reggroups (struct gdbarch
*gdbarch
)
1780 reggroup_add (gdbarch
, i386_sse_reggroup
);
1781 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1782 reggroup_add (gdbarch
, general_reggroup
);
1783 reggroup_add (gdbarch
, float_reggroup
);
1784 reggroup_add (gdbarch
, all_reggroup
);
1785 reggroup_add (gdbarch
, save_reggroup
);
1786 reggroup_add (gdbarch
, restore_reggroup
);
1787 reggroup_add (gdbarch
, vector_reggroup
);
1788 reggroup_add (gdbarch
, system_reggroup
);
1792 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1793 struct reggroup
*group
)
1795 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1796 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1797 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1798 || i386_fpc_regnum_p (regnum
));
1799 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1801 if (group
== i386_mmx_reggroup
)
1802 return mmx_regnum_p
;
1803 if (group
== i386_sse_reggroup
)
1804 return sse_regnum_p
;
1805 if (group
== vector_reggroup
)
1806 return (mmx_regnum_p
|| sse_regnum_p
);
1807 if (group
== float_reggroup
)
1809 if (group
== general_reggroup
)
1810 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1812 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1816 /* Get the ARGIth function argument for the current function. */
1819 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1822 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1823 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1827 static struct gdbarch
*
1828 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1830 struct gdbarch_tdep
*tdep
;
1831 struct gdbarch
*gdbarch
;
1833 /* If there is already a candidate, use it. */
1834 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1836 return arches
->gdbarch
;
1838 /* Allocate space for the new architecture. */
1839 tdep
= XMALLOC (struct gdbarch_tdep
);
1840 gdbarch
= gdbarch_alloc (&info
, tdep
);
1842 /* General-purpose registers. */
1843 tdep
->gregset
= NULL
;
1844 tdep
->gregset_reg_offset
= NULL
;
1845 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1846 tdep
->sizeof_gregset
= 0;
1848 /* Floating-point registers. */
1849 tdep
->fpregset
= NULL
;
1850 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1852 /* The default settings include the FPU registers, the MMX registers
1853 and the SSE registers. This can be overidden for a specific ABI
1854 by adjusting the members `st0_regnum', `mm0_regnum' and
1855 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1856 will show up in the output of "info all-registers". Ideally we
1857 should try to autodetect whether they are available, such that we
1858 can prevent "info all-registers" from displaying registers that
1861 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1862 [the SSE registers] always (even when they don't exist) or never
1863 showing them to the user (even when they do exist), I prefer the
1864 former over the latter. */
1866 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1868 /* The MMX registers are implemented as pseudo-registers. Put off
1869 caclulating the register number for %mm0 until we know the number
1870 of raw registers. */
1871 tdep
->mm0_regnum
= 0;
1873 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1874 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1876 tdep
->jb_pc_offset
= -1;
1877 tdep
->struct_return
= pcc_struct_return
;
1878 tdep
->sigtramp_start
= 0;
1879 tdep
->sigtramp_end
= 0;
1880 tdep
->sigcontext_addr
= NULL
;
1881 tdep
->sc_reg_offset
= NULL
;
1882 tdep
->sc_pc_offset
= -1;
1883 tdep
->sc_sp_offset
= -1;
1885 /* The format used for `long double' on almost all i386 targets is
1886 the i387 extended floating-point format. In fact, of all targets
1887 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1888 on having a `long double' that's not `long' at all. */
1889 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1891 /* Although the i387 extended floating-point has only 80 significant
1892 bits, a `long double' actually takes up 96, probably to enforce
1894 set_gdbarch_long_double_bit (gdbarch
, 96);
1896 /* The default ABI includes general-purpose registers,
1897 floating-point registers, and the SSE registers. */
1898 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1899 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1900 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1902 /* Register numbers of various important registers. */
1903 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1904 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1905 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1906 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1908 /* Use the "default" register numbering scheme for stabs and COFF. */
1909 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1910 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1912 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1913 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1914 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1916 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1917 be in use on any of the supported i386 targets. */
1919 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1921 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1923 /* Call dummy code. */
1924 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1926 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1927 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1928 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1930 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1931 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1932 set_gdbarch_extract_struct_value_address (gdbarch
,
1933 i386_extract_struct_value_address
);
1934 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1936 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1938 /* Stack grows downward. */
1939 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1941 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1942 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1943 set_gdbarch_function_start_offset (gdbarch
, 0);
1945 set_gdbarch_frame_args_skip (gdbarch
, 8);
1946 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1948 /* Wire in the MMX registers. */
1949 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1950 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1951 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1953 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1955 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1957 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1959 /* Add the i386 register groups. */
1960 i386_add_reggroups (gdbarch
);
1961 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1963 /* Helper for function argument information. */
1964 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1966 /* Hook in the DWARF CFI frame unwinder. */
1967 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1969 frame_base_set_default (gdbarch
, &i386_frame_base
);
1971 /* Hook in ABI-specific overrides, if they have been registered. */
1972 gdbarch_init_osabi (info
, gdbarch
);
1974 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
1975 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
1977 /* Unless support for MMX has been disabled, make %mm0 the first
1979 if (tdep
->mm0_regnum
== 0)
1980 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
1985 static enum gdb_osabi
1986 i386_coff_osabi_sniffer (bfd
*abfd
)
1988 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1989 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1990 return GDB_OSABI_GO32
;
1992 return GDB_OSABI_UNKNOWN
;
1995 static enum gdb_osabi
1996 i386_nlm_osabi_sniffer (bfd
*abfd
)
1998 return GDB_OSABI_NETWARE
;
2002 /* Provide a prototype to silence -Wmissing-prototypes. */
2003 void _initialize_i386_tdep (void);
2006 _initialize_i386_tdep (void)
2008 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2010 /* Add the variable that controls the disassembly flavor. */
2012 struct cmd_list_element
*new_cmd
;
2014 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2016 &disassembly_flavor
,
2018 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2019 and the default value is \"att\".",
2021 add_show_from_set (new_cmd
, &showlist
);
2024 /* Add the variable that controls the convention for returning
2027 struct cmd_list_element
*new_cmd
;
2029 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2031 &struct_convention
, "\
2032 Set the convention for returning small structs, valid values \
2033 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2035 add_show_from_set (new_cmd
, &showlist
);
2038 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2039 i386_coff_osabi_sniffer
);
2040 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2041 i386_nlm_osabi_sniffer
);
2043 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2044 i386_svr4_init_abi
);
2045 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2046 i386_go32_init_abi
);
2047 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2050 /* Initialize the i386 specific register groups. */
2051 i386_init_reggroups ();