1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
47 #include "gdb_assert.h"
48 #include "gdb_string.h"
50 #include "i386-tdep.h"
51 #include "i387-tdep.h"
53 /* Names of the registers. The first 10 registers match the register
54 numbering scheme used by GCC for stabs and DWARF. */
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REG. */
157 i386_register_name (int reg
)
159 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
160 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
162 if (reg
>= 0 && reg
< i386_num_register_names
)
163 return i386_register_names
[reg
];
168 /* Convert stabs register number REG to the appropriate register
169 number used by GDB. */
172 i386_stab_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map. */
175 if (reg
>= 0 && reg
<= 7)
177 /* General-purpose registers. */
180 else if (reg
>= 12 && reg
<= 19)
182 /* Floating-point registers. */
183 return reg
- 12 + I387_ST0_REGNUM
;
185 else if (reg
>= 21 && reg
<= 28)
188 return reg
- 21 + I387_XMM0_REGNUM
;
190 else if (reg
>= 29 && reg
<= 36)
193 return reg
- 29 + I387_MM0_REGNUM
;
196 /* This will hopefully provoke a warning. */
197 return NUM_REGS
+ NUM_PSEUDO_REGS
;
200 /* Convert DWARF register number REG to the appropriate register
201 number used by GDB. */
204 i386_dwarf_reg_to_regnum (int reg
)
206 /* The DWARF register numbering includes %eip and %eflags, and
207 numbers the floating point registers differently. */
208 if (reg
>= 0 && reg
<= 9)
210 /* General-purpose registers. */
213 else if (reg
>= 11 && reg
<= 18)
215 /* Floating-point registers. */
216 return reg
- 11 + I387_ST0_REGNUM
;
220 /* The SSE and MMX registers have identical numbers as in stabs. */
221 return i386_stab_reg_to_regnum (reg
);
224 /* This will hopefully provoke a warning. */
225 return NUM_REGS
+ NUM_PSEUDO_REGS
;
228 #undef I387_ST0_REGNUM
229 #undef I387_MM0_REGNUM
230 #undef I387_NUM_XMM_REGS
233 /* This is the variable that is set with "set disassembly-flavor", and
234 its legitimate values. */
235 static const char att_flavor
[] = "att";
236 static const char intel_flavor
[] = "intel";
237 static const char *valid_flavors
[] =
243 static const char *disassembly_flavor
= att_flavor
;
246 /* Use the program counter to determine the contents and size of a
247 breakpoint instruction. Return a pointer to a string of bytes that
248 encode a breakpoint instruction, store the length of the string in
249 *LEN and optionally adjust *PC to point to the correct memory
250 location for inserting the breakpoint.
252 On the i386 we have a single breakpoint that fits in a single byte
253 and can be inserted anywhere.
255 This function is 64-bit safe. */
257 static const unsigned char *
258 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
260 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
262 *len
= sizeof (break_insn
);
266 #ifdef I386_REGNO_TO_SYMMETRY
267 #error "The Sequent Symmetry is no longer supported."
270 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
271 and %esp "belong" to the calling function. Therefore these
272 registers should be saved if they're going to be modified. */
274 /* The maximum number of saved registers. This should include all
275 registers mentioned above, and %eip. */
276 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
278 struct i386_frame_cache
285 /* Saved registers. */
286 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
290 /* Stack space reserved for local variables. */
294 /* Allocate and initialize a frame cache. */
296 static struct i386_frame_cache
*
297 i386_alloc_frame_cache (void)
299 struct i386_frame_cache
*cache
;
302 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
306 cache
->sp_offset
= -4;
309 /* Saved registers. We initialize these to -1 since zero is a valid
310 offset (that's where %ebp is supposed to be stored). */
311 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
312 cache
->saved_regs
[i
] = -1;
314 cache
->pc_in_eax
= 0;
316 /* Frameless until proven otherwise. */
322 /* If the instruction at PC is a jump, return the address of its
323 target. Otherwise, return PC. */
326 i386_follow_jump (CORE_ADDR pc
)
332 op
= read_memory_unsigned_integer (pc
, 1);
336 op
= read_memory_unsigned_integer (pc
+ 1, 1);
342 /* Relative jump: if data16 == 0, disp32, else disp16. */
345 delta
= read_memory_integer (pc
+ 2, 2);
347 /* Include the size of the jmp instruction (including the
353 delta
= read_memory_integer (pc
+ 1, 4);
355 /* Include the size of the jmp instruction. */
360 /* Relative jump, disp8 (ignore data16). */
361 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
370 /* Check whether PC points at a prologue for a function returning a
371 structure or union. If so, it updates CACHE and returns the
372 address of the first instruction after the code sequence that
373 removes the "hidden" argument from the stack or CURRENT_PC,
374 whichever is smaller. Otherwise, return PC. */
377 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
378 struct i386_frame_cache
*cache
)
380 /* Functions that return a structure or union start with:
383 xchgl %eax, (%esp) 0x87 0x04 0x24
384 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
386 (the System V compiler puts out the second `xchg' instruction,
387 and the assembler doesn't try to optimize it, so the 'sib' form
388 gets generated). This sequence is used to get the address of the
389 return buffer for a function that returns a structure. */
390 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
391 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
392 unsigned char buf
[4];
395 if (current_pc
<= pc
)
398 op
= read_memory_unsigned_integer (pc
, 1);
400 if (op
!= 0x58) /* popl %eax */
403 read_memory (pc
+ 1, buf
, 4);
404 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
407 if (current_pc
== pc
)
409 cache
->sp_offset
+= 4;
413 if (current_pc
== pc
+ 1)
415 cache
->pc_in_eax
= 1;
419 if (buf
[1] == proto1
[1])
426 i386_skip_probe (CORE_ADDR pc
)
428 /* A function may start with
439 unsigned char buf
[8];
442 op
= read_memory_unsigned_integer (pc
, 1);
444 if (op
== 0x68 || op
== 0x6a)
448 /* Skip past the `pushl' instruction; it has either a one-byte or a
449 four-byte operand, depending on the opcode. */
455 /* Read the following 8 bytes, which should be `call _probe' (6
456 bytes) followed by `addl $4,%esp' (2 bytes). */
457 read_memory (pc
+ delta
, buf
, sizeof (buf
));
458 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
459 pc
+= delta
+ sizeof (buf
);
465 /* Check whether PC points at a code that sets up a new stack frame.
466 If so, it updates CACHE and returns the address of the first
467 instruction after the sequence that sets removes the "hidden"
468 argument from the stack or CURRENT_PC, whichever is smaller.
469 Otherwise, return PC. */
472 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
473 struct i386_frame_cache
*cache
)
478 if (current_pc
<= pc
)
481 op
= read_memory_unsigned_integer (pc
, 1);
483 if (op
== 0x55) /* pushl %ebp */
485 /* Take into account that we've executed the `pushl %ebp' that
486 starts this instruction sequence. */
487 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
488 cache
->sp_offset
+= 4;
490 /* If that's all, return now. */
491 if (current_pc
<= pc
+ 1)
494 op
= read_memory_unsigned_integer (pc
+ 1, 1);
496 /* Check for some special instructions that might be migrated
497 by GCC into the prologue. We check for
511 Because of the symmetry, there are actually two ways to
512 encode these instructions; with opcode bytes 0x29 and 0x2b
513 for `subl' and opcode bytes 0x31 and 0x33 for `xorl'.
515 Make sure we only skip these instructions if we later see the
516 `movl %esp, %ebp' that actually sets up the frame. */
517 while (op
== 0x29 || op
== 0x2b || op
== 0x31 || op
== 0x33)
519 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
522 case 0xdb: /* %ebx */
523 case 0xc9: /* %ecx */
524 case 0xd2: /* %edx */
525 case 0xc0: /* %eax */
532 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
535 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
539 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
543 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
550 /* OK, we actually have a frame. We just don't know how large
551 it is yet. Set its size to zero. We'll adjust it if
552 necessary. We also now commit to skipping the special
553 instructions mentioned before. */
557 /* If that's all, return now. */
558 if (current_pc
<= pc
+ 3)
561 /* Check for stack adjustment
565 NOTE: You can't subtract a 16 bit immediate from a 32 bit
566 reg, so we don't have to worry about a data16 prefix. */
567 op
= read_memory_unsigned_integer (pc
+ 3, 1);
570 /* `subl' with 8 bit immediate. */
571 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
572 /* Some instruction starting with 0x83 other than `subl'. */
575 /* `subl' with signed byte immediate (though it wouldn't make
576 sense to be negative). */
577 cache
->locals
= read_memory_integer (pc
+ 5, 1);
582 /* Maybe it is `subl' with a 32 bit immedediate. */
583 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
584 /* Some instruction starting with 0x81 other than `subl'. */
587 /* It is `subl' with a 32 bit immediate. */
588 cache
->locals
= read_memory_integer (pc
+ 5, 4);
593 /* Some instruction other than `subl'. */
597 else if (op
== 0xc8) /* enter $XXX */
599 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
606 /* Check whether PC points at code that saves registers on the stack.
607 If so, it updates CACHE and returns the address of the first
608 instruction after the register saves or CURRENT_PC, whichever is
609 smaller. Otherwise, return PC. */
612 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
613 struct i386_frame_cache
*cache
)
615 CORE_ADDR offset
= 0;
619 if (cache
->locals
> 0)
620 offset
-= cache
->locals
;
621 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
623 op
= read_memory_unsigned_integer (pc
, 1);
624 if (op
< 0x50 || op
> 0x57)
628 cache
->saved_regs
[op
- 0x50] = offset
;
629 cache
->sp_offset
+= 4;
636 /* Do a full analysis of the prologue at PC and update CACHE
637 accordingly. Bail out early if CURRENT_PC is reached. Return the
638 address where the analysis stopped.
640 We handle these cases:
642 The startup sequence can be at the start of the function, or the
643 function can start with a branch to startup code at the end.
645 %ebp can be set up with either the 'enter' instruction, or "pushl
646 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
647 once used in the System V compiler).
649 Local space is allocated just below the saved %ebp by either the
650 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
651 bit unsigned argument for space to allocate, and the 'addl'
652 instruction could have either a signed byte, or 32 bit immediate.
654 Next, the registers used by this function are pushed. With the
655 System V compiler they will always be in the order: %edi, %esi,
656 %ebx (and sometimes a harmless bug causes it to also save but not
657 restore %eax); however, the code below is willing to see the pushes
658 in any order, and will handle up to 8 of them.
660 If the setup sequence is at the end of the function, then the next
661 instruction will be a branch back to the start. */
664 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
665 struct i386_frame_cache
*cache
)
667 pc
= i386_follow_jump (pc
);
668 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
669 pc
= i386_skip_probe (pc
);
670 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
671 return i386_analyze_register_saves (pc
, current_pc
, cache
);
674 /* Return PC of first real instruction. */
677 i386_skip_prologue (CORE_ADDR start_pc
)
679 static unsigned char pic_pat
[6] =
681 0xe8, 0, 0, 0, 0, /* call 0x0 */
682 0x5b, /* popl %ebx */
684 struct i386_frame_cache cache
;
690 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
691 if (cache
.locals
< 0)
694 /* Found valid frame setup. */
696 /* The native cc on SVR4 in -K PIC mode inserts the following code
697 to get the address of the global offset table (GOT) into register
702 movl %ebx,x(%ebp) (optional)
705 This code is with the rest of the prologue (at the end of the
706 function), so we have to skip it to get to the first real
707 instruction at the start of the function. */
709 for (i
= 0; i
< 6; i
++)
711 op
= read_memory_unsigned_integer (pc
+ i
, 1);
712 if (pic_pat
[i
] != op
)
719 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
721 if (op
== 0x89) /* movl %ebx, x(%ebp) */
723 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
725 if (op
== 0x5d) /* One byte offset from %ebp. */
727 else if (op
== 0x9d) /* Four byte offset from %ebp. */
729 else /* Unexpected instruction. */
732 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
736 if (delta
> 0 && op
== 0x81
737 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
743 return i386_follow_jump (pc
);
746 /* This function is 64-bit safe. */
749 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
753 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
754 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
760 static struct i386_frame_cache
*
761 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
763 struct i386_frame_cache
*cache
;
770 cache
= i386_alloc_frame_cache ();
773 /* In principle, for normal frames, %ebp holds the frame pointer,
774 which holds the base address for the current stack frame.
775 However, for functions that don't need it, the frame pointer is
776 optional. For these "frameless" functions the frame pointer is
777 actually the frame pointer of the calling frame. Signal
778 trampolines are just a special case of a "frameless" function.
779 They (usually) share their frame pointer with the frame that was
780 in progress when the signal occurred. */
782 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
783 cache
->base
= extract_unsigned_integer (buf
, 4);
784 if (cache
->base
== 0)
787 /* For normal frames, %eip is stored at 4(%ebp). */
788 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
790 cache
->pc
= frame_func_unwind (next_frame
);
792 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
794 if (cache
->locals
< 0)
796 /* We didn't find a valid frame, which means that CACHE->base
797 currently holds the frame pointer for our calling frame. If
798 we're at the start of a function, or somewhere half-way its
799 prologue, the function's frame probably hasn't been fully
800 setup yet. Try to reconstruct the base address for the stack
801 frame by looking at the stack pointer. For truly "frameless"
802 functions this might work too. */
804 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
805 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
808 /* Now that we have the base address for the stack frame we can
809 calculate the value of %esp in the calling frame. */
810 cache
->saved_sp
= cache
->base
+ 8;
812 /* Adjust all the saved registers such that they contain addresses
813 instead of offsets. */
814 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
815 if (cache
->saved_regs
[i
] != -1)
816 cache
->saved_regs
[i
] += cache
->base
;
822 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
823 struct frame_id
*this_id
)
825 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
827 /* This marks the outermost frame. */
828 if (cache
->base
== 0)
831 /* See the end of i386_push_dummy_call. */
832 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
836 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
837 int regnum
, int *optimizedp
,
838 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
839 int *realnump
, void *valuep
)
841 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
843 gdb_assert (regnum
>= 0);
845 /* The System V ABI says that:
847 "The flags register contains the system flags, such as the
848 direction flag and the carry flag. The direction flag must be
849 set to the forward (that is, zero) direction before entry and
850 upon exit from a function. Other user flags have no specified
851 role in the standard calling sequence and are not preserved."
853 To guarantee the "upon exit" part of that statement we fake a
854 saved flags register that has its direction flag cleared.
856 Note that GCC doesn't seem to rely on the fact that the direction
857 flag is cleared after a function return; it always explicitly
858 clears the flag before operations where it matters.
860 FIXME: kettenis/20030316: I'm not quite sure whether this is the
861 right thing to do. The way we fake the flags register here makes
862 it impossible to change it. */
864 if (regnum
== I386_EFLAGS_REGNUM
)
874 /* Clear the direction flag. */
875 val
= frame_unwind_register_unsigned (next_frame
,
878 store_unsigned_integer (valuep
, 4, val
);
884 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
886 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
887 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
891 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
899 /* Store the value. */
900 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
905 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
908 *lvalp
= lval_memory
;
909 *addrp
= cache
->saved_regs
[regnum
];
913 /* Read the value in from memory. */
914 read_memory (*addrp
, valuep
,
915 register_size (current_gdbarch
, regnum
));
920 frame_register_unwind (next_frame
, regnum
,
921 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
924 static const struct frame_unwind i386_frame_unwind
=
928 i386_frame_prev_register
931 static const struct frame_unwind
*
932 i386_frame_sniffer (struct frame_info
*next_frame
)
934 return &i386_frame_unwind
;
938 /* Signal trampolines. */
940 static struct i386_frame_cache
*
941 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
943 struct i386_frame_cache
*cache
;
944 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
951 cache
= i386_alloc_frame_cache ();
953 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
954 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
956 addr
= tdep
->sigcontext_addr (next_frame
);
957 if (tdep
->sc_reg_offset
)
961 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
963 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
964 if (tdep
->sc_reg_offset
[i
] != -1)
965 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
969 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
970 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
978 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
979 struct frame_id
*this_id
)
981 struct i386_frame_cache
*cache
=
982 i386_sigtramp_frame_cache (next_frame
, this_cache
);
984 /* See the end of i386_push_dummy_call. */
985 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
989 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
991 int regnum
, int *optimizedp
,
992 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
993 int *realnump
, void *valuep
)
995 /* Make sure we've initialized the cache. */
996 i386_sigtramp_frame_cache (next_frame
, this_cache
);
998 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
999 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1002 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1005 i386_sigtramp_frame_this_id
,
1006 i386_sigtramp_frame_prev_register
1009 static const struct frame_unwind
*
1010 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1012 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1015 /* We shouldn't even bother to try if the OSABI didn't register
1016 a sigcontext_addr handler. */
1017 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
1020 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1021 if (PC_IN_SIGTRAMP (pc
, name
))
1022 return &i386_sigtramp_frame_unwind
;
1029 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1031 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1036 static const struct frame_base i386_frame_base
=
1039 i386_frame_base_address
,
1040 i386_frame_base_address
,
1041 i386_frame_base_address
1044 static struct frame_id
1045 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1050 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1051 fp
= extract_unsigned_integer (buf
, 4);
1053 /* See the end of i386_push_dummy_call. */
1054 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1058 /* Figure out where the longjmp will land. Slurp the args out of the
1059 stack. We expect the first arg to be a pointer to the jmp_buf
1060 structure from which we extract the address that we will land at.
1061 This address is copied into PC. This routine returns non-zero on
1064 This function is 64-bit safe. */
1067 i386_get_longjmp_target (CORE_ADDR
*pc
)
1070 CORE_ADDR sp
, jb_addr
;
1071 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1072 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1074 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1075 longjmp will land. */
1076 if (jb_pc_offset
== -1)
1079 /* Don't use I386_ESP_REGNUM here, since this function is also used
1081 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1082 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1083 if (target_read_memory (sp
+ len
, buf
, len
))
1086 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1087 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1090 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1096 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1097 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1098 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1099 CORE_ADDR struct_addr
)
1104 /* Push arguments in reverse order. */
1105 for (i
= nargs
- 1; i
>= 0; i
--)
1107 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1109 /* The System V ABI says that:
1111 "An argument's size is increased, if necessary, to make it a
1112 multiple of [32-bit] words. This may require tail padding,
1113 depending on the size of the argument."
1115 This makes sure the stack says word-aligned. */
1116 sp
-= (len
+ 3) & ~3;
1117 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1120 /* Push value address. */
1124 store_unsigned_integer (buf
, 4, struct_addr
);
1125 write_memory (sp
, buf
, 4);
1128 /* Store return address. */
1130 store_unsigned_integer (buf
, 4, bp_addr
);
1131 write_memory (sp
, buf
, 4);
1133 /* Finally, update the stack pointer... */
1134 store_unsigned_integer (buf
, 4, sp
);
1135 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1137 /* ...and fake a frame pointer. */
1138 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1140 /* MarkK wrote: This "+ 8" is all over the place:
1141 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1142 i386_unwind_dummy_id). It's there, since all frame unwinders for
1143 a given target have to agree (within a certain margin) on the
1144 defenition of the stack address of a frame. Otherwise
1145 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1146 stack address *before* the function call as a frame's CFA. On
1147 the i386, when %ebp is used as a frame pointer, the offset
1148 between the contents %ebp and the CFA as defined by GCC. */
1152 /* These registers are used for returning integers (and on some
1153 targets also for returning `struct' and `union' values when their
1154 size and alignment match an integer type). */
1155 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1156 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1158 /* Read, for architecture GDBARCH, a function return value of TYPE
1159 from REGCACHE, and copy that into VALBUF. */
1162 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1163 struct regcache
*regcache
, void *valbuf
)
1165 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1166 int len
= TYPE_LENGTH (type
);
1167 char buf
[I386_MAX_REGISTER_SIZE
];
1169 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1171 if (tdep
->st0_regnum
< 0)
1173 warning ("Cannot find floating-point return value.");
1174 memset (valbuf
, 0, len
);
1178 /* Floating-point return values can be found in %st(0). Convert
1179 its contents to the desired type. This is probably not
1180 exactly how it would happen on the target itself, but it is
1181 the best we can do. */
1182 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1183 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1187 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1188 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1190 if (len
<= low_size
)
1192 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1193 memcpy (valbuf
, buf
, len
);
1195 else if (len
<= (low_size
+ high_size
))
1197 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1198 memcpy (valbuf
, buf
, low_size
);
1199 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1200 memcpy ((char *) valbuf
+ low_size
, buf
, len
- low_size
);
1203 internal_error (__FILE__
, __LINE__
,
1204 "Cannot extract return value of %d bytes long.", len
);
1208 /* Write, for architecture GDBARCH, a function return value of TYPE
1209 from VALBUF into REGCACHE. */
1212 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1213 struct regcache
*regcache
, const void *valbuf
)
1215 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1216 int len
= TYPE_LENGTH (type
);
1218 /* Define I387_ST0_REGNUM such that we use the proper definitions
1219 for the architecture. */
1220 #define I387_ST0_REGNUM I386_ST0_REGNUM
1222 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1225 char buf
[I386_MAX_REGISTER_SIZE
];
1227 if (tdep
->st0_regnum
< 0)
1229 warning ("Cannot set floating-point return value.");
1233 /* Returning floating-point values is a bit tricky. Apart from
1234 storing the return value in %st(0), we have to simulate the
1235 state of the FPU at function return point. */
1237 /* Convert the value found in VALBUF to the extended
1238 floating-point format used by the FPU. This is probably
1239 not exactly how it would happen on the target itself, but
1240 it is the best we can do. */
1241 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1242 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1244 /* Set the top of the floating-point register stack to 7. The
1245 actual value doesn't really matter, but 7 is what a normal
1246 function return would end up with if the program started out
1247 with a freshly initialized FPU. */
1248 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1250 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1252 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1253 the floating-point register stack to 7, the appropriate value
1254 for the tag word is 0x3fff. */
1255 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1259 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1260 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1262 if (len
<= low_size
)
1263 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1264 else if (len
<= (low_size
+ high_size
))
1266 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1267 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1268 len
- low_size
, (char *) valbuf
+ low_size
);
1271 internal_error (__FILE__
, __LINE__
,
1272 "Cannot store return value of %d bytes long.", len
);
1275 #undef I387_ST0_REGNUM
1278 /* Extract from REGCACHE, which contains the (raw) register state, the
1279 address in which a function should return its structure value, as a
1283 i386_extract_struct_value_address (struct regcache
*regcache
)
1287 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1288 return extract_unsigned_integer (buf
, 4);
1292 /* This is the variable that is set with "set struct-convention", and
1293 its legitimate values. */
1294 static const char default_struct_convention
[] = "default";
1295 static const char pcc_struct_convention
[] = "pcc";
1296 static const char reg_struct_convention
[] = "reg";
1297 static const char *valid_conventions
[] =
1299 default_struct_convention
,
1300 pcc_struct_convention
,
1301 reg_struct_convention
,
1304 static const char *struct_convention
= default_struct_convention
;
1306 /* Return non-zero if TYPE, which is assumed to be a structure or
1307 union type, should be returned in registers for architecture
1311 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1313 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1314 enum type_code code
= TYPE_CODE (type
);
1315 int len
= TYPE_LENGTH (type
);
1317 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1319 if (struct_convention
== pcc_struct_convention
1320 || (struct_convention
== default_struct_convention
1321 && tdep
->struct_return
== pcc_struct_return
))
1324 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1327 /* Determine, for architecture GDBARCH, how a return value of TYPE
1328 should be returned. If it is supposed to be returned in registers,
1329 and READBUF is non-zero, read the appropriate value from REGCACHE,
1330 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1331 from WRITEBUF into REGCACHE. */
1333 static enum return_value_convention
1334 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1335 struct regcache
*regcache
, void *readbuf
,
1336 const void *writebuf
)
1338 enum type_code code
= TYPE_CODE (type
);
1340 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1341 && !i386_reg_struct_return_p (gdbarch
, type
))
1342 return RETURN_VALUE_STRUCT_CONVENTION
;
1344 /* This special case is for structures consisting of a single
1345 `float' or `double' member. These structures are returned in
1346 %st(0). For these structures, we call ourselves recursively,
1347 changing TYPE into the type of the first member of the structure.
1348 Since that should work for all structures that have only one
1349 member, we don't bother to check the member's type here. */
1350 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1352 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1353 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1357 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1359 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1361 return RETURN_VALUE_REGISTER_CONVENTION
;
1365 /* Return the GDB type object for the "standard" data type of data in
1366 register REGNUM. Perhaps %esi and %edi should go here, but
1367 potentially they could be used for things other than address. */
1369 static struct type
*
1370 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1372 if (regnum
== I386_EIP_REGNUM
1373 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1374 return lookup_pointer_type (builtin_type_void
);
1376 if (i386_fp_regnum_p (regnum
))
1377 return builtin_type_i387_ext
;
1379 if (i386_sse_regnum_p (gdbarch
, regnum
))
1380 return builtin_type_vec128i
;
1382 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1383 return builtin_type_vec64i
;
1385 return builtin_type_int
;
1388 /* Map a cooked register onto a raw register or memory. For the i386,
1389 the MMX registers need to be mapped onto floating point registers. */
1392 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1394 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1399 /* Define I387_ST0_REGNUM such that we use the proper definitions
1400 for REGCACHE's architecture. */
1401 #define I387_ST0_REGNUM tdep->st0_regnum
1403 mmxreg
= regnum
- tdep
->mm0_regnum
;
1404 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1405 tos
= (fstat
>> 11) & 0x7;
1406 fpreg
= (mmxreg
+ tos
) % 8;
1408 return (I387_ST0_REGNUM
+ fpreg
);
1410 #undef I387_ST0_REGNUM
1414 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1415 int regnum
, void *buf
)
1417 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1419 char mmx_buf
[MAX_REGISTER_SIZE
];
1420 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1422 /* Extract (always little endian). */
1423 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1424 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1427 regcache_raw_read (regcache
, regnum
, buf
);
1431 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1432 int regnum
, const void *buf
)
1434 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1436 char mmx_buf
[MAX_REGISTER_SIZE
];
1437 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1440 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1441 /* ... Modify ... (always little endian). */
1442 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1444 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1447 regcache_raw_write (regcache
, regnum
, buf
);
1451 /* Return the register number of the register allocated by GCC after
1452 REGNUM, or -1 if there is no such register. */
1455 i386_next_regnum (int regnum
)
1457 /* GCC allocates the registers in the order:
1459 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1461 Since storing a variable in %esp doesn't make any sense we return
1462 -1 for %ebp and for %esp itself. */
1463 static int next_regnum
[] =
1465 I386_EDX_REGNUM
, /* Slot for %eax. */
1466 I386_EBX_REGNUM
, /* Slot for %ecx. */
1467 I386_ECX_REGNUM
, /* Slot for %edx. */
1468 I386_ESI_REGNUM
, /* Slot for %ebx. */
1469 -1, -1, /* Slots for %esp and %ebp. */
1470 I386_EDI_REGNUM
, /* Slot for %esi. */
1471 I386_EBP_REGNUM
/* Slot for %edi. */
1474 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1475 return next_regnum
[regnum
];
1480 /* Return nonzero if a value of type TYPE stored in register REGNUM
1481 needs any special handling. */
1484 i386_convert_register_p (int regnum
, struct type
*type
)
1486 int len
= TYPE_LENGTH (type
);
1488 /* Values may be spread across multiple registers. Most debugging
1489 formats aren't expressive enough to specify the locations, so
1490 some heuristics is involved. Right now we only handle types that
1491 have a length that is a multiple of the word size, since GCC
1492 doesn't seem to put any other types into registers. */
1493 if (len
> 4 && len
% 4 == 0)
1495 int last_regnum
= regnum
;
1499 last_regnum
= i386_next_regnum (last_regnum
);
1503 if (last_regnum
!= -1)
1507 return i386_fp_regnum_p (regnum
);
1510 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1511 return its contents in TO. */
1514 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1515 struct type
*type
, void *to
)
1517 int len
= TYPE_LENGTH (type
);
1520 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1521 available in FRAME (i.e. if it wasn't saved)? */
1523 if (i386_fp_regnum_p (regnum
))
1525 i387_register_to_value (frame
, regnum
, type
, to
);
1529 /* Read a value spread accross multiple registers. */
1531 gdb_assert (len
> 4 && len
% 4 == 0);
1535 gdb_assert (regnum
!= -1);
1536 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1538 get_frame_register (frame
, regnum
, buf
);
1539 regnum
= i386_next_regnum (regnum
);
1545 /* Write the contents FROM of a value of type TYPE into register
1546 REGNUM in frame FRAME. */
1549 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1550 struct type
*type
, const void *from
)
1552 int len
= TYPE_LENGTH (type
);
1553 const char *buf
= from
;
1555 if (i386_fp_regnum_p (regnum
))
1557 i387_value_to_register (frame
, regnum
, type
, from
);
1561 /* Write a value spread accross multiple registers. */
1563 gdb_assert (len
> 4 && len
% 4 == 0);
1567 gdb_assert (regnum
!= -1);
1568 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1570 put_frame_register (frame
, regnum
, buf
);
1571 regnum
= i386_next_regnum (regnum
);
1577 /* Supply register REGNUM from the general-purpose register set REGSET
1578 to register cache REGCACHE. If REGNUM is -1, do this for all
1579 registers in REGSET. */
1582 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1583 int regnum
, const void *gregs
, size_t len
)
1585 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1586 const char *regs
= gregs
;
1589 gdb_assert (len
== tdep
->sizeof_gregset
);
1591 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1593 if ((regnum
== i
|| regnum
== -1)
1594 && tdep
->gregset_reg_offset
[i
] != -1)
1595 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1599 /* Supply register REGNUM from the floating-point register set REGSET
1600 to register cache REGCACHE. If REGNUM is -1, do this for all
1601 registers in REGSET. */
1604 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1605 int regnum
, const void *fpregs
, size_t len
)
1607 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1609 if (len
== I387_SIZEOF_FXSAVE
)
1611 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1615 gdb_assert (len
== tdep
->sizeof_fpregset
);
1616 i387_supply_fsave (regcache
, regnum
, fpregs
);
1619 /* Return the appropriate register set for the core section identified
1620 by SECT_NAME and SECT_SIZE. */
1622 const struct regset
*
1623 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1624 const char *sect_name
, size_t sect_size
)
1626 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1628 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1630 if (tdep
->gregset
== NULL
)
1632 tdep
->gregset
= XMALLOC (struct regset
);
1633 tdep
->gregset
->descr
= tdep
;
1634 tdep
->gregset
->supply_regset
= i386_supply_gregset
;
1636 return tdep
->gregset
;
1639 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1640 || (strcmp (sect_name
, ".reg-xfp") == 0
1641 && sect_size
== I387_SIZEOF_FXSAVE
))
1643 if (tdep
->fpregset
== NULL
)
1645 tdep
->fpregset
= XMALLOC (struct regset
);
1646 tdep
->fpregset
->descr
= tdep
;
1647 tdep
->fpregset
->supply_regset
= i386_supply_fpregset
;
1649 return tdep
->fpregset
;
1656 #ifdef STATIC_TRANSFORM_NAME
1657 /* SunPRO encodes the static variables. This is not related to C++
1658 mangling, it is done for C too. */
1661 sunpro_static_transform_name (char *name
)
1664 if (IS_STATIC_TRANSFORM_NAME (name
))
1666 /* For file-local statics there will be a period, a bunch of
1667 junk (the contents of which match a string given in the
1668 N_OPT), a period and the name. For function-local statics
1669 there will be a bunch of junk (which seems to change the
1670 second character from 'A' to 'B'), a period, the name of the
1671 function, and the name. So just skip everything before the
1673 p
= strrchr (name
, '.');
1679 #endif /* STATIC_TRANSFORM_NAME */
1682 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1685 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1687 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1689 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1690 struct minimal_symbol
*indsym
=
1691 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1692 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1696 if (strncmp (symname
, "__imp_", 6) == 0
1697 || strncmp (symname
, "_imp_", 5) == 0)
1698 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1701 return 0; /* Not a trampoline. */
1705 /* Return non-zero if PC and NAME show that we are in a signal
1709 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1711 return (name
&& strcmp ("_sigtramp", name
) == 0);
1715 /* We have two flavours of disassembly. The machinery on this page
1716 deals with switching between those. */
1719 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1721 gdb_assert (disassembly_flavor
== att_flavor
1722 || disassembly_flavor
== intel_flavor
);
1724 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1725 constified, cast to prevent a compiler warning. */
1726 info
->disassembler_options
= (char *) disassembly_flavor
;
1727 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1729 return print_insn_i386 (pc
, info
);
1733 /* There are a few i386 architecture variants that differ only
1734 slightly from the generic i386 target. For now, we don't give them
1735 their own source file, but include them here. As a consequence,
1736 they'll always be included. */
1738 /* System V Release 4 (SVR4). */
1741 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1743 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1744 currently unknown. */
1745 return (name
&& (strcmp ("_sigreturn", name
) == 0
1746 || strcmp ("_sigacthandler", name
) == 0
1747 || strcmp ("sigvechandler", name
) == 0));
1750 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1751 routine, return the address of the associated sigcontext (ucontext)
1755 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1760 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1761 sp
= extract_unsigned_integer (buf
, 4);
1763 return read_memory_unsigned_integer (sp
+ 8, 4);
1770 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1772 /* DJGPP doesn't have any special frames for signal handlers. */
1780 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1782 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1783 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1786 /* System V Release 4 (SVR4). */
1789 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1791 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1793 /* System V Release 4 uses ELF. */
1794 i386_elf_init_abi (info
, gdbarch
);
1796 /* System V Release 4 has shared libraries. */
1797 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1798 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1800 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1801 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1802 tdep
->sc_pc_offset
= 36 + 14 * 4;
1803 tdep
->sc_sp_offset
= 36 + 17 * 4;
1805 tdep
->jb_pc_offset
= 20;
1811 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1813 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1815 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1817 tdep
->jb_pc_offset
= 36;
1823 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1825 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1827 tdep
->jb_pc_offset
= 24;
1831 /* i386 register groups. In addition to the normal groups, add "mmx"
1834 static struct reggroup
*i386_sse_reggroup
;
1835 static struct reggroup
*i386_mmx_reggroup
;
1838 i386_init_reggroups (void)
1840 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1841 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1845 i386_add_reggroups (struct gdbarch
*gdbarch
)
1847 reggroup_add (gdbarch
, i386_sse_reggroup
);
1848 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1849 reggroup_add (gdbarch
, general_reggroup
);
1850 reggroup_add (gdbarch
, float_reggroup
);
1851 reggroup_add (gdbarch
, all_reggroup
);
1852 reggroup_add (gdbarch
, save_reggroup
);
1853 reggroup_add (gdbarch
, restore_reggroup
);
1854 reggroup_add (gdbarch
, vector_reggroup
);
1855 reggroup_add (gdbarch
, system_reggroup
);
1859 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1860 struct reggroup
*group
)
1862 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1863 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1864 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1865 || i386_fpc_regnum_p (regnum
));
1866 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1868 if (group
== i386_mmx_reggroup
)
1869 return mmx_regnum_p
;
1870 if (group
== i386_sse_reggroup
)
1871 return sse_regnum_p
;
1872 if (group
== vector_reggroup
)
1873 return (mmx_regnum_p
|| sse_regnum_p
);
1874 if (group
== float_reggroup
)
1876 if (group
== general_reggroup
)
1877 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1879 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1883 /* Get the ARGIth function argument for the current function. */
1886 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1889 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1890 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1894 static struct gdbarch
*
1895 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1897 struct gdbarch_tdep
*tdep
;
1898 struct gdbarch
*gdbarch
;
1900 /* If there is already a candidate, use it. */
1901 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1903 return arches
->gdbarch
;
1905 /* Allocate space for the new architecture. */
1906 tdep
= XMALLOC (struct gdbarch_tdep
);
1907 gdbarch
= gdbarch_alloc (&info
, tdep
);
1909 /* General-purpose registers. */
1910 tdep
->gregset
= NULL
;
1911 tdep
->gregset_reg_offset
= NULL
;
1912 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1913 tdep
->sizeof_gregset
= 0;
1915 /* Floating-point registers. */
1916 tdep
->fpregset
= NULL
;
1917 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1919 /* The default settings include the FPU registers, the MMX registers
1920 and the SSE registers. This can be overidden for a specific ABI
1921 by adjusting the members `st0_regnum', `mm0_regnum' and
1922 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1923 will show up in the output of "info all-registers". Ideally we
1924 should try to autodetect whether they are available, such that we
1925 can prevent "info all-registers" from displaying registers that
1928 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1929 [the SSE registers] always (even when they don't exist) or never
1930 showing them to the user (even when they do exist), I prefer the
1931 former over the latter. */
1933 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1935 /* The MMX registers are implemented as pseudo-registers. Put off
1936 caclulating the register number for %mm0 until we know the number
1937 of raw registers. */
1938 tdep
->mm0_regnum
= 0;
1940 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1941 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1943 tdep
->jb_pc_offset
= -1;
1944 tdep
->struct_return
= pcc_struct_return
;
1945 tdep
->sigtramp_start
= 0;
1946 tdep
->sigtramp_end
= 0;
1947 tdep
->sigcontext_addr
= NULL
;
1948 tdep
->sc_reg_offset
= NULL
;
1949 tdep
->sc_pc_offset
= -1;
1950 tdep
->sc_sp_offset
= -1;
1952 /* The format used for `long double' on almost all i386 targets is
1953 the i387 extended floating-point format. In fact, of all targets
1954 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1955 on having a `long double' that's not `long' at all. */
1956 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1958 /* Although the i387 extended floating-point has only 80 significant
1959 bits, a `long double' actually takes up 96, probably to enforce
1961 set_gdbarch_long_double_bit (gdbarch
, 96);
1963 /* The default ABI includes general-purpose registers,
1964 floating-point registers, and the SSE registers. */
1965 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1966 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1967 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1969 /* Register numbers of various important registers. */
1970 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1971 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1972 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1973 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1975 /* Use the "default" register numbering scheme for stabs and COFF. */
1976 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1977 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1979 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1980 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1981 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1983 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1984 be in use on any of the supported i386 targets. */
1986 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1988 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1990 /* Call dummy code. */
1991 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1993 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1994 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1995 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1997 set_gdbarch_return_value (gdbarch
, i386_return_value
);
1998 set_gdbarch_extract_struct_value_address (gdbarch
,
1999 i386_extract_struct_value_address
);
2001 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2003 /* Stack grows downward. */
2004 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2006 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2007 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2009 set_gdbarch_frame_args_skip (gdbarch
, 8);
2010 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
2012 /* Wire in the MMX registers. */
2013 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2014 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2015 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2017 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2019 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2021 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2023 /* Add the i386 register groups. */
2024 i386_add_reggroups (gdbarch
);
2025 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2027 /* Helper for function argument information. */
2028 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2030 /* Hook in the DWARF CFI frame unwinder. */
2031 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2033 frame_base_set_default (gdbarch
, &i386_frame_base
);
2035 /* Hook in ABI-specific overrides, if they have been registered. */
2036 gdbarch_init_osabi (info
, gdbarch
);
2038 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2039 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2041 /* If we have a register mapping, enable the generic core file
2042 support, unless it has already been enabled. */
2043 if (tdep
->gregset_reg_offset
2044 && !gdbarch_regset_from_core_section_p (gdbarch
))
2045 set_gdbarch_regset_from_core_section (gdbarch
,
2046 i386_regset_from_core_section
);
2048 /* Unless support for MMX has been disabled, make %mm0 the first
2050 if (tdep
->mm0_regnum
== 0)
2051 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2056 static enum gdb_osabi
2057 i386_coff_osabi_sniffer (bfd
*abfd
)
2059 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2060 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2061 return GDB_OSABI_GO32
;
2063 return GDB_OSABI_UNKNOWN
;
2066 static enum gdb_osabi
2067 i386_nlm_osabi_sniffer (bfd
*abfd
)
2069 return GDB_OSABI_NETWARE
;
2073 /* Provide a prototype to silence -Wmissing-prototypes. */
2074 void _initialize_i386_tdep (void);
2077 _initialize_i386_tdep (void)
2079 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2081 /* Add the variable that controls the disassembly flavor. */
2083 struct cmd_list_element
*new_cmd
;
2085 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2087 &disassembly_flavor
,
2089 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2090 and the default value is \"att\".",
2092 add_show_from_set (new_cmd
, &showlist
);
2095 /* Add the variable that controls the convention for returning
2098 struct cmd_list_element
*new_cmd
;
2100 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2102 &struct_convention
, "\
2103 Set the convention for returning small structs, valid values \
2104 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2106 add_show_from_set (new_cmd
, &showlist
);
2109 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2110 i386_coff_osabi_sniffer
);
2111 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2112 i386_nlm_osabi_sniffer
);
2114 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2115 i386_svr4_init_abi
);
2116 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2117 i386_go32_init_abi
);
2118 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2121 /* Initialize the i386 specific register groups. */
2122 i386_init_reggroups ();