1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
28 #include "floatformat.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
38 #include "reggroups.h"
44 #include "gdb_assert.h"
45 #include "gdb_string.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
50 /* Register numbers of various important registers. */
52 #define I386_EAX_REGNUM 0 /* %eax */
53 #define I386_EDX_REGNUM 2 /* %edx */
54 #define I386_ESP_REGNUM 4 /* %esp */
55 #define I386_EBP_REGNUM 5 /* %ebp */
56 #define I386_EIP_REGNUM 8 /* %eip */
57 #define I386_EFLAGS_REGNUM 9 /* %eflags */
58 #define I386_ST0_REGNUM 16 /* %st(0) */
60 /* Names of the registers. The first 10 registers match the register
61 numbering scheme used by GCC for stabs and DWARF. */
63 static char *i386_register_names
[] =
65 "eax", "ecx", "edx", "ebx",
66 "esp", "ebp", "esi", "edi",
67 "eip", "eflags", "cs", "ss",
68 "ds", "es", "fs", "gs",
69 "st0", "st1", "st2", "st3",
70 "st4", "st5", "st6", "st7",
71 "fctrl", "fstat", "ftag", "fiseg",
72 "fioff", "foseg", "fooff", "fop",
73 "xmm0", "xmm1", "xmm2", "xmm3",
74 "xmm4", "xmm5", "xmm6", "xmm7",
78 static const int i386_num_register_names
=
79 (sizeof (i386_register_names
) / sizeof (*i386_register_names
));
83 static char *i386_mmx_names
[] =
85 "mm0", "mm1", "mm2", "mm3",
86 "mm4", "mm5", "mm6", "mm7"
89 static const int i386_num_mmx_regs
=
90 (sizeof (i386_mmx_names
) / sizeof (i386_mmx_names
[0]));
92 #define MM0_REGNUM NUM_REGS
95 i386_mmx_regnum_p (int regnum
)
97 return (regnum
>= MM0_REGNUM
98 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
104 i386_fp_regnum_p (int regnum
)
106 return (regnum
< NUM_REGS
107 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
111 i386_fpc_regnum_p (int regnum
)
113 return (regnum
< NUM_REGS
114 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
120 i386_sse_regnum_p (int regnum
)
122 return (regnum
< NUM_REGS
123 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
127 i386_mxcsr_regnum_p (int regnum
)
129 return (regnum
< NUM_REGS
130 && regnum
== MXCSR_REGNUM
);
133 /* Return the name of register REG. */
136 i386_register_name (int reg
)
138 if (reg
>= 0 && reg
< i386_num_register_names
)
139 return i386_register_names
[reg
];
141 if (i386_mmx_regnum_p (reg
))
142 return i386_mmx_names
[reg
- MM0_REGNUM
];
147 /* Convert stabs register number REG to the appropriate register
148 number used by GDB. */
151 i386_stab_reg_to_regnum (int reg
)
153 /* This implements what GCC calls the "default" register map. */
154 if (reg
>= 0 && reg
<= 7)
156 /* General-purpose registers. */
159 else if (reg
>= 12 && reg
<= 19)
161 /* Floating-point registers. */
162 return reg
- 12 + FP0_REGNUM
;
164 else if (reg
>= 21 && reg
<= 28)
167 return reg
- 21 + XMM0_REGNUM
;
169 else if (reg
>= 29 && reg
<= 36)
172 return reg
- 29 + MM0_REGNUM
;
175 /* This will hopefully provoke a warning. */
176 return NUM_REGS
+ NUM_PSEUDO_REGS
;
179 /* Convert DWARF register number REG to the appropriate register
180 number used by GDB. */
183 i386_dwarf_reg_to_regnum (int reg
)
185 /* The DWARF register numbering includes %eip and %eflags, and
186 numbers the floating point registers differently. */
187 if (reg
>= 0 && reg
<= 9)
189 /* General-purpose registers. */
192 else if (reg
>= 11 && reg
<= 18)
194 /* Floating-point registers. */
195 return reg
- 11 + FP0_REGNUM
;
199 /* The SSE and MMX registers have identical numbers as in stabs. */
200 return i386_stab_reg_to_regnum (reg
);
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS
+ NUM_PSEUDO_REGS
;
208 /* This is the variable that is set with "set disassembly-flavor", and
209 its legitimate values. */
210 static const char att_flavor
[] = "att";
211 static const char intel_flavor
[] = "intel";
212 static const char *valid_flavors
[] =
218 static const char *disassembly_flavor
= att_flavor
;
221 /* Use the program counter to determine the contents and size of a
222 breakpoint instruction. Return a pointer to a string of bytes that
223 encode a breakpoint instruction, store the length of the string in
224 *LEN and optionally adjust *PC to point to the correct memory
225 location for inserting the breakpoint.
227 On the i386 we have a single breakpoint that fits in a single byte
228 and can be inserted anywhere.
230 This function is 64-bit safe. */
232 static const unsigned char *
233 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
235 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
237 *len
= sizeof (break_insn
);
241 #ifdef I386_REGNO_TO_SYMMETRY
242 #error "The Sequent Symmetry is no longer supported."
245 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
246 and %esp "belong" to the calling function. Therefore these
247 registers should be saved if they're going to be modified. */
249 /* The maximum number of saved registers. This should include all
250 registers mentioned above, and %eip. */
251 #define I386_NUM_SAVED_REGS 9
253 struct i386_frame_cache
260 /* Saved registers. */
261 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
265 /* Stack space reserved for local variables. */
269 /* Allocate and initialize a frame cache. */
271 static struct i386_frame_cache
*
272 i386_alloc_frame_cache (void)
274 struct i386_frame_cache
*cache
;
277 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
281 cache
->sp_offset
= -4;
284 /* Saved registers. We initialize these to -1 since zero is a valid
285 offset (that's where %ebp is supposed to be stored). */
286 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
287 cache
->saved_regs
[i
] = -1;
289 cache
->pc_in_eax
= 0;
291 /* Frameless until proven otherwise. */
297 /* If the instruction at PC is a jump, return the address of its
298 target. Otherwise, return PC. */
301 i386_follow_jump (CORE_ADDR pc
)
307 op
= read_memory_unsigned_integer (pc
, 1);
311 op
= read_memory_unsigned_integer (pc
+ 1, 1);
317 /* Relative jump: if data16 == 0, disp32, else disp16. */
320 delta
= read_memory_integer (pc
+ 2, 2);
322 /* Include the size of the jmp instruction (including the
328 delta
= read_memory_integer (pc
+ 1, 4);
330 /* Include the size of the jmp instruction. */
335 /* Relative jump, disp8 (ignore data16). */
336 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
345 /* Check whether PC points at a prologue for a function returning a
346 structure or union. If so, it updates CACHE and returns the
347 address of the first instruction after the code sequence that
348 removes the "hidden" argument from the stack or CURRENT_PC,
349 whichever is smaller. Otherwise, return PC. */
352 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
353 struct i386_frame_cache
*cache
)
355 /* Functions that return a structure or union start with:
358 xchgl %eax, (%esp) 0x87 0x04 0x24
359 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
361 (the System V compiler puts out the second `xchg' instruction,
362 and the assembler doesn't try to optimize it, so the 'sib' form
363 gets generated). This sequence is used to get the address of the
364 return buffer for a function that returns a structure. */
365 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
366 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
367 unsigned char buf
[4];
370 if (current_pc
<= pc
)
373 op
= read_memory_unsigned_integer (pc
, 1);
375 if (op
!= 0x58) /* popl %eax */
378 read_memory (pc
+ 1, buf
, 4);
379 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
382 if (current_pc
== pc
)
384 cache
->sp_offset
+= 4;
388 if (current_pc
== pc
+ 1)
390 cache
->pc_in_eax
= 1;
394 if (buf
[1] == proto1
[1])
401 i386_skip_probe (CORE_ADDR pc
)
403 /* A function may start with
414 unsigned char buf
[8];
417 op
= read_memory_unsigned_integer (pc
, 1);
419 if (op
== 0x68 || op
== 0x6a)
423 /* Skip past the `pushl' instruction; it has either a one-byte or a
424 four-byte operand, depending on the opcode. */
430 /* Read the following 8 bytes, which should be `call _probe' (6
431 bytes) followed by `addl $4,%esp' (2 bytes). */
432 read_memory (pc
+ delta
, buf
, sizeof (buf
));
433 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
434 pc
+= delta
+ sizeof (buf
);
440 /* Check whether PC points at a code that sets up a new stack frame.
441 If so, it updates CACHE and returns the address of the first
442 instruction after the sequence that sets removes the "hidden"
443 argument from the stack or CURRENT_PC, whichever is smaller.
444 Otherwise, return PC. */
447 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
448 struct i386_frame_cache
*cache
)
452 if (current_pc
<= pc
)
455 op
= read_memory_unsigned_integer (pc
, 1);
457 if (op
== 0x55) /* pushl %ebp */
459 /* Take into account that we've executed the `pushl %ebp' that
460 starts this instruction sequence. */
461 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
462 cache
->sp_offset
+= 4;
464 /* If that's all, return now. */
465 if (current_pc
<= pc
+ 1)
468 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
469 op
= read_memory_unsigned_integer (pc
+ 1, 1);
473 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xec)
477 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xe5)
484 /* OK, we actually have a frame. We just don't know how large it is
485 yet. Set its size to zero. We'll adjust it if necessary. */
488 /* If that's all, return now. */
489 if (current_pc
<= pc
+ 3)
492 /* Check for stack adjustment
496 NOTE: You can't subtract a 16 bit immediate from a 32 bit
497 reg, so we don't have to worry about a data16 prefix. */
498 op
= read_memory_unsigned_integer (pc
+ 3, 1);
501 /* `subl' with 8 bit immediate. */
502 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
503 /* Some instruction starting with 0x83 other than `subl'. */
506 /* `subl' with signed byte immediate (though it wouldn't make
507 sense to be negative). */
508 cache
->locals
= read_memory_integer (pc
+ 5, 1);
513 /* Maybe it is `subl' with a 32 bit immedediate. */
514 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
515 /* Some instruction starting with 0x81 other than `subl'. */
518 /* It is `subl' with a 32 bit immediate. */
519 cache
->locals
= read_memory_integer (pc
+ 5, 4);
524 /* Some instruction other than `subl'. */
528 else if (op
== 0xc8) /* enter $XXX */
530 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
537 /* Check whether PC points at code that saves registers on the stack.
538 If so, it updates CACHE and returns the address of the first
539 instruction after the register saves or CURRENT_PC, whichever is
540 smaller. Otherwise, return PC. */
543 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
544 struct i386_frame_cache
*cache
)
546 if (cache
->locals
>= 0)
552 offset
= - 4 - cache
->locals
;
553 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
555 op
= read_memory_unsigned_integer (pc
, 1);
556 if (op
< 0x50 || op
> 0x57)
559 cache
->saved_regs
[op
- 0x50] = offset
;
568 /* Do a full analysis of the prologue at PC and update CACHE
569 accordingly. Bail out early if CURRENT_PC is reached. Return the
570 address where the analysis stopped.
572 We handle these cases:
574 The startup sequence can be at the start of the function, or the
575 function can start with a branch to startup code at the end.
577 %ebp can be set up with either the 'enter' instruction, or "pushl
578 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
579 once used in the System V compiler).
581 Local space is allocated just below the saved %ebp by either the
582 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
583 bit unsigned argument for space to allocate, and the 'addl'
584 instruction could have either a signed byte, or 32 bit immediate.
586 Next, the registers used by this function are pushed. With the
587 System V compiler they will always be in the order: %edi, %esi,
588 %ebx (and sometimes a harmless bug causes it to also save but not
589 restore %eax); however, the code below is willing to see the pushes
590 in any order, and will handle up to 8 of them.
592 If the setup sequence is at the end of the function, then the next
593 instruction will be a branch back to the start. */
596 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
597 struct i386_frame_cache
*cache
)
599 pc
= i386_follow_jump (pc
);
600 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
601 pc
= i386_skip_probe (pc
);
602 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
603 return i386_analyze_register_saves (pc
, current_pc
, cache
);
606 /* Return PC of first real instruction. */
609 i386_skip_prologue (CORE_ADDR start_pc
)
611 static unsigned char pic_pat
[6] =
613 0xe8, 0, 0, 0, 0, /* call 0x0 */
614 0x5b, /* popl %ebx */
616 struct i386_frame_cache cache
;
622 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
623 if (cache
.locals
< 0)
626 /* Found valid frame setup. */
628 /* The native cc on SVR4 in -K PIC mode inserts the following code
629 to get the address of the global offset table (GOT) into register
634 movl %ebx,x(%ebp) (optional)
637 This code is with the rest of the prologue (at the end of the
638 function), so we have to skip it to get to the first real
639 instruction at the start of the function. */
641 for (i
= 0; i
< 6; i
++)
643 op
= read_memory_unsigned_integer (pc
+ i
, 1);
644 if (pic_pat
[i
] != op
)
651 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
653 if (op
== 0x89) /* movl %ebx, x(%ebp) */
655 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
657 if (op
== 0x5d) /* One byte offset from %ebp. */
659 else if (op
== 0x9d) /* Four byte offset from %ebp. */
661 else /* Unexpected instruction. */
664 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
668 if (delta
> 0 && op
== 0x81
669 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
675 return i386_follow_jump (pc
);
678 /* This function is 64-bit safe. */
681 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
685 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
686 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
692 static struct i386_frame_cache
*
693 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
695 struct i386_frame_cache
*cache
;
702 cache
= i386_alloc_frame_cache ();
705 /* In principle, for normal frames, %ebp holds the frame pointer,
706 which holds the base address for the current stack frame.
707 However, for functions that don't need it, the frame pointer is
708 optional. For these "frameless" functions the frame pointer is
709 actually the frame pointer of the calling frame. Signal
710 trampolines are just a special case of a "frameless" function.
711 They (usually) share their frame pointer with the frame that was
712 in progress when the signal occurred. */
714 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
715 cache
->base
= extract_unsigned_integer (buf
, 4);
716 if (cache
->base
== 0)
719 /* For normal frames, %eip is stored at 4(%ebp). */
720 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
722 cache
->pc
= frame_func_unwind (next_frame
);
724 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
726 if (cache
->locals
< 0)
728 /* We didn't find a valid frame, which means that CACHE->base
729 currently holds the frame pointer for our calling frame. If
730 we're at the start of a function, or somewhere half-way its
731 prologue, the function's frame probably hasn't been fully
732 setup yet. Try to reconstruct the base address for the stack
733 frame by looking at the stack pointer. For truly "frameless"
734 functions this might work too. */
736 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
737 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
740 /* Now that we have the base address for the stack frame we can
741 calculate the value of %esp in the calling frame. */
742 cache
->saved_sp
= cache
->base
+ 8;
744 /* Adjust all the saved registers such that they contain addresses
745 instead of offsets. */
746 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
747 if (cache
->saved_regs
[i
] != -1)
748 cache
->saved_regs
[i
] += cache
->base
;
754 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
755 struct frame_id
*this_id
)
757 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
759 /* This marks the outermost frame. */
760 if (cache
->base
== 0)
763 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
767 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
768 int regnum
, int *optimizedp
,
769 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
770 int *realnump
, void *valuep
)
772 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
774 gdb_assert (regnum
>= 0);
776 /* The System V ABI says that:
778 "The flags register contains the system flags, such as the
779 direction flag and the carry flag. The direction flag must be
780 set to the forward (that is, zero) direction before entry and
781 upon exit from a function. Other user flags have no specified
782 role in the standard calling sequence and are not preserved."
784 To guarantee the "upon exit" part of that statement we fake a
785 saved flags register that has its direction flag cleared.
787 Note that GCC doesn't seem to rely on the fact that the direction
788 flag is cleared after a function return; it always explicitly
789 clears the flag before operations where it matters.
791 FIXME: kettenis/20030316: I'm not quite sure whether this is the
792 right thing to do. The way we fake the flags register here makes
793 it impossible to change it. */
795 if (regnum
== I386_EFLAGS_REGNUM
)
805 /* Clear the direction flag. */
806 frame_unwind_unsigned_register (next_frame
, PS_REGNUM
, &val
);
808 store_unsigned_integer (valuep
, 4, val
);
814 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
816 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
817 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
821 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
829 /* Store the value. */
830 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
835 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
838 *lvalp
= lval_memory
;
839 *addrp
= cache
->saved_regs
[regnum
];
843 /* Read the value in from memory. */
844 read_memory (*addrp
, valuep
,
845 register_size (current_gdbarch
, regnum
));
850 frame_register_unwind (next_frame
, regnum
,
851 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
854 static const struct frame_unwind i386_frame_unwind
=
858 i386_frame_prev_register
861 static const struct frame_unwind
*
862 i386_frame_p (CORE_ADDR pc
)
864 return &i386_frame_unwind
;
868 /* Signal trampolines. */
870 static struct i386_frame_cache
*
871 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
873 struct i386_frame_cache
*cache
;
874 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
881 cache
= i386_alloc_frame_cache ();
883 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
884 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
886 addr
= tdep
->sigcontext_addr (next_frame
);
887 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
888 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
895 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
896 struct frame_id
*this_id
)
898 struct i386_frame_cache
*cache
=
899 i386_sigtramp_frame_cache (next_frame
, this_cache
);
901 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
905 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
907 int regnum
, int *optimizedp
,
908 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
909 int *realnump
, void *valuep
)
911 /* Make sure we've initialized the cache. */
912 i386_sigtramp_frame_cache (next_frame
, this_cache
);
914 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
915 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
918 static const struct frame_unwind i386_sigtramp_frame_unwind
=
921 i386_sigtramp_frame_this_id
,
922 i386_sigtramp_frame_prev_register
925 static const struct frame_unwind
*
926 i386_sigtramp_frame_p (CORE_ADDR pc
)
930 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
931 if (PC_IN_SIGTRAMP (pc
, name
))
932 return &i386_sigtramp_frame_unwind
;
939 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
941 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
946 static const struct frame_base i386_frame_base
=
949 i386_frame_base_address
,
950 i386_frame_base_address
,
951 i386_frame_base_address
955 i386_save_dummy_frame_tos (CORE_ADDR sp
)
957 generic_save_dummy_frame_tos (sp
+ 8);
960 static struct frame_id
961 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
966 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
967 fp
= extract_unsigned_integer (buf
, 4);
969 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
973 /* Figure out where the longjmp will land. Slurp the args out of the
974 stack. We expect the first arg to be a pointer to the jmp_buf
975 structure from which we extract the address that we will land at.
976 This address is copied into PC. This routine returns non-zero on
979 This function is 64-bit safe. */
982 i386_get_longjmp_target (CORE_ADDR
*pc
)
985 CORE_ADDR sp
, jb_addr
;
986 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
987 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
989 /* If JB_PC_OFFSET is -1, we have no way to find out where the
990 longjmp will land. */
991 if (jb_pc_offset
== -1)
994 sp
= read_register (SP_REGNUM
);
995 if (target_read_memory (sp
+ len
, buf
, len
))
998 jb_addr
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
999 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1002 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1008 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1009 CORE_ADDR dummy_addr
, int nargs
, struct value
**args
,
1010 CORE_ADDR sp
, int struct_return
, CORE_ADDR struct_addr
)
1015 /* Push arguments in reverse order. */
1016 for (i
= nargs
- 1; i
>= 0; i
--)
1018 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1020 /* The System V ABI says that:
1022 "An argument's size is increased, if necessary, to make it a
1023 multiple of [32-bit] words. This may require tail padding,
1024 depending on the size of the argument."
1026 This makes sure the stack says word-aligned. */
1027 sp
-= (len
+ 3) & ~3;
1028 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1031 /* Push value address. */
1035 store_unsigned_integer (buf
, 4, struct_addr
);
1036 write_memory (sp
, buf
, 4);
1039 /* Store return address. */
1041 store_unsigned_integer (buf
, 4, dummy_addr
);
1042 write_memory (sp
, buf
, 4);
1044 /* Finally, update the stack pointer... */
1045 store_unsigned_integer (buf
, 4, sp
);
1046 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1048 /* ...and fake a frame pointer. */
1049 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1054 /* These registers are used for returning integers (and on some
1055 targets also for returning `struct' and `union' values when their
1056 size and alignment match an integer type). */
1057 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1058 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1060 /* Extract from an array REGBUF containing the (raw) register state, a
1061 function return value of TYPE, and copy that, in virtual format,
1065 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1068 bfd_byte
*valbuf
= dst
;
1069 int len
= TYPE_LENGTH (type
);
1070 char buf
[I386_MAX_REGISTER_SIZE
];
1072 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1073 && TYPE_NFIELDS (type
) == 1)
1075 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1079 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1083 warning ("Cannot find floating-point return value.");
1084 memset (valbuf
, 0, len
);
1088 /* Floating-point return values can be found in %st(0). Convert
1089 its contents to the desired type. This is probably not
1090 exactly how it would happen on the target itself, but it is
1091 the best we can do. */
1092 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1093 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1097 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1098 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1100 if (len
<= low_size
)
1102 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1103 memcpy (valbuf
, buf
, len
);
1105 else if (len
<= (low_size
+ high_size
))
1107 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1108 memcpy (valbuf
, buf
, low_size
);
1109 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1110 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1113 internal_error (__FILE__
, __LINE__
,
1114 "Cannot extract return value of %d bytes long.", len
);
1118 /* Write into the appropriate registers a function return value stored
1119 in VALBUF of type TYPE, given in virtual format. */
1122 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1125 int len
= TYPE_LENGTH (type
);
1127 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1128 && TYPE_NFIELDS (type
) == 1)
1130 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1134 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1137 char buf
[FPU_REG_RAW_SIZE
];
1141 warning ("Cannot set floating-point return value.");
1145 /* Returning floating-point values is a bit tricky. Apart from
1146 storing the return value in %st(0), we have to simulate the
1147 state of the FPU at function return point. */
1149 /* Convert the value found in VALBUF to the extended
1150 floating-point format used by the FPU. This is probably
1151 not exactly how it would happen on the target itself, but
1152 it is the best we can do. */
1153 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1154 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1156 /* Set the top of the floating-point register stack to 7. The
1157 actual value doesn't really matter, but 7 is what a normal
1158 function return would end up with if the program started out
1159 with a freshly initialized FPU. */
1160 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1162 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1164 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1165 the floating-point register stack to 7, the appropriate value
1166 for the tag word is 0x3fff. */
1167 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1171 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1172 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1174 if (len
<= low_size
)
1175 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1176 else if (len
<= (low_size
+ high_size
))
1178 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1179 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1180 len
- low_size
, (char *) valbuf
+ low_size
);
1183 internal_error (__FILE__
, __LINE__
,
1184 "Cannot store return value of %d bytes long.", len
);
1188 /* Extract from REGCACHE, which contains the (raw) register state, the
1189 address in which a function should return its structure value, as a
1193 i386_extract_struct_value_address (struct regcache
*regcache
)
1197 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1198 return extract_unsigned_integer (buf
, 4);
1202 /* This is the variable that is set with "set struct-convention", and
1203 its legitimate values. */
1204 static const char default_struct_convention
[] = "default";
1205 static const char pcc_struct_convention
[] = "pcc";
1206 static const char reg_struct_convention
[] = "reg";
1207 static const char *valid_conventions
[] =
1209 default_struct_convention
,
1210 pcc_struct_convention
,
1211 reg_struct_convention
,
1214 static const char *struct_convention
= default_struct_convention
;
1217 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1219 enum struct_return struct_return
;
1221 if (struct_convention
== default_struct_convention
)
1222 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1223 else if (struct_convention
== pcc_struct_convention
)
1224 struct_return
= pcc_struct_return
;
1226 struct_return
= reg_struct_return
;
1228 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1233 /* Return the GDB type object for the "standard" data type of data in
1234 register REGNUM. Perhaps %esi and %edi should go here, but
1235 potentially they could be used for things other than address. */
1237 static struct type
*
1238 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1240 if (regnum
== I386_EIP_REGNUM
1241 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1242 return lookup_pointer_type (builtin_type_void
);
1244 if (i386_fp_regnum_p (regnum
))
1245 return builtin_type_i387_ext
;
1247 if (i386_sse_regnum_p (regnum
))
1248 return builtin_type_vec128i
;
1250 if (i386_mmx_regnum_p (regnum
))
1251 return builtin_type_vec64i
;
1253 return builtin_type_int
;
1256 /* Map a cooked register onto a raw register or memory. For the i386,
1257 the MMX registers need to be mapped onto floating point registers. */
1260 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1267 mmxi
= regnum
- MM0_REGNUM
;
1268 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1269 tos
= (fstat
>> 11) & 0x7;
1270 fpi
= (mmxi
+ tos
) % 8;
1272 return (FP0_REGNUM
+ fpi
);
1276 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1277 int regnum
, void *buf
)
1279 if (i386_mmx_regnum_p (regnum
))
1281 char mmx_buf
[MAX_REGISTER_SIZE
];
1282 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1284 /* Extract (always little endian). */
1285 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1286 memcpy (buf
, mmx_buf
, REGISTER_RAW_SIZE (regnum
));
1289 regcache_raw_read (regcache
, regnum
, buf
);
1293 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1294 int regnum
, const void *buf
)
1296 if (i386_mmx_regnum_p (regnum
))
1298 char mmx_buf
[MAX_REGISTER_SIZE
];
1299 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1302 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1303 /* ... Modify ... (always little endian). */
1304 memcpy (mmx_buf
, buf
, REGISTER_RAW_SIZE (regnum
));
1306 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1309 regcache_raw_write (regcache
, regnum
, buf
);
1312 /* Return true iff register REGNUM's virtual format is different from
1313 its raw format. Note that this definition assumes that the host
1314 supports IEEE 32-bit floats, since it doesn't say that SSE
1315 registers need conversion. Even if we can't find a counterexample,
1316 this is still sloppy. */
1319 i386_register_convertible (int regnum
)
1321 return i386_fp_regnum_p (regnum
);
1324 /* Convert data from raw format for register REGNUM in buffer FROM to
1325 virtual format with type TYPE in buffer TO. */
1328 i386_register_convert_to_virtual (int regnum
, struct type
*type
,
1329 char *from
, char *to
)
1331 gdb_assert (i386_fp_regnum_p (regnum
));
1333 /* We only support floating-point values. */
1334 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
1336 warning ("Cannot convert floating-point register value "
1337 "to non-floating-point type.");
1338 memset (to
, 0, TYPE_LENGTH (type
));
1342 /* Convert to TYPE. This should be a no-op if TYPE is equivalent to
1343 the extended floating-point format used by the FPU. */
1344 convert_typed_floating (from
, builtin_type_i387_ext
, to
, type
);
1347 /* Convert data from virtual format with type TYPE in buffer FROM to
1348 raw format for register REGNUM in buffer TO. */
1351 i386_register_convert_to_raw (struct type
*type
, int regnum
,
1352 char *from
, char *to
)
1354 gdb_assert (i386_fp_regnum_p (regnum
));
1356 /* We only support floating-point values. */
1357 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
1359 warning ("Cannot convert non-floating-point type "
1360 "to floating-point register value.");
1361 memset (to
, 0, TYPE_LENGTH (type
));
1365 /* Convert from TYPE. This should be a no-op if TYPE is equivalent
1366 to the extended floating-point format used by the FPU. */
1367 convert_typed_floating (from
, type
, to
, builtin_type_i387_ext
);
1371 #ifdef STATIC_TRANSFORM_NAME
1372 /* SunPRO encodes the static variables. This is not related to C++
1373 mangling, it is done for C too. */
1376 sunpro_static_transform_name (char *name
)
1379 if (IS_STATIC_TRANSFORM_NAME (name
))
1381 /* For file-local statics there will be a period, a bunch of
1382 junk (the contents of which match a string given in the
1383 N_OPT), a period and the name. For function-local statics
1384 there will be a bunch of junk (which seems to change the
1385 second character from 'A' to 'B'), a period, the name of the
1386 function, and the name. So just skip everything before the
1388 p
= strrchr (name
, '.');
1394 #endif /* STATIC_TRANSFORM_NAME */
1397 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1400 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1402 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1404 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1405 struct minimal_symbol
*indsym
=
1406 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1407 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1411 if (strncmp (symname
, "__imp_", 6) == 0
1412 || strncmp (symname
, "_imp_", 5) == 0)
1413 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1416 return 0; /* Not a trampoline. */
1420 /* Return non-zero if PC and NAME show that we are in a signal
1424 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1426 return (name
&& strcmp ("_sigtramp", name
) == 0);
1430 /* We have two flavours of disassembly. The machinery on this page
1431 deals with switching between those. */
1434 i386_print_insn (bfd_vma pc
, disassemble_info
*info
)
1436 gdb_assert (disassembly_flavor
== att_flavor
1437 || disassembly_flavor
== intel_flavor
);
1439 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1440 constified, cast to prevent a compiler warning. */
1441 info
->disassembler_options
= (char *) disassembly_flavor
;
1442 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1444 return print_insn_i386 (pc
, info
);
1448 /* There are a few i386 architecture variants that differ only
1449 slightly from the generic i386 target. For now, we don't give them
1450 their own source file, but include them here. As a consequence,
1451 they'll always be included. */
1453 /* System V Release 4 (SVR4). */
1456 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1458 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1459 currently unknown. */
1460 return (name
&& (strcmp ("_sigreturn", name
) == 0
1461 || strcmp ("_sigacthandler", name
) == 0
1462 || strcmp ("sigvechandler", name
) == 0));
1465 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1466 routine, return the address of the associated sigcontext (ucontext)
1470 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1475 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1476 sp
= extract_unsigned_integer (buf
, 4);
1478 return read_memory_unsigned_integer (sp
+ 8, 4);
1485 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1487 /* DJGPP doesn't have any special frames for signal handlers. */
1495 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1497 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1498 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1501 /* System V Release 4 (SVR4). */
1504 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1506 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1508 /* System V Release 4 uses ELF. */
1509 i386_elf_init_abi (info
, gdbarch
);
1511 /* System V Release 4 has shared libraries. */
1512 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1513 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1515 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1516 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1517 tdep
->sc_pc_offset
= 36 + 14 * 4;
1518 tdep
->sc_sp_offset
= 36 + 17 * 4;
1520 tdep
->jb_pc_offset
= 20;
1526 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1528 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1530 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1532 tdep
->jb_pc_offset
= 36;
1538 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1540 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1542 tdep
->jb_pc_offset
= 24;
1546 /* i386 register groups. In addition to the normal groups, add "mmx"
1549 static struct reggroup
*i386_sse_reggroup
;
1550 static struct reggroup
*i386_mmx_reggroup
;
1553 i386_init_reggroups (void)
1555 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1556 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1560 i386_add_reggroups (struct gdbarch
*gdbarch
)
1562 reggroup_add (gdbarch
, i386_sse_reggroup
);
1563 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1564 reggroup_add (gdbarch
, general_reggroup
);
1565 reggroup_add (gdbarch
, float_reggroup
);
1566 reggroup_add (gdbarch
, all_reggroup
);
1567 reggroup_add (gdbarch
, save_reggroup
);
1568 reggroup_add (gdbarch
, restore_reggroup
);
1569 reggroup_add (gdbarch
, vector_reggroup
);
1570 reggroup_add (gdbarch
, system_reggroup
);
1574 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1575 struct reggroup
*group
)
1577 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1578 || i386_mxcsr_regnum_p (regnum
));
1579 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1580 || i386_fpc_regnum_p (regnum
));
1581 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1583 if (group
== i386_mmx_reggroup
)
1584 return mmx_regnum_p
;
1585 if (group
== i386_sse_reggroup
)
1586 return sse_regnum_p
;
1587 if (group
== vector_reggroup
)
1588 return (mmx_regnum_p
|| sse_regnum_p
);
1589 if (group
== float_reggroup
)
1591 if (group
== general_reggroup
)
1592 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1594 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1598 static struct gdbarch
*
1599 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1601 struct gdbarch_tdep
*tdep
;
1602 struct gdbarch
*gdbarch
;
1604 /* If there is already a candidate, use it. */
1605 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1607 return arches
->gdbarch
;
1609 /* Allocate space for the new architecture. */
1610 tdep
= XMALLOC (struct gdbarch_tdep
);
1611 gdbarch
= gdbarch_alloc (&info
, tdep
);
1613 /* The i386 default settings don't include the SSE registers.
1614 FIXME: kettenis/20020614: They do include the FPU registers for
1615 now, which probably is not quite right. */
1616 tdep
->num_xmm_regs
= 0;
1618 tdep
->jb_pc_offset
= -1;
1619 tdep
->struct_return
= pcc_struct_return
;
1620 tdep
->sigtramp_start
= 0;
1621 tdep
->sigtramp_end
= 0;
1622 tdep
->sigcontext_addr
= NULL
;
1623 tdep
->sc_pc_offset
= -1;
1624 tdep
->sc_sp_offset
= -1;
1626 /* The format used for `long double' on almost all i386 targets is
1627 the i387 extended floating-point format. In fact, of all targets
1628 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1629 on having a `long double' that's not `long' at all. */
1630 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1632 /* Although the i387 extended floating-point has only 80 significant
1633 bits, a `long double' actually takes up 96, probably to enforce
1635 set_gdbarch_long_double_bit (gdbarch
, 96);
1637 /* The default ABI includes general-purpose registers and
1638 floating-point registers. */
1639 set_gdbarch_num_regs (gdbarch
, I386_NUM_GREGS
+ I386_NUM_FREGS
);
1640 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1641 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1643 /* Register numbers of various important registers. */
1644 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1645 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1646 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1647 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1649 /* Use the "default" register numbering scheme for stabs and COFF. */
1650 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1651 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1653 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1654 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1655 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1657 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1658 be in use on any of the supported i386 targets. */
1660 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1662 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1664 /* Call dummy code. */
1665 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1667 set_gdbarch_register_convertible (gdbarch
, i386_register_convertible
);
1668 set_gdbarch_register_convert_to_virtual (gdbarch
,
1669 i386_register_convert_to_virtual
);
1670 set_gdbarch_register_convert_to_raw (gdbarch
, i386_register_convert_to_raw
);
1672 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1673 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1674 set_gdbarch_extract_struct_value_address (gdbarch
,
1675 i386_extract_struct_value_address
);
1676 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1678 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1680 /* Stack grows downward. */
1681 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1683 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1684 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1685 set_gdbarch_function_start_offset (gdbarch
, 0);
1687 set_gdbarch_frame_args_skip (gdbarch
, 8);
1688 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1689 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1691 /* Wire in the MMX registers. */
1692 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1693 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1694 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1696 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1698 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1699 set_gdbarch_save_dummy_frame_tos (gdbarch
, i386_save_dummy_frame_tos
);
1701 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1703 /* Add the i386 register groups. */
1704 i386_add_reggroups (gdbarch
);
1705 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1707 frame_base_set_default (gdbarch
, &i386_frame_base
);
1709 /* Hook in ABI-specific overrides, if they have been registered. */
1710 gdbarch_init_osabi (info
, gdbarch
);
1712 frame_unwind_append_predicate (gdbarch
, i386_sigtramp_frame_p
);
1713 frame_unwind_append_predicate (gdbarch
, i386_frame_p
);
1718 static enum gdb_osabi
1719 i386_coff_osabi_sniffer (bfd
*abfd
)
1721 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1722 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1723 return GDB_OSABI_GO32
;
1725 return GDB_OSABI_UNKNOWN
;
1728 static enum gdb_osabi
1729 i386_nlm_osabi_sniffer (bfd
*abfd
)
1731 return GDB_OSABI_NETWARE
;
1735 /* Provide a prototype to silence -Wmissing-prototypes. */
1736 void _initialize_i386_tdep (void);
1739 _initialize_i386_tdep (void)
1741 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1743 /* Add the variable that controls the disassembly flavor. */
1745 struct cmd_list_element
*new_cmd
;
1747 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1749 &disassembly_flavor
,
1751 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1752 and the default value is \"att\".",
1754 add_show_from_set (new_cmd
, &showlist
);
1757 /* Add the variable that controls the convention for returning
1760 struct cmd_list_element
*new_cmd
;
1762 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1764 &struct_convention
, "\
1765 Set the convention for returning small structs, valid values \
1766 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1768 add_show_from_set (new_cmd
, &showlist
);
1771 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1772 i386_coff_osabi_sniffer
);
1773 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1774 i386_nlm_osabi_sniffer
);
1776 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1777 i386_svr4_init_abi
);
1778 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1779 i386_go32_init_abi
);
1780 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1783 /* Initialize the i386 specific register groups. */
1784 i386_init_reggroups ();