1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
25 #include "dummy-frame.h"
26 #include "dwarf2-frame.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
38 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
54 static char *i386_register_names
[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
71 /* Register names for MMX pseudo-registers. */
73 static char *i386_mmx_names
[] =
75 "mm0", "mm1", "mm2", "mm3",
76 "mm4", "mm5", "mm6", "mm7"
79 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
82 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
84 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
89 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
95 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
97 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
99 if (I387_NUM_XMM_REGS (tdep
) == 0)
102 return (I387_XMM0_REGNUM (tdep
) <= regnum
103 && regnum
< I387_MXCSR_REGNUM (tdep
));
107 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
109 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
111 if (I387_NUM_XMM_REGS (tdep
) == 0)
114 return (regnum
== I387_MXCSR_REGNUM (tdep
));
120 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
122 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
124 if (I387_ST0_REGNUM (tdep
) < 0)
127 return (I387_ST0_REGNUM (tdep
) <= regnum
128 && regnum
< I387_FCTRL_REGNUM (tdep
));
132 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
134 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
136 if (I387_ST0_REGNUM (tdep
) < 0)
139 return (I387_FCTRL_REGNUM (tdep
) <= regnum
140 && regnum
< I387_XMM0_REGNUM (tdep
));
143 /* Return the name of register REGNUM. */
146 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
148 if (i386_mmx_regnum_p (gdbarch
, regnum
))
149 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (gdbarch_tdep (gdbarch
))];
151 if (regnum
>= 0 && regnum
< i386_num_register_names
)
152 return i386_register_names
[regnum
];
157 /* Convert a dbx register number REG to the appropriate register
158 number used by GDB. */
161 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
163 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
165 /* This implements what GCC calls the "default" register map
166 (dbx_register_map[]). */
168 if (reg
>= 0 && reg
<= 7)
170 /* General-purpose registers. The debug info calls %ebp
171 register 4, and %esp register 5. */
178 else if (reg
>= 12 && reg
<= 19)
180 /* Floating-point registers. */
181 return reg
- 12 + I387_ST0_REGNUM (tdep
);
183 else if (reg
>= 21 && reg
<= 28)
186 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
188 else if (reg
>= 29 && reg
<= 36)
191 return reg
- 29 + I387_MM0_REGNUM (tdep
);
194 /* This will hopefully provoke a warning. */
195 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
198 /* Convert SVR4 register number REG to the appropriate register number
202 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
204 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
206 /* This implements the GCC register map that tries to be compatible
207 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
209 /* The SVR4 register numbering includes %eip and %eflags, and
210 numbers the floating point registers differently. */
211 if (reg
>= 0 && reg
<= 9)
213 /* General-purpose registers. */
216 else if (reg
>= 11 && reg
<= 18)
218 /* Floating-point registers. */
219 return reg
- 11 + I387_ST0_REGNUM (tdep
);
221 else if (reg
>= 21 && reg
<= 36)
223 /* The SSE and MMX registers have the same numbers as with dbx. */
224 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
229 case 37: return I387_FCTRL_REGNUM (tdep
);
230 case 38: return I387_FSTAT_REGNUM (tdep
);
231 case 39: return I387_MXCSR_REGNUM (tdep
);
232 case 40: return I386_ES_REGNUM
;
233 case 41: return I386_CS_REGNUM
;
234 case 42: return I386_SS_REGNUM
;
235 case 43: return I386_DS_REGNUM
;
236 case 44: return I386_FS_REGNUM
;
237 case 45: return I386_GS_REGNUM
;
240 /* This will hopefully provoke a warning. */
241 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
246 /* This is the variable that is set with "set disassembly-flavor", and
247 its legitimate values. */
248 static const char att_flavor
[] = "att";
249 static const char intel_flavor
[] = "intel";
250 static const char *valid_flavors
[] =
256 static const char *disassembly_flavor
= att_flavor
;
259 /* Use the program counter to determine the contents and size of a
260 breakpoint instruction. Return a pointer to a string of bytes that
261 encode a breakpoint instruction, store the length of the string in
262 *LEN and optionally adjust *PC to point to the correct memory
263 location for inserting the breakpoint.
265 On the i386 we have a single breakpoint that fits in a single byte
266 and can be inserted anywhere.
268 This function is 64-bit safe. */
270 static const gdb_byte
*
271 i386_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
273 static gdb_byte break_insn
[] = { 0xcc }; /* int 3 */
275 *len
= sizeof (break_insn
);
279 /* Displaced instruction handling. */
283 i386_absolute_jmp_p (gdb_byte
*insn
)
285 /* jmp far (absolute address in operand) */
291 /* jump near, absolute indirect (/4) */
292 if ((insn
[1] & 0x38) == 0x20)
295 /* jump far, absolute indirect (/5) */
296 if ((insn
[1] & 0x38) == 0x28)
304 i386_absolute_call_p (gdb_byte
*insn
)
306 /* call far, absolute */
312 /* Call near, absolute indirect (/2) */
313 if ((insn
[1] & 0x38) == 0x10)
316 /* Call far, absolute indirect (/3) */
317 if ((insn
[1] & 0x38) == 0x18)
325 i386_ret_p (gdb_byte
*insn
)
329 case 0xc2: /* ret near, pop N bytes */
330 case 0xc3: /* ret near */
331 case 0xca: /* ret far, pop N bytes */
332 case 0xcb: /* ret far */
333 case 0xcf: /* iret */
342 i386_call_p (gdb_byte
*insn
)
344 if (i386_absolute_call_p (insn
))
347 /* call near, relative */
355 i386_breakpoint_p (gdb_byte
*insn
)
357 return insn
[0] == 0xcc; /* int 3 */
360 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
361 length in bytes. Otherwise, return zero. */
363 i386_syscall_p (gdb_byte
*insn
, ULONGEST
*lengthp
)
374 /* Fix up the state of registers and memory after having single-stepped
375 a displaced instruction. */
377 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
378 struct displaced_step_closure
*closure
,
379 CORE_ADDR from
, CORE_ADDR to
,
380 struct regcache
*regs
)
382 /* The offset we applied to the instruction's address.
383 This could well be negative (when viewed as a signed 32-bit
384 value), but ULONGEST won't reflect that, so take care when
386 ULONGEST insn_offset
= to
- from
;
388 /* Since we use simple_displaced_step_copy_insn, our closure is a
389 copy of the instruction. */
390 gdb_byte
*insn
= (gdb_byte
*) closure
;
393 fprintf_unfiltered (gdb_stdlog
,
394 "displaced: fixup (0x%s, 0x%s), "
395 "insn = 0x%02x 0x%02x ...\n",
396 paddr_nz (from
), paddr_nz (to
), insn
[0], insn
[1]);
398 /* The list of issues to contend with here is taken from
399 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
400 Yay for Free Software! */
402 /* Relocate the %eip, if necessary. */
404 /* Except in the case of absolute or indirect jump or call
405 instructions, or a return instruction, the new eip is relative to
406 the displaced instruction; make it relative. Well, signal
407 handler returns don't need relocation either, but we use the
408 value of %eip to recognize those; see below. */
409 if (! i386_absolute_jmp_p (insn
)
410 && ! i386_absolute_call_p (insn
)
411 && ! i386_ret_p (insn
))
416 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
418 /* A signal trampoline system call changes the %eip, resuming
419 execution of the main program after the signal handler has
420 returned. That makes them like 'return' instructions; we
421 shouldn't relocate %eip.
423 But most system calls don't, and we do need to relocate %eip.
425 Our heuristic for distinguishing these cases: if stepping
426 over the system call instruction left control directly after
427 the instruction, the we relocate --- control almost certainly
428 doesn't belong in the displaced copy. Otherwise, we assume
429 the instruction has put control where it belongs, and leave
430 it unrelocated. Goodness help us if there are PC-relative
432 if (i386_syscall_p (insn
, &insn_len
)
433 && orig_eip
!= to
+ insn_len
)
436 fprintf_unfiltered (gdb_stdlog
,
437 "displaced: syscall changed %%eip; "
442 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
444 /* If we have stepped over a breakpoint, set the %eip to
445 point at the breakpoint instruction itself.
447 (gdbarch_decr_pc_after_break was never something the core
448 of GDB should have been concerned with; arch-specific
449 code should be making PC values consistent before
450 presenting them to GDB.) */
451 if (i386_breakpoint_p (insn
))
453 fprintf_unfiltered (gdb_stdlog
,
454 "displaced: stepped breakpoint\n");
458 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
461 fprintf_unfiltered (gdb_stdlog
,
463 "relocated %%eip from 0x%s to 0x%s\n",
464 paddr_nz (orig_eip
), paddr_nz (eip
));
468 /* If the instruction was PUSHFL, then the TF bit will be set in the
469 pushed value, and should be cleared. We'll leave this for later,
470 since GDB already messes up the TF flag when stepping over a
473 /* If the instruction was a call, the return address now atop the
474 stack is the address following the copied instruction. We need
475 to make it the address following the original instruction. */
476 if (i386_call_p (insn
))
480 const ULONGEST retaddr_len
= 4;
482 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
483 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
);
484 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
485 write_memory_unsigned_integer (esp
, retaddr_len
, retaddr
);
488 fprintf_unfiltered (gdb_stdlog
,
489 "displaced: relocated return addr at 0x%s "
498 #ifdef I386_REGNO_TO_SYMMETRY
499 #error "The Sequent Symmetry is no longer supported."
502 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
503 and %esp "belong" to the calling function. Therefore these
504 registers should be saved if they're going to be modified. */
506 /* The maximum number of saved registers. This should include all
507 registers mentioned above, and %eip. */
508 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
510 struct i386_frame_cache
517 /* Saved registers. */
518 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
523 /* Stack space reserved for local variables. */
527 /* Allocate and initialize a frame cache. */
529 static struct i386_frame_cache
*
530 i386_alloc_frame_cache (void)
532 struct i386_frame_cache
*cache
;
535 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
539 cache
->sp_offset
= -4;
542 /* Saved registers. We initialize these to -1 since zero is a valid
543 offset (that's where %ebp is supposed to be stored). */
544 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
545 cache
->saved_regs
[i
] = -1;
547 cache
->stack_align
= 0;
548 cache
->pc_in_eax
= 0;
550 /* Frameless until proven otherwise. */
556 /* If the instruction at PC is a jump, return the address of its
557 target. Otherwise, return PC. */
560 i386_follow_jump (CORE_ADDR pc
)
566 target_read_memory (pc
, &op
, 1);
570 op
= read_memory_unsigned_integer (pc
+ 1, 1);
576 /* Relative jump: if data16 == 0, disp32, else disp16. */
579 delta
= read_memory_integer (pc
+ 2, 2);
581 /* Include the size of the jmp instruction (including the
587 delta
= read_memory_integer (pc
+ 1, 4);
589 /* Include the size of the jmp instruction. */
594 /* Relative jump, disp8 (ignore data16). */
595 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
604 /* Check whether PC points at a prologue for a function returning a
605 structure or union. If so, it updates CACHE and returns the
606 address of the first instruction after the code sequence that
607 removes the "hidden" argument from the stack or CURRENT_PC,
608 whichever is smaller. Otherwise, return PC. */
611 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
612 struct i386_frame_cache
*cache
)
614 /* Functions that return a structure or union start with:
617 xchgl %eax, (%esp) 0x87 0x04 0x24
618 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
620 (the System V compiler puts out the second `xchg' instruction,
621 and the assembler doesn't try to optimize it, so the 'sib' form
622 gets generated). This sequence is used to get the address of the
623 return buffer for a function that returns a structure. */
624 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
625 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
629 if (current_pc
<= pc
)
632 target_read_memory (pc
, &op
, 1);
634 if (op
!= 0x58) /* popl %eax */
637 target_read_memory (pc
+ 1, buf
, 4);
638 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
641 if (current_pc
== pc
)
643 cache
->sp_offset
+= 4;
647 if (current_pc
== pc
+ 1)
649 cache
->pc_in_eax
= 1;
653 if (buf
[1] == proto1
[1])
660 i386_skip_probe (CORE_ADDR pc
)
662 /* A function may start with
676 target_read_memory (pc
, &op
, 1);
678 if (op
== 0x68 || op
== 0x6a)
682 /* Skip past the `pushl' instruction; it has either a one-byte or a
683 four-byte operand, depending on the opcode. */
689 /* Read the following 8 bytes, which should be `call _probe' (6
690 bytes) followed by `addl $4,%esp' (2 bytes). */
691 read_memory (pc
+ delta
, buf
, sizeof (buf
));
692 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
693 pc
+= delta
+ sizeof (buf
);
699 /* GCC 4.1 and later, can put code in the prologue to realign the
700 stack pointer. Check whether PC points to such code, and update
701 CACHE accordingly. Return the first instruction after the code
702 sequence or CURRENT_PC, whichever is smaller. If we don't
703 recognize the code, return PC. */
706 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
707 struct i386_frame_cache
*cache
)
709 /* The register used by the compiler to perform the stack re-alignment
710 is, in order of preference, either %ecx, %edx, or %eax. GCC should
711 never use %ebx as it always treats it as callee-saved, whereas
712 the compiler can only use caller-saved registers. */
713 static const gdb_byte insns_ecx
[10] = {
714 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
715 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
716 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
718 static const gdb_byte insns_edx
[10] = {
719 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
720 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
721 0xff, 0x72, 0xfc /* pushl -4(%edx) */
723 static const gdb_byte insns_eax
[10] = {
724 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
725 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
726 0xff, 0x70, 0xfc /* pushl -4(%eax) */
730 if (target_read_memory (pc
, buf
, sizeof buf
)
731 || (memcmp (buf
, insns_ecx
, sizeof buf
) != 0
732 && memcmp (buf
, insns_edx
, sizeof buf
) != 0
733 && memcmp (buf
, insns_eax
, sizeof buf
) != 0))
736 if (current_pc
> pc
+ 4)
737 cache
->stack_align
= 1;
739 return min (pc
+ 10, current_pc
);
742 /* Maximum instruction length we need to handle. */
743 #define I386_MAX_MATCHED_INSN_LEN 6
745 /* Instruction description. */
749 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
750 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
753 /* Search for the instruction at PC in the list SKIP_INSNS. Return
754 the first instruction description that matches. Otherwise, return
757 static struct i386_insn
*
758 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*skip_insns
)
760 struct i386_insn
*insn
;
763 target_read_memory (pc
, &op
, 1);
765 for (insn
= skip_insns
; insn
->len
> 0; insn
++)
767 if ((op
& insn
->mask
[0]) == insn
->insn
[0])
769 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
770 int insn_matched
= 1;
773 gdb_assert (insn
->len
> 1);
774 gdb_assert (insn
->len
<= I386_MAX_MATCHED_INSN_LEN
);
776 target_read_memory (pc
+ 1, buf
, insn
->len
- 1);
777 for (i
= 1; i
< insn
->len
; i
++)
779 if ((buf
[i
- 1] & insn
->mask
[i
]) != insn
->insn
[i
])
791 /* Some special instructions that might be migrated by GCC into the
792 part of the prologue that sets up the new stack frame. Because the
793 stack frame hasn't been setup yet, no registers have been saved
794 yet, and only the scratch registers %eax, %ecx and %edx can be
797 struct i386_insn i386_frame_setup_skip_insns
[] =
799 /* Check for `movb imm8, r' and `movl imm32, r'.
801 ??? Should we handle 16-bit operand-sizes here? */
803 /* `movb imm8, %al' and `movb imm8, %ah' */
804 /* `movb imm8, %cl' and `movb imm8, %ch' */
805 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
806 /* `movb imm8, %dl' and `movb imm8, %dh' */
807 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
808 /* `movl imm32, %eax' and `movl imm32, %ecx' */
809 { 5, { 0xb8 }, { 0xfe } },
810 /* `movl imm32, %edx' */
811 { 5, { 0xba }, { 0xff } },
813 /* Check for `mov imm32, r32'. Note that there is an alternative
814 encoding for `mov m32, %eax'.
816 ??? Should we handle SIB adressing here?
817 ??? Should we handle 16-bit operand-sizes here? */
819 /* `movl m32, %eax' */
820 { 5, { 0xa1 }, { 0xff } },
821 /* `movl m32, %eax' and `mov; m32, %ecx' */
822 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
823 /* `movl m32, %edx' */
824 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
826 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
827 Because of the symmetry, there are actually two ways to encode
828 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
829 opcode bytes 0x31 and 0x33 for `xorl'. */
831 /* `subl %eax, %eax' */
832 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
833 /* `subl %ecx, %ecx' */
834 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
835 /* `subl %edx, %edx' */
836 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
837 /* `xorl %eax, %eax' */
838 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
839 /* `xorl %ecx, %ecx' */
840 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
841 /* `xorl %edx, %edx' */
842 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
847 /* Check whether PC points to a no-op instruction. */
849 i386_skip_noop (CORE_ADDR pc
)
854 target_read_memory (pc
, &op
, 1);
859 /* Ignore `nop' instruction. */
863 target_read_memory (pc
, &op
, 1);
866 /* Ignore no-op instruction `mov %edi, %edi'.
867 Microsoft system dlls often start with
868 a `mov %edi,%edi' instruction.
869 The 5 bytes before the function start are
870 filled with `nop' instructions.
871 This pattern can be used for hot-patching:
872 The `mov %edi, %edi' instruction can be replaced by a
873 near jump to the location of the 5 `nop' instructions
874 which can be replaced by a 32-bit jump to anywhere
875 in the 32-bit address space. */
879 target_read_memory (pc
+ 1, &op
, 1);
883 target_read_memory (pc
, &op
, 1);
891 /* Check whether PC points at a code that sets up a new stack frame.
892 If so, it updates CACHE and returns the address of the first
893 instruction after the sequence that sets up the frame or LIMIT,
894 whichever is smaller. If we don't recognize the code, return PC. */
897 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR limit
,
898 struct i386_frame_cache
*cache
)
900 struct i386_insn
*insn
;
907 target_read_memory (pc
, &op
, 1);
909 if (op
== 0x55) /* pushl %ebp */
911 /* Take into account that we've executed the `pushl %ebp' that
912 starts this instruction sequence. */
913 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
914 cache
->sp_offset
+= 4;
917 /* If that's all, return now. */
921 /* Check for some special instructions that might be migrated by
922 GCC into the prologue and skip them. At this point in the
923 prologue, code should only touch the scratch registers %eax,
924 %ecx and %edx, so while the number of posibilities is sheer,
927 Make sure we only skip these instructions if we later see the
928 `movl %esp, %ebp' that actually sets up the frame. */
929 while (pc
+ skip
< limit
)
931 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
938 /* If that's all, return now. */
939 if (limit
<= pc
+ skip
)
942 target_read_memory (pc
+ skip
, &op
, 1);
944 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
948 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xec)
952 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xe5)
959 /* OK, we actually have a frame. We just don't know how large
960 it is yet. Set its size to zero. We'll adjust it if
961 necessary. We also now commit to skipping the special
962 instructions mentioned before. */
966 /* If that's all, return now. */
970 /* Check for stack adjustment
974 NOTE: You can't subtract a 16-bit immediate from a 32-bit
975 reg, so we don't have to worry about a data16 prefix. */
976 target_read_memory (pc
, &op
, 1);
979 /* `subl' with 8-bit immediate. */
980 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
981 /* Some instruction starting with 0x83 other than `subl'. */
984 /* `subl' with signed 8-bit immediate (though it wouldn't
985 make sense to be negative). */
986 cache
->locals
= read_memory_integer (pc
+ 2, 1);
991 /* Maybe it is `subl' with a 32-bit immediate. */
992 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
993 /* Some instruction starting with 0x81 other than `subl'. */
996 /* It is `subl' with a 32-bit immediate. */
997 cache
->locals
= read_memory_integer (pc
+ 2, 4);
1002 /* Some instruction other than `subl'. */
1006 else if (op
== 0xc8) /* enter */
1008 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
1015 /* Check whether PC points at code that saves registers on the stack.
1016 If so, it updates CACHE and returns the address of the first
1017 instruction after the register saves or CURRENT_PC, whichever is
1018 smaller. Otherwise, return PC. */
1021 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1022 struct i386_frame_cache
*cache
)
1024 CORE_ADDR offset
= 0;
1028 if (cache
->locals
> 0)
1029 offset
-= cache
->locals
;
1030 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1032 target_read_memory (pc
, &op
, 1);
1033 if (op
< 0x50 || op
> 0x57)
1037 cache
->saved_regs
[op
- 0x50] = offset
;
1038 cache
->sp_offset
+= 4;
1045 /* Do a full analysis of the prologue at PC and update CACHE
1046 accordingly. Bail out early if CURRENT_PC is reached. Return the
1047 address where the analysis stopped.
1049 We handle these cases:
1051 The startup sequence can be at the start of the function, or the
1052 function can start with a branch to startup code at the end.
1054 %ebp can be set up with either the 'enter' instruction, or "pushl
1055 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1056 once used in the System V compiler).
1058 Local space is allocated just below the saved %ebp by either the
1059 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1060 16-bit unsigned argument for space to allocate, and the 'addl'
1061 instruction could have either a signed byte, or 32-bit immediate.
1063 Next, the registers used by this function are pushed. With the
1064 System V compiler they will always be in the order: %edi, %esi,
1065 %ebx (and sometimes a harmless bug causes it to also save but not
1066 restore %eax); however, the code below is willing to see the pushes
1067 in any order, and will handle up to 8 of them.
1069 If the setup sequence is at the end of the function, then the next
1070 instruction will be a branch back to the start. */
1073 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
1074 struct i386_frame_cache
*cache
)
1076 pc
= i386_skip_noop (pc
);
1077 pc
= i386_follow_jump (pc
);
1078 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1079 pc
= i386_skip_probe (pc
);
1080 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1081 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
1082 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1085 /* Return PC of first real instruction. */
1088 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1090 static gdb_byte pic_pat
[6] =
1092 0xe8, 0, 0, 0, 0, /* call 0x0 */
1093 0x5b, /* popl %ebx */
1095 struct i386_frame_cache cache
;
1101 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
1102 if (cache
.locals
< 0)
1105 /* Found valid frame setup. */
1107 /* The native cc on SVR4 in -K PIC mode inserts the following code
1108 to get the address of the global offset table (GOT) into register
1113 movl %ebx,x(%ebp) (optional)
1116 This code is with the rest of the prologue (at the end of the
1117 function), so we have to skip it to get to the first real
1118 instruction at the start of the function. */
1120 for (i
= 0; i
< 6; i
++)
1122 target_read_memory (pc
+ i
, &op
, 1);
1123 if (pic_pat
[i
] != op
)
1130 target_read_memory (pc
+ delta
, &op
, 1);
1132 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1134 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
1136 if (op
== 0x5d) /* One byte offset from %ebp. */
1138 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1140 else /* Unexpected instruction. */
1143 target_read_memory (pc
+ delta
, &op
, 1);
1147 if (delta
> 0 && op
== 0x81
1148 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3)
1154 /* If the function starts with a branch (to startup code at the end)
1155 the last instruction should bring us back to the first
1156 instruction of the real code. */
1157 if (i386_follow_jump (start_pc
) != start_pc
)
1158 pc
= i386_follow_jump (pc
);
1163 /* Check that the code pointed to by PC corresponds to a call to
1164 __main, skip it if so. Return PC otherwise. */
1167 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1171 target_read_memory (pc
, &op
, 1);
1176 if (target_read_memory (pc
+ 1, buf
, sizeof buf
) == 0)
1178 /* Make sure address is computed correctly as a 32bit
1179 integer even if CORE_ADDR is 64 bit wide. */
1180 struct minimal_symbol
*s
;
1181 CORE_ADDR call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4);
1183 call_dest
= call_dest
& 0xffffffffU
;
1184 s
= lookup_minimal_symbol_by_pc (call_dest
);
1186 && SYMBOL_LINKAGE_NAME (s
) != NULL
1187 && strcmp (SYMBOL_LINKAGE_NAME (s
), "__main") == 0)
1195 /* This function is 64-bit safe. */
1198 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1202 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1203 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
1207 /* Normal frames. */
1209 static struct i386_frame_cache
*
1210 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1212 struct i386_frame_cache
*cache
;
1219 cache
= i386_alloc_frame_cache ();
1220 *this_cache
= cache
;
1222 /* In principle, for normal frames, %ebp holds the frame pointer,
1223 which holds the base address for the current stack frame.
1224 However, for functions that don't need it, the frame pointer is
1225 optional. For these "frameless" functions the frame pointer is
1226 actually the frame pointer of the calling frame. Signal
1227 trampolines are just a special case of a "frameless" function.
1228 They (usually) share their frame pointer with the frame that was
1229 in progress when the signal occurred. */
1231 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
1232 cache
->base
= extract_unsigned_integer (buf
, 4);
1233 if (cache
->base
== 0)
1236 /* For normal frames, %eip is stored at 4(%ebp). */
1237 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
1239 cache
->pc
= get_frame_func (this_frame
);
1241 i386_analyze_prologue (cache
->pc
, get_frame_pc (this_frame
), cache
);
1243 if (cache
->stack_align
)
1245 /* Saved stack pointer has been saved in %ecx. */
1246 get_frame_register (this_frame
, I386_ECX_REGNUM
, buf
);
1247 cache
->saved_sp
= extract_unsigned_integer(buf
, 4);
1250 if (cache
->locals
< 0)
1252 /* We didn't find a valid frame, which means that CACHE->base
1253 currently holds the frame pointer for our calling frame. If
1254 we're at the start of a function, or somewhere half-way its
1255 prologue, the function's frame probably hasn't been fully
1256 setup yet. Try to reconstruct the base address for the stack
1257 frame by looking at the stack pointer. For truly "frameless"
1258 functions this might work too. */
1260 if (cache
->stack_align
)
1262 /* We're halfway aligning the stack. */
1263 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
1264 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
1266 /* This will be added back below. */
1267 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
1271 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
1272 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
1276 /* Now that we have the base address for the stack frame we can
1277 calculate the value of %esp in the calling frame. */
1278 if (cache
->saved_sp
== 0)
1279 cache
->saved_sp
= cache
->base
+ 8;
1281 /* Adjust all the saved registers such that they contain addresses
1282 instead of offsets. */
1283 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1284 if (cache
->saved_regs
[i
] != -1)
1285 cache
->saved_regs
[i
] += cache
->base
;
1291 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1292 struct frame_id
*this_id
)
1294 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
1296 /* This marks the outermost frame. */
1297 if (cache
->base
== 0)
1300 /* See the end of i386_push_dummy_call. */
1301 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
1304 static struct value
*
1305 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1308 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
1310 gdb_assert (regnum
>= 0);
1312 /* The System V ABI says that:
1314 "The flags register contains the system flags, such as the
1315 direction flag and the carry flag. The direction flag must be
1316 set to the forward (that is, zero) direction before entry and
1317 upon exit from a function. Other user flags have no specified
1318 role in the standard calling sequence and are not preserved."
1320 To guarantee the "upon exit" part of that statement we fake a
1321 saved flags register that has its direction flag cleared.
1323 Note that GCC doesn't seem to rely on the fact that the direction
1324 flag is cleared after a function return; it always explicitly
1325 clears the flag before operations where it matters.
1327 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1328 right thing to do. The way we fake the flags register here makes
1329 it impossible to change it. */
1331 if (regnum
== I386_EFLAGS_REGNUM
)
1335 val
= get_frame_register_unsigned (this_frame
, regnum
);
1337 return frame_unwind_got_constant (this_frame
, regnum
, val
);
1340 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
1341 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
1343 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
1344 return frame_unwind_got_constant (this_frame
, regnum
, cache
->saved_sp
);
1346 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1347 return frame_unwind_got_memory (this_frame
, regnum
,
1348 cache
->saved_regs
[regnum
]);
1350 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1353 static const struct frame_unwind i386_frame_unwind
=
1357 i386_frame_prev_register
,
1359 default_frame_sniffer
1363 /* Signal trampolines. */
1365 static struct i386_frame_cache
*
1366 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1368 struct i386_frame_cache
*cache
;
1369 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1376 cache
= i386_alloc_frame_cache ();
1378 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
1379 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
1381 addr
= tdep
->sigcontext_addr (this_frame
);
1382 if (tdep
->sc_reg_offset
)
1386 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1388 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1389 if (tdep
->sc_reg_offset
[i
] != -1)
1390 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1394 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1395 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1398 *this_cache
= cache
;
1403 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1404 struct frame_id
*this_id
)
1406 struct i386_frame_cache
*cache
=
1407 i386_sigtramp_frame_cache (this_frame
, this_cache
);
1409 /* See the end of i386_push_dummy_call. */
1410 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
1413 static struct value
*
1414 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
1415 void **this_cache
, int regnum
)
1417 /* Make sure we've initialized the cache. */
1418 i386_sigtramp_frame_cache (this_frame
, this_cache
);
1420 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
1424 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
1425 struct frame_info
*this_frame
,
1426 void **this_prologue_cache
)
1428 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1430 /* We shouldn't even bother if we don't have a sigcontext_addr
1432 if (tdep
->sigcontext_addr
== NULL
)
1435 if (tdep
->sigtramp_p
!= NULL
)
1437 if (tdep
->sigtramp_p (this_frame
))
1441 if (tdep
->sigtramp_start
!= 0)
1443 CORE_ADDR pc
= get_frame_pc (this_frame
);
1445 gdb_assert (tdep
->sigtramp_end
!= 0);
1446 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1453 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1456 i386_sigtramp_frame_this_id
,
1457 i386_sigtramp_frame_prev_register
,
1459 i386_sigtramp_frame_sniffer
1464 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1466 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
1471 static const struct frame_base i386_frame_base
=
1474 i386_frame_base_address
,
1475 i386_frame_base_address
,
1476 i386_frame_base_address
1479 static struct frame_id
1480 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1484 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
1486 /* See the end of i386_push_dummy_call. */
1487 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
1491 /* Figure out where the longjmp will land. Slurp the args out of the
1492 stack. We expect the first arg to be a pointer to the jmp_buf
1493 structure from which we extract the address that we will land at.
1494 This address is copied into PC. This routine returns non-zero on
1498 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1501 CORE_ADDR sp
, jb_addr
;
1502 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1503 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
1505 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1506 longjmp will land. */
1507 if (jb_pc_offset
== -1)
1510 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
1511 sp
= extract_unsigned_integer (buf
, 4);
1512 if (target_read_memory (sp
+ 4, buf
, 4))
1515 jb_addr
= extract_unsigned_integer (buf
, 4);
1516 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
1519 *pc
= extract_unsigned_integer (buf
, 4);
1525 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1526 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1527 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1528 CORE_ADDR struct_addr
)
1533 /* Push arguments in reverse order. */
1534 for (i
= nargs
- 1; i
>= 0; i
--)
1536 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
1538 /* The System V ABI says that:
1540 "An argument's size is increased, if necessary, to make it a
1541 multiple of [32-bit] words. This may require tail padding,
1542 depending on the size of the argument."
1544 This makes sure the stack stays word-aligned. */
1545 sp
-= (len
+ 3) & ~3;
1546 write_memory (sp
, value_contents_all (args
[i
]), len
);
1549 /* Push value address. */
1553 store_unsigned_integer (buf
, 4, struct_addr
);
1554 write_memory (sp
, buf
, 4);
1557 /* Store return address. */
1559 store_unsigned_integer (buf
, 4, bp_addr
);
1560 write_memory (sp
, buf
, 4);
1562 /* Finally, update the stack pointer... */
1563 store_unsigned_integer (buf
, 4, sp
);
1564 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1566 /* ...and fake a frame pointer. */
1567 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1569 /* MarkK wrote: This "+ 8" is all over the place:
1570 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1571 i386_dummy_id). It's there, since all frame unwinders for
1572 a given target have to agree (within a certain margin) on the
1573 definition of the stack address of a frame. Otherwise
1574 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1575 stack address *before* the function call as a frame's CFA. On
1576 the i386, when %ebp is used as a frame pointer, the offset
1577 between the contents %ebp and the CFA as defined by GCC. */
1581 /* These registers are used for returning integers (and on some
1582 targets also for returning `struct' and `union' values when their
1583 size and alignment match an integer type). */
1584 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1585 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1587 /* Read, for architecture GDBARCH, a function return value of TYPE
1588 from REGCACHE, and copy that into VALBUF. */
1591 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1592 struct regcache
*regcache
, gdb_byte
*valbuf
)
1594 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1595 int len
= TYPE_LENGTH (type
);
1596 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1598 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1600 if (tdep
->st0_regnum
< 0)
1602 warning (_("Cannot find floating-point return value."));
1603 memset (valbuf
, 0, len
);
1607 /* Floating-point return values can be found in %st(0). Convert
1608 its contents to the desired type. This is probably not
1609 exactly how it would happen on the target itself, but it is
1610 the best we can do. */
1611 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1612 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1616 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1617 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1619 if (len
<= low_size
)
1621 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1622 memcpy (valbuf
, buf
, len
);
1624 else if (len
<= (low_size
+ high_size
))
1626 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1627 memcpy (valbuf
, buf
, low_size
);
1628 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1629 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1632 internal_error (__FILE__
, __LINE__
,
1633 _("Cannot extract return value of %d bytes long."), len
);
1637 /* Write, for architecture GDBARCH, a function return value of TYPE
1638 from VALBUF into REGCACHE. */
1641 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1642 struct regcache
*regcache
, const gdb_byte
*valbuf
)
1644 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1645 int len
= TYPE_LENGTH (type
);
1647 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1650 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1652 if (tdep
->st0_regnum
< 0)
1654 warning (_("Cannot set floating-point return value."));
1658 /* Returning floating-point values is a bit tricky. Apart from
1659 storing the return value in %st(0), we have to simulate the
1660 state of the FPU at function return point. */
1662 /* Convert the value found in VALBUF to the extended
1663 floating-point format used by the FPU. This is probably
1664 not exactly how it would happen on the target itself, but
1665 it is the best we can do. */
1666 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1667 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1669 /* Set the top of the floating-point register stack to 7. The
1670 actual value doesn't really matter, but 7 is what a normal
1671 function return would end up with if the program started out
1672 with a freshly initialized FPU. */
1673 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1675 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1677 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1678 the floating-point register stack to 7, the appropriate value
1679 for the tag word is 0x3fff. */
1680 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
1684 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1685 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1687 if (len
<= low_size
)
1688 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1689 else if (len
<= (low_size
+ high_size
))
1691 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1692 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1693 len
- low_size
, valbuf
+ low_size
);
1696 internal_error (__FILE__
, __LINE__
,
1697 _("Cannot store return value of %d bytes long."), len
);
1702 /* This is the variable that is set with "set struct-convention", and
1703 its legitimate values. */
1704 static const char default_struct_convention
[] = "default";
1705 static const char pcc_struct_convention
[] = "pcc";
1706 static const char reg_struct_convention
[] = "reg";
1707 static const char *valid_conventions
[] =
1709 default_struct_convention
,
1710 pcc_struct_convention
,
1711 reg_struct_convention
,
1714 static const char *struct_convention
= default_struct_convention
;
1716 /* Return non-zero if TYPE, which is assumed to be a structure,
1717 a union type, or an array type, should be returned in registers
1718 for architecture GDBARCH. */
1721 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1723 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1724 enum type_code code
= TYPE_CODE (type
);
1725 int len
= TYPE_LENGTH (type
);
1727 gdb_assert (code
== TYPE_CODE_STRUCT
1728 || code
== TYPE_CODE_UNION
1729 || code
== TYPE_CODE_ARRAY
);
1731 if (struct_convention
== pcc_struct_convention
1732 || (struct_convention
== default_struct_convention
1733 && tdep
->struct_return
== pcc_struct_return
))
1736 /* Structures consisting of a single `float', `double' or 'long
1737 double' member are returned in %st(0). */
1738 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1740 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1741 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1742 return (len
== 4 || len
== 8 || len
== 12);
1745 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1748 /* Determine, for architecture GDBARCH, how a return value of TYPE
1749 should be returned. If it is supposed to be returned in registers,
1750 and READBUF is non-zero, read the appropriate value from REGCACHE,
1751 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1752 from WRITEBUF into REGCACHE. */
1754 static enum return_value_convention
1755 i386_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1756 struct type
*type
, struct regcache
*regcache
,
1757 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1759 enum type_code code
= TYPE_CODE (type
);
1761 if (((code
== TYPE_CODE_STRUCT
1762 || code
== TYPE_CODE_UNION
1763 || code
== TYPE_CODE_ARRAY
)
1764 && !i386_reg_struct_return_p (gdbarch
, type
))
1765 /* 128-bit decimal float uses the struct return convention. */
1766 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
1768 /* The System V ABI says that:
1770 "A function that returns a structure or union also sets %eax
1771 to the value of the original address of the caller's area
1772 before it returns. Thus when the caller receives control
1773 again, the address of the returned object resides in register
1774 %eax and can be used to access the object."
1776 So the ABI guarantees that we can always find the return
1777 value just after the function has returned. */
1779 /* Note that the ABI doesn't mention functions returning arrays,
1780 which is something possible in certain languages such as Ada.
1781 In this case, the value is returned as if it was wrapped in
1782 a record, so the convention applied to records also applies
1789 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
1790 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1793 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
1796 /* This special case is for structures consisting of a single
1797 `float', `double' or 'long double' member. These structures are
1798 returned in %st(0). For these structures, we call ourselves
1799 recursively, changing TYPE into the type of the first member of
1800 the structure. Since that should work for all structures that
1801 have only one member, we don't bother to check the member's type
1803 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1805 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1806 return i386_return_value (gdbarch
, func_type
, type
, regcache
,
1811 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1813 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1815 return RETURN_VALUE_REGISTER_CONVENTION
;
1819 /* Type for %eflags. */
1820 struct type
*i386_eflags_type
;
1822 /* Type for %mxcsr. */
1823 struct type
*i386_mxcsr_type
;
1825 /* Construct types for ISA-specific registers. */
1827 i386_init_types (void)
1831 type
= init_flags_type ("builtin_type_i386_eflags", 4);
1832 append_flags_type_flag (type
, 0, "CF");
1833 append_flags_type_flag (type
, 1, NULL
);
1834 append_flags_type_flag (type
, 2, "PF");
1835 append_flags_type_flag (type
, 4, "AF");
1836 append_flags_type_flag (type
, 6, "ZF");
1837 append_flags_type_flag (type
, 7, "SF");
1838 append_flags_type_flag (type
, 8, "TF");
1839 append_flags_type_flag (type
, 9, "IF");
1840 append_flags_type_flag (type
, 10, "DF");
1841 append_flags_type_flag (type
, 11, "OF");
1842 append_flags_type_flag (type
, 14, "NT");
1843 append_flags_type_flag (type
, 16, "RF");
1844 append_flags_type_flag (type
, 17, "VM");
1845 append_flags_type_flag (type
, 18, "AC");
1846 append_flags_type_flag (type
, 19, "VIF");
1847 append_flags_type_flag (type
, 20, "VIP");
1848 append_flags_type_flag (type
, 21, "ID");
1849 i386_eflags_type
= type
;
1851 type
= init_flags_type ("builtin_type_i386_mxcsr", 4);
1852 append_flags_type_flag (type
, 0, "IE");
1853 append_flags_type_flag (type
, 1, "DE");
1854 append_flags_type_flag (type
, 2, "ZE");
1855 append_flags_type_flag (type
, 3, "OE");
1856 append_flags_type_flag (type
, 4, "UE");
1857 append_flags_type_flag (type
, 5, "PE");
1858 append_flags_type_flag (type
, 6, "DAZ");
1859 append_flags_type_flag (type
, 7, "IM");
1860 append_flags_type_flag (type
, 8, "DM");
1861 append_flags_type_flag (type
, 9, "ZM");
1862 append_flags_type_flag (type
, 10, "OM");
1863 append_flags_type_flag (type
, 11, "UM");
1864 append_flags_type_flag (type
, 12, "PM");
1865 append_flags_type_flag (type
, 15, "FZ");
1866 i386_mxcsr_type
= type
;
1869 /* Construct vector type for MMX registers. */
1871 i386_mmx_type (struct gdbarch
*gdbarch
)
1873 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1875 if (!tdep
->i386_mmx_type
)
1877 /* The type we're building is this: */
1879 union __gdb_builtin_type_vec64i
1882 int32_t v2_int32
[2];
1883 int16_t v4_int16
[4];
1890 t
= init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
1891 append_composite_type_field (t
, "uint64", builtin_type_int64
);
1892 append_composite_type_field (t
, "v2_int32",
1893 init_vector_type (builtin_type_int32
, 2));
1894 append_composite_type_field (t
, "v4_int16",
1895 init_vector_type (builtin_type_int16
, 4));
1896 append_composite_type_field (t
, "v8_int8",
1897 init_vector_type (builtin_type_int8
, 8));
1899 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1900 TYPE_NAME (t
) = "builtin_type_vec64i";
1901 tdep
->i386_mmx_type
= t
;
1904 return tdep
->i386_mmx_type
;
1908 i386_sse_type (struct gdbarch
*gdbarch
)
1910 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1912 if (!tdep
->i386_sse_type
)
1914 /* The type we're building is this: */
1916 union __gdb_builtin_type_vec128i
1919 int64_t v2_int64
[2];
1920 int32_t v4_int32
[4];
1921 int16_t v8_int16
[8];
1922 int8_t v16_int8
[16];
1923 double v2_double
[2];
1930 t
= init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION
);
1931 append_composite_type_field (t
, "v4_float",
1932 init_vector_type (builtin_type_float
, 4));
1933 append_composite_type_field (t
, "v2_double",
1934 init_vector_type (builtin_type_double
, 2));
1935 append_composite_type_field (t
, "v16_int8",
1936 init_vector_type (builtin_type_int8
, 16));
1937 append_composite_type_field (t
, "v8_int16",
1938 init_vector_type (builtin_type_int16
, 8));
1939 append_composite_type_field (t
, "v4_int32",
1940 init_vector_type (builtin_type_int32
, 4));
1941 append_composite_type_field (t
, "v2_int64",
1942 init_vector_type (builtin_type_int64
, 2));
1943 append_composite_type_field (t
, "uint128", builtin_type_int128
);
1945 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1946 TYPE_NAME (t
) = "builtin_type_vec128i";
1947 tdep
->i386_sse_type
= t
;
1950 return tdep
->i386_sse_type
;
1953 /* Return the GDB type object for the "standard" data type of data in
1954 register REGNUM. Perhaps %esi and %edi should go here, but
1955 potentially they could be used for things other than address. */
1957 static struct type
*
1958 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1960 if (regnum
== I386_EIP_REGNUM
)
1961 return builtin_type_void_func_ptr
;
1963 if (regnum
== I386_EFLAGS_REGNUM
)
1964 return i386_eflags_type
;
1966 if (regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1967 return builtin_type_void_data_ptr
;
1969 if (i386_fp_regnum_p (gdbarch
, regnum
))
1970 return builtin_type_i387_ext
;
1972 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1973 return i386_mmx_type (gdbarch
);
1975 if (i386_sse_regnum_p (gdbarch
, regnum
))
1976 return i386_sse_type (gdbarch
);
1978 if (regnum
== I387_MXCSR_REGNUM (gdbarch_tdep (gdbarch
)))
1979 return i386_mxcsr_type
;
1981 return builtin_type_int
;
1984 /* Map a cooked register onto a raw register or memory. For the i386,
1985 the MMX registers need to be mapped onto floating point registers. */
1988 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1990 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1995 mmxreg
= regnum
- tdep
->mm0_regnum
;
1996 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1997 tos
= (fstat
>> 11) & 0x7;
1998 fpreg
= (mmxreg
+ tos
) % 8;
2000 return (I387_ST0_REGNUM (tdep
) + fpreg
);
2004 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2005 int regnum
, gdb_byte
*buf
)
2007 if (i386_mmx_regnum_p (gdbarch
, regnum
))
2009 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
2010 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
2012 /* Extract (always little endian). */
2013 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
2014 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
2017 regcache_raw_read (regcache
, regnum
, buf
);
2021 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2022 int regnum
, const gdb_byte
*buf
)
2024 if (i386_mmx_regnum_p (gdbarch
, regnum
))
2026 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
2027 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
2030 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
2031 /* ... Modify ... (always little endian). */
2032 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
2034 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
2037 regcache_raw_write (regcache
, regnum
, buf
);
2041 /* Return the register number of the register allocated by GCC after
2042 REGNUM, or -1 if there is no such register. */
2045 i386_next_regnum (int regnum
)
2047 /* GCC allocates the registers in the order:
2049 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
2051 Since storing a variable in %esp doesn't make any sense we return
2052 -1 for %ebp and for %esp itself. */
2053 static int next_regnum
[] =
2055 I386_EDX_REGNUM
, /* Slot for %eax. */
2056 I386_EBX_REGNUM
, /* Slot for %ecx. */
2057 I386_ECX_REGNUM
, /* Slot for %edx. */
2058 I386_ESI_REGNUM
, /* Slot for %ebx. */
2059 -1, -1, /* Slots for %esp and %ebp. */
2060 I386_EDI_REGNUM
, /* Slot for %esi. */
2061 I386_EBP_REGNUM
/* Slot for %edi. */
2064 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
2065 return next_regnum
[regnum
];
2070 /* Return nonzero if a value of type TYPE stored in register REGNUM
2071 needs any special handling. */
2074 i386_convert_register_p (struct gdbarch
*gdbarch
, int regnum
, struct type
*type
)
2076 int len
= TYPE_LENGTH (type
);
2078 /* Values may be spread across multiple registers. Most debugging
2079 formats aren't expressive enough to specify the locations, so
2080 some heuristics is involved. Right now we only handle types that
2081 have a length that is a multiple of the word size, since GCC
2082 doesn't seem to put any other types into registers. */
2083 if (len
> 4 && len
% 4 == 0)
2085 int last_regnum
= regnum
;
2089 last_regnum
= i386_next_regnum (last_regnum
);
2093 if (last_regnum
!= -1)
2097 return i387_convert_register_p (gdbarch
, regnum
, type
);
2100 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
2101 return its contents in TO. */
2104 i386_register_to_value (struct frame_info
*frame
, int regnum
,
2105 struct type
*type
, gdb_byte
*to
)
2107 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2108 int len
= TYPE_LENGTH (type
);
2110 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
2111 available in FRAME (i.e. if it wasn't saved)? */
2113 if (i386_fp_regnum_p (gdbarch
, regnum
))
2115 i387_register_to_value (frame
, regnum
, type
, to
);
2119 /* Read a value spread across multiple registers. */
2121 gdb_assert (len
> 4 && len
% 4 == 0);
2125 gdb_assert (regnum
!= -1);
2126 gdb_assert (register_size (gdbarch
, regnum
) == 4);
2128 get_frame_register (frame
, regnum
, to
);
2129 regnum
= i386_next_regnum (regnum
);
2135 /* Write the contents FROM of a value of type TYPE into register
2136 REGNUM in frame FRAME. */
2139 i386_value_to_register (struct frame_info
*frame
, int regnum
,
2140 struct type
*type
, const gdb_byte
*from
)
2142 int len
= TYPE_LENGTH (type
);
2144 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
2146 i387_value_to_register (frame
, regnum
, type
, from
);
2150 /* Write a value spread across multiple registers. */
2152 gdb_assert (len
> 4 && len
% 4 == 0);
2156 gdb_assert (regnum
!= -1);
2157 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
2159 put_frame_register (frame
, regnum
, from
);
2160 regnum
= i386_next_regnum (regnum
);
2166 /* Supply register REGNUM from the buffer specified by GREGS and LEN
2167 in the general-purpose register set REGSET to register cache
2168 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2171 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
2172 int regnum
, const void *gregs
, size_t len
)
2174 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2175 const gdb_byte
*regs
= gregs
;
2178 gdb_assert (len
== tdep
->sizeof_gregset
);
2180 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
2182 if ((regnum
== i
|| regnum
== -1)
2183 && tdep
->gregset_reg_offset
[i
] != -1)
2184 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
2188 /* Collect register REGNUM from the register cache REGCACHE and store
2189 it in the buffer specified by GREGS and LEN as described by the
2190 general-purpose register set REGSET. If REGNUM is -1, do this for
2191 all registers in REGSET. */
2194 i386_collect_gregset (const struct regset
*regset
,
2195 const struct regcache
*regcache
,
2196 int regnum
, void *gregs
, size_t len
)
2198 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2199 gdb_byte
*regs
= gregs
;
2202 gdb_assert (len
== tdep
->sizeof_gregset
);
2204 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
2206 if ((regnum
== i
|| regnum
== -1)
2207 && tdep
->gregset_reg_offset
[i
] != -1)
2208 regcache_raw_collect (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
2212 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
2213 in the floating-point register set REGSET to register cache
2214 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2217 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
2218 int regnum
, const void *fpregs
, size_t len
)
2220 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2222 if (len
== I387_SIZEOF_FXSAVE
)
2224 i387_supply_fxsave (regcache
, regnum
, fpregs
);
2228 gdb_assert (len
== tdep
->sizeof_fpregset
);
2229 i387_supply_fsave (regcache
, regnum
, fpregs
);
2232 /* Collect register REGNUM from the register cache REGCACHE and store
2233 it in the buffer specified by FPREGS and LEN as described by the
2234 floating-point register set REGSET. If REGNUM is -1, do this for
2235 all registers in REGSET. */
2238 i386_collect_fpregset (const struct regset
*regset
,
2239 const struct regcache
*regcache
,
2240 int regnum
, void *fpregs
, size_t len
)
2242 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2244 if (len
== I387_SIZEOF_FXSAVE
)
2246 i387_collect_fxsave (regcache
, regnum
, fpregs
);
2250 gdb_assert (len
== tdep
->sizeof_fpregset
);
2251 i387_collect_fsave (regcache
, regnum
, fpregs
);
2254 /* Return the appropriate register set for the core section identified
2255 by SECT_NAME and SECT_SIZE. */
2257 const struct regset
*
2258 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
2259 const char *sect_name
, size_t sect_size
)
2261 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2263 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
2265 if (tdep
->gregset
== NULL
)
2266 tdep
->gregset
= regset_alloc (gdbarch
, i386_supply_gregset
,
2267 i386_collect_gregset
);
2268 return tdep
->gregset
;
2271 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
2272 || (strcmp (sect_name
, ".reg-xfp") == 0
2273 && sect_size
== I387_SIZEOF_FXSAVE
))
2275 if (tdep
->fpregset
== NULL
)
2276 tdep
->fpregset
= regset_alloc (gdbarch
, i386_supply_fpregset
,
2277 i386_collect_fpregset
);
2278 return tdep
->fpregset
;
2285 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2288 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
2290 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
2292 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
2293 struct minimal_symbol
*indsym
=
2294 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
2295 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
2299 if (strncmp (symname
, "__imp_", 6) == 0
2300 || strncmp (symname
, "_imp_", 5) == 0)
2301 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
2304 return 0; /* Not a trampoline. */
2308 /* Return whether the THIS_FRAME corresponds to a sigtramp
2312 i386_sigtramp_p (struct frame_info
*this_frame
)
2314 CORE_ADDR pc
= get_frame_pc (this_frame
);
2317 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2318 return (name
&& strcmp ("_sigtramp", name
) == 0);
2322 /* We have two flavours of disassembly. The machinery on this page
2323 deals with switching between those. */
2326 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
2328 gdb_assert (disassembly_flavor
== att_flavor
2329 || disassembly_flavor
== intel_flavor
);
2331 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2332 constified, cast to prevent a compiler warning. */
2333 info
->disassembler_options
= (char *) disassembly_flavor
;
2335 return print_insn_i386 (pc
, info
);
2339 /* There are a few i386 architecture variants that differ only
2340 slightly from the generic i386 target. For now, we don't give them
2341 their own source file, but include them here. As a consequence,
2342 they'll always be included. */
2344 /* System V Release 4 (SVR4). */
2346 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
2350 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
2352 CORE_ADDR pc
= get_frame_pc (this_frame
);
2355 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2356 currently unknown. */
2357 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2358 return (name
&& (strcmp ("_sigreturn", name
) == 0
2359 || strcmp ("_sigacthandler", name
) == 0
2360 || strcmp ("sigvechandler", name
) == 0));
2363 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
2364 address of the associated sigcontext (ucontext) structure. */
2367 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
2372 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2373 sp
= extract_unsigned_integer (buf
, 4);
2375 return read_memory_unsigned_integer (sp
+ 8, 4);
2382 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2384 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2385 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2388 /* System V Release 4 (SVR4). */
2391 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2393 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2395 /* System V Release 4 uses ELF. */
2396 i386_elf_init_abi (info
, gdbarch
);
2398 /* System V Release 4 has shared libraries. */
2399 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
2401 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
2402 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
2403 tdep
->sc_pc_offset
= 36 + 14 * 4;
2404 tdep
->sc_sp_offset
= 36 + 17 * 4;
2406 tdep
->jb_pc_offset
= 20;
2412 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2414 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2416 /* DJGPP doesn't have any special frames for signal handlers. */
2417 tdep
->sigtramp_p
= NULL
;
2419 tdep
->jb_pc_offset
= 36;
2423 /* i386 register groups. In addition to the normal groups, add "mmx"
2426 static struct reggroup
*i386_sse_reggroup
;
2427 static struct reggroup
*i386_mmx_reggroup
;
2430 i386_init_reggroups (void)
2432 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
2433 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
2437 i386_add_reggroups (struct gdbarch
*gdbarch
)
2439 reggroup_add (gdbarch
, i386_sse_reggroup
);
2440 reggroup_add (gdbarch
, i386_mmx_reggroup
);
2441 reggroup_add (gdbarch
, general_reggroup
);
2442 reggroup_add (gdbarch
, float_reggroup
);
2443 reggroup_add (gdbarch
, all_reggroup
);
2444 reggroup_add (gdbarch
, save_reggroup
);
2445 reggroup_add (gdbarch
, restore_reggroup
);
2446 reggroup_add (gdbarch
, vector_reggroup
);
2447 reggroup_add (gdbarch
, system_reggroup
);
2451 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
2452 struct reggroup
*group
)
2454 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
2455 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
2456 int fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
2457 || i386_fpc_regnum_p (gdbarch
, regnum
));
2458 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
2460 if (group
== i386_mmx_reggroup
)
2461 return mmx_regnum_p
;
2462 if (group
== i386_sse_reggroup
)
2463 return sse_regnum_p
;
2464 if (group
== vector_reggroup
)
2465 return (mmx_regnum_p
|| sse_regnum_p
);
2466 if (group
== float_reggroup
)
2468 if (group
== general_reggroup
)
2469 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
2471 return default_register_reggroup_p (gdbarch
, regnum
, group
);
2475 /* Get the ARGIth function argument for the current function. */
2478 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
2481 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
2482 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
2486 static struct gdbarch
*
2487 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2489 struct gdbarch_tdep
*tdep
;
2490 struct gdbarch
*gdbarch
;
2492 /* If there is already a candidate, use it. */
2493 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2495 return arches
->gdbarch
;
2497 /* Allocate space for the new architecture. */
2498 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2499 gdbarch
= gdbarch_alloc (&info
, tdep
);
2501 /* General-purpose registers. */
2502 tdep
->gregset
= NULL
;
2503 tdep
->gregset_reg_offset
= NULL
;
2504 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
2505 tdep
->sizeof_gregset
= 0;
2507 /* Floating-point registers. */
2508 tdep
->fpregset
= NULL
;
2509 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
2511 /* The default settings include the FPU registers, the MMX registers
2512 and the SSE registers. This can be overridden for a specific ABI
2513 by adjusting the members `st0_regnum', `mm0_regnum' and
2514 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2515 will show up in the output of "info all-registers". Ideally we
2516 should try to autodetect whether they are available, such that we
2517 can prevent "info all-registers" from displaying registers that
2520 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2521 [the SSE registers] always (even when they don't exist) or never
2522 showing them to the user (even when they do exist), I prefer the
2523 former over the latter. */
2525 tdep
->st0_regnum
= I386_ST0_REGNUM
;
2527 /* The MMX registers are implemented as pseudo-registers. Put off
2528 calculating the register number for %mm0 until we know the number
2529 of raw registers. */
2530 tdep
->mm0_regnum
= 0;
2532 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2533 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
2535 tdep
->jb_pc_offset
= -1;
2536 tdep
->struct_return
= pcc_struct_return
;
2537 tdep
->sigtramp_start
= 0;
2538 tdep
->sigtramp_end
= 0;
2539 tdep
->sigtramp_p
= i386_sigtramp_p
;
2540 tdep
->sigcontext_addr
= NULL
;
2541 tdep
->sc_reg_offset
= NULL
;
2542 tdep
->sc_pc_offset
= -1;
2543 tdep
->sc_sp_offset
= -1;
2545 /* The format used for `long double' on almost all i386 targets is
2546 the i387 extended floating-point format. In fact, of all targets
2547 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2548 on having a `long double' that's not `long' at all. */
2549 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
2551 /* Although the i387 extended floating-point has only 80 significant
2552 bits, a `long double' actually takes up 96, probably to enforce
2554 set_gdbarch_long_double_bit (gdbarch
, 96);
2556 /* The default ABI includes general-purpose registers,
2557 floating-point registers, and the SSE registers. */
2558 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2559 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2560 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2562 /* Register numbers of various important registers. */
2563 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2564 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2565 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2566 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2568 /* NOTE: kettenis/20040418: GCC does have two possible register
2569 numbering schemes on the i386: dbx and SVR4. These schemes
2570 differ in how they number %ebp, %esp, %eflags, and the
2571 floating-point registers, and are implemented by the arrays
2572 dbx_register_map[] and svr4_dbx_register_map in
2573 gcc/config/i386.c. GCC also defines a third numbering scheme in
2574 gcc/config/i386.c, which it designates as the "default" register
2575 map used in 64bit mode. This last register numbering scheme is
2576 implemented in dbx64_register_map, and is used for AMD64; see
2579 Currently, each GCC i386 target always uses the same register
2580 numbering scheme across all its supported debugging formats
2581 i.e. SDB (COFF), stabs and DWARF 2. This is because
2582 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2583 DBX_REGISTER_NUMBER macro which is defined by each target's
2584 respective config header in a manner independent of the requested
2585 output debugging format.
2587 This does not match the arrangement below, which presumes that
2588 the SDB and stabs numbering schemes differ from the DWARF and
2589 DWARF 2 ones. The reason for this arrangement is that it is
2590 likely to get the numbering scheme for the target's
2591 default/native debug format right. For targets where GCC is the
2592 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2593 targets where the native toolchain uses a different numbering
2594 scheme for a particular debug format (stabs-in-ELF on Solaris)
2595 the defaults below will have to be overridden, like
2596 i386_elf_init_abi() does. */
2598 /* Use the dbx register numbering scheme for stabs and COFF. */
2599 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2600 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2602 /* Use the SVR4 register numbering scheme for DWARF 2. */
2603 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2605 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
2606 be in use on any of the supported i386 targets. */
2608 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2610 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2612 /* Call dummy code. */
2613 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2615 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2616 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2617 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2619 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2621 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2623 /* Stack grows downward. */
2624 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2626 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2627 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2628 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
2630 set_gdbarch_frame_args_skip (gdbarch
, 8);
2632 /* Wire in the MMX registers. */
2633 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2634 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2635 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2637 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2639 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
2641 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2643 /* Add the i386 register groups. */
2644 i386_add_reggroups (gdbarch
);
2645 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2647 /* Helper for function argument information. */
2648 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2650 /* Hook in the DWARF CFI frame unwinder. */
2651 dwarf2_append_unwinders (gdbarch
);
2653 frame_base_set_default (gdbarch
, &i386_frame_base
);
2655 /* Hook in ABI-specific overrides, if they have been registered. */
2656 gdbarch_init_osabi (info
, gdbarch
);
2658 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
2659 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
2661 /* If we have a register mapping, enable the generic core file
2662 support, unless it has already been enabled. */
2663 if (tdep
->gregset_reg_offset
2664 && !gdbarch_regset_from_core_section_p (gdbarch
))
2665 set_gdbarch_regset_from_core_section (gdbarch
,
2666 i386_regset_from_core_section
);
2668 /* Unless support for MMX has been disabled, make %mm0 the first
2670 if (tdep
->mm0_regnum
== 0)
2671 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2676 static enum gdb_osabi
2677 i386_coff_osabi_sniffer (bfd
*abfd
)
2679 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2680 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2681 return GDB_OSABI_GO32
;
2683 return GDB_OSABI_UNKNOWN
;
2687 /* Provide a prototype to silence -Wmissing-prototypes. */
2688 void _initialize_i386_tdep (void);
2691 _initialize_i386_tdep (void)
2693 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2695 /* Add the variable that controls the disassembly flavor. */
2696 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
2697 &disassembly_flavor
, _("\
2698 Set the disassembly flavor."), _("\
2699 Show the disassembly flavor."), _("\
2700 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2702 NULL
, /* FIXME: i18n: */
2703 &setlist
, &showlist
);
2705 /* Add the variable that controls the convention for returning
2707 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
2708 &struct_convention
, _("\
2709 Set the convention for returning small structs."), _("\
2710 Show the convention for returning small structs."), _("\
2711 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2714 NULL
, /* FIXME: i18n: */
2715 &setlist
, &showlist
);
2717 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2718 i386_coff_osabi_sniffer
);
2720 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2721 i386_svr4_init_abi
);
2722 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2723 i386_go32_init_abi
);
2725 /* Initialize the i386-specific register groups & types. */
2726 i386_init_reggroups ();