1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988-2020 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "opcode/i386.h"
22 #include "arch-utils.h"
24 #include "dummy-frame.h"
25 #include "dwarf2/frame.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
37 #include "reggroups.h"
42 #include "target-float.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
49 #include "gdbsupport/x86-xstate.h"
53 #include "record-full.h"
54 #include "target-descriptions.h"
55 #include "arch/i386.h"
60 #include "stap-probe.h"
61 #include "user-regs.h"
62 #include "cli/cli-utils.h"
63 #include "expression.h"
64 #include "parser-defs.h"
67 #include <unordered_set>
71 static const char *i386_register_names
[] =
73 "eax", "ecx", "edx", "ebx",
74 "esp", "ebp", "esi", "edi",
75 "eip", "eflags", "cs", "ss",
76 "ds", "es", "fs", "gs",
77 "st0", "st1", "st2", "st3",
78 "st4", "st5", "st6", "st7",
79 "fctrl", "fstat", "ftag", "fiseg",
80 "fioff", "foseg", "fooff", "fop",
81 "xmm0", "xmm1", "xmm2", "xmm3",
82 "xmm4", "xmm5", "xmm6", "xmm7",
86 static const char *i386_zmm_names
[] =
88 "zmm0", "zmm1", "zmm2", "zmm3",
89 "zmm4", "zmm5", "zmm6", "zmm7"
92 static const char *i386_zmmh_names
[] =
94 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
95 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
98 static const char *i386_k_names
[] =
100 "k0", "k1", "k2", "k3",
101 "k4", "k5", "k6", "k7"
104 static const char *i386_ymm_names
[] =
106 "ymm0", "ymm1", "ymm2", "ymm3",
107 "ymm4", "ymm5", "ymm6", "ymm7",
110 static const char *i386_ymmh_names
[] =
112 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
113 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
116 static const char *i386_mpx_names
[] =
118 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
121 static const char* i386_pkeys_names
[] =
126 /* Register names for MPX pseudo-registers. */
128 static const char *i386_bnd_names
[] =
130 "bnd0", "bnd1", "bnd2", "bnd3"
133 /* Register names for MMX pseudo-registers. */
135 static const char *i386_mmx_names
[] =
137 "mm0", "mm1", "mm2", "mm3",
138 "mm4", "mm5", "mm6", "mm7"
141 /* Register names for byte pseudo-registers. */
143 static const char *i386_byte_names
[] =
145 "al", "cl", "dl", "bl",
146 "ah", "ch", "dh", "bh"
149 /* Register names for word pseudo-registers. */
151 static const char *i386_word_names
[] =
153 "ax", "cx", "dx", "bx",
157 /* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
158 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
159 we have 16 upper ZMM regs that have to be handled differently. */
161 const int num_lower_zmm_regs
= 16;
166 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
168 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
169 int mm0_regnum
= tdep
->mm0_regnum
;
174 regnum
-= mm0_regnum
;
175 return regnum
>= 0 && regnum
< tdep
->num_mmx_regs
;
181 i386_byte_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
183 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
185 regnum
-= tdep
->al_regnum
;
186 return regnum
>= 0 && regnum
< tdep
->num_byte_regs
;
192 i386_word_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
194 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
196 regnum
-= tdep
->ax_regnum
;
197 return regnum
>= 0 && regnum
< tdep
->num_word_regs
;
200 /* Dword register? */
203 i386_dword_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
205 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
206 int eax_regnum
= tdep
->eax_regnum
;
211 regnum
-= eax_regnum
;
212 return regnum
>= 0 && regnum
< tdep
->num_dword_regs
;
215 /* AVX512 register? */
218 i386_zmmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
220 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
221 int zmm0h_regnum
= tdep
->zmm0h_regnum
;
223 if (zmm0h_regnum
< 0)
226 regnum
-= zmm0h_regnum
;
227 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
231 i386_zmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
233 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
234 int zmm0_regnum
= tdep
->zmm0_regnum
;
239 regnum
-= zmm0_regnum
;
240 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
244 i386_k_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
246 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
247 int k0_regnum
= tdep
->k0_regnum
;
253 return regnum
>= 0 && regnum
< I387_NUM_K_REGS
;
257 i386_ymmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
259 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
260 int ymm0h_regnum
= tdep
->ymm0h_regnum
;
262 if (ymm0h_regnum
< 0)
265 regnum
-= ymm0h_regnum
;
266 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
272 i386_ymm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
274 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
275 int ymm0_regnum
= tdep
->ymm0_regnum
;
280 regnum
-= ymm0_regnum
;
281 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
285 i386_ymmh_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
287 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
288 int ymm16h_regnum
= tdep
->ymm16h_regnum
;
290 if (ymm16h_regnum
< 0)
293 regnum
-= ymm16h_regnum
;
294 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
298 i386_ymm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
300 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
301 int ymm16_regnum
= tdep
->ymm16_regnum
;
303 if (ymm16_regnum
< 0)
306 regnum
-= ymm16_regnum
;
307 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
313 i386_bnd_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
315 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
316 int bnd0_regnum
= tdep
->bnd0_regnum
;
321 regnum
-= bnd0_regnum
;
322 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
328 i386_xmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
330 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
331 int num_xmm_regs
= I387_NUM_XMM_REGS (tdep
);
333 if (num_xmm_regs
== 0)
336 regnum
-= I387_XMM0_REGNUM (tdep
);
337 return regnum
>= 0 && regnum
< num_xmm_regs
;
340 /* XMM_512 register? */
343 i386_xmm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
345 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
346 int num_xmm_avx512_regs
= I387_NUM_XMM_AVX512_REGS (tdep
);
348 if (num_xmm_avx512_regs
== 0)
351 regnum
-= I387_XMM16_REGNUM (tdep
);
352 return regnum
>= 0 && regnum
< num_xmm_avx512_regs
;
356 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
358 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
360 if (I387_NUM_XMM_REGS (tdep
) == 0)
363 return (regnum
== I387_MXCSR_REGNUM (tdep
));
369 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
371 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
373 if (I387_ST0_REGNUM (tdep
) < 0)
376 return (I387_ST0_REGNUM (tdep
) <= regnum
377 && regnum
< I387_FCTRL_REGNUM (tdep
));
381 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
383 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
385 if (I387_ST0_REGNUM (tdep
) < 0)
388 return (I387_FCTRL_REGNUM (tdep
) <= regnum
389 && regnum
< I387_XMM0_REGNUM (tdep
));
392 /* BNDr (raw) register? */
395 i386_bndr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
397 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
399 if (I387_BND0R_REGNUM (tdep
) < 0)
402 regnum
-= tdep
->bnd0r_regnum
;
403 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
406 /* BND control register? */
409 i386_mpx_ctrl_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
411 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
413 if (I387_BNDCFGU_REGNUM (tdep
) < 0)
416 regnum
-= I387_BNDCFGU_REGNUM (tdep
);
417 return regnum
>= 0 && regnum
< I387_NUM_MPX_CTRL_REGS
;
423 i386_pkru_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
425 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
426 int pkru_regnum
= tdep
->pkru_regnum
;
431 regnum
-= pkru_regnum
;
432 return regnum
>= 0 && regnum
< I387_NUM_PKEYS_REGS
;
435 /* Return the name of register REGNUM, or the empty string if it is
436 an anonymous register. */
439 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
441 /* Hide the upper YMM registers. */
442 if (i386_ymmh_regnum_p (gdbarch
, regnum
))
445 /* Hide the upper YMM16-31 registers. */
446 if (i386_ymmh_avx512_regnum_p (gdbarch
, regnum
))
449 /* Hide the upper ZMM registers. */
450 if (i386_zmmh_regnum_p (gdbarch
, regnum
))
453 return tdesc_register_name (gdbarch
, regnum
);
456 /* Return the name of register REGNUM. */
459 i386_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
461 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
462 if (i386_bnd_regnum_p (gdbarch
, regnum
))
463 return i386_bnd_names
[regnum
- tdep
->bnd0_regnum
];
464 if (i386_mmx_regnum_p (gdbarch
, regnum
))
465 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (tdep
)];
466 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
467 return i386_ymm_names
[regnum
- tdep
->ymm0_regnum
];
468 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
469 return i386_zmm_names
[regnum
- tdep
->zmm0_regnum
];
470 else if (i386_byte_regnum_p (gdbarch
, regnum
))
471 return i386_byte_names
[regnum
- tdep
->al_regnum
];
472 else if (i386_word_regnum_p (gdbarch
, regnum
))
473 return i386_word_names
[regnum
- tdep
->ax_regnum
];
475 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
478 /* Convert a dbx register number REG to the appropriate register
479 number used by GDB. */
482 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
484 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
486 /* This implements what GCC calls the "default" register map
487 (dbx_register_map[]). */
489 if (reg
>= 0 && reg
<= 7)
491 /* General-purpose registers. The debug info calls %ebp
492 register 4, and %esp register 5. */
499 else if (reg
>= 12 && reg
<= 19)
501 /* Floating-point registers. */
502 return reg
- 12 + I387_ST0_REGNUM (tdep
);
504 else if (reg
>= 21 && reg
<= 28)
507 int ymm0_regnum
= tdep
->ymm0_regnum
;
510 && i386_xmm_regnum_p (gdbarch
, reg
))
511 return reg
- 21 + ymm0_regnum
;
513 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
515 else if (reg
>= 29 && reg
<= 36)
518 return reg
- 29 + I387_MM0_REGNUM (tdep
);
521 /* This will hopefully provoke a warning. */
522 return gdbarch_num_cooked_regs (gdbarch
);
525 /* Convert SVR4 DWARF register number REG to the appropriate register number
529 i386_svr4_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
531 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
533 /* This implements the GCC register map that tries to be compatible
534 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
536 /* The SVR4 register numbering includes %eip and %eflags, and
537 numbers the floating point registers differently. */
538 if (reg
>= 0 && reg
<= 9)
540 /* General-purpose registers. */
543 else if (reg
>= 11 && reg
<= 18)
545 /* Floating-point registers. */
546 return reg
- 11 + I387_ST0_REGNUM (tdep
);
548 else if (reg
>= 21 && reg
<= 36)
550 /* The SSE and MMX registers have the same numbers as with dbx. */
551 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
556 case 37: return I387_FCTRL_REGNUM (tdep
);
557 case 38: return I387_FSTAT_REGNUM (tdep
);
558 case 39: return I387_MXCSR_REGNUM (tdep
);
559 case 40: return I386_ES_REGNUM
;
560 case 41: return I386_CS_REGNUM
;
561 case 42: return I386_SS_REGNUM
;
562 case 43: return I386_DS_REGNUM
;
563 case 44: return I386_FS_REGNUM
;
564 case 45: return I386_GS_REGNUM
;
570 /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
571 num_regs + num_pseudo_regs for other debug formats. */
574 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
576 int regnum
= i386_svr4_dwarf_reg_to_regnum (gdbarch
, reg
);
579 return gdbarch_num_cooked_regs (gdbarch
);
585 /* This is the variable that is set with "set disassembly-flavor", and
586 its legitimate values. */
587 static const char att_flavor
[] = "att";
588 static const char intel_flavor
[] = "intel";
589 static const char *const valid_flavors
[] =
595 static const char *disassembly_flavor
= att_flavor
;
598 /* Use the program counter to determine the contents and size of a
599 breakpoint instruction. Return a pointer to a string of bytes that
600 encode a breakpoint instruction, store the length of the string in
601 *LEN and optionally adjust *PC to point to the correct memory
602 location for inserting the breakpoint.
604 On the i386 we have a single breakpoint that fits in a single byte
605 and can be inserted anywhere.
607 This function is 64-bit safe. */
609 constexpr gdb_byte i386_break_insn
[] = { 0xcc }; /* int 3 */
611 typedef BP_MANIPULATION (i386_break_insn
) i386_breakpoint
;
614 /* Displaced instruction handling. */
616 /* Skip the legacy instruction prefixes in INSN.
617 Not all prefixes are valid for any particular insn
618 but we needn't care, the insn will fault if it's invalid.
619 The result is a pointer to the first opcode byte,
620 or NULL if we run off the end of the buffer. */
623 i386_skip_prefixes (gdb_byte
*insn
, size_t max_len
)
625 gdb_byte
*end
= insn
+ max_len
;
631 case DATA_PREFIX_OPCODE
:
632 case ADDR_PREFIX_OPCODE
:
633 case CS_PREFIX_OPCODE
:
634 case DS_PREFIX_OPCODE
:
635 case ES_PREFIX_OPCODE
:
636 case FS_PREFIX_OPCODE
:
637 case GS_PREFIX_OPCODE
:
638 case SS_PREFIX_OPCODE
:
639 case LOCK_PREFIX_OPCODE
:
640 case REPE_PREFIX_OPCODE
:
641 case REPNE_PREFIX_OPCODE
:
653 i386_absolute_jmp_p (const gdb_byte
*insn
)
655 /* jmp far (absolute address in operand). */
661 /* jump near, absolute indirect (/4). */
662 if ((insn
[1] & 0x38) == 0x20)
665 /* jump far, absolute indirect (/5). */
666 if ((insn
[1] & 0x38) == 0x28)
673 /* Return non-zero if INSN is a jump, zero otherwise. */
676 i386_jmp_p (const gdb_byte
*insn
)
678 /* jump short, relative. */
682 /* jump near, relative. */
686 return i386_absolute_jmp_p (insn
);
690 i386_absolute_call_p (const gdb_byte
*insn
)
692 /* call far, absolute. */
698 /* Call near, absolute indirect (/2). */
699 if ((insn
[1] & 0x38) == 0x10)
702 /* Call far, absolute indirect (/3). */
703 if ((insn
[1] & 0x38) == 0x18)
711 i386_ret_p (const gdb_byte
*insn
)
715 case 0xc2: /* ret near, pop N bytes. */
716 case 0xc3: /* ret near */
717 case 0xca: /* ret far, pop N bytes. */
718 case 0xcb: /* ret far */
719 case 0xcf: /* iret */
728 i386_call_p (const gdb_byte
*insn
)
730 if (i386_absolute_call_p (insn
))
733 /* call near, relative. */
740 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
741 length in bytes. Otherwise, return zero. */
744 i386_syscall_p (const gdb_byte
*insn
, int *lengthp
)
746 /* Is it 'int $0x80'? */
747 if ((insn
[0] == 0xcd && insn
[1] == 0x80)
748 /* Or is it 'sysenter'? */
749 || (insn
[0] == 0x0f && insn
[1] == 0x34)
750 /* Or is it 'syscall'? */
751 || (insn
[0] == 0x0f && insn
[1] == 0x05))
760 /* The gdbarch insn_is_call method. */
763 i386_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
765 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
767 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
768 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
770 return i386_call_p (insn
);
773 /* The gdbarch insn_is_ret method. */
776 i386_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
778 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
780 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
781 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
783 return i386_ret_p (insn
);
786 /* The gdbarch insn_is_jump method. */
789 i386_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
791 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
793 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
794 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
796 return i386_jmp_p (insn
);
799 /* Some kernels may run one past a syscall insn, so we have to cope. */
801 displaced_step_closure_up
802 i386_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
803 CORE_ADDR from
, CORE_ADDR to
,
804 struct regcache
*regs
)
806 size_t len
= gdbarch_max_insn_length (gdbarch
);
807 std::unique_ptr
<i386_displaced_step_closure
> closure
808 (new i386_displaced_step_closure (len
));
809 gdb_byte
*buf
= closure
->buf
.data ();
811 read_memory (from
, buf
, len
);
813 /* GDB may get control back after the insn after the syscall.
814 Presumably this is a kernel bug.
815 If this is a syscall, make sure there's a nop afterwards. */
820 insn
= i386_skip_prefixes (buf
, len
);
821 if (insn
!= NULL
&& i386_syscall_p (insn
, &syscall_length
))
822 insn
[syscall_length
] = NOP_OPCODE
;
825 write_memory (to
, buf
, len
);
829 fprintf_unfiltered (gdb_stdlog
, "displaced: copy %s->%s: ",
830 paddress (gdbarch
, from
), paddress (gdbarch
, to
));
831 displaced_step_dump_bytes (gdb_stdlog
, buf
, len
);
834 /* This is a work around for a problem with g++ 4.8. */
835 return displaced_step_closure_up (closure
.release ());
838 /* Fix up the state of registers and memory after having single-stepped
839 a displaced instruction. */
842 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
843 struct displaced_step_closure
*closure_
,
844 CORE_ADDR from
, CORE_ADDR to
,
845 struct regcache
*regs
)
847 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
849 /* The offset we applied to the instruction's address.
850 This could well be negative (when viewed as a signed 32-bit
851 value), but ULONGEST won't reflect that, so take care when
853 ULONGEST insn_offset
= to
- from
;
855 i386_displaced_step_closure
*closure
856 = (i386_displaced_step_closure
*) closure_
;
857 gdb_byte
*insn
= closure
->buf
.data ();
858 /* The start of the insn, needed in case we see some prefixes. */
859 gdb_byte
*insn_start
= insn
;
862 fprintf_unfiltered (gdb_stdlog
,
863 "displaced: fixup (%s, %s), "
864 "insn = 0x%02x 0x%02x ...\n",
865 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
868 /* The list of issues to contend with here is taken from
869 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
870 Yay for Free Software! */
872 /* Relocate the %eip, if necessary. */
874 /* The instruction recognizers we use assume any leading prefixes
875 have been skipped. */
877 /* This is the size of the buffer in closure. */
878 size_t max_insn_len
= gdbarch_max_insn_length (gdbarch
);
879 gdb_byte
*opcode
= i386_skip_prefixes (insn
, max_insn_len
);
880 /* If there are too many prefixes, just ignore the insn.
881 It will fault when run. */
886 /* Except in the case of absolute or indirect jump or call
887 instructions, or a return instruction, the new eip is relative to
888 the displaced instruction; make it relative. Well, signal
889 handler returns don't need relocation either, but we use the
890 value of %eip to recognize those; see below. */
891 if (! i386_absolute_jmp_p (insn
)
892 && ! i386_absolute_call_p (insn
)
893 && ! i386_ret_p (insn
))
898 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
900 /* A signal trampoline system call changes the %eip, resuming
901 execution of the main program after the signal handler has
902 returned. That makes them like 'return' instructions; we
903 shouldn't relocate %eip.
905 But most system calls don't, and we do need to relocate %eip.
907 Our heuristic for distinguishing these cases: if stepping
908 over the system call instruction left control directly after
909 the instruction, the we relocate --- control almost certainly
910 doesn't belong in the displaced copy. Otherwise, we assume
911 the instruction has put control where it belongs, and leave
912 it unrelocated. Goodness help us if there are PC-relative
914 if (i386_syscall_p (insn
, &insn_len
)
915 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
916 /* GDB can get control back after the insn after the syscall.
917 Presumably this is a kernel bug.
918 i386_displaced_step_copy_insn ensures its a nop,
919 we add one to the length for it. */
920 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
+ 1)
923 fprintf_unfiltered (gdb_stdlog
,
924 "displaced: syscall changed %%eip; "
929 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
931 /* If we just stepped over a breakpoint insn, we don't backup
932 the pc on purpose; this is to match behaviour without
935 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
938 fprintf_unfiltered (gdb_stdlog
,
940 "relocated %%eip from %s to %s\n",
941 paddress (gdbarch
, orig_eip
),
942 paddress (gdbarch
, eip
));
946 /* If the instruction was PUSHFL, then the TF bit will be set in the
947 pushed value, and should be cleared. We'll leave this for later,
948 since GDB already messes up the TF flag when stepping over a
951 /* If the instruction was a call, the return address now atop the
952 stack is the address following the copied instruction. We need
953 to make it the address following the original instruction. */
954 if (i386_call_p (insn
))
958 const ULONGEST retaddr_len
= 4;
960 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
961 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
, byte_order
);
962 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
963 write_memory_unsigned_integer (esp
, retaddr_len
, byte_order
, retaddr
);
966 fprintf_unfiltered (gdb_stdlog
,
967 "displaced: relocated return addr at %s to %s\n",
968 paddress (gdbarch
, esp
),
969 paddress (gdbarch
, retaddr
));
974 append_insns (CORE_ADDR
*to
, ULONGEST len
, const gdb_byte
*buf
)
976 target_write_memory (*to
, buf
, len
);
981 i386_relocate_instruction (struct gdbarch
*gdbarch
,
982 CORE_ADDR
*to
, CORE_ADDR oldloc
)
984 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
985 gdb_byte buf
[I386_MAX_INSN_LEN
];
986 int offset
= 0, rel32
, newrel
;
988 gdb_byte
*insn
= buf
;
990 read_memory (oldloc
, buf
, I386_MAX_INSN_LEN
);
992 insn_length
= gdb_buffered_insn_length (gdbarch
, insn
,
993 I386_MAX_INSN_LEN
, oldloc
);
995 /* Get past the prefixes. */
996 insn
= i386_skip_prefixes (insn
, I386_MAX_INSN_LEN
);
998 /* Adjust calls with 32-bit relative addresses as push/jump, with
999 the address pushed being the location where the original call in
1000 the user program would return to. */
1001 if (insn
[0] == 0xe8)
1003 gdb_byte push_buf
[16];
1004 unsigned int ret_addr
;
1006 /* Where "ret" in the original code will return to. */
1007 ret_addr
= oldloc
+ insn_length
;
1008 push_buf
[0] = 0x68; /* pushq $... */
1009 store_unsigned_integer (&push_buf
[1], 4, byte_order
, ret_addr
);
1010 /* Push the push. */
1011 append_insns (to
, 5, push_buf
);
1013 /* Convert the relative call to a relative jump. */
1016 /* Adjust the destination offset. */
1017 rel32
= extract_signed_integer (insn
+ 1, 4, byte_order
);
1018 newrel
= (oldloc
- *to
) + rel32
;
1019 store_signed_integer (insn
+ 1, 4, byte_order
, newrel
);
1021 if (debug_displaced
)
1022 fprintf_unfiltered (gdb_stdlog
,
1023 "Adjusted insn rel32=%s at %s to"
1024 " rel32=%s at %s\n",
1025 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1026 hex_string (newrel
), paddress (gdbarch
, *to
));
1028 /* Write the adjusted jump into its displaced location. */
1029 append_insns (to
, 5, insn
);
1033 /* Adjust jumps with 32-bit relative addresses. Calls are already
1035 if (insn
[0] == 0xe9)
1037 /* Adjust conditional jumps. */
1038 else if (insn
[0] == 0x0f && (insn
[1] & 0xf0) == 0x80)
1043 rel32
= extract_signed_integer (insn
+ offset
, 4, byte_order
);
1044 newrel
= (oldloc
- *to
) + rel32
;
1045 store_signed_integer (insn
+ offset
, 4, byte_order
, newrel
);
1046 if (debug_displaced
)
1047 fprintf_unfiltered (gdb_stdlog
,
1048 "Adjusted insn rel32=%s at %s to"
1049 " rel32=%s at %s\n",
1050 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1051 hex_string (newrel
), paddress (gdbarch
, *to
));
1054 /* Write the adjusted instructions into their displaced
1056 append_insns (to
, insn_length
, buf
);
1060 #ifdef I386_REGNO_TO_SYMMETRY
1061 #error "The Sequent Symmetry is no longer supported."
1064 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1065 and %esp "belong" to the calling function. Therefore these
1066 registers should be saved if they're going to be modified. */
1068 /* The maximum number of saved registers. This should include all
1069 registers mentioned above, and %eip. */
1070 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
1072 struct i386_frame_cache
1080 /* Saved registers. */
1081 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
1086 /* Stack space reserved for local variables. */
1090 /* Allocate and initialize a frame cache. */
1092 static struct i386_frame_cache
*
1093 i386_alloc_frame_cache (void)
1095 struct i386_frame_cache
*cache
;
1098 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
1103 cache
->sp_offset
= -4;
1106 /* Saved registers. We initialize these to -1 since zero is a valid
1107 offset (that's where %ebp is supposed to be stored). */
1108 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1109 cache
->saved_regs
[i
] = -1;
1110 cache
->saved_sp
= 0;
1111 cache
->saved_sp_reg
= -1;
1112 cache
->pc_in_eax
= 0;
1114 /* Frameless until proven otherwise. */
1120 /* If the instruction at PC is a jump, return the address of its
1121 target. Otherwise, return PC. */
1124 i386_follow_jump (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1126 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1131 if (target_read_code (pc
, &op
, 1))
1138 op
= read_code_unsigned_integer (pc
+ 1, 1, byte_order
);
1144 /* Relative jump: if data16 == 0, disp32, else disp16. */
1147 delta
= read_memory_integer (pc
+ 2, 2, byte_order
);
1149 /* Include the size of the jmp instruction (including the
1155 delta
= read_memory_integer (pc
+ 1, 4, byte_order
);
1157 /* Include the size of the jmp instruction. */
1162 /* Relative jump, disp8 (ignore data16). */
1163 delta
= read_memory_integer (pc
+ data16
+ 1, 1, byte_order
);
1165 delta
+= data16
+ 2;
1172 /* Check whether PC points at a prologue for a function returning a
1173 structure or union. If so, it updates CACHE and returns the
1174 address of the first instruction after the code sequence that
1175 removes the "hidden" argument from the stack or CURRENT_PC,
1176 whichever is smaller. Otherwise, return PC. */
1179 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
1180 struct i386_frame_cache
*cache
)
1182 /* Functions that return a structure or union start with:
1185 xchgl %eax, (%esp) 0x87 0x04 0x24
1186 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1188 (the System V compiler puts out the second `xchg' instruction,
1189 and the assembler doesn't try to optimize it, so the 'sib' form
1190 gets generated). This sequence is used to get the address of the
1191 return buffer for a function that returns a structure. */
1192 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
1193 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
1197 if (current_pc
<= pc
)
1200 if (target_read_code (pc
, &op
, 1))
1203 if (op
!= 0x58) /* popl %eax */
1206 if (target_read_code (pc
+ 1, buf
, 4))
1209 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
1212 if (current_pc
== pc
)
1214 cache
->sp_offset
+= 4;
1218 if (current_pc
== pc
+ 1)
1220 cache
->pc_in_eax
= 1;
1224 if (buf
[1] == proto1
[1])
1231 i386_skip_probe (CORE_ADDR pc
)
1233 /* A function may start with
1247 if (target_read_code (pc
, &op
, 1))
1250 if (op
== 0x68 || op
== 0x6a)
1254 /* Skip past the `pushl' instruction; it has either a one-byte or a
1255 four-byte operand, depending on the opcode. */
1261 /* Read the following 8 bytes, which should be `call _probe' (6
1262 bytes) followed by `addl $4,%esp' (2 bytes). */
1263 read_memory (pc
+ delta
, buf
, sizeof (buf
));
1264 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
1265 pc
+= delta
+ sizeof (buf
);
1271 /* GCC 4.1 and later, can put code in the prologue to realign the
1272 stack pointer. Check whether PC points to such code, and update
1273 CACHE accordingly. Return the first instruction after the code
1274 sequence or CURRENT_PC, whichever is smaller. If we don't
1275 recognize the code, return PC. */
1278 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
1279 struct i386_frame_cache
*cache
)
1281 /* There are 2 code sequences to re-align stack before the frame
1284 1. Use a caller-saved saved register:
1290 2. Use a callee-saved saved register:
1297 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1299 0x83 0xe4 0xf0 andl $-16, %esp
1300 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1305 int offset
, offset_and
;
1306 static int regnums
[8] = {
1307 I386_EAX_REGNUM
, /* %eax */
1308 I386_ECX_REGNUM
, /* %ecx */
1309 I386_EDX_REGNUM
, /* %edx */
1310 I386_EBX_REGNUM
, /* %ebx */
1311 I386_ESP_REGNUM
, /* %esp */
1312 I386_EBP_REGNUM
, /* %ebp */
1313 I386_ESI_REGNUM
, /* %esi */
1314 I386_EDI_REGNUM
/* %edi */
1317 if (target_read_code (pc
, buf
, sizeof buf
))
1320 /* Check caller-saved saved register. The first instruction has
1321 to be "leal 4(%esp), %reg". */
1322 if (buf
[0] == 0x8d && buf
[2] == 0x24 && buf
[3] == 0x4)
1324 /* MOD must be binary 10 and R/M must be binary 100. */
1325 if ((buf
[1] & 0xc7) != 0x44)
1328 /* REG has register number. */
1329 reg
= (buf
[1] >> 3) & 7;
1334 /* Check callee-saved saved register. The first instruction
1335 has to be "pushl %reg". */
1336 if ((buf
[0] & 0xf8) != 0x50)
1342 /* The next instruction has to be "leal 8(%esp), %reg". */
1343 if (buf
[1] != 0x8d || buf
[3] != 0x24 || buf
[4] != 0x8)
1346 /* MOD must be binary 10 and R/M must be binary 100. */
1347 if ((buf
[2] & 0xc7) != 0x44)
1350 /* REG has register number. Registers in pushl and leal have to
1352 if (reg
!= ((buf
[2] >> 3) & 7))
1358 /* Rigister can't be %esp nor %ebp. */
1359 if (reg
== 4 || reg
== 5)
1362 /* The next instruction has to be "andl $-XXX, %esp". */
1363 if (buf
[offset
+ 1] != 0xe4
1364 || (buf
[offset
] != 0x81 && buf
[offset
] != 0x83))
1367 offset_and
= offset
;
1368 offset
+= buf
[offset
] == 0x81 ? 6 : 3;
1370 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1371 0xfc. REG must be binary 110 and MOD must be binary 01. */
1372 if (buf
[offset
] != 0xff
1373 || buf
[offset
+ 2] != 0xfc
1374 || (buf
[offset
+ 1] & 0xf8) != 0x70)
1377 /* R/M has register. Registers in leal and pushl have to be the
1379 if (reg
!= (buf
[offset
+ 1] & 7))
1382 if (current_pc
> pc
+ offset_and
)
1383 cache
->saved_sp_reg
= regnums
[reg
];
1385 return std::min (pc
+ offset
+ 3, current_pc
);
1388 /* Maximum instruction length we need to handle. */
1389 #define I386_MAX_MATCHED_INSN_LEN 6
1391 /* Instruction description. */
1395 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
1396 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
1399 /* Return whether instruction at PC matches PATTERN. */
1402 i386_match_pattern (CORE_ADDR pc
, struct i386_insn pattern
)
1406 if (target_read_code (pc
, &op
, 1))
1409 if ((op
& pattern
.mask
[0]) == pattern
.insn
[0])
1411 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
1412 int insn_matched
= 1;
1415 gdb_assert (pattern
.len
> 1);
1416 gdb_assert (pattern
.len
<= I386_MAX_MATCHED_INSN_LEN
);
1418 if (target_read_code (pc
+ 1, buf
, pattern
.len
- 1))
1421 for (i
= 1; i
< pattern
.len
; i
++)
1423 if ((buf
[i
- 1] & pattern
.mask
[i
]) != pattern
.insn
[i
])
1426 return insn_matched
;
1431 /* Search for the instruction at PC in the list INSN_PATTERNS. Return
1432 the first instruction description that matches. Otherwise, return
1435 static struct i386_insn
*
1436 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1438 struct i386_insn
*pattern
;
1440 for (pattern
= insn_patterns
; pattern
->len
> 0; pattern
++)
1442 if (i386_match_pattern (pc
, *pattern
))
1449 /* Return whether PC points inside a sequence of instructions that
1450 matches INSN_PATTERNS. */
1453 i386_match_insn_block (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1455 CORE_ADDR current_pc
;
1457 struct i386_insn
*insn
;
1459 insn
= i386_match_insn (pc
, insn_patterns
);
1464 ix
= insn
- insn_patterns
;
1465 for (i
= ix
- 1; i
>= 0; i
--)
1467 current_pc
-= insn_patterns
[i
].len
;
1469 if (!i386_match_pattern (current_pc
, insn_patterns
[i
]))
1473 current_pc
= pc
+ insn
->len
;
1474 for (insn
= insn_patterns
+ ix
+ 1; insn
->len
> 0; insn
++)
1476 if (!i386_match_pattern (current_pc
, *insn
))
1479 current_pc
+= insn
->len
;
1485 /* Some special instructions that might be migrated by GCC into the
1486 part of the prologue that sets up the new stack frame. Because the
1487 stack frame hasn't been setup yet, no registers have been saved
1488 yet, and only the scratch registers %eax, %ecx and %edx can be
1491 struct i386_insn i386_frame_setup_skip_insns
[] =
1493 /* Check for `movb imm8, r' and `movl imm32, r'.
1495 ??? Should we handle 16-bit operand-sizes here? */
1497 /* `movb imm8, %al' and `movb imm8, %ah' */
1498 /* `movb imm8, %cl' and `movb imm8, %ch' */
1499 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1500 /* `movb imm8, %dl' and `movb imm8, %dh' */
1501 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1502 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1503 { 5, { 0xb8 }, { 0xfe } },
1504 /* `movl imm32, %edx' */
1505 { 5, { 0xba }, { 0xff } },
1507 /* Check for `mov imm32, r32'. Note that there is an alternative
1508 encoding for `mov m32, %eax'.
1510 ??? Should we handle SIB addressing here?
1511 ??? Should we handle 16-bit operand-sizes here? */
1513 /* `movl m32, %eax' */
1514 { 5, { 0xa1 }, { 0xff } },
1515 /* `movl m32, %eax' and `mov; m32, %ecx' */
1516 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1517 /* `movl m32, %edx' */
1518 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1520 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1521 Because of the symmetry, there are actually two ways to encode
1522 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1523 opcode bytes 0x31 and 0x33 for `xorl'. */
1525 /* `subl %eax, %eax' */
1526 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1527 /* `subl %ecx, %ecx' */
1528 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1529 /* `subl %edx, %edx' */
1530 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1531 /* `xorl %eax, %eax' */
1532 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1533 /* `xorl %ecx, %ecx' */
1534 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1535 /* `xorl %edx, %edx' */
1536 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1541 /* Check whether PC points to a no-op instruction. */
1543 i386_skip_noop (CORE_ADDR pc
)
1548 if (target_read_code (pc
, &op
, 1))
1554 /* Ignore `nop' instruction. */
1558 if (target_read_code (pc
, &op
, 1))
1562 /* Ignore no-op instruction `mov %edi, %edi'.
1563 Microsoft system dlls often start with
1564 a `mov %edi,%edi' instruction.
1565 The 5 bytes before the function start are
1566 filled with `nop' instructions.
1567 This pattern can be used for hot-patching:
1568 The `mov %edi, %edi' instruction can be replaced by a
1569 near jump to the location of the 5 `nop' instructions
1570 which can be replaced by a 32-bit jump to anywhere
1571 in the 32-bit address space. */
1573 else if (op
== 0x8b)
1575 if (target_read_code (pc
+ 1, &op
, 1))
1581 if (target_read_code (pc
, &op
, 1))
1591 /* Check whether PC points at a code that sets up a new stack frame.
1592 If so, it updates CACHE and returns the address of the first
1593 instruction after the sequence that sets up the frame or LIMIT,
1594 whichever is smaller. If we don't recognize the code, return PC. */
1597 i386_analyze_frame_setup (struct gdbarch
*gdbarch
,
1598 CORE_ADDR pc
, CORE_ADDR limit
,
1599 struct i386_frame_cache
*cache
)
1601 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1602 struct i386_insn
*insn
;
1609 if (target_read_code (pc
, &op
, 1))
1612 if (op
== 0x55) /* pushl %ebp */
1614 /* Take into account that we've executed the `pushl %ebp' that
1615 starts this instruction sequence. */
1616 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
1617 cache
->sp_offset
+= 4;
1620 /* If that's all, return now. */
1624 /* Check for some special instructions that might be migrated by
1625 GCC into the prologue and skip them. At this point in the
1626 prologue, code should only touch the scratch registers %eax,
1627 %ecx and %edx, so while the number of possibilities is sheer,
1630 Make sure we only skip these instructions if we later see the
1631 `movl %esp, %ebp' that actually sets up the frame. */
1632 while (pc
+ skip
< limit
)
1634 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
1641 /* If that's all, return now. */
1642 if (limit
<= pc
+ skip
)
1645 if (target_read_code (pc
+ skip
, &op
, 1))
1648 /* The i386 prologue looks like
1654 and a different prologue can be generated for atom.
1658 lea -0x10(%esp),%esp
1660 We handle both of them here. */
1664 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1666 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1672 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1677 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1678 if (read_code_unsigned_integer (pc
+ skip
+ 1, 2, byte_order
)
1687 /* OK, we actually have a frame. We just don't know how large
1688 it is yet. Set its size to zero. We'll adjust it if
1689 necessary. We also now commit to skipping the special
1690 instructions mentioned before. */
1693 /* If that's all, return now. */
1697 /* Check for stack adjustment
1703 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1704 reg, so we don't have to worry about a data16 prefix. */
1705 if (target_read_code (pc
, &op
, 1))
1709 /* `subl' with 8-bit immediate. */
1710 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1711 /* Some instruction starting with 0x83 other than `subl'. */
1714 /* `subl' with signed 8-bit immediate (though it wouldn't
1715 make sense to be negative). */
1716 cache
->locals
= read_code_integer (pc
+ 2, 1, byte_order
);
1719 else if (op
== 0x81)
1721 /* Maybe it is `subl' with a 32-bit immediate. */
1722 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1723 /* Some instruction starting with 0x81 other than `subl'. */
1726 /* It is `subl' with a 32-bit immediate. */
1727 cache
->locals
= read_code_integer (pc
+ 2, 4, byte_order
);
1730 else if (op
== 0x8d)
1732 /* The ModR/M byte is 0x64. */
1733 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0x64)
1735 /* 'lea' with 8-bit displacement. */
1736 cache
->locals
= -1 * read_code_integer (pc
+ 3, 1, byte_order
);
1741 /* Some instruction other than `subl' nor 'lea'. */
1745 else if (op
== 0xc8) /* enter */
1747 cache
->locals
= read_code_unsigned_integer (pc
+ 1, 2, byte_order
);
1754 /* Check whether PC points at code that saves registers on the stack.
1755 If so, it updates CACHE and returns the address of the first
1756 instruction after the register saves or CURRENT_PC, whichever is
1757 smaller. Otherwise, return PC. */
1760 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1761 struct i386_frame_cache
*cache
)
1763 CORE_ADDR offset
= 0;
1767 if (cache
->locals
> 0)
1768 offset
-= cache
->locals
;
1769 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1771 if (target_read_code (pc
, &op
, 1))
1773 if (op
< 0x50 || op
> 0x57)
1777 cache
->saved_regs
[op
- 0x50] = offset
;
1778 cache
->sp_offset
+= 4;
1785 /* Do a full analysis of the prologue at PC and update CACHE
1786 accordingly. Bail out early if CURRENT_PC is reached. Return the
1787 address where the analysis stopped.
1789 We handle these cases:
1791 The startup sequence can be at the start of the function, or the
1792 function can start with a branch to startup code at the end.
1794 %ebp can be set up with either the 'enter' instruction, or "pushl
1795 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1796 once used in the System V compiler).
1798 Local space is allocated just below the saved %ebp by either the
1799 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1800 16-bit unsigned argument for space to allocate, and the 'addl'
1801 instruction could have either a signed byte, or 32-bit immediate.
1803 Next, the registers used by this function are pushed. With the
1804 System V compiler they will always be in the order: %edi, %esi,
1805 %ebx (and sometimes a harmless bug causes it to also save but not
1806 restore %eax); however, the code below is willing to see the pushes
1807 in any order, and will handle up to 8 of them.
1809 If the setup sequence is at the end of the function, then the next
1810 instruction will be a branch back to the start. */
1813 i386_analyze_prologue (struct gdbarch
*gdbarch
,
1814 CORE_ADDR pc
, CORE_ADDR current_pc
,
1815 struct i386_frame_cache
*cache
)
1817 pc
= i386_skip_noop (pc
);
1818 pc
= i386_follow_jump (gdbarch
, pc
);
1819 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1820 pc
= i386_skip_probe (pc
);
1821 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1822 pc
= i386_analyze_frame_setup (gdbarch
, pc
, current_pc
, cache
);
1823 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1826 /* Return PC of first real instruction. */
1829 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1831 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1833 static gdb_byte pic_pat
[6] =
1835 0xe8, 0, 0, 0, 0, /* call 0x0 */
1836 0x5b, /* popl %ebx */
1838 struct i386_frame_cache cache
;
1842 CORE_ADDR func_addr
;
1844 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1846 CORE_ADDR post_prologue_pc
1847 = skip_prologue_using_sal (gdbarch
, func_addr
);
1848 struct compunit_symtab
*cust
= find_pc_compunit_symtab (func_addr
);
1850 /* Clang always emits a line note before the prologue and another
1851 one after. We trust clang to emit usable line notes. */
1852 if (post_prologue_pc
1854 && COMPUNIT_PRODUCER (cust
) != NULL
1855 && startswith (COMPUNIT_PRODUCER (cust
), "clang ")))
1856 return std::max (start_pc
, post_prologue_pc
);
1860 pc
= i386_analyze_prologue (gdbarch
, start_pc
, 0xffffffff, &cache
);
1861 if (cache
.locals
< 0)
1864 /* Found valid frame setup. */
1866 /* The native cc on SVR4 in -K PIC mode inserts the following code
1867 to get the address of the global offset table (GOT) into register
1872 movl %ebx,x(%ebp) (optional)
1875 This code is with the rest of the prologue (at the end of the
1876 function), so we have to skip it to get to the first real
1877 instruction at the start of the function. */
1879 for (i
= 0; i
< 6; i
++)
1881 if (target_read_code (pc
+ i
, &op
, 1))
1884 if (pic_pat
[i
] != op
)
1891 if (target_read_code (pc
+ delta
, &op
, 1))
1894 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1896 op
= read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
);
1898 if (op
== 0x5d) /* One byte offset from %ebp. */
1900 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1902 else /* Unexpected instruction. */
1905 if (target_read_code (pc
+ delta
, &op
, 1))
1910 if (delta
> 0 && op
== 0x81
1911 && read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
)
1918 /* If the function starts with a branch (to startup code at the end)
1919 the last instruction should bring us back to the first
1920 instruction of the real code. */
1921 if (i386_follow_jump (gdbarch
, start_pc
) != start_pc
)
1922 pc
= i386_follow_jump (gdbarch
, pc
);
1927 /* Check that the code pointed to by PC corresponds to a call to
1928 __main, skip it if so. Return PC otherwise. */
1931 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1933 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1936 if (target_read_code (pc
, &op
, 1))
1942 if (target_read_code (pc
+ 1, buf
, sizeof buf
) == 0)
1944 /* Make sure address is computed correctly as a 32bit
1945 integer even if CORE_ADDR is 64 bit wide. */
1946 struct bound_minimal_symbol s
;
1947 CORE_ADDR call_dest
;
1949 call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4, byte_order
);
1950 call_dest
= call_dest
& 0xffffffffU
;
1951 s
= lookup_minimal_symbol_by_pc (call_dest
);
1952 if (s
.minsym
!= NULL
1953 && s
.minsym
->linkage_name () != NULL
1954 && strcmp (s
.minsym
->linkage_name (), "__main") == 0)
1962 /* This function is 64-bit safe. */
1965 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1969 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1970 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1974 /* Normal frames. */
1977 i386_frame_cache_1 (struct frame_info
*this_frame
,
1978 struct i386_frame_cache
*cache
)
1980 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1981 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1985 cache
->pc
= get_frame_func (this_frame
);
1987 /* In principle, for normal frames, %ebp holds the frame pointer,
1988 which holds the base address for the current stack frame.
1989 However, for functions that don't need it, the frame pointer is
1990 optional. For these "frameless" functions the frame pointer is
1991 actually the frame pointer of the calling frame. Signal
1992 trampolines are just a special case of a "frameless" function.
1993 They (usually) share their frame pointer with the frame that was
1994 in progress when the signal occurred. */
1996 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
1997 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
);
1998 if (cache
->base
== 0)
2004 /* For normal frames, %eip is stored at 4(%ebp). */
2005 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
2008 i386_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
2011 if (cache
->locals
< 0)
2013 /* We didn't find a valid frame, which means that CACHE->base
2014 currently holds the frame pointer for our calling frame. If
2015 we're at the start of a function, or somewhere half-way its
2016 prologue, the function's frame probably hasn't been fully
2017 setup yet. Try to reconstruct the base address for the stack
2018 frame by looking at the stack pointer. For truly "frameless"
2019 functions this might work too. */
2021 if (cache
->saved_sp_reg
!= -1)
2023 /* Saved stack pointer has been saved. */
2024 get_frame_register (this_frame
, cache
->saved_sp_reg
, buf
);
2025 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2027 /* We're halfway aligning the stack. */
2028 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
2029 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
2031 /* This will be added back below. */
2032 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
2034 else if (cache
->pc
!= 0
2035 || target_read_code (get_frame_pc (this_frame
), buf
, 1))
2037 /* We're in a known function, but did not find a frame
2038 setup. Assume that the function does not use %ebp.
2039 Alternatively, we may have jumped to an invalid
2040 address; in that case there is definitely no new
2042 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2043 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
)
2047 /* We're in an unknown function. We could not find the start
2048 of the function to analyze the prologue; our best option is
2049 to assume a typical frame layout with the caller's %ebp
2051 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
2054 if (cache
->saved_sp_reg
!= -1)
2056 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2057 register may be unavailable). */
2058 if (cache
->saved_sp
== 0
2059 && deprecated_frame_register_read (this_frame
,
2060 cache
->saved_sp_reg
, buf
))
2061 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2063 /* Now that we have the base address for the stack frame we can
2064 calculate the value of %esp in the calling frame. */
2065 else if (cache
->saved_sp
== 0)
2066 cache
->saved_sp
= cache
->base
+ 8;
2068 /* Adjust all the saved registers such that they contain addresses
2069 instead of offsets. */
2070 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
2071 if (cache
->saved_regs
[i
] != -1)
2072 cache
->saved_regs
[i
] += cache
->base
;
2077 static struct i386_frame_cache
*
2078 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2080 struct i386_frame_cache
*cache
;
2083 return (struct i386_frame_cache
*) *this_cache
;
2085 cache
= i386_alloc_frame_cache ();
2086 *this_cache
= cache
;
2090 i386_frame_cache_1 (this_frame
, cache
);
2092 catch (const gdb_exception_error
&ex
)
2094 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2102 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2103 struct frame_id
*this_id
)
2105 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2108 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2109 else if (cache
->base
== 0)
2111 /* This marks the outermost frame. */
2115 /* See the end of i386_push_dummy_call. */
2116 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2120 static enum unwind_stop_reason
2121 i386_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2124 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2127 return UNWIND_UNAVAILABLE
;
2129 /* This marks the outermost frame. */
2130 if (cache
->base
== 0)
2131 return UNWIND_OUTERMOST
;
2133 return UNWIND_NO_REASON
;
2136 static struct value
*
2137 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
2140 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2142 gdb_assert (regnum
>= 0);
2144 /* The System V ABI says that:
2146 "The flags register contains the system flags, such as the
2147 direction flag and the carry flag. The direction flag must be
2148 set to the forward (that is, zero) direction before entry and
2149 upon exit from a function. Other user flags have no specified
2150 role in the standard calling sequence and are not preserved."
2152 To guarantee the "upon exit" part of that statement we fake a
2153 saved flags register that has its direction flag cleared.
2155 Note that GCC doesn't seem to rely on the fact that the direction
2156 flag is cleared after a function return; it always explicitly
2157 clears the flag before operations where it matters.
2159 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2160 right thing to do. The way we fake the flags register here makes
2161 it impossible to change it. */
2163 if (regnum
== I386_EFLAGS_REGNUM
)
2167 val
= get_frame_register_unsigned (this_frame
, regnum
);
2169 return frame_unwind_got_constant (this_frame
, regnum
, val
);
2172 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
2173 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
2175 if (regnum
== I386_ESP_REGNUM
2176 && (cache
->saved_sp
!= 0 || cache
->saved_sp_reg
!= -1))
2178 /* If the SP has been saved, but we don't know where, then this
2179 means that SAVED_SP_REG register was found unavailable back
2180 when we built the cache. */
2181 if (cache
->saved_sp
== 0)
2182 return frame_unwind_got_register (this_frame
, regnum
,
2183 cache
->saved_sp_reg
);
2185 return frame_unwind_got_constant (this_frame
, regnum
,
2189 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
2190 return frame_unwind_got_memory (this_frame
, regnum
,
2191 cache
->saved_regs
[regnum
]);
2193 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2196 static const struct frame_unwind i386_frame_unwind
=
2199 i386_frame_unwind_stop_reason
,
2201 i386_frame_prev_register
,
2203 default_frame_sniffer
2206 /* Normal frames, but in a function epilogue. */
2208 /* Implement the stack_frame_destroyed_p gdbarch method.
2210 The epilogue is defined here as the 'ret' instruction, which will
2211 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2212 the function's stack frame. */
2215 i386_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2218 struct compunit_symtab
*cust
;
2220 cust
= find_pc_compunit_symtab (pc
);
2221 if (cust
!= NULL
&& COMPUNIT_EPILOGUE_UNWIND_VALID (cust
))
2224 if (target_read_memory (pc
, &insn
, 1))
2225 return 0; /* Can't read memory at pc. */
2227 if (insn
!= 0xc3) /* 'ret' instruction. */
2234 i386_epilogue_frame_sniffer (const struct frame_unwind
*self
,
2235 struct frame_info
*this_frame
,
2236 void **this_prologue_cache
)
2238 if (frame_relative_level (this_frame
) == 0)
2239 return i386_stack_frame_destroyed_p (get_frame_arch (this_frame
),
2240 get_frame_pc (this_frame
));
2245 static struct i386_frame_cache
*
2246 i386_epilogue_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2248 struct i386_frame_cache
*cache
;
2252 return (struct i386_frame_cache
*) *this_cache
;
2254 cache
= i386_alloc_frame_cache ();
2255 *this_cache
= cache
;
2259 cache
->pc
= get_frame_func (this_frame
);
2261 /* At this point the stack looks as if we just entered the
2262 function, with the return address at the top of the
2264 sp
= get_frame_register_unsigned (this_frame
, I386_ESP_REGNUM
);
2265 cache
->base
= sp
+ cache
->sp_offset
;
2266 cache
->saved_sp
= cache
->base
+ 8;
2267 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->base
+ 4;
2271 catch (const gdb_exception_error
&ex
)
2273 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2280 static enum unwind_stop_reason
2281 i386_epilogue_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2284 struct i386_frame_cache
*cache
=
2285 i386_epilogue_frame_cache (this_frame
, this_cache
);
2288 return UNWIND_UNAVAILABLE
;
2290 return UNWIND_NO_REASON
;
2294 i386_epilogue_frame_this_id (struct frame_info
*this_frame
,
2296 struct frame_id
*this_id
)
2298 struct i386_frame_cache
*cache
=
2299 i386_epilogue_frame_cache (this_frame
, this_cache
);
2302 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2304 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2307 static struct value
*
2308 i386_epilogue_frame_prev_register (struct frame_info
*this_frame
,
2309 void **this_cache
, int regnum
)
2311 /* Make sure we've initialized the cache. */
2312 i386_epilogue_frame_cache (this_frame
, this_cache
);
2314 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2317 static const struct frame_unwind i386_epilogue_frame_unwind
=
2320 i386_epilogue_frame_unwind_stop_reason
,
2321 i386_epilogue_frame_this_id
,
2322 i386_epilogue_frame_prev_register
,
2324 i386_epilogue_frame_sniffer
2328 /* Stack-based trampolines. */
2330 /* These trampolines are used on cross x86 targets, when taking the
2331 address of a nested function. When executing these trampolines,
2332 no stack frame is set up, so we are in a similar situation as in
2333 epilogues and i386_epilogue_frame_this_id can be re-used. */
2335 /* Static chain passed in register. */
2337 struct i386_insn i386_tramp_chain_in_reg_insns
[] =
2339 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2340 { 5, { 0xb8 }, { 0xfe } },
2343 { 5, { 0xe9 }, { 0xff } },
2348 /* Static chain passed on stack (when regparm=3). */
2350 struct i386_insn i386_tramp_chain_on_stack_insns
[] =
2353 { 5, { 0x68 }, { 0xff } },
2356 { 5, { 0xe9 }, { 0xff } },
2361 /* Return whether PC points inside a stack trampoline. */
2364 i386_in_stack_tramp_p (CORE_ADDR pc
)
2369 /* A stack trampoline is detected if no name is associated
2370 to the current pc and if it points inside a trampoline
2373 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2377 if (target_read_memory (pc
, &insn
, 1))
2380 if (!i386_match_insn_block (pc
, i386_tramp_chain_in_reg_insns
)
2381 && !i386_match_insn_block (pc
, i386_tramp_chain_on_stack_insns
))
2388 i386_stack_tramp_frame_sniffer (const struct frame_unwind
*self
,
2389 struct frame_info
*this_frame
,
2392 if (frame_relative_level (this_frame
) == 0)
2393 return i386_in_stack_tramp_p (get_frame_pc (this_frame
));
2398 static const struct frame_unwind i386_stack_tramp_frame_unwind
=
2401 i386_epilogue_frame_unwind_stop_reason
,
2402 i386_epilogue_frame_this_id
,
2403 i386_epilogue_frame_prev_register
,
2405 i386_stack_tramp_frame_sniffer
2408 /* Generate a bytecode expression to get the value of the saved PC. */
2411 i386_gen_return_address (struct gdbarch
*gdbarch
,
2412 struct agent_expr
*ax
, struct axs_value
*value
,
2415 /* The following sequence assumes the traditional use of the base
2417 ax_reg (ax
, I386_EBP_REGNUM
);
2419 ax_simple (ax
, aop_add
);
2420 value
->type
= register_type (gdbarch
, I386_EIP_REGNUM
);
2421 value
->kind
= axs_lvalue_memory
;
2425 /* Signal trampolines. */
2427 static struct i386_frame_cache
*
2428 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2430 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2431 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2432 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2433 struct i386_frame_cache
*cache
;
2438 return (struct i386_frame_cache
*) *this_cache
;
2440 cache
= i386_alloc_frame_cache ();
2444 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2445 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
) - 4;
2447 addr
= tdep
->sigcontext_addr (this_frame
);
2448 if (tdep
->sc_reg_offset
)
2452 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
2454 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
2455 if (tdep
->sc_reg_offset
[i
] != -1)
2456 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
2460 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
2461 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
2466 catch (const gdb_exception_error
&ex
)
2468 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2472 *this_cache
= cache
;
2476 static enum unwind_stop_reason
2477 i386_sigtramp_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2480 struct i386_frame_cache
*cache
=
2481 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2484 return UNWIND_UNAVAILABLE
;
2486 return UNWIND_NO_REASON
;
2490 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2491 struct frame_id
*this_id
)
2493 struct i386_frame_cache
*cache
=
2494 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2497 (*this_id
) = frame_id_build_unavailable_stack (get_frame_pc (this_frame
));
2500 /* See the end of i386_push_dummy_call. */
2501 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
2505 static struct value
*
2506 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2507 void **this_cache
, int regnum
)
2509 /* Make sure we've initialized the cache. */
2510 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2512 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2516 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2517 struct frame_info
*this_frame
,
2518 void **this_prologue_cache
)
2520 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2522 /* We shouldn't even bother if we don't have a sigcontext_addr
2524 if (tdep
->sigcontext_addr
== NULL
)
2527 if (tdep
->sigtramp_p
!= NULL
)
2529 if (tdep
->sigtramp_p (this_frame
))
2533 if (tdep
->sigtramp_start
!= 0)
2535 CORE_ADDR pc
= get_frame_pc (this_frame
);
2537 gdb_assert (tdep
->sigtramp_end
!= 0);
2538 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
2545 static const struct frame_unwind i386_sigtramp_frame_unwind
=
2548 i386_sigtramp_frame_unwind_stop_reason
,
2549 i386_sigtramp_frame_this_id
,
2550 i386_sigtramp_frame_prev_register
,
2552 i386_sigtramp_frame_sniffer
2557 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2559 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2564 static const struct frame_base i386_frame_base
=
2567 i386_frame_base_address
,
2568 i386_frame_base_address
,
2569 i386_frame_base_address
2572 static struct frame_id
2573 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2577 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
2579 /* See the end of i386_push_dummy_call. */
2580 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
2583 /* _Decimal128 function return values need 16-byte alignment on the
2587 i386_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
2589 return sp
& -(CORE_ADDR
)16;
2593 /* Figure out where the longjmp will land. Slurp the args out of the
2594 stack. We expect the first arg to be a pointer to the jmp_buf
2595 structure from which we extract the address that we will land at.
2596 This address is copied into PC. This routine returns non-zero on
2600 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
2603 CORE_ADDR sp
, jb_addr
;
2604 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2605 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2606 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
2608 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2609 longjmp will land. */
2610 if (jb_pc_offset
== -1)
2613 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
2614 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2615 if (target_read_memory (sp
+ 4, buf
, 4))
2618 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
2619 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
2622 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
2627 /* Check whether TYPE must be 16-byte-aligned when passed as a
2628 function argument. 16-byte vectors, _Decimal128 and structures or
2629 unions containing such types must be 16-byte-aligned; other
2630 arguments are 4-byte-aligned. */
2633 i386_16_byte_align_p (struct type
*type
)
2635 type
= check_typedef (type
);
2636 if ((type
->code () == TYPE_CODE_DECFLOAT
2637 || (type
->code () == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type
)))
2638 && TYPE_LENGTH (type
) == 16)
2640 if (type
->code () == TYPE_CODE_ARRAY
)
2641 return i386_16_byte_align_p (TYPE_TARGET_TYPE (type
));
2642 if (type
->code () == TYPE_CODE_STRUCT
2643 || type
->code () == TYPE_CODE_UNION
)
2646 for (i
= 0; i
< type
->num_fields (); i
++)
2648 if (i386_16_byte_align_p (type
->field (i
).type ()))
2655 /* Implementation for set_gdbarch_push_dummy_code. */
2658 i386_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
2659 struct value
**args
, int nargs
, struct type
*value_type
,
2660 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
2661 struct regcache
*regcache
)
2663 /* Use 0xcc breakpoint - 1 byte. */
2667 /* Keep the stack aligned. */
2671 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
2672 calling convention. */
2675 i386_thiscall_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2676 struct regcache
*regcache
, CORE_ADDR bp_addr
,
2677 int nargs
, struct value
**args
, CORE_ADDR sp
,
2678 function_call_return_method return_method
,
2679 CORE_ADDR struct_addr
, bool thiscall
)
2681 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2687 /* BND registers can be in arbitrary values at the moment of the
2688 inferior call. This can cause boundary violations that are not
2689 due to a real bug or even desired by the user. The best to be done
2690 is set the BND registers to allow access to the whole memory, INIT
2691 state, before pushing the inferior call. */
2692 i387_reset_bnd_regs (gdbarch
, regcache
);
2694 /* Determine the total space required for arguments and struct
2695 return address in a first pass (allowing for 16-byte-aligned
2696 arguments), then push arguments in a second pass. */
2698 for (write_pass
= 0; write_pass
< 2; write_pass
++)
2700 int args_space_used
= 0;
2702 if (return_method
== return_method_struct
)
2706 /* Push value address. */
2707 store_unsigned_integer (buf
, 4, byte_order
, struct_addr
);
2708 write_memory (sp
, buf
, 4);
2709 args_space_used
+= 4;
2715 for (i
= thiscall
? 1 : 0; i
< nargs
; i
++)
2717 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
2721 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2722 args_space_used
= align_up (args_space_used
, 16);
2724 write_memory (sp
+ args_space_used
,
2725 value_contents_all (args
[i
]), len
);
2726 /* The System V ABI says that:
2728 "An argument's size is increased, if necessary, to make it a
2729 multiple of [32-bit] words. This may require tail padding,
2730 depending on the size of the argument."
2732 This makes sure the stack stays word-aligned. */
2733 args_space_used
+= align_up (len
, 4);
2737 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2738 args_space
= align_up (args_space
, 16);
2739 args_space
+= align_up (len
, 4);
2747 /* The original System V ABI only requires word alignment,
2748 but modern incarnations need 16-byte alignment in order
2749 to support SSE. Since wasting a few bytes here isn't
2750 harmful we unconditionally enforce 16-byte alignment. */
2755 /* Store return address. */
2757 store_unsigned_integer (buf
, 4, byte_order
, bp_addr
);
2758 write_memory (sp
, buf
, 4);
2760 /* Finally, update the stack pointer... */
2761 store_unsigned_integer (buf
, 4, byte_order
, sp
);
2762 regcache
->cooked_write (I386_ESP_REGNUM
, buf
);
2764 /* ...and fake a frame pointer. */
2765 regcache
->cooked_write (I386_EBP_REGNUM
, buf
);
2767 /* The 'this' pointer needs to be in ECX. */
2769 regcache
->cooked_write (I386_ECX_REGNUM
, value_contents_all (args
[0]));
2771 /* MarkK wrote: This "+ 8" is all over the place:
2772 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2773 i386_dummy_id). It's there, since all frame unwinders for
2774 a given target have to agree (within a certain margin) on the
2775 definition of the stack address of a frame. Otherwise frame id
2776 comparison might not work correctly. Since DWARF2/GCC uses the
2777 stack address *before* the function call as a frame's CFA. On
2778 the i386, when %ebp is used as a frame pointer, the offset
2779 between the contents %ebp and the CFA as defined by GCC. */
2783 /* Implement the "push_dummy_call" gdbarch method. */
2786 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2787 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2788 struct value
**args
, CORE_ADDR sp
,
2789 function_call_return_method return_method
,
2790 CORE_ADDR struct_addr
)
2792 return i386_thiscall_push_dummy_call (gdbarch
, function
, regcache
, bp_addr
,
2793 nargs
, args
, sp
, return_method
,
2794 struct_addr
, false);
2797 /* These registers are used for returning integers (and on some
2798 targets also for returning `struct' and `union' values when their
2799 size and alignment match an integer type). */
2800 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2801 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2803 /* Read, for architecture GDBARCH, a function return value of TYPE
2804 from REGCACHE, and copy that into VALBUF. */
2807 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2808 struct regcache
*regcache
, gdb_byte
*valbuf
)
2810 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2811 int len
= TYPE_LENGTH (type
);
2812 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2814 if (type
->code () == TYPE_CODE_FLT
)
2816 if (tdep
->st0_regnum
< 0)
2818 warning (_("Cannot find floating-point return value."));
2819 memset (valbuf
, 0, len
);
2823 /* Floating-point return values can be found in %st(0). Convert
2824 its contents to the desired type. This is probably not
2825 exactly how it would happen on the target itself, but it is
2826 the best we can do. */
2827 regcache
->raw_read (I386_ST0_REGNUM
, buf
);
2828 target_float_convert (buf
, i387_ext_type (gdbarch
), valbuf
, type
);
2832 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2833 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2835 if (len
<= low_size
)
2837 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2838 memcpy (valbuf
, buf
, len
);
2840 else if (len
<= (low_size
+ high_size
))
2842 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2843 memcpy (valbuf
, buf
, low_size
);
2844 regcache
->raw_read (HIGH_RETURN_REGNUM
, buf
);
2845 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
2848 internal_error (__FILE__
, __LINE__
,
2849 _("Cannot extract return value of %d bytes long."),
2854 /* Write, for architecture GDBARCH, a function return value of TYPE
2855 from VALBUF into REGCACHE. */
2858 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2859 struct regcache
*regcache
, const gdb_byte
*valbuf
)
2861 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2862 int len
= TYPE_LENGTH (type
);
2864 if (type
->code () == TYPE_CODE_FLT
)
2867 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2869 if (tdep
->st0_regnum
< 0)
2871 warning (_("Cannot set floating-point return value."));
2875 /* Returning floating-point values is a bit tricky. Apart from
2876 storing the return value in %st(0), we have to simulate the
2877 state of the FPU at function return point. */
2879 /* Convert the value found in VALBUF to the extended
2880 floating-point format used by the FPU. This is probably
2881 not exactly how it would happen on the target itself, but
2882 it is the best we can do. */
2883 target_float_convert (valbuf
, type
, buf
, i387_ext_type (gdbarch
));
2884 regcache
->raw_write (I386_ST0_REGNUM
, buf
);
2886 /* Set the top of the floating-point register stack to 7. The
2887 actual value doesn't really matter, but 7 is what a normal
2888 function return would end up with if the program started out
2889 with a freshly initialized FPU. */
2890 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
2892 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
2894 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2895 the floating-point register stack to 7, the appropriate value
2896 for the tag word is 0x3fff. */
2897 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
2901 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2902 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2904 if (len
<= low_size
)
2905 regcache
->raw_write_part (LOW_RETURN_REGNUM
, 0, len
, valbuf
);
2906 else if (len
<= (low_size
+ high_size
))
2908 regcache
->raw_write (LOW_RETURN_REGNUM
, valbuf
);
2909 regcache
->raw_write_part (HIGH_RETURN_REGNUM
, 0, len
- low_size
,
2913 internal_error (__FILE__
, __LINE__
,
2914 _("Cannot store return value of %d bytes long."), len
);
2919 /* This is the variable that is set with "set struct-convention", and
2920 its legitimate values. */
2921 static const char default_struct_convention
[] = "default";
2922 static const char pcc_struct_convention
[] = "pcc";
2923 static const char reg_struct_convention
[] = "reg";
2924 static const char *const valid_conventions
[] =
2926 default_struct_convention
,
2927 pcc_struct_convention
,
2928 reg_struct_convention
,
2931 static const char *struct_convention
= default_struct_convention
;
2933 /* Return non-zero if TYPE, which is assumed to be a structure,
2934 a union type, or an array type, should be returned in registers
2935 for architecture GDBARCH. */
2938 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
2940 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2941 enum type_code code
= type
->code ();
2942 int len
= TYPE_LENGTH (type
);
2944 gdb_assert (code
== TYPE_CODE_STRUCT
2945 || code
== TYPE_CODE_UNION
2946 || code
== TYPE_CODE_ARRAY
);
2948 if (struct_convention
== pcc_struct_convention
2949 || (struct_convention
== default_struct_convention
2950 && tdep
->struct_return
== pcc_struct_return
))
2953 /* Structures consisting of a single `float', `double' or 'long
2954 double' member are returned in %st(0). */
2955 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
2957 type
= check_typedef (type
->field (0).type ());
2958 if (type
->code () == TYPE_CODE_FLT
)
2959 return (len
== 4 || len
== 8 || len
== 12);
2962 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
2965 /* Determine, for architecture GDBARCH, how a return value of TYPE
2966 should be returned. If it is supposed to be returned in registers,
2967 and READBUF is non-zero, read the appropriate value from REGCACHE,
2968 and copy it into READBUF. If WRITEBUF is non-zero, write the value
2969 from WRITEBUF into REGCACHE. */
2971 static enum return_value_convention
2972 i386_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
2973 struct type
*type
, struct regcache
*regcache
,
2974 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
2976 enum type_code code
= type
->code ();
2978 if (((code
== TYPE_CODE_STRUCT
2979 || code
== TYPE_CODE_UNION
2980 || code
== TYPE_CODE_ARRAY
)
2981 && !i386_reg_struct_return_p (gdbarch
, type
))
2982 /* Complex double and long double uses the struct return convention. */
2983 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 16)
2984 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 24)
2985 /* 128-bit decimal float uses the struct return convention. */
2986 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
2988 /* The System V ABI says that:
2990 "A function that returns a structure or union also sets %eax
2991 to the value of the original address of the caller's area
2992 before it returns. Thus when the caller receives control
2993 again, the address of the returned object resides in register
2994 %eax and can be used to access the object."
2996 So the ABI guarantees that we can always find the return
2997 value just after the function has returned. */
2999 /* Note that the ABI doesn't mention functions returning arrays,
3000 which is something possible in certain languages such as Ada.
3001 In this case, the value is returned as if it was wrapped in
3002 a record, so the convention applied to records also applies
3009 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
3010 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
3013 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
3016 /* This special case is for structures consisting of a single
3017 `float', `double' or 'long double' member. These structures are
3018 returned in %st(0). For these structures, we call ourselves
3019 recursively, changing TYPE into the type of the first member of
3020 the structure. Since that should work for all structures that
3021 have only one member, we don't bother to check the member's type
3023 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3025 type
= check_typedef (type
->field (0).type ());
3026 return i386_return_value (gdbarch
, function
, type
, regcache
,
3031 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
3033 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
3035 return RETURN_VALUE_REGISTER_CONVENTION
;
3040 i387_ext_type (struct gdbarch
*gdbarch
)
3042 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3044 if (!tdep
->i387_ext_type
)
3046 tdep
->i387_ext_type
= tdesc_find_type (gdbarch
, "i387_ext");
3047 gdb_assert (tdep
->i387_ext_type
!= NULL
);
3050 return tdep
->i387_ext_type
;
3053 /* Construct type for pseudo BND registers. We can't use
3054 tdesc_find_type since a complement of one value has to be used
3055 to describe the upper bound. */
3057 static struct type
*
3058 i386_bnd_type (struct gdbarch
*gdbarch
)
3060 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3063 if (!tdep
->i386_bnd_type
)
3066 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3068 /* The type we're building is described bellow: */
3073 void *ubound
; /* One complement of raw ubound field. */
3077 t
= arch_composite_type (gdbarch
,
3078 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT
);
3080 append_composite_type_field (t
, "lbound", bt
->builtin_data_ptr
);
3081 append_composite_type_field (t
, "ubound", bt
->builtin_data_ptr
);
3083 t
->set_name ("builtin_type_bound128");
3084 tdep
->i386_bnd_type
= t
;
3087 return tdep
->i386_bnd_type
;
3090 /* Construct vector type for pseudo ZMM registers. We can't use
3091 tdesc_find_type since ZMM isn't described in target description. */
3093 static struct type
*
3094 i386_zmm_type (struct gdbarch
*gdbarch
)
3096 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3098 if (!tdep
->i386_zmm_type
)
3100 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3102 /* The type we're building is this: */
3104 union __gdb_builtin_type_vec512i
3106 int128_t uint128
[4];
3107 int64_t v4_int64
[8];
3108 int32_t v8_int32
[16];
3109 int16_t v16_int16
[32];
3110 int8_t v32_int8
[64];
3111 double v4_double
[8];
3118 t
= arch_composite_type (gdbarch
,
3119 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION
);
3120 append_composite_type_field (t
, "v16_float",
3121 init_vector_type (bt
->builtin_float
, 16));
3122 append_composite_type_field (t
, "v8_double",
3123 init_vector_type (bt
->builtin_double
, 8));
3124 append_composite_type_field (t
, "v64_int8",
3125 init_vector_type (bt
->builtin_int8
, 64));
3126 append_composite_type_field (t
, "v32_int16",
3127 init_vector_type (bt
->builtin_int16
, 32));
3128 append_composite_type_field (t
, "v16_int32",
3129 init_vector_type (bt
->builtin_int32
, 16));
3130 append_composite_type_field (t
, "v8_int64",
3131 init_vector_type (bt
->builtin_int64
, 8));
3132 append_composite_type_field (t
, "v4_int128",
3133 init_vector_type (bt
->builtin_int128
, 4));
3135 TYPE_VECTOR (t
) = 1;
3136 t
->set_name ("builtin_type_vec512i");
3137 tdep
->i386_zmm_type
= t
;
3140 return tdep
->i386_zmm_type
;
3143 /* Construct vector type for pseudo YMM registers. We can't use
3144 tdesc_find_type since YMM isn't described in target description. */
3146 static struct type
*
3147 i386_ymm_type (struct gdbarch
*gdbarch
)
3149 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3151 if (!tdep
->i386_ymm_type
)
3153 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3155 /* The type we're building is this: */
3157 union __gdb_builtin_type_vec256i
3159 int128_t uint128
[2];
3160 int64_t v2_int64
[4];
3161 int32_t v4_int32
[8];
3162 int16_t v8_int16
[16];
3163 int8_t v16_int8
[32];
3164 double v2_double
[4];
3171 t
= arch_composite_type (gdbarch
,
3172 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION
);
3173 append_composite_type_field (t
, "v8_float",
3174 init_vector_type (bt
->builtin_float
, 8));
3175 append_composite_type_field (t
, "v4_double",
3176 init_vector_type (bt
->builtin_double
, 4));
3177 append_composite_type_field (t
, "v32_int8",
3178 init_vector_type (bt
->builtin_int8
, 32));
3179 append_composite_type_field (t
, "v16_int16",
3180 init_vector_type (bt
->builtin_int16
, 16));
3181 append_composite_type_field (t
, "v8_int32",
3182 init_vector_type (bt
->builtin_int32
, 8));
3183 append_composite_type_field (t
, "v4_int64",
3184 init_vector_type (bt
->builtin_int64
, 4));
3185 append_composite_type_field (t
, "v2_int128",
3186 init_vector_type (bt
->builtin_int128
, 2));
3188 TYPE_VECTOR (t
) = 1;
3189 t
->set_name ("builtin_type_vec256i");
3190 tdep
->i386_ymm_type
= t
;
3193 return tdep
->i386_ymm_type
;
3196 /* Construct vector type for MMX registers. */
3197 static struct type
*
3198 i386_mmx_type (struct gdbarch
*gdbarch
)
3200 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3202 if (!tdep
->i386_mmx_type
)
3204 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3206 /* The type we're building is this: */
3208 union __gdb_builtin_type_vec64i
3211 int32_t v2_int32
[2];
3212 int16_t v4_int16
[4];
3219 t
= arch_composite_type (gdbarch
,
3220 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
3222 append_composite_type_field (t
, "uint64", bt
->builtin_int64
);
3223 append_composite_type_field (t
, "v2_int32",
3224 init_vector_type (bt
->builtin_int32
, 2));
3225 append_composite_type_field (t
, "v4_int16",
3226 init_vector_type (bt
->builtin_int16
, 4));
3227 append_composite_type_field (t
, "v8_int8",
3228 init_vector_type (bt
->builtin_int8
, 8));
3230 TYPE_VECTOR (t
) = 1;
3231 t
->set_name ("builtin_type_vec64i");
3232 tdep
->i386_mmx_type
= t
;
3235 return tdep
->i386_mmx_type
;
3238 /* Return the GDB type object for the "standard" data type of data in
3242 i386_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
3244 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3245 return i386_bnd_type (gdbarch
);
3246 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3247 return i386_mmx_type (gdbarch
);
3248 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3249 return i386_ymm_type (gdbarch
);
3250 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3251 return i386_ymm_type (gdbarch
);
3252 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3253 return i386_zmm_type (gdbarch
);
3256 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3257 if (i386_byte_regnum_p (gdbarch
, regnum
))
3258 return bt
->builtin_int8
;
3259 else if (i386_word_regnum_p (gdbarch
, regnum
))
3260 return bt
->builtin_int16
;
3261 else if (i386_dword_regnum_p (gdbarch
, regnum
))
3262 return bt
->builtin_int32
;
3263 else if (i386_k_regnum_p (gdbarch
, regnum
))
3264 return bt
->builtin_int64
;
3267 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3270 /* Map a cooked register onto a raw register or memory. For the i386,
3271 the MMX registers need to be mapped onto floating point registers. */
3274 i386_mmx_regnum_to_fp_regnum (readable_regcache
*regcache
, int regnum
)
3276 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
3281 mmxreg
= regnum
- tdep
->mm0_regnum
;
3282 regcache
->raw_read (I387_FSTAT_REGNUM (tdep
), &fstat
);
3283 tos
= (fstat
>> 11) & 0x7;
3284 fpreg
= (mmxreg
+ tos
) % 8;
3286 return (I387_ST0_REGNUM (tdep
) + fpreg
);
3289 /* A helper function for us by i386_pseudo_register_read_value and
3290 amd64_pseudo_register_read_value. It does all the work but reads
3291 the data into an already-allocated value. */
3294 i386_pseudo_register_read_into_value (struct gdbarch
*gdbarch
,
3295 readable_regcache
*regcache
,
3297 struct value
*result_value
)
3299 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3300 enum register_status status
;
3301 gdb_byte
*buf
= value_contents_raw (result_value
);
3303 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3305 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3307 /* Extract (always little endian). */
3308 status
= regcache
->raw_read (fpnum
, raw_buf
);
3309 if (status
!= REG_VALID
)
3310 mark_value_bytes_unavailable (result_value
, 0,
3311 TYPE_LENGTH (value_type (result_value
)));
3313 memcpy (buf
, raw_buf
, register_size (gdbarch
, regnum
));
3317 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3318 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3320 regnum
-= tdep
->bnd0_regnum
;
3322 /* Extract (always little endian). Read lower 128bits. */
3323 status
= regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3325 if (status
!= REG_VALID
)
3326 mark_value_bytes_unavailable (result_value
, 0, 16);
3329 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3330 LONGEST upper
, lower
;
3331 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3333 lower
= extract_unsigned_integer (raw_buf
, 8, byte_order
);
3334 upper
= extract_unsigned_integer (raw_buf
+ 8, 8, byte_order
);
3337 memcpy (buf
, &lower
, size
);
3338 memcpy (buf
+ size
, &upper
, size
);
3341 else if (i386_k_regnum_p (gdbarch
, regnum
))
3343 regnum
-= tdep
->k0_regnum
;
3345 /* Extract (always little endian). */
3346 status
= regcache
->raw_read (tdep
->k0_regnum
+ regnum
, raw_buf
);
3347 if (status
!= REG_VALID
)
3348 mark_value_bytes_unavailable (result_value
, 0, 8);
3350 memcpy (buf
, raw_buf
, 8);
3352 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3354 regnum
-= tdep
->zmm0_regnum
;
3356 if (regnum
< num_lower_zmm_regs
)
3358 /* Extract (always little endian). Read lower 128bits. */
3359 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3361 if (status
!= REG_VALID
)
3362 mark_value_bytes_unavailable (result_value
, 0, 16);
3364 memcpy (buf
, raw_buf
, 16);
3366 /* Extract (always little endian). Read upper 128bits. */
3367 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3369 if (status
!= REG_VALID
)
3370 mark_value_bytes_unavailable (result_value
, 16, 16);
3372 memcpy (buf
+ 16, raw_buf
, 16);
3376 /* Extract (always little endian). Read lower 128bits. */
3377 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
3378 - num_lower_zmm_regs
,
3380 if (status
!= REG_VALID
)
3381 mark_value_bytes_unavailable (result_value
, 0, 16);
3383 memcpy (buf
, raw_buf
, 16);
3385 /* Extract (always little endian). Read upper 128bits. */
3386 status
= regcache
->raw_read (I387_YMM16H_REGNUM (tdep
) + regnum
3387 - num_lower_zmm_regs
,
3389 if (status
!= REG_VALID
)
3390 mark_value_bytes_unavailable (result_value
, 16, 16);
3392 memcpy (buf
+ 16, raw_buf
, 16);
3395 /* Read upper 256bits. */
3396 status
= regcache
->raw_read (tdep
->zmm0h_regnum
+ regnum
,
3398 if (status
!= REG_VALID
)
3399 mark_value_bytes_unavailable (result_value
, 32, 32);
3401 memcpy (buf
+ 32, raw_buf
, 32);
3403 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3405 regnum
-= tdep
->ymm0_regnum
;
3407 /* Extract (always little endian). Read lower 128bits. */
3408 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3410 if (status
!= REG_VALID
)
3411 mark_value_bytes_unavailable (result_value
, 0, 16);
3413 memcpy (buf
, raw_buf
, 16);
3414 /* Read upper 128bits. */
3415 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3417 if (status
!= REG_VALID
)
3418 mark_value_bytes_unavailable (result_value
, 16, 32);
3420 memcpy (buf
+ 16, raw_buf
, 16);
3422 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3424 regnum
-= tdep
->ymm16_regnum
;
3425 /* Extract (always little endian). Read lower 128bits. */
3426 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
,
3428 if (status
!= REG_VALID
)
3429 mark_value_bytes_unavailable (result_value
, 0, 16);
3431 memcpy (buf
, raw_buf
, 16);
3432 /* Read upper 128bits. */
3433 status
= regcache
->raw_read (tdep
->ymm16h_regnum
+ regnum
,
3435 if (status
!= REG_VALID
)
3436 mark_value_bytes_unavailable (result_value
, 16, 16);
3438 memcpy (buf
+ 16, raw_buf
, 16);
3440 else if (i386_word_regnum_p (gdbarch
, regnum
))
3442 int gpnum
= regnum
- tdep
->ax_regnum
;
3444 /* Extract (always little endian). */
3445 status
= regcache
->raw_read (gpnum
, raw_buf
);
3446 if (status
!= REG_VALID
)
3447 mark_value_bytes_unavailable (result_value
, 0,
3448 TYPE_LENGTH (value_type (result_value
)));
3450 memcpy (buf
, raw_buf
, 2);
3452 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3454 int gpnum
= regnum
- tdep
->al_regnum
;
3456 /* Extract (always little endian). We read both lower and
3458 status
= regcache
->raw_read (gpnum
% 4, raw_buf
);
3459 if (status
!= REG_VALID
)
3460 mark_value_bytes_unavailable (result_value
, 0,
3461 TYPE_LENGTH (value_type (result_value
)));
3462 else if (gpnum
>= 4)
3463 memcpy (buf
, raw_buf
+ 1, 1);
3465 memcpy (buf
, raw_buf
, 1);
3468 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3472 static struct value
*
3473 i386_pseudo_register_read_value (struct gdbarch
*gdbarch
,
3474 readable_regcache
*regcache
,
3477 struct value
*result
;
3479 result
= allocate_value (register_type (gdbarch
, regnum
));
3480 VALUE_LVAL (result
) = lval_register
;
3481 VALUE_REGNUM (result
) = regnum
;
3483 i386_pseudo_register_read_into_value (gdbarch
, regcache
, regnum
, result
);
3489 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3490 int regnum
, const gdb_byte
*buf
)
3492 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3494 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3496 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3499 regcache
->raw_read (fpnum
, raw_buf
);
3500 /* ... Modify ... (always little endian). */
3501 memcpy (raw_buf
, buf
, register_size (gdbarch
, regnum
));
3503 regcache
->raw_write (fpnum
, raw_buf
);
3507 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3509 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3511 ULONGEST upper
, lower
;
3512 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3513 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3515 /* New values from input value. */
3516 regnum
-= tdep
->bnd0_regnum
;
3517 lower
= extract_unsigned_integer (buf
, size
, byte_order
);
3518 upper
= extract_unsigned_integer (buf
+ size
, size
, byte_order
);
3520 /* Fetching register buffer. */
3521 regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3526 /* Set register bits. */
3527 memcpy (raw_buf
, &lower
, 8);
3528 memcpy (raw_buf
+ 8, &upper
, 8);
3530 regcache
->raw_write (I387_BND0R_REGNUM (tdep
) + regnum
, raw_buf
);
3532 else if (i386_k_regnum_p (gdbarch
, regnum
))
3534 regnum
-= tdep
->k0_regnum
;
3536 regcache
->raw_write (tdep
->k0_regnum
+ regnum
, buf
);
3538 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3540 regnum
-= tdep
->zmm0_regnum
;
3542 if (regnum
< num_lower_zmm_regs
)
3544 /* Write lower 128bits. */
3545 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3546 /* Write upper 128bits. */
3547 regcache
->raw_write (I387_YMM0_REGNUM (tdep
) + regnum
, buf
+ 16);
3551 /* Write lower 128bits. */
3552 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
3553 - num_lower_zmm_regs
, buf
);
3554 /* Write upper 128bits. */
3555 regcache
->raw_write (I387_YMM16H_REGNUM (tdep
) + regnum
3556 - num_lower_zmm_regs
, buf
+ 16);
3558 /* Write upper 256bits. */
3559 regcache
->raw_write (tdep
->zmm0h_regnum
+ regnum
, buf
+ 32);
3561 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3563 regnum
-= tdep
->ymm0_regnum
;
3565 /* ... Write lower 128bits. */
3566 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3567 /* ... Write upper 128bits. */
3568 regcache
->raw_write (tdep
->ymm0h_regnum
+ regnum
, buf
+ 16);
3570 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3572 regnum
-= tdep
->ymm16_regnum
;
3574 /* ... Write lower 128bits. */
3575 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
, buf
);
3576 /* ... Write upper 128bits. */
3577 regcache
->raw_write (tdep
->ymm16h_regnum
+ regnum
, buf
+ 16);
3579 else if (i386_word_regnum_p (gdbarch
, regnum
))
3581 int gpnum
= regnum
- tdep
->ax_regnum
;
3584 regcache
->raw_read (gpnum
, raw_buf
);
3585 /* ... Modify ... (always little endian). */
3586 memcpy (raw_buf
, buf
, 2);
3588 regcache
->raw_write (gpnum
, raw_buf
);
3590 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3592 int gpnum
= regnum
- tdep
->al_regnum
;
3594 /* Read ... We read both lower and upper registers. */
3595 regcache
->raw_read (gpnum
% 4, raw_buf
);
3596 /* ... Modify ... (always little endian). */
3598 memcpy (raw_buf
+ 1, buf
, 1);
3600 memcpy (raw_buf
, buf
, 1);
3602 regcache
->raw_write (gpnum
% 4, raw_buf
);
3605 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3609 /* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3612 i386_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
3613 struct agent_expr
*ax
, int regnum
)
3615 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3617 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3619 /* MMX to FPU register mapping depends on current TOS. Let's just
3620 not care and collect everything... */
3623 ax_reg_mask (ax
, I387_FSTAT_REGNUM (tdep
));
3624 for (i
= 0; i
< 8; i
++)
3625 ax_reg_mask (ax
, I387_ST0_REGNUM (tdep
) + i
);
3628 else if (i386_bnd_regnum_p (gdbarch
, regnum
))
3630 regnum
-= tdep
->bnd0_regnum
;
3631 ax_reg_mask (ax
, I387_BND0R_REGNUM (tdep
) + regnum
);
3634 else if (i386_k_regnum_p (gdbarch
, regnum
))
3636 regnum
-= tdep
->k0_regnum
;
3637 ax_reg_mask (ax
, tdep
->k0_regnum
+ regnum
);
3640 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3642 regnum
-= tdep
->zmm0_regnum
;
3643 if (regnum
< num_lower_zmm_regs
)
3645 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3646 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3650 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
3651 - num_lower_zmm_regs
);
3652 ax_reg_mask (ax
, I387_YMM16H_REGNUM (tdep
) + regnum
3653 - num_lower_zmm_regs
);
3655 ax_reg_mask (ax
, tdep
->zmm0h_regnum
+ regnum
);
3658 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3660 regnum
-= tdep
->ymm0_regnum
;
3661 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3662 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3665 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3667 regnum
-= tdep
->ymm16_regnum
;
3668 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
);
3669 ax_reg_mask (ax
, tdep
->ymm16h_regnum
+ regnum
);
3672 else if (i386_word_regnum_p (gdbarch
, regnum
))
3674 int gpnum
= regnum
- tdep
->ax_regnum
;
3676 ax_reg_mask (ax
, gpnum
);
3679 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3681 int gpnum
= regnum
- tdep
->al_regnum
;
3683 ax_reg_mask (ax
, gpnum
% 4);
3687 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3692 /* Return the register number of the register allocated by GCC after
3693 REGNUM, or -1 if there is no such register. */
3696 i386_next_regnum (int regnum
)
3698 /* GCC allocates the registers in the order:
3700 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3702 Since storing a variable in %esp doesn't make any sense we return
3703 -1 for %ebp and for %esp itself. */
3704 static int next_regnum
[] =
3706 I386_EDX_REGNUM
, /* Slot for %eax. */
3707 I386_EBX_REGNUM
, /* Slot for %ecx. */
3708 I386_ECX_REGNUM
, /* Slot for %edx. */
3709 I386_ESI_REGNUM
, /* Slot for %ebx. */
3710 -1, -1, /* Slots for %esp and %ebp. */
3711 I386_EDI_REGNUM
, /* Slot for %esi. */
3712 I386_EBP_REGNUM
/* Slot for %edi. */
3715 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
3716 return next_regnum
[regnum
];
3721 /* Return nonzero if a value of type TYPE stored in register REGNUM
3722 needs any special handling. */
3725 i386_convert_register_p (struct gdbarch
*gdbarch
,
3726 int regnum
, struct type
*type
)
3728 int len
= TYPE_LENGTH (type
);
3730 /* Values may be spread across multiple registers. Most debugging
3731 formats aren't expressive enough to specify the locations, so
3732 some heuristics is involved. Right now we only handle types that
3733 have a length that is a multiple of the word size, since GCC
3734 doesn't seem to put any other types into registers. */
3735 if (len
> 4 && len
% 4 == 0)
3737 int last_regnum
= regnum
;
3741 last_regnum
= i386_next_regnum (last_regnum
);
3745 if (last_regnum
!= -1)
3749 return i387_convert_register_p (gdbarch
, regnum
, type
);
3752 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
3753 return its contents in TO. */
3756 i386_register_to_value (struct frame_info
*frame
, int regnum
,
3757 struct type
*type
, gdb_byte
*to
,
3758 int *optimizedp
, int *unavailablep
)
3760 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3761 int len
= TYPE_LENGTH (type
);
3763 if (i386_fp_regnum_p (gdbarch
, regnum
))
3764 return i387_register_to_value (frame
, regnum
, type
, to
,
3765 optimizedp
, unavailablep
);
3767 /* Read a value spread across multiple registers. */
3769 gdb_assert (len
> 4 && len
% 4 == 0);
3773 gdb_assert (regnum
!= -1);
3774 gdb_assert (register_size (gdbarch
, regnum
) == 4);
3776 if (!get_frame_register_bytes (frame
, regnum
, 0,
3777 register_size (gdbarch
, regnum
),
3778 to
, optimizedp
, unavailablep
))
3781 regnum
= i386_next_regnum (regnum
);
3786 *optimizedp
= *unavailablep
= 0;
3790 /* Write the contents FROM of a value of type TYPE into register
3791 REGNUM in frame FRAME. */
3794 i386_value_to_register (struct frame_info
*frame
, int regnum
,
3795 struct type
*type
, const gdb_byte
*from
)
3797 int len
= TYPE_LENGTH (type
);
3799 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
3801 i387_value_to_register (frame
, regnum
, type
, from
);
3805 /* Write a value spread across multiple registers. */
3807 gdb_assert (len
> 4 && len
% 4 == 0);
3811 gdb_assert (regnum
!= -1);
3812 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
3814 put_frame_register (frame
, regnum
, from
);
3815 regnum
= i386_next_regnum (regnum
);
3821 /* Supply register REGNUM from the buffer specified by GREGS and LEN
3822 in the general-purpose register set REGSET to register cache
3823 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3826 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
3827 int regnum
, const void *gregs
, size_t len
)
3829 struct gdbarch
*gdbarch
= regcache
->arch ();
3830 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3831 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
3834 gdb_assert (len
>= tdep
->sizeof_gregset
);
3836 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3838 if ((regnum
== i
|| regnum
== -1)
3839 && tdep
->gregset_reg_offset
[i
] != -1)
3840 regcache
->raw_supply (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3844 /* Collect register REGNUM from the register cache REGCACHE and store
3845 it in the buffer specified by GREGS and LEN as described by the
3846 general-purpose register set REGSET. If REGNUM is -1, do this for
3847 all registers in REGSET. */
3850 i386_collect_gregset (const struct regset
*regset
,
3851 const struct regcache
*regcache
,
3852 int regnum
, void *gregs
, size_t len
)
3854 struct gdbarch
*gdbarch
= regcache
->arch ();
3855 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3856 gdb_byte
*regs
= (gdb_byte
*) gregs
;
3859 gdb_assert (len
>= tdep
->sizeof_gregset
);
3861 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3863 if ((regnum
== i
|| regnum
== -1)
3864 && tdep
->gregset_reg_offset
[i
] != -1)
3865 regcache
->raw_collect (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3869 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
3870 in the floating-point register set REGSET to register cache
3871 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3874 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
3875 int regnum
, const void *fpregs
, size_t len
)
3877 struct gdbarch
*gdbarch
= regcache
->arch ();
3878 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3880 if (len
== I387_SIZEOF_FXSAVE
)
3882 i387_supply_fxsave (regcache
, regnum
, fpregs
);
3886 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3887 i387_supply_fsave (regcache
, regnum
, fpregs
);
3890 /* Collect register REGNUM from the register cache REGCACHE and store
3891 it in the buffer specified by FPREGS and LEN as described by the
3892 floating-point register set REGSET. If REGNUM is -1, do this for
3893 all registers in REGSET. */
3896 i386_collect_fpregset (const struct regset
*regset
,
3897 const struct regcache
*regcache
,
3898 int regnum
, void *fpregs
, size_t len
)
3900 struct gdbarch
*gdbarch
= regcache
->arch ();
3901 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3903 if (len
== I387_SIZEOF_FXSAVE
)
3905 i387_collect_fxsave (regcache
, regnum
, fpregs
);
3909 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3910 i387_collect_fsave (regcache
, regnum
, fpregs
);
3913 /* Register set definitions. */
3915 const struct regset i386_gregset
=
3917 NULL
, i386_supply_gregset
, i386_collect_gregset
3920 const struct regset i386_fpregset
=
3922 NULL
, i386_supply_fpregset
, i386_collect_fpregset
3925 /* Default iterator over core file register note sections. */
3928 i386_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
3929 iterate_over_regset_sections_cb
*cb
,
3931 const struct regcache
*regcache
)
3933 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3935 cb (".reg", tdep
->sizeof_gregset
, tdep
->sizeof_gregset
, &i386_gregset
, NULL
,
3937 if (tdep
->sizeof_fpregset
)
3938 cb (".reg2", tdep
->sizeof_fpregset
, tdep
->sizeof_fpregset
, tdep
->fpregset
,
3943 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
3946 i386_pe_skip_trampoline_code (struct frame_info
*frame
,
3947 CORE_ADDR pc
, char *name
)
3949 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3950 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3953 if (pc
&& read_memory_unsigned_integer (pc
, 2, byte_order
) == 0x25ff)
3955 unsigned long indirect
=
3956 read_memory_unsigned_integer (pc
+ 2, 4, byte_order
);
3957 struct minimal_symbol
*indsym
=
3958 indirect
? lookup_minimal_symbol_by_pc (indirect
).minsym
: 0;
3959 const char *symname
= indsym
? indsym
->linkage_name () : 0;
3963 if (startswith (symname
, "__imp_")
3964 || startswith (symname
, "_imp_"))
3966 read_memory_unsigned_integer (indirect
, 4, byte_order
);
3969 return 0; /* Not a trampoline. */
3973 /* Return whether the THIS_FRAME corresponds to a sigtramp
3977 i386_sigtramp_p (struct frame_info
*this_frame
)
3979 CORE_ADDR pc
= get_frame_pc (this_frame
);
3982 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
3983 return (name
&& strcmp ("_sigtramp", name
) == 0);
3987 /* We have two flavours of disassembly. The machinery on this page
3988 deals with switching between those. */
3991 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
3993 gdb_assert (disassembly_flavor
== att_flavor
3994 || disassembly_flavor
== intel_flavor
);
3996 info
->disassembler_options
= disassembly_flavor
;
3998 return default_print_insn (pc
, info
);
4002 /* There are a few i386 architecture variants that differ only
4003 slightly from the generic i386 target. For now, we don't give them
4004 their own source file, but include them here. As a consequence,
4005 they'll always be included. */
4007 /* System V Release 4 (SVR4). */
4009 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
4013 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
4015 CORE_ADDR pc
= get_frame_pc (this_frame
);
4018 /* The origin of these symbols is currently unknown. */
4019 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4020 return (name
&& (strcmp ("_sigreturn", name
) == 0
4021 || strcmp ("sigvechandler", name
) == 0));
4024 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4025 address of the associated sigcontext (ucontext) structure. */
4028 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
4030 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
4031 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4035 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
4036 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
4038 return read_memory_unsigned_integer (sp
+ 8, 4, byte_order
);
4043 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
4047 i386_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
4049 return (*s
== '$' /* Literal number. */
4050 || (isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement. */
4051 || (*s
== '(' && s
[1] == '%') /* Register indirection. */
4052 || (*s
== '%' && isalpha (s
[1]))); /* Register access. */
4055 /* Helper function for i386_stap_parse_special_token.
4057 This function parses operands of the form `-8+3+1(%rbp)', which
4058 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4060 Return true if the operand was parsed successfully, false
4064 i386_stap_parse_special_token_triplet (struct gdbarch
*gdbarch
,
4065 struct stap_parse_info
*p
)
4067 const char *s
= p
->arg
;
4069 if (isdigit (*s
) || *s
== '-' || *s
== '+')
4073 long displacements
[3];
4080 got_minus
[0] = false;
4086 got_minus
[0] = true;
4089 if (!isdigit ((unsigned char) *s
))
4092 displacements
[0] = strtol (s
, &endp
, 10);
4095 if (*s
!= '+' && *s
!= '-')
4097 /* We are not dealing with a triplet. */
4101 got_minus
[1] = false;
4107 got_minus
[1] = true;
4110 if (!isdigit ((unsigned char) *s
))
4113 displacements
[1] = strtol (s
, &endp
, 10);
4116 if (*s
!= '+' && *s
!= '-')
4118 /* We are not dealing with a triplet. */
4122 got_minus
[2] = false;
4128 got_minus
[2] = true;
4131 if (!isdigit ((unsigned char) *s
))
4134 displacements
[2] = strtol (s
, &endp
, 10);
4137 if (*s
!= '(' || s
[1] != '%')
4143 while (isalnum (*s
))
4149 len
= s
- start
- 1;
4150 regname
= (char *) alloca (len
+ 1);
4152 strncpy (regname
, start
, len
);
4153 regname
[len
] = '\0';
4155 if (user_reg_map_name_to_regnum (gdbarch
, regname
, len
) == -1)
4156 error (_("Invalid register name `%s' on expression `%s'."),
4157 regname
, p
->saved_arg
);
4159 for (i
= 0; i
< 3; i
++)
4161 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4163 (&p
->pstate
, builtin_type (gdbarch
)->builtin_long
);
4164 write_exp_elt_longcst (&p
->pstate
, displacements
[i
]);
4165 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4167 write_exp_elt_opcode (&p
->pstate
, UNOP_NEG
);
4170 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4173 write_exp_string (&p
->pstate
, str
);
4174 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4176 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4177 write_exp_elt_type (&p
->pstate
,
4178 builtin_type (gdbarch
)->builtin_data_ptr
);
4179 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4181 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4182 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4183 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4185 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4186 write_exp_elt_type (&p
->pstate
,
4187 lookup_pointer_type (p
->arg_type
));
4188 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4190 write_exp_elt_opcode (&p
->pstate
, UNOP_IND
);
4200 /* Helper function for i386_stap_parse_special_token.
4202 This function parses operands of the form `register base +
4203 (register index * size) + offset', as represented in
4204 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4206 Return true if the operand was parsed successfully, false
4210 i386_stap_parse_special_token_three_arg_disp (struct gdbarch
*gdbarch
,
4211 struct stap_parse_info
*p
)
4213 const char *s
= p
->arg
;
4215 if (isdigit (*s
) || *s
== '(' || *s
== '-' || *s
== '+')
4217 bool offset_minus
= false;
4219 bool size_minus
= false;
4226 struct stoken base_token
, index_token
;
4233 offset_minus
= true;
4236 if (offset_minus
&& !isdigit (*s
))
4243 offset
= strtol (s
, &endp
, 10);
4247 if (*s
!= '(' || s
[1] != '%')
4253 while (isalnum (*s
))
4256 if (*s
!= ',' || s
[1] != '%')
4259 len_base
= s
- start
;
4260 base
= (char *) alloca (len_base
+ 1);
4261 strncpy (base
, start
, len_base
);
4262 base
[len_base
] = '\0';
4264 if (user_reg_map_name_to_regnum (gdbarch
, base
, len_base
) == -1)
4265 error (_("Invalid register name `%s' on expression `%s'."),
4266 base
, p
->saved_arg
);
4271 while (isalnum (*s
))
4274 len_index
= s
- start
;
4275 index
= (char *) alloca (len_index
+ 1);
4276 strncpy (index
, start
, len_index
);
4277 index
[len_index
] = '\0';
4279 if (user_reg_map_name_to_regnum (gdbarch
, index
, len_index
) == -1)
4280 error (_("Invalid register name `%s' on expression `%s'."),
4281 index
, p
->saved_arg
);
4283 if (*s
!= ',' && *s
!= ')')
4299 size
= strtol (s
, &endp
, 10);
4310 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4311 write_exp_elt_type (&p
->pstate
,
4312 builtin_type (gdbarch
)->builtin_long
);
4313 write_exp_elt_longcst (&p
->pstate
, offset
);
4314 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4316 write_exp_elt_opcode (&p
->pstate
, UNOP_NEG
);
4319 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4320 base_token
.ptr
= base
;
4321 base_token
.length
= len_base
;
4322 write_exp_string (&p
->pstate
, base_token
);
4323 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4326 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4328 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4329 index_token
.ptr
= index
;
4330 index_token
.length
= len_index
;
4331 write_exp_string (&p
->pstate
, index_token
);
4332 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4336 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4337 write_exp_elt_type (&p
->pstate
,
4338 builtin_type (gdbarch
)->builtin_long
);
4339 write_exp_elt_longcst (&p
->pstate
, size
);
4340 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4342 write_exp_elt_opcode (&p
->pstate
, UNOP_NEG
);
4343 write_exp_elt_opcode (&p
->pstate
, BINOP_MUL
);
4346 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4348 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4349 write_exp_elt_type (&p
->pstate
,
4350 lookup_pointer_type (p
->arg_type
));
4351 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4353 write_exp_elt_opcode (&p
->pstate
, UNOP_IND
);
4363 /* Implementation of `gdbarch_stap_parse_special_token', as defined in
4367 i386_stap_parse_special_token (struct gdbarch
*gdbarch
,
4368 struct stap_parse_info
*p
)
4370 /* In order to parse special tokens, we use a state-machine that go
4371 through every known token and try to get a match. */
4375 THREE_ARG_DISPLACEMENT
,
4380 current_state
= TRIPLET
;
4382 /* The special tokens to be parsed here are:
4384 - `register base + (register index * size) + offset', as represented
4385 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4387 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4388 `*(-8 + 3 - 1 + (void *) $eax)'. */
4390 while (current_state
!= DONE
)
4392 switch (current_state
)
4395 if (i386_stap_parse_special_token_triplet (gdbarch
, p
))
4399 case THREE_ARG_DISPLACEMENT
:
4400 if (i386_stap_parse_special_token_three_arg_disp (gdbarch
, p
))
4405 /* Advancing to the next state. */
4412 /* Implementation of 'gdbarch_stap_adjust_register', as defined in
4416 i386_stap_adjust_register (struct gdbarch
*gdbarch
, struct stap_parse_info
*p
,
4417 const std::string
®name
, int regnum
)
4419 static const std::unordered_set
<std::string
> reg_assoc
4420 = { "ax", "bx", "cx", "dx",
4421 "si", "di", "bp", "sp" };
4423 /* If we are dealing with a register whose size is less than the size
4424 specified by the "[-]N@" prefix, and it is one of the registers that
4425 we know has an extended variant available, then use the extended
4426 version of the register instead. */
4427 if (register_size (gdbarch
, regnum
) < TYPE_LENGTH (p
->arg_type
)
4428 && reg_assoc
.find (regname
) != reg_assoc
.end ())
4429 return "e" + regname
;
4431 /* Otherwise, just use the requested register. */
4437 /* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4438 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4441 i386_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
4443 return "(x86_64|i.86)";
4448 /* Implement the "in_indirect_branch_thunk" gdbarch function. */
4451 i386_in_indirect_branch_thunk (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
4453 return x86_in_indirect_branch_thunk (pc
, i386_register_names
,
4454 I386_EAX_REGNUM
, I386_EIP_REGNUM
);
4460 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4462 static const char *const stap_integer_prefixes
[] = { "$", NULL
};
4463 static const char *const stap_register_prefixes
[] = { "%", NULL
};
4464 static const char *const stap_register_indirection_prefixes
[] = { "(",
4466 static const char *const stap_register_indirection_suffixes
[] = { ")",
4469 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4470 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
4472 /* Registering SystemTap handlers. */
4473 set_gdbarch_stap_integer_prefixes (gdbarch
, stap_integer_prefixes
);
4474 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
4475 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
4476 stap_register_indirection_prefixes
);
4477 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
4478 stap_register_indirection_suffixes
);
4479 set_gdbarch_stap_is_single_operand (gdbarch
,
4480 i386_stap_is_single_operand
);
4481 set_gdbarch_stap_parse_special_token (gdbarch
,
4482 i386_stap_parse_special_token
);
4483 set_gdbarch_stap_adjust_register (gdbarch
,
4484 i386_stap_adjust_register
);
4486 set_gdbarch_in_indirect_branch_thunk (gdbarch
,
4487 i386_in_indirect_branch_thunk
);
4490 /* System V Release 4 (SVR4). */
4493 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4495 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4497 /* System V Release 4 uses ELF. */
4498 i386_elf_init_abi (info
, gdbarch
);
4500 /* System V Release 4 has shared libraries. */
4501 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
4503 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
4504 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
4505 tdep
->sc_pc_offset
= 36 + 14 * 4;
4506 tdep
->sc_sp_offset
= 36 + 17 * 4;
4508 tdep
->jb_pc_offset
= 20;
4513 /* i386 register groups. In addition to the normal groups, add "mmx"
4516 static struct reggroup
*i386_sse_reggroup
;
4517 static struct reggroup
*i386_mmx_reggroup
;
4520 i386_init_reggroups (void)
4522 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
4523 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
4527 i386_add_reggroups (struct gdbarch
*gdbarch
)
4529 reggroup_add (gdbarch
, i386_sse_reggroup
);
4530 reggroup_add (gdbarch
, i386_mmx_reggroup
);
4531 reggroup_add (gdbarch
, general_reggroup
);
4532 reggroup_add (gdbarch
, float_reggroup
);
4533 reggroup_add (gdbarch
, all_reggroup
);
4534 reggroup_add (gdbarch
, save_reggroup
);
4535 reggroup_add (gdbarch
, restore_reggroup
);
4536 reggroup_add (gdbarch
, vector_reggroup
);
4537 reggroup_add (gdbarch
, system_reggroup
);
4541 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
4542 struct reggroup
*group
)
4544 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4545 int fp_regnum_p
, mmx_regnum_p
, xmm_regnum_p
, mxcsr_regnum_p
,
4546 ymm_regnum_p
, ymmh_regnum_p
, ymm_avx512_regnum_p
, ymmh_avx512_regnum_p
,
4547 bndr_regnum_p
, bnd_regnum_p
, zmm_regnum_p
, zmmh_regnum_p
,
4548 mpx_ctrl_regnum_p
, xmm_avx512_regnum_p
,
4549 avx512_p
, avx_p
, sse_p
, pkru_regnum_p
;
4551 /* Don't include pseudo registers, except for MMX, in any register
4553 if (i386_byte_regnum_p (gdbarch
, regnum
))
4556 if (i386_word_regnum_p (gdbarch
, regnum
))
4559 if (i386_dword_regnum_p (gdbarch
, regnum
))
4562 mmx_regnum_p
= i386_mmx_regnum_p (gdbarch
, regnum
);
4563 if (group
== i386_mmx_reggroup
)
4564 return mmx_regnum_p
;
4566 pkru_regnum_p
= i386_pkru_regnum_p(gdbarch
, regnum
);
4567 xmm_regnum_p
= i386_xmm_regnum_p (gdbarch
, regnum
);
4568 xmm_avx512_regnum_p
= i386_xmm_avx512_regnum_p (gdbarch
, regnum
);
4569 mxcsr_regnum_p
= i386_mxcsr_regnum_p (gdbarch
, regnum
);
4570 if (group
== i386_sse_reggroup
)
4571 return xmm_regnum_p
|| xmm_avx512_regnum_p
|| mxcsr_regnum_p
;
4573 ymm_regnum_p
= i386_ymm_regnum_p (gdbarch
, regnum
);
4574 ymm_avx512_regnum_p
= i386_ymm_avx512_regnum_p (gdbarch
, regnum
);
4575 zmm_regnum_p
= i386_zmm_regnum_p (gdbarch
, regnum
);
4577 avx512_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4578 == X86_XSTATE_AVX_AVX512_MASK
);
4579 avx_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4580 == X86_XSTATE_AVX_MASK
) && !avx512_p
;
4581 sse_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4582 == X86_XSTATE_SSE_MASK
) && !avx512_p
&& ! avx_p
;
4584 if (group
== vector_reggroup
)
4585 return (mmx_regnum_p
4586 || (zmm_regnum_p
&& avx512_p
)
4587 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && avx_p
)
4588 || ((xmm_regnum_p
|| xmm_avx512_regnum_p
) && sse_p
)
4591 fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
4592 || i386_fpc_regnum_p (gdbarch
, regnum
));
4593 if (group
== float_reggroup
)
4596 /* For "info reg all", don't include upper YMM registers nor XMM
4597 registers when AVX is supported. */
4598 ymmh_regnum_p
= i386_ymmh_regnum_p (gdbarch
, regnum
);
4599 ymmh_avx512_regnum_p
= i386_ymmh_avx512_regnum_p (gdbarch
, regnum
);
4600 zmmh_regnum_p
= i386_zmmh_regnum_p (gdbarch
, regnum
);
4601 if (group
== all_reggroup
4602 && (((xmm_regnum_p
|| xmm_avx512_regnum_p
) && !sse_p
)
4603 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && !avx_p
)
4605 || ymmh_avx512_regnum_p
4609 bnd_regnum_p
= i386_bnd_regnum_p (gdbarch
, regnum
);
4610 if (group
== all_reggroup
4611 && ((bnd_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4612 return bnd_regnum_p
;
4614 bndr_regnum_p
= i386_bndr_regnum_p (gdbarch
, regnum
);
4615 if (group
== all_reggroup
4616 && ((bndr_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4619 mpx_ctrl_regnum_p
= i386_mpx_ctrl_regnum_p (gdbarch
, regnum
);
4620 if (group
== all_reggroup
4621 && ((mpx_ctrl_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4622 return mpx_ctrl_regnum_p
;
4624 if (group
== general_reggroup
)
4625 return (!fp_regnum_p
4629 && !xmm_avx512_regnum_p
4632 && !ymm_avx512_regnum_p
4633 && !ymmh_avx512_regnum_p
4636 && !mpx_ctrl_regnum_p
4641 return default_register_reggroup_p (gdbarch
, regnum
, group
);
4645 /* Get the ARGIth function argument for the current function. */
4648 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
4651 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4652 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4653 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
4654 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4, byte_order
);
4657 #define PREFIX_REPZ 0x01
4658 #define PREFIX_REPNZ 0x02
4659 #define PREFIX_LOCK 0x04
4660 #define PREFIX_DATA 0x08
4661 #define PREFIX_ADDR 0x10
4673 /* i386 arith/logic operations */
4686 struct i386_record_s
4688 struct gdbarch
*gdbarch
;
4689 struct regcache
*regcache
;
4690 CORE_ADDR orig_addr
;
4696 uint8_t mod
, reg
, rm
;
4705 /* Parse the "modrm" part of the memory address irp->addr points at.
4706 Returns -1 if something goes wrong, 0 otherwise. */
4709 i386_record_modrm (struct i386_record_s
*irp
)
4711 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4713 if (record_read_memory (gdbarch
, irp
->addr
, &irp
->modrm
, 1))
4717 irp
->mod
= (irp
->modrm
>> 6) & 3;
4718 irp
->reg
= (irp
->modrm
>> 3) & 7;
4719 irp
->rm
= irp
->modrm
& 7;
4724 /* Extract the memory address that the current instruction writes to,
4725 and return it in *ADDR. Return -1 if something goes wrong. */
4728 i386_record_lea_modrm_addr (struct i386_record_s
*irp
, uint64_t *addr
)
4730 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4731 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4736 if (irp
->aflag
|| irp
->regmap
[X86_RECORD_R8_REGNUM
])
4743 uint8_t base
= irp
->rm
;
4748 if (record_read_memory (gdbarch
, irp
->addr
, &byte
, 1))
4751 scale
= (byte
>> 6) & 3;
4752 index
= ((byte
>> 3) & 7) | irp
->rex_x
;
4760 if ((base
& 7) == 5)
4763 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4766 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4767 if (irp
->regmap
[X86_RECORD_R8_REGNUM
] && !havesib
)
4768 *addr
+= irp
->addr
+ irp
->rip_offset
;
4772 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4775 *addr
= (int8_t) buf
[0];
4778 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4780 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4788 if (base
== 4 && irp
->popl_esp_hack
)
4789 *addr
+= irp
->popl_esp_hack
;
4790 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[base
],
4793 if (irp
->aflag
== 2)
4798 *addr
= (uint32_t) (offset64
+ *addr
);
4800 if (havesib
&& (index
!= 4 || scale
!= 0))
4802 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[index
],
4804 if (irp
->aflag
== 2)
4805 *addr
+= offset64
<< scale
;
4807 *addr
= (uint32_t) (*addr
+ (offset64
<< scale
));
4812 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4813 address from 32-bit to 64-bit. */
4814 *addr
= (uint32_t) *addr
;
4825 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4828 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4834 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4837 *addr
= (int8_t) buf
[0];
4840 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4843 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4850 regcache_raw_read_unsigned (irp
->regcache
,
4851 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4853 *addr
= (uint32_t) (*addr
+ offset64
);
4854 regcache_raw_read_unsigned (irp
->regcache
,
4855 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4857 *addr
= (uint32_t) (*addr
+ offset64
);
4860 regcache_raw_read_unsigned (irp
->regcache
,
4861 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4863 *addr
= (uint32_t) (*addr
+ offset64
);
4864 regcache_raw_read_unsigned (irp
->regcache
,
4865 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4867 *addr
= (uint32_t) (*addr
+ offset64
);
4870 regcache_raw_read_unsigned (irp
->regcache
,
4871 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4873 *addr
= (uint32_t) (*addr
+ offset64
);
4874 regcache_raw_read_unsigned (irp
->regcache
,
4875 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4877 *addr
= (uint32_t) (*addr
+ offset64
);
4880 regcache_raw_read_unsigned (irp
->regcache
,
4881 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4883 *addr
= (uint32_t) (*addr
+ offset64
);
4884 regcache_raw_read_unsigned (irp
->regcache
,
4885 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4887 *addr
= (uint32_t) (*addr
+ offset64
);
4890 regcache_raw_read_unsigned (irp
->regcache
,
4891 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4893 *addr
= (uint32_t) (*addr
+ offset64
);
4896 regcache_raw_read_unsigned (irp
->regcache
,
4897 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4899 *addr
= (uint32_t) (*addr
+ offset64
);
4902 regcache_raw_read_unsigned (irp
->regcache
,
4903 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4905 *addr
= (uint32_t) (*addr
+ offset64
);
4908 regcache_raw_read_unsigned (irp
->regcache
,
4909 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4911 *addr
= (uint32_t) (*addr
+ offset64
);
4921 /* Record the address and contents of the memory that will be changed
4922 by the current instruction. Return -1 if something goes wrong, 0
4926 i386_record_lea_modrm (struct i386_record_s
*irp
)
4928 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4931 if (irp
->override
>= 0)
4933 if (record_full_memory_query
)
4936 Process record ignores the memory change of instruction at address %s\n\
4937 because it can't get the value of the segment register.\n\
4938 Do you want to stop the program?"),
4939 paddress (gdbarch
, irp
->orig_addr
)))
4946 if (i386_record_lea_modrm_addr (irp
, &addr
))
4949 if (record_full_arch_list_add_mem (addr
, 1 << irp
->ot
))
4955 /* Record the effects of a push operation. Return -1 if something
4956 goes wrong, 0 otherwise. */
4959 i386_record_push (struct i386_record_s
*irp
, int size
)
4963 if (record_full_arch_list_add_reg (irp
->regcache
,
4964 irp
->regmap
[X86_RECORD_RESP_REGNUM
]))
4966 regcache_raw_read_unsigned (irp
->regcache
,
4967 irp
->regmap
[X86_RECORD_RESP_REGNUM
],
4969 if (record_full_arch_list_add_mem ((CORE_ADDR
) addr
- size
, size
))
4976 /* Defines contents to record. */
4977 #define I386_SAVE_FPU_REGS 0xfffd
4978 #define I386_SAVE_FPU_ENV 0xfffe
4979 #define I386_SAVE_FPU_ENV_REG_STACK 0xffff
4981 /* Record the values of the floating point registers which will be
4982 changed by the current instruction. Returns -1 if something is
4983 wrong, 0 otherwise. */
4985 static int i386_record_floats (struct gdbarch
*gdbarch
,
4986 struct i386_record_s
*ir
,
4989 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4992 /* Oza: Because of floating point insn push/pop of fpu stack is going to
4993 happen. Currently we store st0-st7 registers, but we need not store all
4994 registers all the time, in future we use ftag register and record only
4995 those who are not marked as an empty. */
4997 if (I386_SAVE_FPU_REGS
== iregnum
)
4999 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_ST0_REGNUM (tdep
) + 7; i
++)
5001 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5005 else if (I386_SAVE_FPU_ENV
== iregnum
)
5007 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
5009 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5013 else if (I386_SAVE_FPU_ENV_REG_STACK
== iregnum
)
5015 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
5017 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5021 else if ((iregnum
>= I387_ST0_REGNUM (tdep
)) &&
5022 (iregnum
<= I387_FOP_REGNUM (tdep
)))
5024 if (record_full_arch_list_add_reg (ir
->regcache
,iregnum
))
5029 /* Parameter error. */
5032 if(I386_SAVE_FPU_ENV
!= iregnum
)
5034 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
5036 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5043 /* Parse the current instruction, and record the values of the
5044 registers and memory that will be changed by the current
5045 instruction. Returns -1 if something goes wrong, 0 otherwise. */
5047 #define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
5048 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
5051 i386_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
5052 CORE_ADDR input_addr
)
5054 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
5060 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
5061 struct i386_record_s ir
;
5062 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
5066 memset (&ir
, 0, sizeof (struct i386_record_s
));
5067 ir
.regcache
= regcache
;
5068 ir
.addr
= input_addr
;
5069 ir
.orig_addr
= input_addr
;
5073 ir
.popl_esp_hack
= 0;
5074 ir
.regmap
= tdep
->record_regmap
;
5075 ir
.gdbarch
= gdbarch
;
5077 if (record_debug
> 1)
5078 fprintf_unfiltered (gdb_stdlog
, "Process record: i386_process_record "
5080 paddress (gdbarch
, ir
.addr
));
5085 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5088 switch (opcode8
) /* Instruction prefixes */
5090 case REPE_PREFIX_OPCODE
:
5091 prefixes
|= PREFIX_REPZ
;
5093 case REPNE_PREFIX_OPCODE
:
5094 prefixes
|= PREFIX_REPNZ
;
5096 case LOCK_PREFIX_OPCODE
:
5097 prefixes
|= PREFIX_LOCK
;
5099 case CS_PREFIX_OPCODE
:
5100 ir
.override
= X86_RECORD_CS_REGNUM
;
5102 case SS_PREFIX_OPCODE
:
5103 ir
.override
= X86_RECORD_SS_REGNUM
;
5105 case DS_PREFIX_OPCODE
:
5106 ir
.override
= X86_RECORD_DS_REGNUM
;
5108 case ES_PREFIX_OPCODE
:
5109 ir
.override
= X86_RECORD_ES_REGNUM
;
5111 case FS_PREFIX_OPCODE
:
5112 ir
.override
= X86_RECORD_FS_REGNUM
;
5114 case GS_PREFIX_OPCODE
:
5115 ir
.override
= X86_RECORD_GS_REGNUM
;
5117 case DATA_PREFIX_OPCODE
:
5118 prefixes
|= PREFIX_DATA
;
5120 case ADDR_PREFIX_OPCODE
:
5121 prefixes
|= PREFIX_ADDR
;
5123 case 0x40: /* i386 inc %eax */
5124 case 0x41: /* i386 inc %ecx */
5125 case 0x42: /* i386 inc %edx */
5126 case 0x43: /* i386 inc %ebx */
5127 case 0x44: /* i386 inc %esp */
5128 case 0x45: /* i386 inc %ebp */
5129 case 0x46: /* i386 inc %esi */
5130 case 0x47: /* i386 inc %edi */
5131 case 0x48: /* i386 dec %eax */
5132 case 0x49: /* i386 dec %ecx */
5133 case 0x4a: /* i386 dec %edx */
5134 case 0x4b: /* i386 dec %ebx */
5135 case 0x4c: /* i386 dec %esp */
5136 case 0x4d: /* i386 dec %ebp */
5137 case 0x4e: /* i386 dec %esi */
5138 case 0x4f: /* i386 dec %edi */
5139 if (ir
.regmap
[X86_RECORD_R8_REGNUM
]) /* 64 bit target */
5142 rex_w
= (opcode8
>> 3) & 1;
5143 rex_r
= (opcode8
& 0x4) << 1;
5144 ir
.rex_x
= (opcode8
& 0x2) << 2;
5145 ir
.rex_b
= (opcode8
& 0x1) << 3;
5147 else /* 32 bit target */
5156 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && rex_w
== 1)
5162 if (prefixes
& PREFIX_DATA
)
5165 if (prefixes
& PREFIX_ADDR
)
5167 else if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5170 /* Now check op code. */
5171 opcode
= (uint32_t) opcode8
;
5176 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5179 opcode
= (uint32_t) opcode8
| 0x0f00;
5183 case 0x00: /* arith & logic */
5231 if (((opcode
>> 3) & 7) != OP_CMPL
)
5233 if ((opcode
& 1) == 0)
5236 ir
.ot
= ir
.dflag
+ OT_WORD
;
5238 switch ((opcode
>> 1) & 3)
5240 case 0: /* OP Ev, Gv */
5241 if (i386_record_modrm (&ir
))
5245 if (i386_record_lea_modrm (&ir
))
5251 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5253 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5256 case 1: /* OP Gv, Ev */
5257 if (i386_record_modrm (&ir
))
5260 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5262 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5264 case 2: /* OP A, Iv */
5265 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5269 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5272 case 0x80: /* GRP1 */
5276 if (i386_record_modrm (&ir
))
5279 if (ir
.reg
!= OP_CMPL
)
5281 if ((opcode
& 1) == 0)
5284 ir
.ot
= ir
.dflag
+ OT_WORD
;
5291 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5292 if (i386_record_lea_modrm (&ir
))
5296 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5298 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5301 case 0x40: /* inc */
5310 case 0x48: /* dec */
5319 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 7);
5320 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5323 case 0xf6: /* GRP3 */
5325 if ((opcode
& 1) == 0)
5328 ir
.ot
= ir
.dflag
+ OT_WORD
;
5329 if (i386_record_modrm (&ir
))
5332 if (ir
.mod
!= 3 && ir
.reg
== 0)
5333 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5338 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5344 if (i386_record_lea_modrm (&ir
))
5350 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5352 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5354 if (ir
.reg
== 3) /* neg */
5355 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5361 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5362 if (ir
.ot
!= OT_BYTE
)
5363 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5364 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5368 opcode
= opcode
<< 8 | ir
.modrm
;
5374 case 0xfe: /* GRP4 */
5375 case 0xff: /* GRP5 */
5376 if (i386_record_modrm (&ir
))
5378 if (ir
.reg
>= 2 && opcode
== 0xfe)
5381 opcode
= opcode
<< 8 | ir
.modrm
;
5388 if ((opcode
& 1) == 0)
5391 ir
.ot
= ir
.dflag
+ OT_WORD
;
5394 if (i386_record_lea_modrm (&ir
))
5400 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5402 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5404 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5407 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5409 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5411 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5414 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
5415 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5417 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5421 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5424 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5426 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5431 opcode
= opcode
<< 8 | ir
.modrm
;
5437 case 0x84: /* test */
5441 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5444 case 0x98: /* CWDE/CBW */
5445 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5448 case 0x99: /* CDQ/CWD */
5449 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5450 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5453 case 0x0faf: /* imul */
5456 ir
.ot
= ir
.dflag
+ OT_WORD
;
5457 if (i386_record_modrm (&ir
))
5460 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5461 else if (opcode
== 0x6b)
5464 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5466 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5467 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5470 case 0x0fc0: /* xadd */
5472 if ((opcode
& 1) == 0)
5475 ir
.ot
= ir
.dflag
+ OT_WORD
;
5476 if (i386_record_modrm (&ir
))
5481 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5483 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5484 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5486 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5490 if (i386_record_lea_modrm (&ir
))
5492 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5494 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5496 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5499 case 0x0fb0: /* cmpxchg */
5501 if ((opcode
& 1) == 0)
5504 ir
.ot
= ir
.dflag
+ OT_WORD
;
5505 if (i386_record_modrm (&ir
))
5510 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5511 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5513 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5517 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5518 if (i386_record_lea_modrm (&ir
))
5521 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5524 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5525 if (i386_record_modrm (&ir
))
5529 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5530 an extended opcode. rdrand has bits 110 (/6) and rdseed
5531 has bits 111 (/7). */
5532 if (ir
.reg
== 6 || ir
.reg
== 7)
5534 /* The storage register is described by the 3 R/M bits, but the
5535 REX.B prefix may be used to give access to registers
5536 R8~R15. In this case ir.rex_b + R/M will give us the register
5537 in the range R8~R15.
5539 REX.W may also be used to access 64-bit registers, but we
5540 already record entire registers and not just partial bits
5542 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
+ ir
.rm
);
5543 /* These instructions also set conditional bits. */
5544 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5549 /* We don't handle this particular instruction yet. */
5551 opcode
= opcode
<< 8 | ir
.modrm
;
5555 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5556 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5557 if (i386_record_lea_modrm (&ir
))
5559 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5562 case 0x50: /* push */
5572 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5574 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5578 case 0x06: /* push es */
5579 case 0x0e: /* push cs */
5580 case 0x16: /* push ss */
5581 case 0x1e: /* push ds */
5582 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5587 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5591 case 0x0fa0: /* push fs */
5592 case 0x0fa8: /* push gs */
5593 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5598 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5602 case 0x60: /* pusha */
5603 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5608 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 4)))
5612 case 0x58: /* pop */
5620 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5621 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5624 case 0x61: /* popa */
5625 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5630 for (regnum
= X86_RECORD_REAX_REGNUM
;
5631 regnum
<= X86_RECORD_REDI_REGNUM
;
5633 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5636 case 0x8f: /* pop */
5637 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5638 ir
.ot
= ir
.dflag
? OT_QUAD
: OT_WORD
;
5640 ir
.ot
= ir
.dflag
+ OT_WORD
;
5641 if (i386_record_modrm (&ir
))
5644 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5647 ir
.popl_esp_hack
= 1 << ir
.ot
;
5648 if (i386_record_lea_modrm (&ir
))
5651 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5654 case 0xc8: /* enter */
5655 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5656 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5658 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5662 case 0xc9: /* leave */
5663 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5664 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5667 case 0x07: /* pop es */
5668 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5673 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5674 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM
);
5675 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5678 case 0x17: /* pop ss */
5679 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5684 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5685 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM
);
5686 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5689 case 0x1f: /* pop ds */
5690 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5695 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5696 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM
);
5697 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5700 case 0x0fa1: /* pop fs */
5701 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5702 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM
);
5703 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5706 case 0x0fa9: /* pop gs */
5707 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5708 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
5709 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5712 case 0x88: /* mov */
5716 if ((opcode
& 1) == 0)
5719 ir
.ot
= ir
.dflag
+ OT_WORD
;
5721 if (i386_record_modrm (&ir
))
5726 if (opcode
== 0xc6 || opcode
== 0xc7)
5727 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5728 if (i386_record_lea_modrm (&ir
))
5733 if (opcode
== 0xc6 || opcode
== 0xc7)
5735 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5737 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5741 case 0x8a: /* mov */
5743 if ((opcode
& 1) == 0)
5746 ir
.ot
= ir
.dflag
+ OT_WORD
;
5747 if (i386_record_modrm (&ir
))
5750 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5752 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5755 case 0x8c: /* mov seg */
5756 if (i386_record_modrm (&ir
))
5761 opcode
= opcode
<< 8 | ir
.modrm
;
5766 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5770 if (i386_record_lea_modrm (&ir
))
5775 case 0x8e: /* mov seg */
5776 if (i386_record_modrm (&ir
))
5781 regnum
= X86_RECORD_ES_REGNUM
;
5784 regnum
= X86_RECORD_SS_REGNUM
;
5787 regnum
= X86_RECORD_DS_REGNUM
;
5790 regnum
= X86_RECORD_FS_REGNUM
;
5793 regnum
= X86_RECORD_GS_REGNUM
;
5797 opcode
= opcode
<< 8 | ir
.modrm
;
5801 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5802 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5805 case 0x0fb6: /* movzbS */
5806 case 0x0fb7: /* movzwS */
5807 case 0x0fbe: /* movsbS */
5808 case 0x0fbf: /* movswS */
5809 if (i386_record_modrm (&ir
))
5811 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5814 case 0x8d: /* lea */
5815 if (i386_record_modrm (&ir
))
5820 opcode
= opcode
<< 8 | ir
.modrm
;
5825 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5827 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5830 case 0xa0: /* mov EAX */
5833 case 0xd7: /* xlat */
5834 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5837 case 0xa2: /* mov EAX */
5839 if (ir
.override
>= 0)
5841 if (record_full_memory_query
)
5844 Process record ignores the memory change of instruction at address %s\n\
5845 because it can't get the value of the segment register.\n\
5846 Do you want to stop the program?"),
5847 paddress (gdbarch
, ir
.orig_addr
)))
5853 if ((opcode
& 1) == 0)
5856 ir
.ot
= ir
.dflag
+ OT_WORD
;
5859 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 8))
5862 addr
= extract_unsigned_integer (buf
, 8, byte_order
);
5866 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 4))
5869 addr
= extract_unsigned_integer (buf
, 4, byte_order
);
5873 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 2))
5876 addr
= extract_unsigned_integer (buf
, 2, byte_order
);
5878 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
5883 case 0xb0: /* mov R, Ib */
5891 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir
.regmap
[X86_RECORD_R8_REGNUM
])
5892 ? ((opcode
& 0x7) | ir
.rex_b
)
5893 : ((opcode
& 0x7) & 0x3));
5896 case 0xb8: /* mov R, Iv */
5904 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5907 case 0x91: /* xchg R, EAX */
5914 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5915 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 0x7);
5918 case 0x86: /* xchg Ev, Gv */
5920 if ((opcode
& 1) == 0)
5923 ir
.ot
= ir
.dflag
+ OT_WORD
;
5924 if (i386_record_modrm (&ir
))
5929 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5931 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5935 if (i386_record_lea_modrm (&ir
))
5939 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5941 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5944 case 0xc4: /* les Gv */
5945 case 0xc5: /* lds Gv */
5946 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5952 case 0x0fb2: /* lss Gv */
5953 case 0x0fb4: /* lfs Gv */
5954 case 0x0fb5: /* lgs Gv */
5955 if (i386_record_modrm (&ir
))
5963 opcode
= opcode
<< 8 | ir
.modrm
;
5968 case 0xc4: /* les Gv */
5969 regnum
= X86_RECORD_ES_REGNUM
;
5971 case 0xc5: /* lds Gv */
5972 regnum
= X86_RECORD_DS_REGNUM
;
5974 case 0x0fb2: /* lss Gv */
5975 regnum
= X86_RECORD_SS_REGNUM
;
5977 case 0x0fb4: /* lfs Gv */
5978 regnum
= X86_RECORD_FS_REGNUM
;
5980 case 0x0fb5: /* lgs Gv */
5981 regnum
= X86_RECORD_GS_REGNUM
;
5984 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5985 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5986 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5989 case 0xc0: /* shifts */
5995 if ((opcode
& 1) == 0)
5998 ir
.ot
= ir
.dflag
+ OT_WORD
;
5999 if (i386_record_modrm (&ir
))
6001 if (ir
.mod
!= 3 && (opcode
== 0xd2 || opcode
== 0xd3))
6003 if (i386_record_lea_modrm (&ir
))
6009 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
6011 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
6013 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6020 if (i386_record_modrm (&ir
))
6024 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
))
6029 if (i386_record_lea_modrm (&ir
))
6034 case 0xd8: /* Floats. */
6042 if (i386_record_modrm (&ir
))
6044 ir
.reg
|= ((opcode
& 7) << 3);
6050 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6058 /* For fcom, ficom nothing to do. */
6064 /* For fcomp, ficomp pop FPU stack, store all. */
6065 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6092 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6093 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6094 of code, always affects st(0) register. */
6095 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6119 /* Handling fld, fild. */
6120 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6124 switch (ir
.reg
>> 4)
6127 if (record_full_arch_list_add_mem (addr64
, 4))
6131 if (record_full_arch_list_add_mem (addr64
, 8))
6137 if (record_full_arch_list_add_mem (addr64
, 2))
6143 switch (ir
.reg
>> 4)
6146 if (record_full_arch_list_add_mem (addr64
, 4))
6148 if (3 == (ir
.reg
& 7))
6150 /* For fstp m32fp. */
6151 if (i386_record_floats (gdbarch
, &ir
,
6152 I386_SAVE_FPU_REGS
))
6157 if (record_full_arch_list_add_mem (addr64
, 4))
6159 if ((3 == (ir
.reg
& 7))
6160 || (5 == (ir
.reg
& 7))
6161 || (7 == (ir
.reg
& 7)))
6163 /* For fstp insn. */
6164 if (i386_record_floats (gdbarch
, &ir
,
6165 I386_SAVE_FPU_REGS
))
6170 if (record_full_arch_list_add_mem (addr64
, 8))
6172 if (3 == (ir
.reg
& 7))
6174 /* For fstp m64fp. */
6175 if (i386_record_floats (gdbarch
, &ir
,
6176 I386_SAVE_FPU_REGS
))
6181 if ((3 <= (ir
.reg
& 7)) && (6 <= (ir
.reg
& 7)))
6183 /* For fistp, fbld, fild, fbstp. */
6184 if (i386_record_floats (gdbarch
, &ir
,
6185 I386_SAVE_FPU_REGS
))
6190 if (record_full_arch_list_add_mem (addr64
, 2))
6199 if (i386_record_floats (gdbarch
, &ir
,
6200 I386_SAVE_FPU_ENV_REG_STACK
))
6205 if (i386_record_floats (gdbarch
, &ir
, I387_FCTRL_REGNUM (tdep
)))
6210 if (i386_record_floats (gdbarch
, &ir
,
6211 I386_SAVE_FPU_ENV_REG_STACK
))
6217 if (record_full_arch_list_add_mem (addr64
, 28))
6222 if (record_full_arch_list_add_mem (addr64
, 14))
6228 if (record_full_arch_list_add_mem (addr64
, 2))
6230 /* Insn fstp, fbstp. */
6231 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6236 if (record_full_arch_list_add_mem (addr64
, 10))
6242 if (record_full_arch_list_add_mem (addr64
, 28))
6248 if (record_full_arch_list_add_mem (addr64
, 14))
6252 if (record_full_arch_list_add_mem (addr64
, 80))
6255 if (i386_record_floats (gdbarch
, &ir
,
6256 I386_SAVE_FPU_ENV_REG_STACK
))
6260 if (record_full_arch_list_add_mem (addr64
, 8))
6263 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6268 opcode
= opcode
<< 8 | ir
.modrm
;
6273 /* Opcode is an extension of modR/M byte. */
6279 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6283 if (0x0c == (ir
.modrm
>> 4))
6285 if ((ir
.modrm
& 0x0f) <= 7)
6287 if (i386_record_floats (gdbarch
, &ir
,
6288 I386_SAVE_FPU_REGS
))
6293 if (i386_record_floats (gdbarch
, &ir
,
6294 I387_ST0_REGNUM (tdep
)))
6296 /* If only st(0) is changing, then we have already
6298 if ((ir
.modrm
& 0x0f) - 0x08)
6300 if (i386_record_floats (gdbarch
, &ir
,
6301 I387_ST0_REGNUM (tdep
) +
6302 ((ir
.modrm
& 0x0f) - 0x08)))
6320 if (i386_record_floats (gdbarch
, &ir
,
6321 I387_ST0_REGNUM (tdep
)))
6339 if (i386_record_floats (gdbarch
, &ir
,
6340 I386_SAVE_FPU_REGS
))
6344 if (i386_record_floats (gdbarch
, &ir
,
6345 I387_ST0_REGNUM (tdep
)))
6347 if (i386_record_floats (gdbarch
, &ir
,
6348 I387_ST0_REGNUM (tdep
) + 1))
6355 if (0xe9 == ir
.modrm
)
6357 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6360 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6362 if (i386_record_floats (gdbarch
, &ir
,
6363 I387_ST0_REGNUM (tdep
)))
6365 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6367 if (i386_record_floats (gdbarch
, &ir
,
6368 I387_ST0_REGNUM (tdep
) +
6372 else if ((ir
.modrm
& 0x0f) - 0x08)
6374 if (i386_record_floats (gdbarch
, &ir
,
6375 I387_ST0_REGNUM (tdep
) +
6376 ((ir
.modrm
& 0x0f) - 0x08)))
6382 if (0xe3 == ir
.modrm
)
6384 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_ENV
))
6387 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6389 if (i386_record_floats (gdbarch
, &ir
,
6390 I387_ST0_REGNUM (tdep
)))
6392 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6394 if (i386_record_floats (gdbarch
, &ir
,
6395 I387_ST0_REGNUM (tdep
) +
6399 else if ((ir
.modrm
& 0x0f) - 0x08)
6401 if (i386_record_floats (gdbarch
, &ir
,
6402 I387_ST0_REGNUM (tdep
) +
6403 ((ir
.modrm
& 0x0f) - 0x08)))
6409 if ((0x0c == ir
.modrm
>> 4)
6410 || (0x0d == ir
.modrm
>> 4)
6411 || (0x0f == ir
.modrm
>> 4))
6413 if ((ir
.modrm
& 0x0f) <= 7)
6415 if (i386_record_floats (gdbarch
, &ir
,
6416 I387_ST0_REGNUM (tdep
) +
6422 if (i386_record_floats (gdbarch
, &ir
,
6423 I387_ST0_REGNUM (tdep
) +
6424 ((ir
.modrm
& 0x0f) - 0x08)))
6430 if (0x0c == ir
.modrm
>> 4)
6432 if (i386_record_floats (gdbarch
, &ir
,
6433 I387_FTAG_REGNUM (tdep
)))
6436 else if ((0x0d == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6438 if ((ir
.modrm
& 0x0f) <= 7)
6440 if (i386_record_floats (gdbarch
, &ir
,
6441 I387_ST0_REGNUM (tdep
) +
6447 if (i386_record_floats (gdbarch
, &ir
,
6448 I386_SAVE_FPU_REGS
))
6454 if ((0x0c == ir
.modrm
>> 4)
6455 || (0x0e == ir
.modrm
>> 4)
6456 || (0x0f == ir
.modrm
>> 4)
6457 || (0xd9 == ir
.modrm
))
6459 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6464 if (0xe0 == ir
.modrm
)
6466 if (record_full_arch_list_add_reg (ir
.regcache
,
6470 else if ((0x0f == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6472 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6480 case 0xa4: /* movsS */
6482 case 0xaa: /* stosS */
6484 case 0x6c: /* insS */
6486 regcache_raw_read_unsigned (ir
.regcache
,
6487 ir
.regmap
[X86_RECORD_RECX_REGNUM
],
6493 if ((opcode
& 1) == 0)
6496 ir
.ot
= ir
.dflag
+ OT_WORD
;
6497 regcache_raw_read_unsigned (ir
.regcache
,
6498 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
6501 regcache_raw_read_unsigned (ir
.regcache
,
6502 ir
.regmap
[X86_RECORD_ES_REGNUM
],
6504 regcache_raw_read_unsigned (ir
.regcache
,
6505 ir
.regmap
[X86_RECORD_DS_REGNUM
],
6507 if (ir
.aflag
&& (es
!= ds
))
6509 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6510 if (record_full_memory_query
)
6513 Process record ignores the memory change of instruction at address %s\n\
6514 because it can't get the value of the segment register.\n\
6515 Do you want to stop the program?"),
6516 paddress (gdbarch
, ir
.orig_addr
)))
6522 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
6526 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6527 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6528 if (opcode
== 0xa4 || opcode
== 0xa5)
6529 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6530 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6531 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6535 case 0xa6: /* cmpsS */
6537 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6538 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6539 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6540 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6541 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6544 case 0xac: /* lodsS */
6546 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6547 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6548 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6549 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6550 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6553 case 0xae: /* scasS */
6555 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6556 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6557 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6558 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6561 case 0x6e: /* outsS */
6563 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6564 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6565 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6566 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6569 case 0xe4: /* port I/O */
6573 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6574 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6584 case 0xc2: /* ret im */
6585 case 0xc3: /* ret */
6586 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6587 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6590 case 0xca: /* lret im */
6591 case 0xcb: /* lret */
6592 case 0xcf: /* iret */
6593 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6594 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6595 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6598 case 0xe8: /* call im */
6599 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6601 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6605 case 0x9a: /* lcall im */
6606 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6611 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6612 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6616 case 0xe9: /* jmp im */
6617 case 0xea: /* ljmp im */
6618 case 0xeb: /* jmp Jb */
6619 case 0x70: /* jcc Jb */
6635 case 0x0f80: /* jcc Jv */
6653 case 0x0f90: /* setcc Gv */
6669 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6671 if (i386_record_modrm (&ir
))
6674 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
? (ir
.rm
| ir
.rex_b
)
6678 if (i386_record_lea_modrm (&ir
))
6683 case 0x0f40: /* cmov Gv, Ev */
6699 if (i386_record_modrm (&ir
))
6702 if (ir
.dflag
== OT_BYTE
)
6704 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
6708 case 0x9c: /* pushf */
6709 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6710 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6712 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6716 case 0x9d: /* popf */
6717 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6718 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6721 case 0x9e: /* sahf */
6722 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6728 case 0xf5: /* cmc */
6729 case 0xf8: /* clc */
6730 case 0xf9: /* stc */
6731 case 0xfc: /* cld */
6732 case 0xfd: /* std */
6733 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6736 case 0x9f: /* lahf */
6737 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6742 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6743 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6746 /* bit operations */
6747 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6748 ir
.ot
= ir
.dflag
+ OT_WORD
;
6749 if (i386_record_modrm (&ir
))
6754 opcode
= opcode
<< 8 | ir
.modrm
;
6760 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6763 if (i386_record_lea_modrm (&ir
))
6767 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6770 case 0x0fa3: /* bt Gv, Ev */
6771 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6774 case 0x0fab: /* bts */
6775 case 0x0fb3: /* btr */
6776 case 0x0fbb: /* btc */
6777 ir
.ot
= ir
.dflag
+ OT_WORD
;
6778 if (i386_record_modrm (&ir
))
6781 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6785 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6787 regcache_raw_read_unsigned (ir
.regcache
,
6788 ir
.regmap
[ir
.reg
| rex_r
],
6793 addr64
+= ((int16_t) addr
>> 4) << 4;
6796 addr64
+= ((int32_t) addr
>> 5) << 5;
6799 addr64
+= ((int64_t) addr
>> 6) << 6;
6802 if (record_full_arch_list_add_mem (addr64
, 1 << ir
.ot
))
6804 if (i386_record_lea_modrm (&ir
))
6807 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6810 case 0x0fbc: /* bsf */
6811 case 0x0fbd: /* bsr */
6812 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
6813 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6817 case 0x27: /* daa */
6818 case 0x2f: /* das */
6819 case 0x37: /* aaa */
6820 case 0x3f: /* aas */
6821 case 0xd4: /* aam */
6822 case 0xd5: /* aad */
6823 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6828 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6829 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6833 case 0x90: /* nop */
6834 if (prefixes
& PREFIX_LOCK
)
6841 case 0x9b: /* fwait */
6842 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
6844 opcode
= (uint32_t) opcode8
;
6850 case 0xcc: /* int3 */
6851 printf_unfiltered (_("Process record does not support instruction "
6858 case 0xcd: /* int */
6862 if (record_read_memory (gdbarch
, ir
.addr
, &interrupt
, 1))
6865 if (interrupt
!= 0x80
6866 || tdep
->i386_intx80_record
== NULL
)
6868 printf_unfiltered (_("Process record does not support "
6869 "instruction int 0x%02x.\n"),
6874 ret
= tdep
->i386_intx80_record (ir
.regcache
);
6881 case 0xce: /* into */
6882 printf_unfiltered (_("Process record does not support "
6883 "instruction into.\n"));
6888 case 0xfa: /* cli */
6889 case 0xfb: /* sti */
6892 case 0x62: /* bound */
6893 printf_unfiltered (_("Process record does not support "
6894 "instruction bound.\n"));
6899 case 0x0fc8: /* bswap reg */
6907 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 7) | ir
.rex_b
);
6910 case 0xd6: /* salc */
6911 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6916 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6917 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6920 case 0xe0: /* loopnz */
6921 case 0xe1: /* loopz */
6922 case 0xe2: /* loop */
6923 case 0xe3: /* jecxz */
6924 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6925 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6928 case 0x0f30: /* wrmsr */
6929 printf_unfiltered (_("Process record does not support "
6930 "instruction wrmsr.\n"));
6935 case 0x0f32: /* rdmsr */
6936 printf_unfiltered (_("Process record does not support "
6937 "instruction rdmsr.\n"));
6942 case 0x0f31: /* rdtsc */
6943 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6944 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6947 case 0x0f34: /* sysenter */
6950 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6955 if (tdep
->i386_sysenter_record
== NULL
)
6957 printf_unfiltered (_("Process record does not support "
6958 "instruction sysenter.\n"));
6962 ret
= tdep
->i386_sysenter_record (ir
.regcache
);
6968 case 0x0f35: /* sysexit */
6969 printf_unfiltered (_("Process record does not support "
6970 "instruction sysexit.\n"));
6975 case 0x0f05: /* syscall */
6978 if (tdep
->i386_syscall_record
== NULL
)
6980 printf_unfiltered (_("Process record does not support "
6981 "instruction syscall.\n"));
6985 ret
= tdep
->i386_syscall_record (ir
.regcache
);
6991 case 0x0f07: /* sysret */
6992 printf_unfiltered (_("Process record does not support "
6993 "instruction sysret.\n"));
6998 case 0x0fa2: /* cpuid */
6999 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7000 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7001 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7002 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7005 case 0xf4: /* hlt */
7006 printf_unfiltered (_("Process record does not support "
7007 "instruction hlt.\n"));
7013 if (i386_record_modrm (&ir
))
7020 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7024 if (i386_record_lea_modrm (&ir
))
7033 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7037 opcode
= opcode
<< 8 | ir
.modrm
;
7044 if (i386_record_modrm (&ir
))
7055 opcode
= opcode
<< 8 | ir
.modrm
;
7058 if (ir
.override
>= 0)
7060 if (record_full_memory_query
)
7063 Process record ignores the memory change of instruction at address %s\n\
7064 because it can't get the value of the segment register.\n\
7065 Do you want to stop the program?"),
7066 paddress (gdbarch
, ir
.orig_addr
)))
7072 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7074 if (record_full_arch_list_add_mem (addr64
, 2))
7077 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7079 if (record_full_arch_list_add_mem (addr64
, 8))
7084 if (record_full_arch_list_add_mem (addr64
, 4))
7095 case 0: /* monitor */
7098 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7102 opcode
= opcode
<< 8 | ir
.modrm
;
7110 if (ir
.override
>= 0)
7112 if (record_full_memory_query
)
7115 Process record ignores the memory change of instruction at address %s\n\
7116 because it can't get the value of the segment register.\n\
7117 Do you want to stop the program?"),
7118 paddress (gdbarch
, ir
.orig_addr
)))
7126 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7128 if (record_full_arch_list_add_mem (addr64
, 2))
7131 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7133 if (record_full_arch_list_add_mem (addr64
, 8))
7138 if (record_full_arch_list_add_mem (addr64
, 4))
7150 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7151 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7155 else if (ir
.rm
== 1)
7163 opcode
= opcode
<< 8 | ir
.modrm
;
7170 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
| ir
.rex_b
))
7176 if (i386_record_lea_modrm (&ir
))
7179 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7182 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7184 case 7: /* invlpg */
7187 if (ir
.rm
== 0 && ir
.regmap
[X86_RECORD_R8_REGNUM
])
7188 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
7192 opcode
= opcode
<< 8 | ir
.modrm
;
7197 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7201 opcode
= opcode
<< 8 | ir
.modrm
;
7207 case 0x0f08: /* invd */
7208 case 0x0f09: /* wbinvd */
7211 case 0x63: /* arpl */
7212 if (i386_record_modrm (&ir
))
7214 if (ir
.mod
== 3 || ir
.regmap
[X86_RECORD_R8_REGNUM
])
7216 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.regmap
[X86_RECORD_R8_REGNUM
]
7217 ? (ir
.reg
| rex_r
) : ir
.rm
);
7221 ir
.ot
= ir
.dflag
? OT_LONG
: OT_WORD
;
7222 if (i386_record_lea_modrm (&ir
))
7225 if (!ir
.regmap
[X86_RECORD_R8_REGNUM
])
7226 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7229 case 0x0f02: /* lar */
7230 case 0x0f03: /* lsl */
7231 if (i386_record_modrm (&ir
))
7233 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7234 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7238 if (i386_record_modrm (&ir
))
7240 if (ir
.mod
== 3 && ir
.reg
== 3)
7243 opcode
= opcode
<< 8 | ir
.modrm
;
7255 /* nop (multi byte) */
7258 case 0x0f20: /* mov reg, crN */
7259 case 0x0f22: /* mov crN, reg */
7260 if (i386_record_modrm (&ir
))
7262 if ((ir
.modrm
& 0xc0) != 0xc0)
7265 opcode
= opcode
<< 8 | ir
.modrm
;
7276 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7278 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7282 opcode
= opcode
<< 8 | ir
.modrm
;
7288 case 0x0f21: /* mov reg, drN */
7289 case 0x0f23: /* mov drN, reg */
7290 if (i386_record_modrm (&ir
))
7292 if ((ir
.modrm
& 0xc0) != 0xc0 || ir
.reg
== 4
7293 || ir
.reg
== 5 || ir
.reg
>= 8)
7296 opcode
= opcode
<< 8 | ir
.modrm
;
7300 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7302 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7305 case 0x0f06: /* clts */
7306 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7309 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7311 case 0x0f0d: /* 3DNow! prefetch */
7314 case 0x0f0e: /* 3DNow! femms */
7315 case 0x0f77: /* emms */
7316 if (i386_fpc_regnum_p (gdbarch
, I387_FTAG_REGNUM(tdep
)))
7318 record_full_arch_list_add_reg (ir
.regcache
, I387_FTAG_REGNUM(tdep
));
7321 case 0x0f0f: /* 3DNow! data */
7322 if (i386_record_modrm (&ir
))
7324 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7329 case 0x0c: /* 3DNow! pi2fw */
7330 case 0x0d: /* 3DNow! pi2fd */
7331 case 0x1c: /* 3DNow! pf2iw */
7332 case 0x1d: /* 3DNow! pf2id */
7333 case 0x8a: /* 3DNow! pfnacc */
7334 case 0x8e: /* 3DNow! pfpnacc */
7335 case 0x90: /* 3DNow! pfcmpge */
7336 case 0x94: /* 3DNow! pfmin */
7337 case 0x96: /* 3DNow! pfrcp */
7338 case 0x97: /* 3DNow! pfrsqrt */
7339 case 0x9a: /* 3DNow! pfsub */
7340 case 0x9e: /* 3DNow! pfadd */
7341 case 0xa0: /* 3DNow! pfcmpgt */
7342 case 0xa4: /* 3DNow! pfmax */
7343 case 0xa6: /* 3DNow! pfrcpit1 */
7344 case 0xa7: /* 3DNow! pfrsqit1 */
7345 case 0xaa: /* 3DNow! pfsubr */
7346 case 0xae: /* 3DNow! pfacc */
7347 case 0xb0: /* 3DNow! pfcmpeq */
7348 case 0xb4: /* 3DNow! pfmul */
7349 case 0xb6: /* 3DNow! pfrcpit2 */
7350 case 0xb7: /* 3DNow! pmulhrw */
7351 case 0xbb: /* 3DNow! pswapd */
7352 case 0xbf: /* 3DNow! pavgusb */
7353 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7354 goto no_support_3dnow_data
;
7355 record_full_arch_list_add_reg (ir
.regcache
, ir
.reg
);
7359 no_support_3dnow_data
:
7360 opcode
= (opcode
<< 8) | opcode8
;
7366 case 0x0faa: /* rsm */
7367 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7368 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7369 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7370 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7371 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7372 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
7373 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
7374 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
7375 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
7379 if (i386_record_modrm (&ir
))
7383 case 0: /* fxsave */
7387 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7388 if (i386_record_lea_modrm_addr (&ir
, &tmpu64
))
7390 if (record_full_arch_list_add_mem (tmpu64
, 512))
7395 case 1: /* fxrstor */
7399 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7401 for (i
= I387_MM0_REGNUM (tdep
);
7402 i386_mmx_regnum_p (gdbarch
, i
); i
++)
7403 record_full_arch_list_add_reg (ir
.regcache
, i
);
7405 for (i
= I387_XMM0_REGNUM (tdep
);
7406 i386_xmm_regnum_p (gdbarch
, i
); i
++)
7407 record_full_arch_list_add_reg (ir
.regcache
, i
);
7409 if (i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7410 record_full_arch_list_add_reg (ir
.regcache
,
7411 I387_MXCSR_REGNUM(tdep
));
7413 for (i
= I387_ST0_REGNUM (tdep
);
7414 i386_fp_regnum_p (gdbarch
, i
); i
++)
7415 record_full_arch_list_add_reg (ir
.regcache
, i
);
7417 for (i
= I387_FCTRL_REGNUM (tdep
);
7418 i386_fpc_regnum_p (gdbarch
, i
); i
++)
7419 record_full_arch_list_add_reg (ir
.regcache
, i
);
7423 case 2: /* ldmxcsr */
7424 if (!i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7426 record_full_arch_list_add_reg (ir
.regcache
, I387_MXCSR_REGNUM(tdep
));
7429 case 3: /* stmxcsr */
7431 if (i386_record_lea_modrm (&ir
))
7435 case 5: /* lfence */
7436 case 6: /* mfence */
7437 case 7: /* sfence clflush */
7441 opcode
= (opcode
<< 8) | ir
.modrm
;
7447 case 0x0fc3: /* movnti */
7448 ir
.ot
= (ir
.dflag
== 2) ? OT_QUAD
: OT_LONG
;
7449 if (i386_record_modrm (&ir
))
7454 if (i386_record_lea_modrm (&ir
))
7458 /* Add prefix to opcode. */
7573 /* Mask out PREFIX_ADDR. */
7574 switch ((prefixes
& ~PREFIX_ADDR
))
7586 reswitch_prefix_add
:
7594 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7597 opcode
= (uint32_t) opcode8
| opcode
<< 8;
7598 goto reswitch_prefix_add
;
7601 case 0x0f10: /* movups */
7602 case 0x660f10: /* movupd */
7603 case 0xf30f10: /* movss */
7604 case 0xf20f10: /* movsd */
7605 case 0x0f12: /* movlps */
7606 case 0x660f12: /* movlpd */
7607 case 0xf30f12: /* movsldup */
7608 case 0xf20f12: /* movddup */
7609 case 0x0f14: /* unpcklps */
7610 case 0x660f14: /* unpcklpd */
7611 case 0x0f15: /* unpckhps */
7612 case 0x660f15: /* unpckhpd */
7613 case 0x0f16: /* movhps */
7614 case 0x660f16: /* movhpd */
7615 case 0xf30f16: /* movshdup */
7616 case 0x0f28: /* movaps */
7617 case 0x660f28: /* movapd */
7618 case 0x0f2a: /* cvtpi2ps */
7619 case 0x660f2a: /* cvtpi2pd */
7620 case 0xf30f2a: /* cvtsi2ss */
7621 case 0xf20f2a: /* cvtsi2sd */
7622 case 0x0f2c: /* cvttps2pi */
7623 case 0x660f2c: /* cvttpd2pi */
7624 case 0x0f2d: /* cvtps2pi */
7625 case 0x660f2d: /* cvtpd2pi */
7626 case 0x660f3800: /* pshufb */
7627 case 0x660f3801: /* phaddw */
7628 case 0x660f3802: /* phaddd */
7629 case 0x660f3803: /* phaddsw */
7630 case 0x660f3804: /* pmaddubsw */
7631 case 0x660f3805: /* phsubw */
7632 case 0x660f3806: /* phsubd */
7633 case 0x660f3807: /* phsubsw */
7634 case 0x660f3808: /* psignb */
7635 case 0x660f3809: /* psignw */
7636 case 0x660f380a: /* psignd */
7637 case 0x660f380b: /* pmulhrsw */
7638 case 0x660f3810: /* pblendvb */
7639 case 0x660f3814: /* blendvps */
7640 case 0x660f3815: /* blendvpd */
7641 case 0x660f381c: /* pabsb */
7642 case 0x660f381d: /* pabsw */
7643 case 0x660f381e: /* pabsd */
7644 case 0x660f3820: /* pmovsxbw */
7645 case 0x660f3821: /* pmovsxbd */
7646 case 0x660f3822: /* pmovsxbq */
7647 case 0x660f3823: /* pmovsxwd */
7648 case 0x660f3824: /* pmovsxwq */
7649 case 0x660f3825: /* pmovsxdq */
7650 case 0x660f3828: /* pmuldq */
7651 case 0x660f3829: /* pcmpeqq */
7652 case 0x660f382a: /* movntdqa */
7653 case 0x660f3a08: /* roundps */
7654 case 0x660f3a09: /* roundpd */
7655 case 0x660f3a0a: /* roundss */
7656 case 0x660f3a0b: /* roundsd */
7657 case 0x660f3a0c: /* blendps */
7658 case 0x660f3a0d: /* blendpd */
7659 case 0x660f3a0e: /* pblendw */
7660 case 0x660f3a0f: /* palignr */
7661 case 0x660f3a20: /* pinsrb */
7662 case 0x660f3a21: /* insertps */
7663 case 0x660f3a22: /* pinsrd pinsrq */
7664 case 0x660f3a40: /* dpps */
7665 case 0x660f3a41: /* dppd */
7666 case 0x660f3a42: /* mpsadbw */
7667 case 0x660f3a60: /* pcmpestrm */
7668 case 0x660f3a61: /* pcmpestri */
7669 case 0x660f3a62: /* pcmpistrm */
7670 case 0x660f3a63: /* pcmpistri */
7671 case 0x0f51: /* sqrtps */
7672 case 0x660f51: /* sqrtpd */
7673 case 0xf20f51: /* sqrtsd */
7674 case 0xf30f51: /* sqrtss */
7675 case 0x0f52: /* rsqrtps */
7676 case 0xf30f52: /* rsqrtss */
7677 case 0x0f53: /* rcpps */
7678 case 0xf30f53: /* rcpss */
7679 case 0x0f54: /* andps */
7680 case 0x660f54: /* andpd */
7681 case 0x0f55: /* andnps */
7682 case 0x660f55: /* andnpd */
7683 case 0x0f56: /* orps */
7684 case 0x660f56: /* orpd */
7685 case 0x0f57: /* xorps */
7686 case 0x660f57: /* xorpd */
7687 case 0x0f58: /* addps */
7688 case 0x660f58: /* addpd */
7689 case 0xf20f58: /* addsd */
7690 case 0xf30f58: /* addss */
7691 case 0x0f59: /* mulps */
7692 case 0x660f59: /* mulpd */
7693 case 0xf20f59: /* mulsd */
7694 case 0xf30f59: /* mulss */
7695 case 0x0f5a: /* cvtps2pd */
7696 case 0x660f5a: /* cvtpd2ps */
7697 case 0xf20f5a: /* cvtsd2ss */
7698 case 0xf30f5a: /* cvtss2sd */
7699 case 0x0f5b: /* cvtdq2ps */
7700 case 0x660f5b: /* cvtps2dq */
7701 case 0xf30f5b: /* cvttps2dq */
7702 case 0x0f5c: /* subps */
7703 case 0x660f5c: /* subpd */
7704 case 0xf20f5c: /* subsd */
7705 case 0xf30f5c: /* subss */
7706 case 0x0f5d: /* minps */
7707 case 0x660f5d: /* minpd */
7708 case 0xf20f5d: /* minsd */
7709 case 0xf30f5d: /* minss */
7710 case 0x0f5e: /* divps */
7711 case 0x660f5e: /* divpd */
7712 case 0xf20f5e: /* divsd */
7713 case 0xf30f5e: /* divss */
7714 case 0x0f5f: /* maxps */
7715 case 0x660f5f: /* maxpd */
7716 case 0xf20f5f: /* maxsd */
7717 case 0xf30f5f: /* maxss */
7718 case 0x660f60: /* punpcklbw */
7719 case 0x660f61: /* punpcklwd */
7720 case 0x660f62: /* punpckldq */
7721 case 0x660f63: /* packsswb */
7722 case 0x660f64: /* pcmpgtb */
7723 case 0x660f65: /* pcmpgtw */
7724 case 0x660f66: /* pcmpgtd */
7725 case 0x660f67: /* packuswb */
7726 case 0x660f68: /* punpckhbw */
7727 case 0x660f69: /* punpckhwd */
7728 case 0x660f6a: /* punpckhdq */
7729 case 0x660f6b: /* packssdw */
7730 case 0x660f6c: /* punpcklqdq */
7731 case 0x660f6d: /* punpckhqdq */
7732 case 0x660f6e: /* movd */
7733 case 0x660f6f: /* movdqa */
7734 case 0xf30f6f: /* movdqu */
7735 case 0x660f70: /* pshufd */
7736 case 0xf20f70: /* pshuflw */
7737 case 0xf30f70: /* pshufhw */
7738 case 0x660f74: /* pcmpeqb */
7739 case 0x660f75: /* pcmpeqw */
7740 case 0x660f76: /* pcmpeqd */
7741 case 0x660f7c: /* haddpd */
7742 case 0xf20f7c: /* haddps */
7743 case 0x660f7d: /* hsubpd */
7744 case 0xf20f7d: /* hsubps */
7745 case 0xf30f7e: /* movq */
7746 case 0x0fc2: /* cmpps */
7747 case 0x660fc2: /* cmppd */
7748 case 0xf20fc2: /* cmpsd */
7749 case 0xf30fc2: /* cmpss */
7750 case 0x660fc4: /* pinsrw */
7751 case 0x0fc6: /* shufps */
7752 case 0x660fc6: /* shufpd */
7753 case 0x660fd0: /* addsubpd */
7754 case 0xf20fd0: /* addsubps */
7755 case 0x660fd1: /* psrlw */
7756 case 0x660fd2: /* psrld */
7757 case 0x660fd3: /* psrlq */
7758 case 0x660fd4: /* paddq */
7759 case 0x660fd5: /* pmullw */
7760 case 0xf30fd6: /* movq2dq */
7761 case 0x660fd8: /* psubusb */
7762 case 0x660fd9: /* psubusw */
7763 case 0x660fda: /* pminub */
7764 case 0x660fdb: /* pand */
7765 case 0x660fdc: /* paddusb */
7766 case 0x660fdd: /* paddusw */
7767 case 0x660fde: /* pmaxub */
7768 case 0x660fdf: /* pandn */
7769 case 0x660fe0: /* pavgb */
7770 case 0x660fe1: /* psraw */
7771 case 0x660fe2: /* psrad */
7772 case 0x660fe3: /* pavgw */
7773 case 0x660fe4: /* pmulhuw */
7774 case 0x660fe5: /* pmulhw */
7775 case 0x660fe6: /* cvttpd2dq */
7776 case 0xf20fe6: /* cvtpd2dq */
7777 case 0xf30fe6: /* cvtdq2pd */
7778 case 0x660fe8: /* psubsb */
7779 case 0x660fe9: /* psubsw */
7780 case 0x660fea: /* pminsw */
7781 case 0x660feb: /* por */
7782 case 0x660fec: /* paddsb */
7783 case 0x660fed: /* paddsw */
7784 case 0x660fee: /* pmaxsw */
7785 case 0x660fef: /* pxor */
7786 case 0xf20ff0: /* lddqu */
7787 case 0x660ff1: /* psllw */
7788 case 0x660ff2: /* pslld */
7789 case 0x660ff3: /* psllq */
7790 case 0x660ff4: /* pmuludq */
7791 case 0x660ff5: /* pmaddwd */
7792 case 0x660ff6: /* psadbw */
7793 case 0x660ff8: /* psubb */
7794 case 0x660ff9: /* psubw */
7795 case 0x660ffa: /* psubd */
7796 case 0x660ffb: /* psubq */
7797 case 0x660ffc: /* paddb */
7798 case 0x660ffd: /* paddw */
7799 case 0x660ffe: /* paddd */
7800 if (i386_record_modrm (&ir
))
7803 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.reg
))
7805 record_full_arch_list_add_reg (ir
.regcache
,
7806 I387_XMM0_REGNUM (tdep
) + ir
.reg
);
7807 if ((opcode
& 0xfffffffc) == 0x660f3a60)
7808 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7811 case 0x0f11: /* movups */
7812 case 0x660f11: /* movupd */
7813 case 0xf30f11: /* movss */
7814 case 0xf20f11: /* movsd */
7815 case 0x0f13: /* movlps */
7816 case 0x660f13: /* movlpd */
7817 case 0x0f17: /* movhps */
7818 case 0x660f17: /* movhpd */
7819 case 0x0f29: /* movaps */
7820 case 0x660f29: /* movapd */
7821 case 0x660f3a14: /* pextrb */
7822 case 0x660f3a15: /* pextrw */
7823 case 0x660f3a16: /* pextrd pextrq */
7824 case 0x660f3a17: /* extractps */
7825 case 0x660f7f: /* movdqa */
7826 case 0xf30f7f: /* movdqu */
7827 if (i386_record_modrm (&ir
))
7831 if (opcode
== 0x0f13 || opcode
== 0x660f13
7832 || opcode
== 0x0f17 || opcode
== 0x660f17)
7835 if (!i386_xmm_regnum_p (gdbarch
,
7836 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7838 record_full_arch_list_add_reg (ir
.regcache
,
7839 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7861 if (i386_record_lea_modrm (&ir
))
7866 case 0x0f2b: /* movntps */
7867 case 0x660f2b: /* movntpd */
7868 case 0x0fe7: /* movntq */
7869 case 0x660fe7: /* movntdq */
7872 if (opcode
== 0x0fe7)
7876 if (i386_record_lea_modrm (&ir
))
7880 case 0xf30f2c: /* cvttss2si */
7881 case 0xf20f2c: /* cvttsd2si */
7882 case 0xf30f2d: /* cvtss2si */
7883 case 0xf20f2d: /* cvtsd2si */
7884 case 0xf20f38f0: /* crc32 */
7885 case 0xf20f38f1: /* crc32 */
7886 case 0x0f50: /* movmskps */
7887 case 0x660f50: /* movmskpd */
7888 case 0x0fc5: /* pextrw */
7889 case 0x660fc5: /* pextrw */
7890 case 0x0fd7: /* pmovmskb */
7891 case 0x660fd7: /* pmovmskb */
7892 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7895 case 0x0f3800: /* pshufb */
7896 case 0x0f3801: /* phaddw */
7897 case 0x0f3802: /* phaddd */
7898 case 0x0f3803: /* phaddsw */
7899 case 0x0f3804: /* pmaddubsw */
7900 case 0x0f3805: /* phsubw */
7901 case 0x0f3806: /* phsubd */
7902 case 0x0f3807: /* phsubsw */
7903 case 0x0f3808: /* psignb */
7904 case 0x0f3809: /* psignw */
7905 case 0x0f380a: /* psignd */
7906 case 0x0f380b: /* pmulhrsw */
7907 case 0x0f381c: /* pabsb */
7908 case 0x0f381d: /* pabsw */
7909 case 0x0f381e: /* pabsd */
7910 case 0x0f382b: /* packusdw */
7911 case 0x0f3830: /* pmovzxbw */
7912 case 0x0f3831: /* pmovzxbd */
7913 case 0x0f3832: /* pmovzxbq */
7914 case 0x0f3833: /* pmovzxwd */
7915 case 0x0f3834: /* pmovzxwq */
7916 case 0x0f3835: /* pmovzxdq */
7917 case 0x0f3837: /* pcmpgtq */
7918 case 0x0f3838: /* pminsb */
7919 case 0x0f3839: /* pminsd */
7920 case 0x0f383a: /* pminuw */
7921 case 0x0f383b: /* pminud */
7922 case 0x0f383c: /* pmaxsb */
7923 case 0x0f383d: /* pmaxsd */
7924 case 0x0f383e: /* pmaxuw */
7925 case 0x0f383f: /* pmaxud */
7926 case 0x0f3840: /* pmulld */
7927 case 0x0f3841: /* phminposuw */
7928 case 0x0f3a0f: /* palignr */
7929 case 0x0f60: /* punpcklbw */
7930 case 0x0f61: /* punpcklwd */
7931 case 0x0f62: /* punpckldq */
7932 case 0x0f63: /* packsswb */
7933 case 0x0f64: /* pcmpgtb */
7934 case 0x0f65: /* pcmpgtw */
7935 case 0x0f66: /* pcmpgtd */
7936 case 0x0f67: /* packuswb */
7937 case 0x0f68: /* punpckhbw */
7938 case 0x0f69: /* punpckhwd */
7939 case 0x0f6a: /* punpckhdq */
7940 case 0x0f6b: /* packssdw */
7941 case 0x0f6e: /* movd */
7942 case 0x0f6f: /* movq */
7943 case 0x0f70: /* pshufw */
7944 case 0x0f74: /* pcmpeqb */
7945 case 0x0f75: /* pcmpeqw */
7946 case 0x0f76: /* pcmpeqd */
7947 case 0x0fc4: /* pinsrw */
7948 case 0x0fd1: /* psrlw */
7949 case 0x0fd2: /* psrld */
7950 case 0x0fd3: /* psrlq */
7951 case 0x0fd4: /* paddq */
7952 case 0x0fd5: /* pmullw */
7953 case 0xf20fd6: /* movdq2q */
7954 case 0x0fd8: /* psubusb */
7955 case 0x0fd9: /* psubusw */
7956 case 0x0fda: /* pminub */
7957 case 0x0fdb: /* pand */
7958 case 0x0fdc: /* paddusb */
7959 case 0x0fdd: /* paddusw */
7960 case 0x0fde: /* pmaxub */
7961 case 0x0fdf: /* pandn */
7962 case 0x0fe0: /* pavgb */
7963 case 0x0fe1: /* psraw */
7964 case 0x0fe2: /* psrad */
7965 case 0x0fe3: /* pavgw */
7966 case 0x0fe4: /* pmulhuw */
7967 case 0x0fe5: /* pmulhw */
7968 case 0x0fe8: /* psubsb */
7969 case 0x0fe9: /* psubsw */
7970 case 0x0fea: /* pminsw */
7971 case 0x0feb: /* por */
7972 case 0x0fec: /* paddsb */
7973 case 0x0fed: /* paddsw */
7974 case 0x0fee: /* pmaxsw */
7975 case 0x0fef: /* pxor */
7976 case 0x0ff1: /* psllw */
7977 case 0x0ff2: /* pslld */
7978 case 0x0ff3: /* psllq */
7979 case 0x0ff4: /* pmuludq */
7980 case 0x0ff5: /* pmaddwd */
7981 case 0x0ff6: /* psadbw */
7982 case 0x0ff8: /* psubb */
7983 case 0x0ff9: /* psubw */
7984 case 0x0ffa: /* psubd */
7985 case 0x0ffb: /* psubq */
7986 case 0x0ffc: /* paddb */
7987 case 0x0ffd: /* paddw */
7988 case 0x0ffe: /* paddd */
7989 if (i386_record_modrm (&ir
))
7991 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7993 record_full_arch_list_add_reg (ir
.regcache
,
7994 I387_MM0_REGNUM (tdep
) + ir
.reg
);
7997 case 0x0f71: /* psllw */
7998 case 0x0f72: /* pslld */
7999 case 0x0f73: /* psllq */
8000 if (i386_record_modrm (&ir
))
8002 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
8004 record_full_arch_list_add_reg (ir
.regcache
,
8005 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8008 case 0x660f71: /* psllw */
8009 case 0x660f72: /* pslld */
8010 case 0x660f73: /* psllq */
8011 if (i386_record_modrm (&ir
))
8014 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8016 record_full_arch_list_add_reg (ir
.regcache
,
8017 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8020 case 0x0f7e: /* movd */
8021 case 0x660f7e: /* movd */
8022 if (i386_record_modrm (&ir
))
8025 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
8032 if (i386_record_lea_modrm (&ir
))
8037 case 0x0f7f: /* movq */
8038 if (i386_record_modrm (&ir
))
8042 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
8044 record_full_arch_list_add_reg (ir
.regcache
,
8045 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8050 if (i386_record_lea_modrm (&ir
))
8055 case 0xf30fb8: /* popcnt */
8056 if (i386_record_modrm (&ir
))
8058 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
8059 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8062 case 0x660fd6: /* movq */
8063 if (i386_record_modrm (&ir
))
8068 if (!i386_xmm_regnum_p (gdbarch
,
8069 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8071 record_full_arch_list_add_reg (ir
.regcache
,
8072 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8077 if (i386_record_lea_modrm (&ir
))
8082 case 0x660f3817: /* ptest */
8083 case 0x0f2e: /* ucomiss */
8084 case 0x660f2e: /* ucomisd */
8085 case 0x0f2f: /* comiss */
8086 case 0x660f2f: /* comisd */
8087 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8090 case 0x0ff7: /* maskmovq */
8091 regcache_raw_read_unsigned (ir
.regcache
,
8092 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8094 if (record_full_arch_list_add_mem (addr
, 64))
8098 case 0x660ff7: /* maskmovdqu */
8099 regcache_raw_read_unsigned (ir
.regcache
,
8100 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8102 if (record_full_arch_list_add_mem (addr
, 128))
8117 /* In the future, maybe still need to deal with need_dasm. */
8118 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM
);
8119 if (record_full_arch_list_add_end ())
8125 printf_unfiltered (_("Process record does not support instruction 0x%02x "
8126 "at address %s.\n"),
8127 (unsigned int) (opcode
),
8128 paddress (gdbarch
, ir
.orig_addr
));
8132 static const int i386_record_regmap
[] =
8134 I386_EAX_REGNUM
, I386_ECX_REGNUM
, I386_EDX_REGNUM
, I386_EBX_REGNUM
,
8135 I386_ESP_REGNUM
, I386_EBP_REGNUM
, I386_ESI_REGNUM
, I386_EDI_REGNUM
,
8136 0, 0, 0, 0, 0, 0, 0, 0,
8137 I386_EIP_REGNUM
, I386_EFLAGS_REGNUM
, I386_CS_REGNUM
, I386_SS_REGNUM
,
8138 I386_DS_REGNUM
, I386_ES_REGNUM
, I386_FS_REGNUM
, I386_GS_REGNUM
8141 /* Check that the given address appears suitable for a fast
8142 tracepoint, which on x86-64 means that we need an instruction of at
8143 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8144 jump and not have to worry about program jumps to an address in the
8145 middle of the tracepoint jump. On x86, it may be possible to use
8146 4-byte jumps with a 2-byte offset to a trampoline located in the
8147 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8148 of instruction to replace, and 0 if not, plus an explanatory
8152 i386_fast_tracepoint_valid_at (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
8157 /* Ask the target for the minimum instruction length supported. */
8158 jumplen
= target_get_min_fast_tracepoint_insn_len ();
8162 /* If the target does not support the get_min_fast_tracepoint_insn_len
8163 operation, assume that fast tracepoints will always be implemented
8164 using 4-byte relative jumps on both x86 and x86-64. */
8167 else if (jumplen
== 0)
8169 /* If the target does support get_min_fast_tracepoint_insn_len but
8170 returns zero, then the IPA has not loaded yet. In this case,
8171 we optimistically assume that truncated 2-byte relative jumps
8172 will be available on x86, and compensate later if this assumption
8173 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8174 jumps will always be used. */
8175 jumplen
= (register_size (gdbarch
, 0) == 8) ? 5 : 4;
8178 /* Check for fit. */
8179 len
= gdb_insn_length (gdbarch
, addr
);
8183 /* Return a bit of target-specific detail to add to the caller's
8184 generic failure message. */
8186 *msg
= string_printf (_("; instruction is only %d bytes long, "
8187 "need at least %d bytes for the jump"),
8199 /* Return a floating-point format for a floating-point variable of
8200 length LEN in bits. If non-NULL, NAME is the name of its type.
8201 If no suitable type is found, return NULL. */
8203 static const struct floatformat
**
8204 i386_floatformat_for_type (struct gdbarch
*gdbarch
,
8205 const char *name
, int len
)
8207 if (len
== 128 && name
)
8208 if (strcmp (name
, "__float128") == 0
8209 || strcmp (name
, "_Float128") == 0
8210 || strcmp (name
, "complex _Float128") == 0
8211 || strcmp (name
, "complex(kind=16)") == 0
8212 || strcmp (name
, "real(kind=16)") == 0)
8213 return floatformats_ia64_quad
;
8215 return default_floatformat_for_type (gdbarch
, name
, len
);
8219 i386_validate_tdesc_p (struct gdbarch_tdep
*tdep
,
8220 struct tdesc_arch_data
*tdesc_data
)
8222 const struct target_desc
*tdesc
= tdep
->tdesc
;
8223 const struct tdesc_feature
*feature_core
;
8225 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8226 *feature_avx512
, *feature_pkeys
, *feature_segments
;
8227 int i
, num_regs
, valid_p
;
8229 if (! tdesc_has_registers (tdesc
))
8232 /* Get core registers. */
8233 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8234 if (feature_core
== NULL
)
8237 /* Get SSE registers. */
8238 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8240 /* Try AVX registers. */
8241 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8243 /* Try MPX registers. */
8244 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8246 /* Try AVX512 registers. */
8247 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8249 /* Try segment base registers. */
8250 feature_segments
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.segments");
8253 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8257 /* The XCR0 bits. */
8260 /* AVX512 register description requires AVX register description. */
8264 tdep
->xcr0
= X86_XSTATE_AVX_AVX512_MASK
;
8266 /* It may have been set by OSABI initialization function. */
8267 if (tdep
->k0_regnum
< 0)
8269 tdep
->k_register_names
= i386_k_names
;
8270 tdep
->k0_regnum
= I386_K0_REGNUM
;
8273 for (i
= 0; i
< I387_NUM_K_REGS
; i
++)
8274 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8275 tdep
->k0_regnum
+ i
,
8278 if (tdep
->num_zmm_regs
== 0)
8280 tdep
->zmmh_register_names
= i386_zmmh_names
;
8281 tdep
->num_zmm_regs
= 8;
8282 tdep
->zmm0h_regnum
= I386_ZMM0H_REGNUM
;
8285 for (i
= 0; i
< tdep
->num_zmm_regs
; i
++)
8286 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8287 tdep
->zmm0h_regnum
+ i
,
8288 tdep
->zmmh_register_names
[i
]);
8290 for (i
= 0; i
< tdep
->num_xmm_avx512_regs
; i
++)
8291 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8292 tdep
->xmm16_regnum
+ i
,
8293 tdep
->xmm_avx512_register_names
[i
]);
8295 for (i
= 0; i
< tdep
->num_ymm_avx512_regs
; i
++)
8296 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8297 tdep
->ymm16h_regnum
+ i
,
8298 tdep
->ymm16h_register_names
[i
]);
8302 /* AVX register description requires SSE register description. */
8306 if (!feature_avx512
)
8307 tdep
->xcr0
= X86_XSTATE_AVX_MASK
;
8309 /* It may have been set by OSABI initialization function. */
8310 if (tdep
->num_ymm_regs
== 0)
8312 tdep
->ymmh_register_names
= i386_ymmh_names
;
8313 tdep
->num_ymm_regs
= 8;
8314 tdep
->ymm0h_regnum
= I386_YMM0H_REGNUM
;
8317 for (i
= 0; i
< tdep
->num_ymm_regs
; i
++)
8318 valid_p
&= tdesc_numbered_register (feature_avx
, tdesc_data
,
8319 tdep
->ymm0h_regnum
+ i
,
8320 tdep
->ymmh_register_names
[i
]);
8322 else if (feature_sse
)
8323 tdep
->xcr0
= X86_XSTATE_SSE_MASK
;
8326 tdep
->xcr0
= X86_XSTATE_X87_MASK
;
8327 tdep
->num_xmm_regs
= 0;
8330 num_regs
= tdep
->num_core_regs
;
8331 for (i
= 0; i
< num_regs
; i
++)
8332 valid_p
&= tdesc_numbered_register (feature_core
, tdesc_data
, i
,
8333 tdep
->register_names
[i
]);
8337 /* Need to include %mxcsr, so add one. */
8338 num_regs
+= tdep
->num_xmm_regs
+ 1;
8339 for (; i
< num_regs
; i
++)
8340 valid_p
&= tdesc_numbered_register (feature_sse
, tdesc_data
, i
,
8341 tdep
->register_names
[i
]);
8346 tdep
->xcr0
|= X86_XSTATE_MPX_MASK
;
8348 if (tdep
->bnd0r_regnum
< 0)
8350 tdep
->mpx_register_names
= i386_mpx_names
;
8351 tdep
->bnd0r_regnum
= I386_BND0R_REGNUM
;
8352 tdep
->bndcfgu_regnum
= I386_BNDCFGU_REGNUM
;
8355 for (i
= 0; i
< I387_NUM_MPX_REGS
; i
++)
8356 valid_p
&= tdesc_numbered_register (feature_mpx
, tdesc_data
,
8357 I387_BND0R_REGNUM (tdep
) + i
,
8358 tdep
->mpx_register_names
[i
]);
8361 if (feature_segments
)
8363 if (tdep
->fsbase_regnum
< 0)
8364 tdep
->fsbase_regnum
= I386_FSBASE_REGNUM
;
8365 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8366 tdep
->fsbase_regnum
, "fs_base");
8367 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8368 tdep
->fsbase_regnum
+ 1, "gs_base");
8373 tdep
->xcr0
|= X86_XSTATE_PKRU
;
8374 if (tdep
->pkru_regnum
< 0)
8376 tdep
->pkeys_register_names
= i386_pkeys_names
;
8377 tdep
->pkru_regnum
= I386_PKRU_REGNUM
;
8378 tdep
->num_pkeys_regs
= 1;
8381 for (i
= 0; i
< I387_NUM_PKEYS_REGS
; i
++)
8382 valid_p
&= tdesc_numbered_register (feature_pkeys
, tdesc_data
,
8383 I387_PKRU_REGNUM (tdep
) + i
,
8384 tdep
->pkeys_register_names
[i
]);
8392 /* Implement the type_align gdbarch function. */
8395 i386_type_align (struct gdbarch
*gdbarch
, struct type
*type
)
8397 type
= check_typedef (type
);
8399 if (gdbarch_ptr_bit (gdbarch
) == 32)
8401 if ((type
->code () == TYPE_CODE_INT
8402 || type
->code () == TYPE_CODE_FLT
)
8403 && TYPE_LENGTH (type
) > 4)
8406 /* Handle x86's funny long double. */
8407 if (type
->code () == TYPE_CODE_FLT
8408 && gdbarch_long_double_bit (gdbarch
) == TYPE_LENGTH (type
) * 8)
8416 /* Note: This is called for both i386 and amd64. */
8418 static struct gdbarch
*
8419 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
8421 struct gdbarch_tdep
*tdep
;
8422 struct gdbarch
*gdbarch
;
8423 struct tdesc_arch_data
*tdesc_data
;
8424 const struct target_desc
*tdesc
;
8430 /* If there is already a candidate, use it. */
8431 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
8433 return arches
->gdbarch
;
8435 /* Allocate space for the new architecture. Assume i386 for now. */
8436 tdep
= XCNEW (struct gdbarch_tdep
);
8437 gdbarch
= gdbarch_alloc (&info
, tdep
);
8439 /* General-purpose registers. */
8440 tdep
->gregset_reg_offset
= NULL
;
8441 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
8442 tdep
->sizeof_gregset
= 0;
8444 /* Floating-point registers. */
8445 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
8446 tdep
->fpregset
= &i386_fpregset
;
8448 /* The default settings include the FPU registers, the MMX registers
8449 and the SSE registers. This can be overridden for a specific ABI
8450 by adjusting the members `st0_regnum', `mm0_regnum' and
8451 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8452 will show up in the output of "info all-registers". */
8454 tdep
->st0_regnum
= I386_ST0_REGNUM
;
8456 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8457 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
8459 tdep
->jb_pc_offset
= -1;
8460 tdep
->struct_return
= pcc_struct_return
;
8461 tdep
->sigtramp_start
= 0;
8462 tdep
->sigtramp_end
= 0;
8463 tdep
->sigtramp_p
= i386_sigtramp_p
;
8464 tdep
->sigcontext_addr
= NULL
;
8465 tdep
->sc_reg_offset
= NULL
;
8466 tdep
->sc_pc_offset
= -1;
8467 tdep
->sc_sp_offset
= -1;
8469 tdep
->xsave_xcr0_offset
= -1;
8471 tdep
->record_regmap
= i386_record_regmap
;
8473 set_gdbarch_type_align (gdbarch
, i386_type_align
);
8475 /* The format used for `long double' on almost all i386 targets is
8476 the i387 extended floating-point format. In fact, of all targets
8477 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8478 on having a `long double' that's not `long' at all. */
8479 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
8481 /* Although the i387 extended floating-point has only 80 significant
8482 bits, a `long double' actually takes up 96, probably to enforce
8484 set_gdbarch_long_double_bit (gdbarch
, 96);
8486 /* Support for floating-point data type variants. */
8487 set_gdbarch_floatformat_for_type (gdbarch
, i386_floatformat_for_type
);
8489 /* Register numbers of various important registers. */
8490 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
8491 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
8492 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
8493 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
8495 /* NOTE: kettenis/20040418: GCC does have two possible register
8496 numbering schemes on the i386: dbx and SVR4. These schemes
8497 differ in how they number %ebp, %esp, %eflags, and the
8498 floating-point registers, and are implemented by the arrays
8499 dbx_register_map[] and svr4_dbx_register_map in
8500 gcc/config/i386.c. GCC also defines a third numbering scheme in
8501 gcc/config/i386.c, which it designates as the "default" register
8502 map used in 64bit mode. This last register numbering scheme is
8503 implemented in dbx64_register_map, and is used for AMD64; see
8506 Currently, each GCC i386 target always uses the same register
8507 numbering scheme across all its supported debugging formats
8508 i.e. SDB (COFF), stabs and DWARF 2. This is because
8509 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8510 DBX_REGISTER_NUMBER macro which is defined by each target's
8511 respective config header in a manner independent of the requested
8512 output debugging format.
8514 This does not match the arrangement below, which presumes that
8515 the SDB and stabs numbering schemes differ from the DWARF and
8516 DWARF 2 ones. The reason for this arrangement is that it is
8517 likely to get the numbering scheme for the target's
8518 default/native debug format right. For targets where GCC is the
8519 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8520 targets where the native toolchain uses a different numbering
8521 scheme for a particular debug format (stabs-in-ELF on Solaris)
8522 the defaults below will have to be overridden, like
8523 i386_elf_init_abi() does. */
8525 /* Use the dbx register numbering scheme for stabs and COFF. */
8526 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8527 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8529 /* Use the SVR4 register numbering scheme for DWARF 2. */
8530 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_dwarf_reg_to_regnum
);
8532 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8533 be in use on any of the supported i386 targets. */
8535 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
8537 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
8539 /* Call dummy code. */
8540 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
8541 set_gdbarch_push_dummy_code (gdbarch
, i386_push_dummy_code
);
8542 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
8543 set_gdbarch_frame_align (gdbarch
, i386_frame_align
);
8545 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
8546 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
8547 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
8549 set_gdbarch_return_value (gdbarch
, i386_return_value
);
8551 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
8553 /* Stack grows downward. */
8554 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
8556 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, i386_breakpoint::kind_from_pc
);
8557 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, i386_breakpoint::bp_from_kind
);
8559 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
8560 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
8562 set_gdbarch_frame_args_skip (gdbarch
, 8);
8564 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
8566 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
8568 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
8570 /* Add the i386 register groups. */
8571 i386_add_reggroups (gdbarch
);
8572 tdep
->register_reggroup_p
= i386_register_reggroup_p
;
8574 /* Helper for function argument information. */
8575 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
8577 /* Hook the function epilogue frame unwinder. This unwinder is
8578 appended to the list first, so that it supercedes the DWARF
8579 unwinder in function epilogues (where the DWARF unwinder
8580 currently fails). */
8581 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_frame_unwind
);
8583 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8584 to the list before the prologue-based unwinders, so that DWARF
8585 CFI info will be used if it is available. */
8586 dwarf2_append_unwinders (gdbarch
);
8588 frame_base_set_default (gdbarch
, &i386_frame_base
);
8590 /* Pseudo registers may be changed by amd64_init_abi. */
8591 set_gdbarch_pseudo_register_read_value (gdbarch
,
8592 i386_pseudo_register_read_value
);
8593 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
8594 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
8595 i386_ax_pseudo_register_collect
);
8597 set_tdesc_pseudo_register_type (gdbarch
, i386_pseudo_register_type
);
8598 set_tdesc_pseudo_register_name (gdbarch
, i386_pseudo_register_name
);
8600 /* Override the normal target description method to make the AVX
8601 upper halves anonymous. */
8602 set_gdbarch_register_name (gdbarch
, i386_register_name
);
8604 /* Even though the default ABI only includes general-purpose registers,
8605 floating-point registers and the SSE registers, we have to leave a
8606 gap for the upper AVX, MPX and AVX512 registers. */
8607 set_gdbarch_num_regs (gdbarch
, I386_NUM_REGS
);
8609 set_gdbarch_gnu_triplet_regexp (gdbarch
, i386_gnu_triplet_regexp
);
8611 /* Get the x86 target description from INFO. */
8612 tdesc
= info
.target_desc
;
8613 if (! tdesc_has_registers (tdesc
))
8614 tdesc
= i386_target_description (X86_XSTATE_SSE_MASK
, false);
8615 tdep
->tdesc
= tdesc
;
8617 tdep
->num_core_regs
= I386_NUM_GREGS
+ I387_NUM_REGS
;
8618 tdep
->register_names
= i386_register_names
;
8620 /* No upper YMM registers. */
8621 tdep
->ymmh_register_names
= NULL
;
8622 tdep
->ymm0h_regnum
= -1;
8624 /* No upper ZMM registers. */
8625 tdep
->zmmh_register_names
= NULL
;
8626 tdep
->zmm0h_regnum
= -1;
8628 /* No high XMM registers. */
8629 tdep
->xmm_avx512_register_names
= NULL
;
8630 tdep
->xmm16_regnum
= -1;
8632 /* No upper YMM16-31 registers. */
8633 tdep
->ymm16h_register_names
= NULL
;
8634 tdep
->ymm16h_regnum
= -1;
8636 tdep
->num_byte_regs
= 8;
8637 tdep
->num_word_regs
= 8;
8638 tdep
->num_dword_regs
= 0;
8639 tdep
->num_mmx_regs
= 8;
8640 tdep
->num_ymm_regs
= 0;
8642 /* No MPX registers. */
8643 tdep
->bnd0r_regnum
= -1;
8644 tdep
->bndcfgu_regnum
= -1;
8646 /* No AVX512 registers. */
8647 tdep
->k0_regnum
= -1;
8648 tdep
->num_zmm_regs
= 0;
8649 tdep
->num_ymm_avx512_regs
= 0;
8650 tdep
->num_xmm_avx512_regs
= 0;
8652 /* No PKEYS registers */
8653 tdep
->pkru_regnum
= -1;
8654 tdep
->num_pkeys_regs
= 0;
8656 /* No segment base registers. */
8657 tdep
->fsbase_regnum
= -1;
8659 tdesc_data
= tdesc_data_alloc ();
8661 set_gdbarch_relocate_instruction (gdbarch
, i386_relocate_instruction
);
8663 set_gdbarch_gen_return_address (gdbarch
, i386_gen_return_address
);
8665 set_gdbarch_insn_is_call (gdbarch
, i386_insn_is_call
);
8666 set_gdbarch_insn_is_ret (gdbarch
, i386_insn_is_ret
);
8667 set_gdbarch_insn_is_jump (gdbarch
, i386_insn_is_jump
);
8669 /* Hook in ABI-specific overrides, if they have been registered.
8670 Note: If INFO specifies a 64 bit arch, this is where we turn
8671 a 32-bit i386 into a 64-bit amd64. */
8672 info
.tdesc_data
= tdesc_data
;
8673 gdbarch_init_osabi (info
, gdbarch
);
8675 if (!i386_validate_tdesc_p (tdep
, tdesc_data
))
8677 tdesc_data_cleanup (tdesc_data
);
8679 gdbarch_free (gdbarch
);
8683 num_bnd_cooked
= (tdep
->bnd0r_regnum
> 0 ? I387_NUM_BND_REGS
: 0);
8685 /* Wire in pseudo registers. Number of pseudo registers may be
8687 set_gdbarch_num_pseudo_regs (gdbarch
, (tdep
->num_byte_regs
8688 + tdep
->num_word_regs
8689 + tdep
->num_dword_regs
8690 + tdep
->num_mmx_regs
8691 + tdep
->num_ymm_regs
8693 + tdep
->num_ymm_avx512_regs
8694 + tdep
->num_zmm_regs
));
8696 /* Target description may be changed. */
8697 tdesc
= tdep
->tdesc
;
8699 tdesc_use_registers (gdbarch
, tdesc
, tdesc_data
);
8701 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8702 set_gdbarch_register_reggroup_p (gdbarch
, tdep
->register_reggroup_p
);
8704 /* Make %al the first pseudo-register. */
8705 tdep
->al_regnum
= gdbarch_num_regs (gdbarch
);
8706 tdep
->ax_regnum
= tdep
->al_regnum
+ tdep
->num_byte_regs
;
8708 ymm0_regnum
= tdep
->ax_regnum
+ tdep
->num_word_regs
;
8709 if (tdep
->num_dword_regs
)
8711 /* Support dword pseudo-register if it hasn't been disabled. */
8712 tdep
->eax_regnum
= ymm0_regnum
;
8713 ymm0_regnum
+= tdep
->num_dword_regs
;
8716 tdep
->eax_regnum
= -1;
8718 mm0_regnum
= ymm0_regnum
;
8719 if (tdep
->num_ymm_regs
)
8721 /* Support YMM pseudo-register if it is available. */
8722 tdep
->ymm0_regnum
= ymm0_regnum
;
8723 mm0_regnum
+= tdep
->num_ymm_regs
;
8726 tdep
->ymm0_regnum
= -1;
8728 if (tdep
->num_ymm_avx512_regs
)
8730 /* Support YMM16-31 pseudo registers if available. */
8731 tdep
->ymm16_regnum
= mm0_regnum
;
8732 mm0_regnum
+= tdep
->num_ymm_avx512_regs
;
8735 tdep
->ymm16_regnum
= -1;
8737 if (tdep
->num_zmm_regs
)
8739 /* Support ZMM pseudo-register if it is available. */
8740 tdep
->zmm0_regnum
= mm0_regnum
;
8741 mm0_regnum
+= tdep
->num_zmm_regs
;
8744 tdep
->zmm0_regnum
= -1;
8746 bnd0_regnum
= mm0_regnum
;
8747 if (tdep
->num_mmx_regs
!= 0)
8749 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8750 tdep
->mm0_regnum
= mm0_regnum
;
8751 bnd0_regnum
+= tdep
->num_mmx_regs
;
8754 tdep
->mm0_regnum
= -1;
8756 if (tdep
->bnd0r_regnum
> 0)
8757 tdep
->bnd0_regnum
= bnd0_regnum
;
8759 tdep
-> bnd0_regnum
= -1;
8761 /* Hook in the legacy prologue-based unwinders last (fallback). */
8762 frame_unwind_append_unwinder (gdbarch
, &i386_stack_tramp_frame_unwind
);
8763 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
8764 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
8766 /* If we have a register mapping, enable the generic core file
8767 support, unless it has already been enabled. */
8768 if (tdep
->gregset_reg_offset
8769 && !gdbarch_iterate_over_regset_sections_p (gdbarch
))
8770 set_gdbarch_iterate_over_regset_sections
8771 (gdbarch
, i386_iterate_over_regset_sections
);
8773 set_gdbarch_fast_tracepoint_valid_at (gdbarch
,
8774 i386_fast_tracepoint_valid_at
);
8781 /* Return the target description for a specified XSAVE feature mask. */
8783 const struct target_desc
*
8784 i386_target_description (uint64_t xcr0
, bool segments
)
8786 static target_desc
*i386_tdescs \
8787 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8788 target_desc
**tdesc
;
8790 tdesc
= &i386_tdescs
[(xcr0
& X86_XSTATE_SSE
) ? 1 : 0]
8791 [(xcr0
& X86_XSTATE_AVX
) ? 1 : 0]
8792 [(xcr0
& X86_XSTATE_MPX
) ? 1 : 0]
8793 [(xcr0
& X86_XSTATE_AVX512
) ? 1 : 0]
8794 [(xcr0
& X86_XSTATE_PKRU
) ? 1 : 0]
8798 *tdesc
= i386_create_target_description (xcr0
, false, segments
);
8803 #define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8805 /* Find the bound directory base address. */
8807 static unsigned long
8808 i386_mpx_bd_base (void)
8810 struct regcache
*rcache
;
8811 struct gdbarch_tdep
*tdep
;
8813 enum register_status regstatus
;
8815 rcache
= get_current_regcache ();
8816 tdep
= gdbarch_tdep (rcache
->arch ());
8818 regstatus
= regcache_raw_read_unsigned (rcache
, tdep
->bndcfgu_regnum
, &ret
);
8820 if (regstatus
!= REG_VALID
)
8821 error (_("BNDCFGU register invalid, read status %d."), regstatus
);
8823 return ret
& MPX_BASE_MASK
;
8827 i386_mpx_enabled (void)
8829 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_current_arch ());
8830 const struct target_desc
*tdesc
= tdep
->tdesc
;
8832 return (tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx") != NULL
);
8835 #define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
8836 #define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
8837 #define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
8838 #define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
8840 /* Find the bound table entry given the pointer location and the base
8841 address of the table. */
8844 i386_mpx_get_bt_entry (CORE_ADDR ptr
, CORE_ADDR bd_base
)
8848 CORE_ADDR mpx_bd_mask
, bd_ptr_r_shift
, bd_ptr_l_shift
;
8849 CORE_ADDR bt_mask
, bt_select_r_shift
, bt_select_l_shift
;
8850 CORE_ADDR bd_entry_addr
;
8853 struct gdbarch
*gdbarch
= get_current_arch ();
8854 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8857 if (gdbarch_ptr_bit (gdbarch
) == 64)
8859 mpx_bd_mask
= (CORE_ADDR
) MPX_BD_MASK
;
8860 bd_ptr_r_shift
= 20;
8862 bt_select_r_shift
= 3;
8863 bt_select_l_shift
= 5;
8864 bt_mask
= (CORE_ADDR
) MPX_BT_MASK
;
8866 if ( sizeof (CORE_ADDR
) == 4)
8867 error (_("bound table examination not supported\
8868 for 64-bit process with 32-bit GDB"));
8872 mpx_bd_mask
= MPX_BD_MASK_32
;
8873 bd_ptr_r_shift
= 12;
8875 bt_select_r_shift
= 2;
8876 bt_select_l_shift
= 4;
8877 bt_mask
= MPX_BT_MASK_32
;
8880 offset1
= ((ptr
& mpx_bd_mask
) >> bd_ptr_r_shift
) << bd_ptr_l_shift
;
8881 bd_entry_addr
= bd_base
+ offset1
;
8882 bd_entry
= read_memory_typed_address (bd_entry_addr
, data_ptr_type
);
8884 if ((bd_entry
& 0x1) == 0)
8885 error (_("Invalid bounds directory entry at %s."),
8886 paddress (get_current_arch (), bd_entry_addr
));
8888 /* Clearing status bit. */
8890 bt_addr
= bd_entry
& ~bt_select_r_shift
;
8891 offset2
= ((ptr
& bt_mask
) >> bt_select_r_shift
) << bt_select_l_shift
;
8893 return bt_addr
+ offset2
;
8896 /* Print routine for the mpx bounds. */
8899 i386_mpx_print_bounds (const CORE_ADDR bt_entry
[4])
8901 struct ui_out
*uiout
= current_uiout
;
8903 struct gdbarch
*gdbarch
= get_current_arch ();
8904 CORE_ADDR onecompl
= ~((CORE_ADDR
) 0);
8905 int bounds_in_map
= ((~bt_entry
[1] == 0 && bt_entry
[0] == onecompl
) ? 1 : 0);
8907 if (bounds_in_map
== 1)
8909 uiout
->text ("Null bounds on map:");
8910 uiout
->text (" pointer value = ");
8911 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8917 uiout
->text ("{lbound = ");
8918 uiout
->field_core_addr ("lower-bound", gdbarch
, bt_entry
[0]);
8919 uiout
->text (", ubound = ");
8921 /* The upper bound is stored in 1's complement. */
8922 uiout
->field_core_addr ("upper-bound", gdbarch
, ~bt_entry
[1]);
8923 uiout
->text ("}: pointer value = ");
8924 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8926 if (gdbarch_ptr_bit (gdbarch
) == 64)
8927 size
= ( (~(int64_t) bt_entry
[1]) - (int64_t) bt_entry
[0]);
8929 size
= ( ~((int32_t) bt_entry
[1]) - (int32_t) bt_entry
[0]);
8931 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
8932 -1 represents in this sense full memory access, and there is no need
8935 size
= (size
> -1 ? size
+ 1 : size
);
8936 uiout
->text (", size = ");
8937 uiout
->field_string ("size", plongest (size
));
8939 uiout
->text (", metadata = ");
8940 uiout
->field_core_addr ("metadata", gdbarch
, bt_entry
[3]);
8945 /* Implement the command "show mpx bound". */
8948 i386_mpx_info_bounds (const char *args
, int from_tty
)
8950 CORE_ADDR bd_base
= 0;
8952 CORE_ADDR bt_entry_addr
= 0;
8953 CORE_ADDR bt_entry
[4];
8955 struct gdbarch
*gdbarch
= get_current_arch ();
8956 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8958 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8959 || !i386_mpx_enabled ())
8961 printf_unfiltered (_("Intel Memory Protection Extensions not "
8962 "supported on this target.\n"));
8968 printf_unfiltered (_("Address of pointer variable expected.\n"));
8972 addr
= parse_and_eval_address (args
);
8974 bd_base
= i386_mpx_bd_base ();
8975 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8977 memset (bt_entry
, 0, sizeof (bt_entry
));
8979 for (i
= 0; i
< 4; i
++)
8980 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8981 + i
* TYPE_LENGTH (data_ptr_type
),
8984 i386_mpx_print_bounds (bt_entry
);
8987 /* Implement the command "set mpx bound". */
8990 i386_mpx_set_bounds (const char *args
, int from_tty
)
8992 CORE_ADDR bd_base
= 0;
8993 CORE_ADDR addr
, lower
, upper
;
8994 CORE_ADDR bt_entry_addr
= 0;
8995 CORE_ADDR bt_entry
[2];
8996 const char *input
= args
;
8998 struct gdbarch
*gdbarch
= get_current_arch ();
8999 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
9000 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
9002 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
9003 || !i386_mpx_enabled ())
9004 error (_("Intel Memory Protection Extensions not supported\
9008 error (_("Pointer value expected."));
9010 addr
= value_as_address (parse_to_comma_and_eval (&input
));
9012 if (input
[0] == ',')
9014 if (input
[0] == '\0')
9015 error (_("wrong number of arguments: missing lower and upper bound."));
9016 lower
= value_as_address (parse_to_comma_and_eval (&input
));
9018 if (input
[0] == ',')
9020 if (input
[0] == '\0')
9021 error (_("Wrong number of arguments; Missing upper bound."));
9022 upper
= value_as_address (parse_to_comma_and_eval (&input
));
9024 bd_base
= i386_mpx_bd_base ();
9025 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
9026 for (i
= 0; i
< 2; i
++)
9027 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
9028 + i
* TYPE_LENGTH (data_ptr_type
),
9030 bt_entry
[0] = (uint64_t) lower
;
9031 bt_entry
[1] = ~(uint64_t) upper
;
9033 for (i
= 0; i
< 2; i
++)
9034 write_memory_unsigned_integer (bt_entry_addr
9035 + i
* TYPE_LENGTH (data_ptr_type
),
9036 TYPE_LENGTH (data_ptr_type
), byte_order
,
9040 static struct cmd_list_element
*mpx_set_cmdlist
, *mpx_show_cmdlist
;
9042 void _initialize_i386_tdep ();
9044 _initialize_i386_tdep ()
9046 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
9048 /* Add the variable that controls the disassembly flavor. */
9049 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
9050 &disassembly_flavor
, _("\
9051 Set the disassembly flavor."), _("\
9052 Show the disassembly flavor."), _("\
9053 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9055 NULL
, /* FIXME: i18n: */
9056 &setlist
, &showlist
);
9058 /* Add the variable that controls the convention for returning
9060 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
9061 &struct_convention
, _("\
9062 Set the convention for returning small structs."), _("\
9063 Show the convention for returning small structs."), _("\
9064 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9067 NULL
, /* FIXME: i18n: */
9068 &setlist
, &showlist
);
9070 /* Add "mpx" prefix for the set commands. */
9072 add_basic_prefix_cmd ("mpx", class_support
, _("\
9073 Set Intel Memory Protection Extensions specific variables."),
9074 &mpx_set_cmdlist
, "set mpx ",
9075 0 /* allow-unknown */, &setlist
);
9077 /* Add "mpx" prefix for the show commands. */
9079 add_show_prefix_cmd ("mpx", class_support
, _("\
9080 Show Intel Memory Protection Extensions specific variables."),
9081 &mpx_show_cmdlist
, "show mpx ",
9082 0 /* allow-unknown */, &showlist
);
9084 /* Add "bound" command for the show mpx commands list. */
9086 add_cmd ("bound", no_class
, i386_mpx_info_bounds
,
9087 "Show the memory bounds for a given array/pointer storage\
9088 in the bound table.",
9091 /* Add "bound" command for the set mpx commands list. */
9093 add_cmd ("bound", no_class
, i386_mpx_set_bounds
,
9094 "Set the memory bounds for a given array/pointer storage\
9095 in the bound table.",
9098 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
9099 i386_svr4_init_abi
);
9101 /* Initialize the i386-specific register groups. */
9102 i386_init_reggroups ();
9104 /* Tell remote stub that we support XML target description. */
9105 register_remote_support_xml ("i386");