1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REGNUM. */
157 i386_register_name (int regnum
)
159 if (i386_mmx_regnum_p (current_gdbarch
, regnum
))
160 return i386_mmx_names
[regnum
- I387_MM0_REGNUM
];
162 if (regnum
>= 0 && regnum
< i386_num_register_names
)
163 return i386_register_names
[regnum
];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg
>= 0 && reg
<= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg
>= 12 && reg
<= 19)
189 /* Floating-point registers. */
190 return reg
- 12 + I387_ST0_REGNUM
;
192 else if (reg
>= 21 && reg
<= 28)
195 return reg
- 21 + I387_XMM0_REGNUM
;
197 else if (reg
>= 29 && reg
<= 36)
200 return reg
- 29 + I387_MM0_REGNUM
;
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS
+ NUM_PSEUDO_REGS
;
207 /* Convert SVR4 register number REG to the appropriate register number
211 i386_svr4_reg_to_regnum (int reg
)
213 /* This implements the GCC register map that tries to be compatible
214 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
216 /* The SVR4 register numbering includes %eip and %eflags, and
217 numbers the floating point registers differently. */
218 if (reg
>= 0 && reg
<= 9)
220 /* General-purpose registers. */
223 else if (reg
>= 11 && reg
<= 18)
225 /* Floating-point registers. */
226 return reg
- 11 + I387_ST0_REGNUM
;
228 else if (reg
>= 21 && reg
<= 36)
230 /* The SSE and MMX registers have the same numbers as with dbx. */
231 return i386_dbx_reg_to_regnum (reg
);
236 case 37: return I387_FCTRL_REGNUM
;
237 case 38: return I387_FSTAT_REGNUM
;
238 case 39: return I387_MXCSR_REGNUM
;
239 case 40: return I386_ES_REGNUM
;
240 case 41: return I386_CS_REGNUM
;
241 case 42: return I386_SS_REGNUM
;
242 case 43: return I386_DS_REGNUM
;
243 case 44: return I386_FS_REGNUM
;
244 case 45: return I386_GS_REGNUM
;
247 /* This will hopefully provoke a warning. */
248 return NUM_REGS
+ NUM_PSEUDO_REGS
;
251 #undef I387_ST0_REGNUM
252 #undef I387_MM0_REGNUM
253 #undef I387_NUM_XMM_REGS
256 /* This is the variable that is set with "set disassembly-flavor", and
257 its legitimate values. */
258 static const char att_flavor
[] = "att";
259 static const char intel_flavor
[] = "intel";
260 static const char *valid_flavors
[] =
266 static const char *disassembly_flavor
= att_flavor
;
269 /* Use the program counter to determine the contents and size of a
270 breakpoint instruction. Return a pointer to a string of bytes that
271 encode a breakpoint instruction, store the length of the string in
272 *LEN and optionally adjust *PC to point to the correct memory
273 location for inserting the breakpoint.
275 On the i386 we have a single breakpoint that fits in a single byte
276 and can be inserted anywhere.
278 This function is 64-bit safe. */
280 static const gdb_byte
*
281 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
283 static gdb_byte break_insn
[] = { 0xcc }; /* int 3 */
285 *len
= sizeof (break_insn
);
289 #ifdef I386_REGNO_TO_SYMMETRY
290 #error "The Sequent Symmetry is no longer supported."
293 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
294 and %esp "belong" to the calling function. Therefore these
295 registers should be saved if they're going to be modified. */
297 /* The maximum number of saved registers. This should include all
298 registers mentioned above, and %eip. */
299 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
301 struct i386_frame_cache
308 /* Saved registers. */
309 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
314 /* Stack space reserved for local variables. */
318 /* Allocate and initialize a frame cache. */
320 static struct i386_frame_cache
*
321 i386_alloc_frame_cache (void)
323 struct i386_frame_cache
*cache
;
326 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
330 cache
->sp_offset
= -4;
333 /* Saved registers. We initialize these to -1 since zero is a valid
334 offset (that's where %ebp is supposed to be stored). */
335 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
336 cache
->saved_regs
[i
] = -1;
338 cache
->stack_align
= 0;
339 cache
->pc_in_eax
= 0;
341 /* Frameless until proven otherwise. */
347 /* If the instruction at PC is a jump, return the address of its
348 target. Otherwise, return PC. */
351 i386_follow_jump (CORE_ADDR pc
)
357 read_memory_nobpt (pc
, &op
, 1);
361 op
= read_memory_unsigned_integer (pc
+ 1, 1);
367 /* Relative jump: if data16 == 0, disp32, else disp16. */
370 delta
= read_memory_integer (pc
+ 2, 2);
372 /* Include the size of the jmp instruction (including the
378 delta
= read_memory_integer (pc
+ 1, 4);
380 /* Include the size of the jmp instruction. */
385 /* Relative jump, disp8 (ignore data16). */
386 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
395 /* Check whether PC points at a prologue for a function returning a
396 structure or union. If so, it updates CACHE and returns the
397 address of the first instruction after the code sequence that
398 removes the "hidden" argument from the stack or CURRENT_PC,
399 whichever is smaller. Otherwise, return PC. */
402 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
403 struct i386_frame_cache
*cache
)
405 /* Functions that return a structure or union start with:
408 xchgl %eax, (%esp) 0x87 0x04 0x24
409 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
411 (the System V compiler puts out the second `xchg' instruction,
412 and the assembler doesn't try to optimize it, so the 'sib' form
413 gets generated). This sequence is used to get the address of the
414 return buffer for a function that returns a structure. */
415 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
416 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
420 if (current_pc
<= pc
)
423 read_memory_nobpt (pc
, &op
, 1);
425 if (op
!= 0x58) /* popl %eax */
428 read_memory_nobpt (pc
+ 1, buf
, 4);
429 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
432 if (current_pc
== pc
)
434 cache
->sp_offset
+= 4;
438 if (current_pc
== pc
+ 1)
440 cache
->pc_in_eax
= 1;
444 if (buf
[1] == proto1
[1])
451 i386_skip_probe (CORE_ADDR pc
)
453 /* A function may start with
467 read_memory_nobpt (pc
, &op
, 1);
469 if (op
== 0x68 || op
== 0x6a)
473 /* Skip past the `pushl' instruction; it has either a one-byte or a
474 four-byte operand, depending on the opcode. */
480 /* Read the following 8 bytes, which should be `call _probe' (6
481 bytes) followed by `addl $4,%esp' (2 bytes). */
482 read_memory (pc
+ delta
, buf
, sizeof (buf
));
483 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
484 pc
+= delta
+ sizeof (buf
);
490 /* GCC 4.1 and later, can put code in the prologue to realign the
491 stack pointer. Check whether PC points to such code, and update
492 CACHE accordingly. Return the first instruction after the code
493 sequence or CURRENT_PC, whichever is smaller. If we don't
494 recognize the code, return PC. */
497 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
498 struct i386_frame_cache
*cache
)
500 static const gdb_byte insns_ecx
[10] = {
501 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
502 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
503 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
505 static const gdb_byte insns_edx
[10] = {
506 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
507 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
508 0xff, 0x72, 0xfc /* pushl -4(%edx) */
510 static const gdb_byte insns_eax
[10] = {
511 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
512 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
513 0xff, 0x70, 0xfc /* pushl -4(%eax) */
517 if (target_read_memory (pc
, buf
, sizeof buf
)
518 || (memcmp (buf
, insns_ecx
, sizeof buf
) != 0
519 && memcmp (buf
, insns_edx
, sizeof buf
) != 0
520 && memcmp (buf
, insns_eax
, sizeof buf
) != 0))
523 if (current_pc
> pc
+ 4)
524 cache
->stack_align
= 1;
526 return min (pc
+ 10, current_pc
);
529 /* Maximum instruction length we need to handle. */
530 #define I386_MAX_INSN_LEN 6
532 /* Instruction description. */
536 gdb_byte insn
[I386_MAX_INSN_LEN
];
537 gdb_byte mask
[I386_MAX_INSN_LEN
];
540 /* Search for the instruction at PC in the list SKIP_INSNS. Return
541 the first instruction description that matches. Otherwise, return
544 static struct i386_insn
*
545 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*skip_insns
)
547 struct i386_insn
*insn
;
550 read_memory_nobpt (pc
, &op
, 1);
552 for (insn
= skip_insns
; insn
->len
> 0; insn
++)
554 if ((op
& insn
->mask
[0]) == insn
->insn
[0])
556 gdb_byte buf
[I386_MAX_INSN_LEN
- 1];
557 int insn_matched
= 1;
560 gdb_assert (insn
->len
> 1);
561 gdb_assert (insn
->len
<= I386_MAX_INSN_LEN
);
563 read_memory_nobpt (pc
+ 1, buf
, insn
->len
- 1);
564 for (i
= 1; i
< insn
->len
; i
++)
566 if ((buf
[i
- 1] & insn
->mask
[i
]) != insn
->insn
[i
])
578 /* Some special instructions that might be migrated by GCC into the
579 part of the prologue that sets up the new stack frame. Because the
580 stack frame hasn't been setup yet, no registers have been saved
581 yet, and only the scratch registers %eax, %ecx and %edx can be
584 struct i386_insn i386_frame_setup_skip_insns
[] =
586 /* Check for `movb imm8, r' and `movl imm32, r'.
588 ??? Should we handle 16-bit operand-sizes here? */
590 /* `movb imm8, %al' and `movb imm8, %ah' */
591 /* `movb imm8, %cl' and `movb imm8, %ch' */
592 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
593 /* `movb imm8, %dl' and `movb imm8, %dh' */
594 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
595 /* `movl imm32, %eax' and `movl imm32, %ecx' */
596 { 5, { 0xb8 }, { 0xfe } },
597 /* `movl imm32, %edx' */
598 { 5, { 0xba }, { 0xff } },
600 /* Check for `mov imm32, r32'. Note that there is an alternative
601 encoding for `mov m32, %eax'.
603 ??? Should we handle SIB adressing here?
604 ??? Should we handle 16-bit operand-sizes here? */
606 /* `movl m32, %eax' */
607 { 5, { 0xa1 }, { 0xff } },
608 /* `movl m32, %eax' and `mov; m32, %ecx' */
609 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
610 /* `movl m32, %edx' */
611 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
613 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
614 Because of the symmetry, there are actually two ways to encode
615 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
616 opcode bytes 0x31 and 0x33 for `xorl'. */
618 /* `subl %eax, %eax' */
619 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
620 /* `subl %ecx, %ecx' */
621 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
622 /* `subl %edx, %edx' */
623 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
624 /* `xorl %eax, %eax' */
625 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
626 /* `xorl %ecx, %ecx' */
627 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
628 /* `xorl %edx, %edx' */
629 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
633 /* Check whether PC points at a code that sets up a new stack frame.
634 If so, it updates CACHE and returns the address of the first
635 instruction after the sequence that sets up the frame or LIMIT,
636 whichever is smaller. If we don't recognize the code, return PC. */
639 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR limit
,
640 struct i386_frame_cache
*cache
)
642 struct i386_insn
*insn
;
649 read_memory_nobpt (pc
, &op
, 1);
651 if (op
== 0x55) /* pushl %ebp */
653 /* Take into account that we've executed the `pushl %ebp' that
654 starts this instruction sequence. */
655 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
656 cache
->sp_offset
+= 4;
659 /* If that's all, return now. */
663 /* Check for some special instructions that might be migrated by
664 GCC into the prologue and skip them. At this point in the
665 prologue, code should only touch the scratch registers %eax,
666 %ecx and %edx, so while the number of posibilities is sheer,
669 Make sure we only skip these instructions if we later see the
670 `movl %esp, %ebp' that actually sets up the frame. */
671 while (pc
+ skip
< limit
)
673 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
680 /* If that's all, return now. */
681 if (limit
<= pc
+ skip
)
684 read_memory_nobpt (pc
+ skip
, &op
, 1);
686 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
690 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xec)
694 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xe5)
701 /* OK, we actually have a frame. We just don't know how large
702 it is yet. Set its size to zero. We'll adjust it if
703 necessary. We also now commit to skipping the special
704 instructions mentioned before. */
708 /* If that's all, return now. */
712 /* Check for stack adjustment
716 NOTE: You can't subtract a 16-bit immediate from a 32-bit
717 reg, so we don't have to worry about a data16 prefix. */
718 read_memory_nobpt (pc
, &op
, 1);
721 /* `subl' with 8-bit immediate. */
722 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
723 /* Some instruction starting with 0x83 other than `subl'. */
726 /* `subl' with signed 8-bit immediate (though it wouldn't
727 make sense to be negative). */
728 cache
->locals
= read_memory_integer (pc
+ 2, 1);
733 /* Maybe it is `subl' with a 32-bit immediate. */
734 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
735 /* Some instruction starting with 0x81 other than `subl'. */
738 /* It is `subl' with a 32-bit immediate. */
739 cache
->locals
= read_memory_integer (pc
+ 2, 4);
744 /* Some instruction other than `subl'. */
748 else if (op
== 0xc8) /* enter */
750 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
757 /* Check whether PC points at code that saves registers on the stack.
758 If so, it updates CACHE and returns the address of the first
759 instruction after the register saves or CURRENT_PC, whichever is
760 smaller. Otherwise, return PC. */
763 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
764 struct i386_frame_cache
*cache
)
766 CORE_ADDR offset
= 0;
770 if (cache
->locals
> 0)
771 offset
-= cache
->locals
;
772 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
774 read_memory_nobpt (pc
, &op
, 1);
775 if (op
< 0x50 || op
> 0x57)
779 cache
->saved_regs
[op
- 0x50] = offset
;
780 cache
->sp_offset
+= 4;
787 /* Do a full analysis of the prologue at PC and update CACHE
788 accordingly. Bail out early if CURRENT_PC is reached. Return the
789 address where the analysis stopped.
791 We handle these cases:
793 The startup sequence can be at the start of the function, or the
794 function can start with a branch to startup code at the end.
796 %ebp can be set up with either the 'enter' instruction, or "pushl
797 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
798 once used in the System V compiler).
800 Local space is allocated just below the saved %ebp by either the
801 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
802 16-bit unsigned argument for space to allocate, and the 'addl'
803 instruction could have either a signed byte, or 32-bit immediate.
805 Next, the registers used by this function are pushed. With the
806 System V compiler they will always be in the order: %edi, %esi,
807 %ebx (and sometimes a harmless bug causes it to also save but not
808 restore %eax); however, the code below is willing to see the pushes
809 in any order, and will handle up to 8 of them.
811 If the setup sequence is at the end of the function, then the next
812 instruction will be a branch back to the start. */
815 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
816 struct i386_frame_cache
*cache
)
818 pc
= i386_follow_jump (pc
);
819 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
820 pc
= i386_skip_probe (pc
);
821 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
822 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
823 return i386_analyze_register_saves (pc
, current_pc
, cache
);
826 /* Return PC of first real instruction. */
829 i386_skip_prologue (CORE_ADDR start_pc
)
831 static gdb_byte pic_pat
[6] =
833 0xe8, 0, 0, 0, 0, /* call 0x0 */
834 0x5b, /* popl %ebx */
836 struct i386_frame_cache cache
;
842 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
843 if (cache
.locals
< 0)
846 /* Found valid frame setup. */
848 /* The native cc on SVR4 in -K PIC mode inserts the following code
849 to get the address of the global offset table (GOT) into register
854 movl %ebx,x(%ebp) (optional)
857 This code is with the rest of the prologue (at the end of the
858 function), so we have to skip it to get to the first real
859 instruction at the start of the function. */
861 for (i
= 0; i
< 6; i
++)
863 read_memory_nobpt (pc
+ i
, &op
, 1);
864 if (pic_pat
[i
] != op
)
871 read_memory_nobpt (pc
+ delta
, &op
, 1);
873 if (op
== 0x89) /* movl %ebx, x(%ebp) */
875 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
877 if (op
== 0x5d) /* One byte offset from %ebp. */
879 else if (op
== 0x9d) /* Four byte offset from %ebp. */
881 else /* Unexpected instruction. */
884 read_memory_nobpt (pc
+ delta
, &op
, 1);
888 if (delta
> 0 && op
== 0x81
889 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3)
895 /* If the function starts with a branch (to startup code at the end)
896 the last instruction should bring us back to the first
897 instruction of the real code. */
898 if (i386_follow_jump (start_pc
) != start_pc
)
899 pc
= i386_follow_jump (pc
);
904 /* This function is 64-bit safe. */
907 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
911 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
912 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
918 static struct i386_frame_cache
*
919 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
921 struct i386_frame_cache
*cache
;
928 cache
= i386_alloc_frame_cache ();
931 /* In principle, for normal frames, %ebp holds the frame pointer,
932 which holds the base address for the current stack frame.
933 However, for functions that don't need it, the frame pointer is
934 optional. For these "frameless" functions the frame pointer is
935 actually the frame pointer of the calling frame. Signal
936 trampolines are just a special case of a "frameless" function.
937 They (usually) share their frame pointer with the frame that was
938 in progress when the signal occurred. */
940 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
941 cache
->base
= extract_unsigned_integer (buf
, 4);
942 if (cache
->base
== 0)
945 /* For normal frames, %eip is stored at 4(%ebp). */
946 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
948 cache
->pc
= frame_func_unwind (next_frame
);
950 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
952 if (cache
->stack_align
)
954 /* Saved stack pointer has been saved in %ecx. */
955 frame_unwind_register (next_frame
, I386_ECX_REGNUM
, buf
);
956 cache
->saved_sp
= extract_unsigned_integer(buf
, 4);
959 if (cache
->locals
< 0)
961 /* We didn't find a valid frame, which means that CACHE->base
962 currently holds the frame pointer for our calling frame. If
963 we're at the start of a function, or somewhere half-way its
964 prologue, the function's frame probably hasn't been fully
965 setup yet. Try to reconstruct the base address for the stack
966 frame by looking at the stack pointer. For truly "frameless"
967 functions this might work too. */
969 if (cache
->stack_align
)
971 /* We're halfway aligning the stack. */
972 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
973 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
975 /* This will be added back below. */
976 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
980 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
981 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
985 /* Now that we have the base address for the stack frame we can
986 calculate the value of %esp in the calling frame. */
987 if (cache
->saved_sp
== 0)
988 cache
->saved_sp
= cache
->base
+ 8;
990 /* Adjust all the saved registers such that they contain addresses
991 instead of offsets. */
992 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
993 if (cache
->saved_regs
[i
] != -1)
994 cache
->saved_regs
[i
] += cache
->base
;
1000 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1001 struct frame_id
*this_id
)
1003 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1005 /* This marks the outermost frame. */
1006 if (cache
->base
== 0)
1009 /* See the end of i386_push_dummy_call. */
1010 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
1014 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1015 int regnum
, int *optimizedp
,
1016 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1017 int *realnump
, gdb_byte
*valuep
)
1019 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1021 gdb_assert (regnum
>= 0);
1023 /* The System V ABI says that:
1025 "The flags register contains the system flags, such as the
1026 direction flag and the carry flag. The direction flag must be
1027 set to the forward (that is, zero) direction before entry and
1028 upon exit from a function. Other user flags have no specified
1029 role in the standard calling sequence and are not preserved."
1031 To guarantee the "upon exit" part of that statement we fake a
1032 saved flags register that has its direction flag cleared.
1034 Note that GCC doesn't seem to rely on the fact that the direction
1035 flag is cleared after a function return; it always explicitly
1036 clears the flag before operations where it matters.
1038 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1039 right thing to do. The way we fake the flags register here makes
1040 it impossible to change it. */
1042 if (regnum
== I386_EFLAGS_REGNUM
)
1052 /* Clear the direction flag. */
1053 val
= frame_unwind_register_unsigned (next_frame
,
1054 I386_EFLAGS_REGNUM
);
1056 store_unsigned_integer (valuep
, 4, val
);
1062 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
1065 *lvalp
= lval_register
;
1067 *realnump
= I386_EAX_REGNUM
;
1069 frame_unwind_register (next_frame
, (*realnump
), valuep
);
1073 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
1081 /* Store the value. */
1082 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
1087 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1090 *lvalp
= lval_memory
;
1091 *addrp
= cache
->saved_regs
[regnum
];
1095 /* Read the value in from memory. */
1096 read_memory (*addrp
, valuep
,
1097 register_size (current_gdbarch
, regnum
));
1103 *lvalp
= lval_register
;
1107 frame_unwind_register (next_frame
, (*realnump
), valuep
);
1110 static const struct frame_unwind i386_frame_unwind
=
1114 i386_frame_prev_register
1117 static const struct frame_unwind
*
1118 i386_frame_sniffer (struct frame_info
*next_frame
)
1120 return &i386_frame_unwind
;
1124 /* Signal trampolines. */
1126 static struct i386_frame_cache
*
1127 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1129 struct i386_frame_cache
*cache
;
1130 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1137 cache
= i386_alloc_frame_cache ();
1139 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1140 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
1142 addr
= tdep
->sigcontext_addr (next_frame
);
1143 if (tdep
->sc_reg_offset
)
1147 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1149 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1150 if (tdep
->sc_reg_offset
[i
] != -1)
1151 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1155 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1156 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1159 *this_cache
= cache
;
1164 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1165 struct frame_id
*this_id
)
1167 struct i386_frame_cache
*cache
=
1168 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1170 /* See the end of i386_push_dummy_call. */
1171 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1175 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1177 int regnum
, int *optimizedp
,
1178 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1179 int *realnump
, gdb_byte
*valuep
)
1181 /* Make sure we've initialized the cache. */
1182 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1184 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1185 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1188 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1191 i386_sigtramp_frame_this_id
,
1192 i386_sigtramp_frame_prev_register
1195 static const struct frame_unwind
*
1196 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1198 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1200 /* We shouldn't even bother if we don't have a sigcontext_addr
1202 if (tdep
->sigcontext_addr
== NULL
)
1205 if (tdep
->sigtramp_p
!= NULL
)
1207 if (tdep
->sigtramp_p (next_frame
))
1208 return &i386_sigtramp_frame_unwind
;
1211 if (tdep
->sigtramp_start
!= 0)
1213 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1215 gdb_assert (tdep
->sigtramp_end
!= 0);
1216 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1217 return &i386_sigtramp_frame_unwind
;
1225 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1227 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1232 static const struct frame_base i386_frame_base
=
1235 i386_frame_base_address
,
1236 i386_frame_base_address
,
1237 i386_frame_base_address
1240 static struct frame_id
1241 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1246 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1247 fp
= extract_unsigned_integer (buf
, 4);
1249 /* See the end of i386_push_dummy_call. */
1250 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1254 /* Figure out where the longjmp will land. Slurp the args out of the
1255 stack. We expect the first arg to be a pointer to the jmp_buf
1256 structure from which we extract the address that we will land at.
1257 This address is copied into PC. This routine returns non-zero on
1260 This function is 64-bit safe. */
1263 i386_get_longjmp_target (CORE_ADDR
*pc
)
1266 CORE_ADDR sp
, jb_addr
;
1267 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1268 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1270 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1271 longjmp will land. */
1272 if (jb_pc_offset
== -1)
1275 /* Don't use I386_ESP_REGNUM here, since this function is also used
1277 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1278 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1279 if (target_read_memory (sp
+ len
, buf
, len
))
1282 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1283 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1286 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1292 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1293 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1294 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1295 CORE_ADDR struct_addr
)
1300 /* Push arguments in reverse order. */
1301 for (i
= nargs
- 1; i
>= 0; i
--)
1303 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
1305 /* The System V ABI says that:
1307 "An argument's size is increased, if necessary, to make it a
1308 multiple of [32-bit] words. This may require tail padding,
1309 depending on the size of the argument."
1311 This makes sure the stack stays word-aligned. */
1312 sp
-= (len
+ 3) & ~3;
1313 write_memory (sp
, value_contents_all (args
[i
]), len
);
1316 /* Push value address. */
1320 store_unsigned_integer (buf
, 4, struct_addr
);
1321 write_memory (sp
, buf
, 4);
1324 /* Store return address. */
1326 store_unsigned_integer (buf
, 4, bp_addr
);
1327 write_memory (sp
, buf
, 4);
1329 /* Finally, update the stack pointer... */
1330 store_unsigned_integer (buf
, 4, sp
);
1331 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1333 /* ...and fake a frame pointer. */
1334 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1336 /* MarkK wrote: This "+ 8" is all over the place:
1337 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1338 i386_unwind_dummy_id). It's there, since all frame unwinders for
1339 a given target have to agree (within a certain margin) on the
1340 definition of the stack address of a frame. Otherwise
1341 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1342 stack address *before* the function call as a frame's CFA. On
1343 the i386, when %ebp is used as a frame pointer, the offset
1344 between the contents %ebp and the CFA as defined by GCC. */
1348 /* These registers are used for returning integers (and on some
1349 targets also for returning `struct' and `union' values when their
1350 size and alignment match an integer type). */
1351 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1352 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1354 /* Read, for architecture GDBARCH, a function return value of TYPE
1355 from REGCACHE, and copy that into VALBUF. */
1358 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1359 struct regcache
*regcache
, gdb_byte
*valbuf
)
1361 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1362 int len
= TYPE_LENGTH (type
);
1363 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1365 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1367 if (tdep
->st0_regnum
< 0)
1369 warning (_("Cannot find floating-point return value."));
1370 memset (valbuf
, 0, len
);
1374 /* Floating-point return values can be found in %st(0). Convert
1375 its contents to the desired type. This is probably not
1376 exactly how it would happen on the target itself, but it is
1377 the best we can do. */
1378 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1379 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1383 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1384 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1386 if (len
<= low_size
)
1388 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1389 memcpy (valbuf
, buf
, len
);
1391 else if (len
<= (low_size
+ high_size
))
1393 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1394 memcpy (valbuf
, buf
, low_size
);
1395 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1396 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1399 internal_error (__FILE__
, __LINE__
,
1400 _("Cannot extract return value of %d bytes long."), len
);
1404 /* Write, for architecture GDBARCH, a function return value of TYPE
1405 from VALBUF into REGCACHE. */
1408 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1409 struct regcache
*regcache
, const gdb_byte
*valbuf
)
1411 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1412 int len
= TYPE_LENGTH (type
);
1414 /* Define I387_ST0_REGNUM such that we use the proper definitions
1415 for the architecture. */
1416 #define I387_ST0_REGNUM I386_ST0_REGNUM
1418 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1421 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1423 if (tdep
->st0_regnum
< 0)
1425 warning (_("Cannot set floating-point return value."));
1429 /* Returning floating-point values is a bit tricky. Apart from
1430 storing the return value in %st(0), we have to simulate the
1431 state of the FPU at function return point. */
1433 /* Convert the value found in VALBUF to the extended
1434 floating-point format used by the FPU. This is probably
1435 not exactly how it would happen on the target itself, but
1436 it is the best we can do. */
1437 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1438 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1440 /* Set the top of the floating-point register stack to 7. The
1441 actual value doesn't really matter, but 7 is what a normal
1442 function return would end up with if the program started out
1443 with a freshly initialized FPU. */
1444 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1446 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1448 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1449 the floating-point register stack to 7, the appropriate value
1450 for the tag word is 0x3fff. */
1451 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1455 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1456 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1458 if (len
<= low_size
)
1459 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1460 else if (len
<= (low_size
+ high_size
))
1462 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1463 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1464 len
- low_size
, valbuf
+ low_size
);
1467 internal_error (__FILE__
, __LINE__
,
1468 _("Cannot store return value of %d bytes long."), len
);
1471 #undef I387_ST0_REGNUM
1475 /* This is the variable that is set with "set struct-convention", and
1476 its legitimate values. */
1477 static const char default_struct_convention
[] = "default";
1478 static const char pcc_struct_convention
[] = "pcc";
1479 static const char reg_struct_convention
[] = "reg";
1480 static const char *valid_conventions
[] =
1482 default_struct_convention
,
1483 pcc_struct_convention
,
1484 reg_struct_convention
,
1487 static const char *struct_convention
= default_struct_convention
;
1489 /* Return non-zero if TYPE, which is assumed to be a structure,
1490 a union type, or an array type, should be returned in registers
1491 for architecture GDBARCH. */
1494 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1496 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1497 enum type_code code
= TYPE_CODE (type
);
1498 int len
= TYPE_LENGTH (type
);
1500 gdb_assert (code
== TYPE_CODE_STRUCT
1501 || code
== TYPE_CODE_UNION
1502 || code
== TYPE_CODE_ARRAY
);
1504 if (struct_convention
== pcc_struct_convention
1505 || (struct_convention
== default_struct_convention
1506 && tdep
->struct_return
== pcc_struct_return
))
1509 /* Structures consisting of a single `float', `double' or 'long
1510 double' member are returned in %st(0). */
1511 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1513 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1514 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1515 return (len
== 4 || len
== 8 || len
== 12);
1518 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1521 /* Determine, for architecture GDBARCH, how a return value of TYPE
1522 should be returned. If it is supposed to be returned in registers,
1523 and READBUF is non-zero, read the appropriate value from REGCACHE,
1524 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1525 from WRITEBUF into REGCACHE. */
1527 static enum return_value_convention
1528 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1529 struct regcache
*regcache
, gdb_byte
*readbuf
,
1530 const gdb_byte
*writebuf
)
1532 enum type_code code
= TYPE_CODE (type
);
1534 if ((code
== TYPE_CODE_STRUCT
1535 || code
== TYPE_CODE_UNION
1536 || code
== TYPE_CODE_ARRAY
)
1537 && !i386_reg_struct_return_p (gdbarch
, type
))
1539 /* The System V ABI says that:
1541 "A function that returns a structure or union also sets %eax
1542 to the value of the original address of the caller's area
1543 before it returns. Thus when the caller receives control
1544 again, the address of the returned object resides in register
1545 %eax and can be used to access the object."
1547 So the ABI guarantees that we can always find the return
1548 value just after the function has returned. */
1550 /* Note that the ABI doesn't mention functions returning arrays,
1551 which is something possible in certain languages such as Ada.
1552 In this case, the value is returned as if it was wrapped in
1553 a record, so the convention applied to records also applies
1560 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
1561 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1564 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
1567 /* This special case is for structures consisting of a single
1568 `float', `double' or 'long double' member. These structures are
1569 returned in %st(0). For these structures, we call ourselves
1570 recursively, changing TYPE into the type of the first member of
1571 the structure. Since that should work for all structures that
1572 have only one member, we don't bother to check the member's type
1574 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1576 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1577 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1581 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1583 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1585 return RETURN_VALUE_REGISTER_CONVENTION
;
1589 /* Type for %eflags. */
1590 struct type
*i386_eflags_type
;
1592 /* Types for the MMX and SSE registers. */
1593 struct type
*i386_mmx_type
;
1594 struct type
*i386_sse_type
;
1595 struct type
*i386_mxcsr_type
;
1597 /* Construct types for ISA-specific registers. */
1599 i386_init_types (void)
1603 type
= init_flags_type ("builtin_type_i386_eflags", 4);
1604 append_flags_type_flag (type
, 0, "CF");
1605 append_flags_type_flag (type
, 1, NULL
);
1606 append_flags_type_flag (type
, 2, "PF");
1607 append_flags_type_flag (type
, 4, "AF");
1608 append_flags_type_flag (type
, 6, "ZF");
1609 append_flags_type_flag (type
, 7, "SF");
1610 append_flags_type_flag (type
, 8, "TF");
1611 append_flags_type_flag (type
, 9, "IF");
1612 append_flags_type_flag (type
, 10, "DF");
1613 append_flags_type_flag (type
, 11, "OF");
1614 append_flags_type_flag (type
, 14, "NT");
1615 append_flags_type_flag (type
, 16, "RF");
1616 append_flags_type_flag (type
, 17, "VM");
1617 append_flags_type_flag (type
, 18, "AC");
1618 append_flags_type_flag (type
, 19, "VIF");
1619 append_flags_type_flag (type
, 20, "VIP");
1620 append_flags_type_flag (type
, 21, "ID");
1621 i386_eflags_type
= type
;
1623 /* The type we're building is this: */
1625 union __gdb_builtin_type_vec64i
1628 int32_t v2_int32
[2];
1629 int16_t v4_int16
[4];
1634 type
= init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
1635 append_composite_type_field (type
, "uint64", builtin_type_int64
);
1636 append_composite_type_field (type
, "v2_int32", builtin_type_v2_int32
);
1637 append_composite_type_field (type
, "v4_int16", builtin_type_v4_int16
);
1638 append_composite_type_field (type
, "v8_int8", builtin_type_v8_int8
);
1639 TYPE_FLAGS (type
) |= TYPE_FLAG_VECTOR
;
1640 TYPE_NAME (type
) = "builtin_type_vec64i";
1641 i386_mmx_type
= type
;
1643 /* The type we're building is this: */
1645 union __gdb_builtin_type_vec128i
1648 int64_t v2_int64
[2];
1649 int32_t v4_int32
[4];
1650 int16_t v8_int16
[8];
1651 int8_t v16_int8
[16];
1652 double v2_double
[2];
1657 type
= init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION
);
1658 append_composite_type_field (type
, "v4_float", builtin_type_v4_float
);
1659 append_composite_type_field (type
, "v2_double", builtin_type_v2_double
);
1660 append_composite_type_field (type
, "v16_int8", builtin_type_v16_int8
);
1661 append_composite_type_field (type
, "v8_int16", builtin_type_v8_int16
);
1662 append_composite_type_field (type
, "v4_int32", builtin_type_v4_int32
);
1663 append_composite_type_field (type
, "v2_int64", builtin_type_v2_int64
);
1664 append_composite_type_field (type
, "uint128", builtin_type_int128
);
1665 TYPE_FLAGS (type
) |= TYPE_FLAG_VECTOR
;
1666 TYPE_NAME (type
) = "builtin_type_vec128i";
1667 i386_sse_type
= type
;
1669 type
= init_flags_type ("builtin_type_i386_mxcsr", 4);
1670 append_flags_type_flag (type
, 0, "IE");
1671 append_flags_type_flag (type
, 1, "DE");
1672 append_flags_type_flag (type
, 2, "ZE");
1673 append_flags_type_flag (type
, 3, "OE");
1674 append_flags_type_flag (type
, 4, "UE");
1675 append_flags_type_flag (type
, 5, "PE");
1676 append_flags_type_flag (type
, 6, "DAZ");
1677 append_flags_type_flag (type
, 7, "IM");
1678 append_flags_type_flag (type
, 8, "DM");
1679 append_flags_type_flag (type
, 9, "ZM");
1680 append_flags_type_flag (type
, 10, "OM");
1681 append_flags_type_flag (type
, 11, "UM");
1682 append_flags_type_flag (type
, 12, "PM");
1683 append_flags_type_flag (type
, 15, "FZ");
1684 i386_mxcsr_type
= type
;
1687 /* Return the GDB type object for the "standard" data type of data in
1688 register REGNUM. Perhaps %esi and %edi should go here, but
1689 potentially they could be used for things other than address. */
1691 static struct type
*
1692 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1694 if (regnum
== I386_EIP_REGNUM
)
1695 return builtin_type_void_func_ptr
;
1697 if (regnum
== I386_EFLAGS_REGNUM
)
1698 return i386_eflags_type
;
1700 if (regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1701 return builtin_type_void_data_ptr
;
1703 if (i386_fp_regnum_p (regnum
))
1704 return builtin_type_i387_ext
;
1706 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1707 return i386_mmx_type
;
1709 if (i386_sse_regnum_p (gdbarch
, regnum
))
1710 return i386_sse_type
;
1712 #define I387_ST0_REGNUM I386_ST0_REGNUM
1713 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
1715 if (regnum
== I387_MXCSR_REGNUM
)
1716 return i386_mxcsr_type
;
1718 #undef I387_ST0_REGNUM
1719 #undef I387_NUM_XMM_REGS
1721 return builtin_type_int
;
1724 /* Map a cooked register onto a raw register or memory. For the i386,
1725 the MMX registers need to be mapped onto floating point registers. */
1728 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1730 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1735 /* Define I387_ST0_REGNUM such that we use the proper definitions
1736 for REGCACHE's architecture. */
1737 #define I387_ST0_REGNUM tdep->st0_regnum
1739 mmxreg
= regnum
- tdep
->mm0_regnum
;
1740 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1741 tos
= (fstat
>> 11) & 0x7;
1742 fpreg
= (mmxreg
+ tos
) % 8;
1744 return (I387_ST0_REGNUM
+ fpreg
);
1746 #undef I387_ST0_REGNUM
1750 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1751 int regnum
, gdb_byte
*buf
)
1753 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1755 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1756 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1758 /* Extract (always little endian). */
1759 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1760 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1763 regcache_raw_read (regcache
, regnum
, buf
);
1767 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1768 int regnum
, const gdb_byte
*buf
)
1770 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1772 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1773 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1776 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1777 /* ... Modify ... (always little endian). */
1778 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1780 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1783 regcache_raw_write (regcache
, regnum
, buf
);
1787 /* Return the register number of the register allocated by GCC after
1788 REGNUM, or -1 if there is no such register. */
1791 i386_next_regnum (int regnum
)
1793 /* GCC allocates the registers in the order:
1795 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1797 Since storing a variable in %esp doesn't make any sense we return
1798 -1 for %ebp and for %esp itself. */
1799 static int next_regnum
[] =
1801 I386_EDX_REGNUM
, /* Slot for %eax. */
1802 I386_EBX_REGNUM
, /* Slot for %ecx. */
1803 I386_ECX_REGNUM
, /* Slot for %edx. */
1804 I386_ESI_REGNUM
, /* Slot for %ebx. */
1805 -1, -1, /* Slots for %esp and %ebp. */
1806 I386_EDI_REGNUM
, /* Slot for %esi. */
1807 I386_EBP_REGNUM
/* Slot for %edi. */
1810 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1811 return next_regnum
[regnum
];
1816 /* Return nonzero if a value of type TYPE stored in register REGNUM
1817 needs any special handling. */
1820 i386_convert_register_p (int regnum
, struct type
*type
)
1822 int len
= TYPE_LENGTH (type
);
1824 /* Values may be spread across multiple registers. Most debugging
1825 formats aren't expressive enough to specify the locations, so
1826 some heuristics is involved. Right now we only handle types that
1827 have a length that is a multiple of the word size, since GCC
1828 doesn't seem to put any other types into registers. */
1829 if (len
> 4 && len
% 4 == 0)
1831 int last_regnum
= regnum
;
1835 last_regnum
= i386_next_regnum (last_regnum
);
1839 if (last_regnum
!= -1)
1843 return i386_fp_regnum_p (regnum
);
1846 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1847 return its contents in TO. */
1850 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1851 struct type
*type
, gdb_byte
*to
)
1853 int len
= TYPE_LENGTH (type
);
1855 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1856 available in FRAME (i.e. if it wasn't saved)? */
1858 if (i386_fp_regnum_p (regnum
))
1860 i387_register_to_value (frame
, regnum
, type
, to
);
1864 /* Read a value spread across multiple registers. */
1866 gdb_assert (len
> 4 && len
% 4 == 0);
1870 gdb_assert (regnum
!= -1);
1871 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1873 get_frame_register (frame
, regnum
, to
);
1874 regnum
= i386_next_regnum (regnum
);
1880 /* Write the contents FROM of a value of type TYPE into register
1881 REGNUM in frame FRAME. */
1884 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1885 struct type
*type
, const gdb_byte
*from
)
1887 int len
= TYPE_LENGTH (type
);
1889 if (i386_fp_regnum_p (regnum
))
1891 i387_value_to_register (frame
, regnum
, type
, from
);
1895 /* Write a value spread across multiple registers. */
1897 gdb_assert (len
> 4 && len
% 4 == 0);
1901 gdb_assert (regnum
!= -1);
1902 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1904 put_frame_register (frame
, regnum
, from
);
1905 regnum
= i386_next_regnum (regnum
);
1911 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1912 in the general-purpose register set REGSET to register cache
1913 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1916 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1917 int regnum
, const void *gregs
, size_t len
)
1919 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1920 const gdb_byte
*regs
= gregs
;
1923 gdb_assert (len
== tdep
->sizeof_gregset
);
1925 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1927 if ((regnum
== i
|| regnum
== -1)
1928 && tdep
->gregset_reg_offset
[i
] != -1)
1929 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1933 /* Collect register REGNUM from the register cache REGCACHE and store
1934 it in the buffer specified by GREGS and LEN as described by the
1935 general-purpose register set REGSET. If REGNUM is -1, do this for
1936 all registers in REGSET. */
1939 i386_collect_gregset (const struct regset
*regset
,
1940 const struct regcache
*regcache
,
1941 int regnum
, void *gregs
, size_t len
)
1943 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1944 gdb_byte
*regs
= gregs
;
1947 gdb_assert (len
== tdep
->sizeof_gregset
);
1949 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1951 if ((regnum
== i
|| regnum
== -1)
1952 && tdep
->gregset_reg_offset
[i
] != -1)
1953 regcache_raw_collect (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1957 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
1958 in the floating-point register set REGSET to register cache
1959 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1962 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1963 int regnum
, const void *fpregs
, size_t len
)
1965 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1967 if (len
== I387_SIZEOF_FXSAVE
)
1969 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1973 gdb_assert (len
== tdep
->sizeof_fpregset
);
1974 i387_supply_fsave (regcache
, regnum
, fpregs
);
1977 /* Collect register REGNUM from the register cache REGCACHE and store
1978 it in the buffer specified by FPREGS and LEN as described by the
1979 floating-point register set REGSET. If REGNUM is -1, do this for
1980 all registers in REGSET. */
1983 i386_collect_fpregset (const struct regset
*regset
,
1984 const struct regcache
*regcache
,
1985 int regnum
, void *fpregs
, size_t len
)
1987 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1989 if (len
== I387_SIZEOF_FXSAVE
)
1991 i387_collect_fxsave (regcache
, regnum
, fpregs
);
1995 gdb_assert (len
== tdep
->sizeof_fpregset
);
1996 i387_collect_fsave (regcache
, regnum
, fpregs
);
1999 /* Return the appropriate register set for the core section identified
2000 by SECT_NAME and SECT_SIZE. */
2002 const struct regset
*
2003 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
2004 const char *sect_name
, size_t sect_size
)
2006 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2008 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
2010 if (tdep
->gregset
== NULL
)
2011 tdep
->gregset
= regset_alloc (gdbarch
, i386_supply_gregset
,
2012 i386_collect_gregset
);
2013 return tdep
->gregset
;
2016 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
2017 || (strcmp (sect_name
, ".reg-xfp") == 0
2018 && sect_size
== I387_SIZEOF_FXSAVE
))
2020 if (tdep
->fpregset
== NULL
)
2021 tdep
->fpregset
= regset_alloc (gdbarch
, i386_supply_fpregset
,
2022 i386_collect_fpregset
);
2023 return tdep
->fpregset
;
2030 #ifdef STATIC_TRANSFORM_NAME
2031 /* SunPRO encodes the static variables. This is not related to C++
2032 mangling, it is done for C too. */
2035 sunpro_static_transform_name (char *name
)
2038 if (IS_STATIC_TRANSFORM_NAME (name
))
2040 /* For file-local statics there will be a period, a bunch of
2041 junk (the contents of which match a string given in the
2042 N_OPT), a period and the name. For function-local statics
2043 there will be a bunch of junk (which seems to change the
2044 second character from 'A' to 'B'), a period, the name of the
2045 function, and the name. So just skip everything before the
2047 p
= strrchr (name
, '.');
2053 #endif /* STATIC_TRANSFORM_NAME */
2056 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2059 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
2061 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
2063 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
2064 struct minimal_symbol
*indsym
=
2065 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
2066 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
2070 if (strncmp (symname
, "__imp_", 6) == 0
2071 || strncmp (symname
, "_imp_", 5) == 0)
2072 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
2075 return 0; /* Not a trampoline. */
2079 /* Return whether the frame preceding NEXT_FRAME corresponds to a
2080 sigtramp routine. */
2083 i386_sigtramp_p (struct frame_info
*next_frame
)
2085 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2088 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2089 return (name
&& strcmp ("_sigtramp", name
) == 0);
2093 /* We have two flavours of disassembly. The machinery on this page
2094 deals with switching between those. */
2097 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
2099 gdb_assert (disassembly_flavor
== att_flavor
2100 || disassembly_flavor
== intel_flavor
);
2102 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2103 constified, cast to prevent a compiler warning. */
2104 info
->disassembler_options
= (char *) disassembly_flavor
;
2105 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
2107 return print_insn_i386 (pc
, info
);
2111 /* There are a few i386 architecture variants that differ only
2112 slightly from the generic i386 target. For now, we don't give them
2113 their own source file, but include them here. As a consequence,
2114 they'll always be included. */
2116 /* System V Release 4 (SVR4). */
2118 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
2119 sigtramp routine. */
2122 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
2124 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2127 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2128 currently unknown. */
2129 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2130 return (name
&& (strcmp ("_sigreturn", name
) == 0
2131 || strcmp ("_sigacthandler", name
) == 0
2132 || strcmp ("sigvechandler", name
) == 0));
2135 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
2136 routine, return the address of the associated sigcontext (ucontext)
2140 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
2145 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
2146 sp
= extract_unsigned_integer (buf
, 4);
2148 return read_memory_unsigned_integer (sp
+ 8, 4);
2155 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2157 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2158 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2161 /* System V Release 4 (SVR4). */
2164 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2166 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2168 /* System V Release 4 uses ELF. */
2169 i386_elf_init_abi (info
, gdbarch
);
2171 /* System V Release 4 has shared libraries. */
2172 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
2174 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
2175 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
2176 tdep
->sc_pc_offset
= 36 + 14 * 4;
2177 tdep
->sc_sp_offset
= 36 + 17 * 4;
2179 tdep
->jb_pc_offset
= 20;
2185 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2187 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2189 /* DJGPP doesn't have any special frames for signal handlers. */
2190 tdep
->sigtramp_p
= NULL
;
2192 tdep
->jb_pc_offset
= 36;
2198 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2200 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2202 tdep
->jb_pc_offset
= 24;
2206 /* i386 register groups. In addition to the normal groups, add "mmx"
2209 static struct reggroup
*i386_sse_reggroup
;
2210 static struct reggroup
*i386_mmx_reggroup
;
2213 i386_init_reggroups (void)
2215 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
2216 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
2220 i386_add_reggroups (struct gdbarch
*gdbarch
)
2222 reggroup_add (gdbarch
, i386_sse_reggroup
);
2223 reggroup_add (gdbarch
, i386_mmx_reggroup
);
2224 reggroup_add (gdbarch
, general_reggroup
);
2225 reggroup_add (gdbarch
, float_reggroup
);
2226 reggroup_add (gdbarch
, all_reggroup
);
2227 reggroup_add (gdbarch
, save_reggroup
);
2228 reggroup_add (gdbarch
, restore_reggroup
);
2229 reggroup_add (gdbarch
, vector_reggroup
);
2230 reggroup_add (gdbarch
, system_reggroup
);
2234 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
2235 struct reggroup
*group
)
2237 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
2238 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
2239 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
2240 || i386_fpc_regnum_p (regnum
));
2241 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
2243 if (group
== i386_mmx_reggroup
)
2244 return mmx_regnum_p
;
2245 if (group
== i386_sse_reggroup
)
2246 return sse_regnum_p
;
2247 if (group
== vector_reggroup
)
2248 return (mmx_regnum_p
|| sse_regnum_p
);
2249 if (group
== float_reggroup
)
2251 if (group
== general_reggroup
)
2252 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
2254 return default_register_reggroup_p (gdbarch
, regnum
, group
);
2258 /* Get the ARGIth function argument for the current function. */
2261 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
2264 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
2265 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
2269 static struct gdbarch
*
2270 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2272 struct gdbarch_tdep
*tdep
;
2273 struct gdbarch
*gdbarch
;
2275 /* If there is already a candidate, use it. */
2276 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2278 return arches
->gdbarch
;
2280 /* Allocate space for the new architecture. */
2281 tdep
= XMALLOC (struct gdbarch_tdep
);
2282 gdbarch
= gdbarch_alloc (&info
, tdep
);
2284 /* General-purpose registers. */
2285 tdep
->gregset
= NULL
;
2286 tdep
->gregset_reg_offset
= NULL
;
2287 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
2288 tdep
->sizeof_gregset
= 0;
2290 /* Floating-point registers. */
2291 tdep
->fpregset
= NULL
;
2292 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
2294 /* The default settings include the FPU registers, the MMX registers
2295 and the SSE registers. This can be overridden for a specific ABI
2296 by adjusting the members `st0_regnum', `mm0_regnum' and
2297 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2298 will show up in the output of "info all-registers". Ideally we
2299 should try to autodetect whether they are available, such that we
2300 can prevent "info all-registers" from displaying registers that
2303 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2304 [the SSE registers] always (even when they don't exist) or never
2305 showing them to the user (even when they do exist), I prefer the
2306 former over the latter. */
2308 tdep
->st0_regnum
= I386_ST0_REGNUM
;
2310 /* The MMX registers are implemented as pseudo-registers. Put off
2311 calculating the register number for %mm0 until we know the number
2312 of raw registers. */
2313 tdep
->mm0_regnum
= 0;
2315 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2316 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
2318 tdep
->jb_pc_offset
= -1;
2319 tdep
->struct_return
= pcc_struct_return
;
2320 tdep
->sigtramp_start
= 0;
2321 tdep
->sigtramp_end
= 0;
2322 tdep
->sigtramp_p
= i386_sigtramp_p
;
2323 tdep
->sigcontext_addr
= NULL
;
2324 tdep
->sc_reg_offset
= NULL
;
2325 tdep
->sc_pc_offset
= -1;
2326 tdep
->sc_sp_offset
= -1;
2328 /* The format used for `long double' on almost all i386 targets is
2329 the i387 extended floating-point format. In fact, of all targets
2330 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2331 on having a `long double' that's not `long' at all. */
2332 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
2334 /* Although the i387 extended floating-point has only 80 significant
2335 bits, a `long double' actually takes up 96, probably to enforce
2337 set_gdbarch_long_double_bit (gdbarch
, 96);
2339 /* The default ABI includes general-purpose registers,
2340 floating-point registers, and the SSE registers. */
2341 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2342 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2343 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2345 /* Register numbers of various important registers. */
2346 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2347 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2348 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2349 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2351 /* NOTE: kettenis/20040418: GCC does have two possible register
2352 numbering schemes on the i386: dbx and SVR4. These schemes
2353 differ in how they number %ebp, %esp, %eflags, and the
2354 floating-point registers, and are implemented by the arrays
2355 dbx_register_map[] and svr4_dbx_register_map in
2356 gcc/config/i386.c. GCC also defines a third numbering scheme in
2357 gcc/config/i386.c, which it designates as the "default" register
2358 map used in 64bit mode. This last register numbering scheme is
2359 implemented in dbx64_register_map, and is used for AMD64; see
2362 Currently, each GCC i386 target always uses the same register
2363 numbering scheme across all its supported debugging formats
2364 i.e. SDB (COFF), stabs and DWARF 2. This is because
2365 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2366 DBX_REGISTER_NUMBER macro which is defined by each target's
2367 respective config header in a manner independent of the requested
2368 output debugging format.
2370 This does not match the arrangement below, which presumes that
2371 the SDB and stabs numbering schemes differ from the DWARF and
2372 DWARF 2 ones. The reason for this arrangement is that it is
2373 likely to get the numbering scheme for the target's
2374 default/native debug format right. For targets where GCC is the
2375 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2376 targets where the native toolchain uses a different numbering
2377 scheme for a particular debug format (stabs-in-ELF on Solaris)
2378 the defaults below will have to be overridden, like
2379 i386_elf_init_abi() does. */
2381 /* Use the dbx register numbering scheme for stabs and COFF. */
2382 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2383 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2385 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2386 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2387 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2389 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2390 be in use on any of the supported i386 targets. */
2392 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2394 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2396 /* Call dummy code. */
2397 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2399 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2400 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2401 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2403 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2405 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2407 /* Stack grows downward. */
2408 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2410 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2411 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2413 set_gdbarch_frame_args_skip (gdbarch
, 8);
2415 /* Wire in the MMX registers. */
2416 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2417 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2418 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2420 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2422 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2424 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2426 /* Add the i386 register groups. */
2427 i386_add_reggroups (gdbarch
);
2428 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2430 /* Helper for function argument information. */
2431 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2433 /* Hook in the DWARF CFI frame unwinder. */
2434 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2436 frame_base_set_default (gdbarch
, &i386_frame_base
);
2438 /* Hook in ABI-specific overrides, if they have been registered. */
2439 gdbarch_init_osabi (info
, gdbarch
);
2441 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2442 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2444 /* If we have a register mapping, enable the generic core file
2445 support, unless it has already been enabled. */
2446 if (tdep
->gregset_reg_offset
2447 && !gdbarch_regset_from_core_section_p (gdbarch
))
2448 set_gdbarch_regset_from_core_section (gdbarch
,
2449 i386_regset_from_core_section
);
2451 /* Unless support for MMX has been disabled, make %mm0 the first
2453 if (tdep
->mm0_regnum
== 0)
2454 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2459 static enum gdb_osabi
2460 i386_coff_osabi_sniffer (bfd
*abfd
)
2462 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2463 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2464 return GDB_OSABI_GO32
;
2466 return GDB_OSABI_UNKNOWN
;
2469 static enum gdb_osabi
2470 i386_nlm_osabi_sniffer (bfd
*abfd
)
2472 return GDB_OSABI_NETWARE
;
2476 /* Provide a prototype to silence -Wmissing-prototypes. */
2477 void _initialize_i386_tdep (void);
2480 _initialize_i386_tdep (void)
2482 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2484 /* Add the variable that controls the disassembly flavor. */
2485 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
2486 &disassembly_flavor
, _("\
2487 Set the disassembly flavor."), _("\
2488 Show the disassembly flavor."), _("\
2489 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2491 NULL
, /* FIXME: i18n: */
2492 &setlist
, &showlist
);
2494 /* Add the variable that controls the convention for returning
2496 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
2497 &struct_convention
, _("\
2498 Set the convention for returning small structs."), _("\
2499 Show the convention for returning small structs."), _("\
2500 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2503 NULL
, /* FIXME: i18n: */
2504 &setlist
, &showlist
);
2506 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2507 i386_coff_osabi_sniffer
);
2508 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2509 i386_nlm_osabi_sniffer
);
2511 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2512 i386_svr4_init_abi
);
2513 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2514 i386_go32_init_abi
);
2515 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2518 /* Initialize the i386-specific register groups & types. */
2519 i386_init_reggroups ();