1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
52 /* Names of the registers. The first 10 registers match the register
53 numbering scheme used by GCC for stabs and DWARF. */
55 static char *i386_register_names
[] =
57 "eax", "ecx", "edx", "ebx",
58 "esp", "ebp", "esi", "edi",
59 "eip", "eflags", "cs", "ss",
60 "ds", "es", "fs", "gs",
61 "st0", "st1", "st2", "st3",
62 "st4", "st5", "st6", "st7",
63 "fctrl", "fstat", "ftag", "fiseg",
64 "fioff", "foseg", "fooff", "fop",
65 "xmm0", "xmm1", "xmm2", "xmm3",
66 "xmm4", "xmm5", "xmm6", "xmm7",
70 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
74 static char *i386_mmx_names
[] =
76 "mm0", "mm1", "mm2", "mm3",
77 "mm4", "mm5", "mm6", "mm7"
80 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
83 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
85 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
90 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
96 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
98 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
100 #define I387_ST0_REGNUM tdep->st0_regnum
101 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
103 if (I387_NUM_XMM_REGS
== 0)
106 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
108 #undef I387_ST0_REGNUM
109 #undef I387_NUM_XMM_REGS
113 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
115 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
117 #define I387_ST0_REGNUM tdep->st0_regnum
118 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
120 if (I387_NUM_XMM_REGS
== 0)
123 return (regnum
== I387_MXCSR_REGNUM
);
125 #undef I387_ST0_REGNUM
126 #undef I387_NUM_XMM_REGS
129 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
130 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
131 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
136 i386_fp_regnum_p (int regnum
)
138 if (I387_ST0_REGNUM
< 0)
141 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
145 i386_fpc_regnum_p (int regnum
)
147 if (I387_ST0_REGNUM
< 0)
150 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
153 /* Return the name of register REG. */
156 i386_register_name (int reg
)
158 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
159 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
161 if (reg
>= 0 && reg
< i386_num_register_names
)
162 return i386_register_names
[reg
];
167 /* Convert stabs register number REG to the appropriate register
168 number used by GDB. */
171 i386_stab_reg_to_regnum (int reg
)
173 /* This implements what GCC calls the "default" register map. */
174 if (reg
>= 0 && reg
<= 7)
176 /* General-purpose registers. */
179 else if (reg
>= 12 && reg
<= 19)
181 /* Floating-point registers. */
182 return reg
- 12 + I387_ST0_REGNUM
;
184 else if (reg
>= 21 && reg
<= 28)
187 return reg
- 21 + I387_XMM0_REGNUM
;
189 else if (reg
>= 29 && reg
<= 36)
192 return reg
- 29 + I387_MM0_REGNUM
;
195 /* This will hopefully provoke a warning. */
196 return NUM_REGS
+ NUM_PSEUDO_REGS
;
199 /* Convert DWARF register number REG to the appropriate register
200 number used by GDB. */
203 i386_dwarf_reg_to_regnum (int reg
)
205 /* The DWARF register numbering includes %eip and %eflags, and
206 numbers the floating point registers differently. */
207 if (reg
>= 0 && reg
<= 9)
209 /* General-purpose registers. */
212 else if (reg
>= 11 && reg
<= 18)
214 /* Floating-point registers. */
215 return reg
- 11 + I387_ST0_REGNUM
;
219 /* The SSE and MMX registers have identical numbers as in stabs. */
220 return i386_stab_reg_to_regnum (reg
);
223 /* This will hopefully provoke a warning. */
224 return NUM_REGS
+ NUM_PSEUDO_REGS
;
227 #undef I387_ST0_REGNUM
228 #undef I387_MM0_REGNUM
229 #undef I387_NUM_XMM_REGS
232 /* This is the variable that is set with "set disassembly-flavor", and
233 its legitimate values. */
234 static const char att_flavor
[] = "att";
235 static const char intel_flavor
[] = "intel";
236 static const char *valid_flavors
[] =
242 static const char *disassembly_flavor
= att_flavor
;
245 /* Use the program counter to determine the contents and size of a
246 breakpoint instruction. Return a pointer to a string of bytes that
247 encode a breakpoint instruction, store the length of the string in
248 *LEN and optionally adjust *PC to point to the correct memory
249 location for inserting the breakpoint.
251 On the i386 we have a single breakpoint that fits in a single byte
252 and can be inserted anywhere.
254 This function is 64-bit safe. */
256 static const unsigned char *
257 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
259 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
261 *len
= sizeof (break_insn
);
265 #ifdef I386_REGNO_TO_SYMMETRY
266 #error "The Sequent Symmetry is no longer supported."
269 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
270 and %esp "belong" to the calling function. Therefore these
271 registers should be saved if they're going to be modified. */
273 /* The maximum number of saved registers. This should include all
274 registers mentioned above, and %eip. */
275 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
277 struct i386_frame_cache
284 /* Saved registers. */
285 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
289 /* Stack space reserved for local variables. */
293 /* Allocate and initialize a frame cache. */
295 static struct i386_frame_cache
*
296 i386_alloc_frame_cache (void)
298 struct i386_frame_cache
*cache
;
301 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
305 cache
->sp_offset
= -4;
308 /* Saved registers. We initialize these to -1 since zero is a valid
309 offset (that's where %ebp is supposed to be stored). */
310 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
311 cache
->saved_regs
[i
] = -1;
313 cache
->pc_in_eax
= 0;
315 /* Frameless until proven otherwise. */
321 /* If the instruction at PC is a jump, return the address of its
322 target. Otherwise, return PC. */
325 i386_follow_jump (CORE_ADDR pc
)
331 op
= read_memory_unsigned_integer (pc
, 1);
335 op
= read_memory_unsigned_integer (pc
+ 1, 1);
341 /* Relative jump: if data16 == 0, disp32, else disp16. */
344 delta
= read_memory_integer (pc
+ 2, 2);
346 /* Include the size of the jmp instruction (including the
352 delta
= read_memory_integer (pc
+ 1, 4);
354 /* Include the size of the jmp instruction. */
359 /* Relative jump, disp8 (ignore data16). */
360 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
369 /* Check whether PC points at a prologue for a function returning a
370 structure or union. If so, it updates CACHE and returns the
371 address of the first instruction after the code sequence that
372 removes the "hidden" argument from the stack or CURRENT_PC,
373 whichever is smaller. Otherwise, return PC. */
376 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
377 struct i386_frame_cache
*cache
)
379 /* Functions that return a structure or union start with:
382 xchgl %eax, (%esp) 0x87 0x04 0x24
383 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
385 (the System V compiler puts out the second `xchg' instruction,
386 and the assembler doesn't try to optimize it, so the 'sib' form
387 gets generated). This sequence is used to get the address of the
388 return buffer for a function that returns a structure. */
389 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
390 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
391 unsigned char buf
[4];
394 if (current_pc
<= pc
)
397 op
= read_memory_unsigned_integer (pc
, 1);
399 if (op
!= 0x58) /* popl %eax */
402 read_memory (pc
+ 1, buf
, 4);
403 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
406 if (current_pc
== pc
)
408 cache
->sp_offset
+= 4;
412 if (current_pc
== pc
+ 1)
414 cache
->pc_in_eax
= 1;
418 if (buf
[1] == proto1
[1])
425 i386_skip_probe (CORE_ADDR pc
)
427 /* A function may start with
438 unsigned char buf
[8];
441 op
= read_memory_unsigned_integer (pc
, 1);
443 if (op
== 0x68 || op
== 0x6a)
447 /* Skip past the `pushl' instruction; it has either a one-byte or a
448 four-byte operand, depending on the opcode. */
454 /* Read the following 8 bytes, which should be `call _probe' (6
455 bytes) followed by `addl $4,%esp' (2 bytes). */
456 read_memory (pc
+ delta
, buf
, sizeof (buf
));
457 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
458 pc
+= delta
+ sizeof (buf
);
464 /* Check whether PC points at a code that sets up a new stack frame.
465 If so, it updates CACHE and returns the address of the first
466 instruction after the sequence that sets removes the "hidden"
467 argument from the stack or CURRENT_PC, whichever is smaller.
468 Otherwise, return PC. */
471 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
472 struct i386_frame_cache
*cache
)
477 if (current_pc
<= pc
)
480 op
= read_memory_unsigned_integer (pc
, 1);
482 if (op
== 0x55) /* pushl %ebp */
484 /* Take into account that we've executed the `pushl %ebp' that
485 starts this instruction sequence. */
486 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
487 cache
->sp_offset
+= 4;
489 /* If that's all, return now. */
490 if (current_pc
<= pc
+ 1)
493 op
= read_memory_unsigned_integer (pc
+ 1, 1);
495 /* Check for some special instructions that might be migrated
496 by GCC into the prologue. We check for
508 Make sure we only skip these instructions if we later see the
509 `movl %esp, %ebp' that actually sets up the frame. */
510 while (op
== 0x29 || op
== 0x31)
512 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
515 case 0xdb: /* %ebx */
516 case 0xc9: /* %ecx */
517 case 0xd2: /* %edx */
524 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
527 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
531 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
535 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
542 /* OK, we actually have a frame. We just don't know how large
543 it is yet. Set its size to zero. We'll adjust it if
544 necessary. We also now commit to skipping the special
545 instructions mentioned before. */
549 /* If that's all, return now. */
550 if (current_pc
<= pc
+ 3)
553 /* Check for stack adjustment
557 NOTE: You can't subtract a 16 bit immediate from a 32 bit
558 reg, so we don't have to worry about a data16 prefix. */
559 op
= read_memory_unsigned_integer (pc
+ 3, 1);
562 /* `subl' with 8 bit immediate. */
563 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
564 /* Some instruction starting with 0x83 other than `subl'. */
567 /* `subl' with signed byte immediate (though it wouldn't make
568 sense to be negative). */
569 cache
->locals
= read_memory_integer (pc
+ 5, 1);
574 /* Maybe it is `subl' with a 32 bit immedediate. */
575 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
576 /* Some instruction starting with 0x81 other than `subl'. */
579 /* It is `subl' with a 32 bit immediate. */
580 cache
->locals
= read_memory_integer (pc
+ 5, 4);
585 /* Some instruction other than `subl'. */
589 else if (op
== 0xc8) /* enter $XXX */
591 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
598 /* Check whether PC points at code that saves registers on the stack.
599 If so, it updates CACHE and returns the address of the first
600 instruction after the register saves or CURRENT_PC, whichever is
601 smaller. Otherwise, return PC. */
604 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
605 struct i386_frame_cache
*cache
)
607 CORE_ADDR offset
= 0;
611 if (cache
->locals
> 0)
612 offset
-= cache
->locals
;
613 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
615 op
= read_memory_unsigned_integer (pc
, 1);
616 if (op
< 0x50 || op
> 0x57)
620 cache
->saved_regs
[op
- 0x50] = offset
;
621 cache
->sp_offset
+= 4;
628 /* Do a full analysis of the prologue at PC and update CACHE
629 accordingly. Bail out early if CURRENT_PC is reached. Return the
630 address where the analysis stopped.
632 We handle these cases:
634 The startup sequence can be at the start of the function, or the
635 function can start with a branch to startup code at the end.
637 %ebp can be set up with either the 'enter' instruction, or "pushl
638 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
639 once used in the System V compiler).
641 Local space is allocated just below the saved %ebp by either the
642 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
643 bit unsigned argument for space to allocate, and the 'addl'
644 instruction could have either a signed byte, or 32 bit immediate.
646 Next, the registers used by this function are pushed. With the
647 System V compiler they will always be in the order: %edi, %esi,
648 %ebx (and sometimes a harmless bug causes it to also save but not
649 restore %eax); however, the code below is willing to see the pushes
650 in any order, and will handle up to 8 of them.
652 If the setup sequence is at the end of the function, then the next
653 instruction will be a branch back to the start. */
656 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
657 struct i386_frame_cache
*cache
)
659 pc
= i386_follow_jump (pc
);
660 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
661 pc
= i386_skip_probe (pc
);
662 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
663 return i386_analyze_register_saves (pc
, current_pc
, cache
);
666 /* Return PC of first real instruction. */
669 i386_skip_prologue (CORE_ADDR start_pc
)
671 static unsigned char pic_pat
[6] =
673 0xe8, 0, 0, 0, 0, /* call 0x0 */
674 0x5b, /* popl %ebx */
676 struct i386_frame_cache cache
;
682 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
683 if (cache
.locals
< 0)
686 /* Found valid frame setup. */
688 /* The native cc on SVR4 in -K PIC mode inserts the following code
689 to get the address of the global offset table (GOT) into register
694 movl %ebx,x(%ebp) (optional)
697 This code is with the rest of the prologue (at the end of the
698 function), so we have to skip it to get to the first real
699 instruction at the start of the function. */
701 for (i
= 0; i
< 6; i
++)
703 op
= read_memory_unsigned_integer (pc
+ i
, 1);
704 if (pic_pat
[i
] != op
)
711 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
713 if (op
== 0x89) /* movl %ebx, x(%ebp) */
715 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
717 if (op
== 0x5d) /* One byte offset from %ebp. */
719 else if (op
== 0x9d) /* Four byte offset from %ebp. */
721 else /* Unexpected instruction. */
724 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
728 if (delta
> 0 && op
== 0x81
729 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
735 return i386_follow_jump (pc
);
738 /* This function is 64-bit safe. */
741 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
745 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
746 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
752 static struct i386_frame_cache
*
753 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
755 struct i386_frame_cache
*cache
;
762 cache
= i386_alloc_frame_cache ();
765 /* In principle, for normal frames, %ebp holds the frame pointer,
766 which holds the base address for the current stack frame.
767 However, for functions that don't need it, the frame pointer is
768 optional. For these "frameless" functions the frame pointer is
769 actually the frame pointer of the calling frame. Signal
770 trampolines are just a special case of a "frameless" function.
771 They (usually) share their frame pointer with the frame that was
772 in progress when the signal occurred. */
774 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
775 cache
->base
= extract_unsigned_integer (buf
, 4);
776 if (cache
->base
== 0)
779 /* For normal frames, %eip is stored at 4(%ebp). */
780 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
782 cache
->pc
= frame_func_unwind (next_frame
);
784 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
786 if (cache
->locals
< 0)
788 /* We didn't find a valid frame, which means that CACHE->base
789 currently holds the frame pointer for our calling frame. If
790 we're at the start of a function, or somewhere half-way its
791 prologue, the function's frame probably hasn't been fully
792 setup yet. Try to reconstruct the base address for the stack
793 frame by looking at the stack pointer. For truly "frameless"
794 functions this might work too. */
796 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
797 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
800 /* Now that we have the base address for the stack frame we can
801 calculate the value of %esp in the calling frame. */
802 cache
->saved_sp
= cache
->base
+ 8;
804 /* Adjust all the saved registers such that they contain addresses
805 instead of offsets. */
806 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
807 if (cache
->saved_regs
[i
] != -1)
808 cache
->saved_regs
[i
] += cache
->base
;
814 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
815 struct frame_id
*this_id
)
817 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
819 /* This marks the outermost frame. */
820 if (cache
->base
== 0)
823 /* See the end of i386_push_dummy_call. */
824 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
828 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
829 int regnum
, int *optimizedp
,
830 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
831 int *realnump
, void *valuep
)
833 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
835 gdb_assert (regnum
>= 0);
837 /* The System V ABI says that:
839 "The flags register contains the system flags, such as the
840 direction flag and the carry flag. The direction flag must be
841 set to the forward (that is, zero) direction before entry and
842 upon exit from a function. Other user flags have no specified
843 role in the standard calling sequence and are not preserved."
845 To guarantee the "upon exit" part of that statement we fake a
846 saved flags register that has its direction flag cleared.
848 Note that GCC doesn't seem to rely on the fact that the direction
849 flag is cleared after a function return; it always explicitly
850 clears the flag before operations where it matters.
852 FIXME: kettenis/20030316: I'm not quite sure whether this is the
853 right thing to do. The way we fake the flags register here makes
854 it impossible to change it. */
856 if (regnum
== I386_EFLAGS_REGNUM
)
866 /* Clear the direction flag. */
867 val
= frame_unwind_register_unsigned (next_frame
,
870 store_unsigned_integer (valuep
, 4, val
);
876 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
878 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
879 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
883 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
891 /* Store the value. */
892 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
897 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
900 *lvalp
= lval_memory
;
901 *addrp
= cache
->saved_regs
[regnum
];
905 /* Read the value in from memory. */
906 read_memory (*addrp
, valuep
,
907 register_size (current_gdbarch
, regnum
));
912 frame_register_unwind (next_frame
, regnum
,
913 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
916 static const struct frame_unwind i386_frame_unwind
=
920 i386_frame_prev_register
923 static const struct frame_unwind
*
924 i386_frame_sniffer (struct frame_info
*next_frame
)
926 return &i386_frame_unwind
;
930 /* Signal trampolines. */
932 static struct i386_frame_cache
*
933 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
935 struct i386_frame_cache
*cache
;
936 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
943 cache
= i386_alloc_frame_cache ();
945 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
946 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
948 addr
= tdep
->sigcontext_addr (next_frame
);
949 if (tdep
->sc_reg_offset
)
953 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
955 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
956 if (tdep
->sc_reg_offset
[i
] != -1)
957 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
961 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
962 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
970 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
971 struct frame_id
*this_id
)
973 struct i386_frame_cache
*cache
=
974 i386_sigtramp_frame_cache (next_frame
, this_cache
);
976 /* See the end of i386_push_dummy_call. */
977 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
981 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
983 int regnum
, int *optimizedp
,
984 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
985 int *realnump
, void *valuep
)
987 /* Make sure we've initialized the cache. */
988 i386_sigtramp_frame_cache (next_frame
, this_cache
);
990 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
991 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
994 static const struct frame_unwind i386_sigtramp_frame_unwind
=
997 i386_sigtramp_frame_this_id
,
998 i386_sigtramp_frame_prev_register
1001 static const struct frame_unwind
*
1002 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1004 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1007 /* We shouldn't even bother to try if the OSABI didn't register
1008 a sigcontext_addr handler. */
1009 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
1012 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1013 if (PC_IN_SIGTRAMP (pc
, name
))
1014 return &i386_sigtramp_frame_unwind
;
1021 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1023 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1028 static const struct frame_base i386_frame_base
=
1031 i386_frame_base_address
,
1032 i386_frame_base_address
,
1033 i386_frame_base_address
1036 static struct frame_id
1037 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1042 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1043 fp
= extract_unsigned_integer (buf
, 4);
1045 /* See the end of i386_push_dummy_call. */
1046 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1050 /* Figure out where the longjmp will land. Slurp the args out of the
1051 stack. We expect the first arg to be a pointer to the jmp_buf
1052 structure from which we extract the address that we will land at.
1053 This address is copied into PC. This routine returns non-zero on
1056 This function is 64-bit safe. */
1059 i386_get_longjmp_target (CORE_ADDR
*pc
)
1062 CORE_ADDR sp
, jb_addr
;
1063 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1064 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1066 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1067 longjmp will land. */
1068 if (jb_pc_offset
== -1)
1071 /* Don't use I386_ESP_REGNUM here, since this function is also used
1073 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1074 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1075 if (target_read_memory (sp
+ len
, buf
, len
))
1078 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1079 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1082 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1088 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1089 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1090 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1091 CORE_ADDR struct_addr
)
1096 /* Push arguments in reverse order. */
1097 for (i
= nargs
- 1; i
>= 0; i
--)
1099 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1101 /* The System V ABI says that:
1103 "An argument's size is increased, if necessary, to make it a
1104 multiple of [32-bit] words. This may require tail padding,
1105 depending on the size of the argument."
1107 This makes sure the stack says word-aligned. */
1108 sp
-= (len
+ 3) & ~3;
1109 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1112 /* Push value address. */
1116 store_unsigned_integer (buf
, 4, struct_addr
);
1117 write_memory (sp
, buf
, 4);
1120 /* Store return address. */
1122 store_unsigned_integer (buf
, 4, bp_addr
);
1123 write_memory (sp
, buf
, 4);
1125 /* Finally, update the stack pointer... */
1126 store_unsigned_integer (buf
, 4, sp
);
1127 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1129 /* ...and fake a frame pointer. */
1130 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1132 /* MarkK wrote: This "+ 8" is all over the place:
1133 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1134 i386_unwind_dummy_id). It's there, since all frame unwinders for
1135 a given target have to agree (within a certain margin) on the
1136 defenition of the stack address of a frame. Otherwise
1137 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1138 stack address *before* the function call as a frame's CFA. On
1139 the i386, when %ebp is used as a frame pointer, the offset
1140 between the contents %ebp and the CFA as defined by GCC. */
1144 /* These registers are used for returning integers (and on some
1145 targets also for returning `struct' and `union' values when their
1146 size and alignment match an integer type). */
1147 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1148 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1150 /* Extract from an array REGBUF containing the (raw) register state, a
1151 function return value of TYPE, and copy that, in virtual format,
1155 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1158 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1159 bfd_byte
*valbuf
= dst
;
1160 int len
= TYPE_LENGTH (type
);
1161 char buf
[I386_MAX_REGISTER_SIZE
];
1163 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1164 && TYPE_NFIELDS (type
) == 1)
1166 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1170 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1172 if (tdep
->st0_regnum
< 0)
1174 warning ("Cannot find floating-point return value.");
1175 memset (valbuf
, 0, len
);
1179 /* Floating-point return values can be found in %st(0). Convert
1180 its contents to the desired type. This is probably not
1181 exactly how it would happen on the target itself, but it is
1182 the best we can do. */
1183 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1184 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1188 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1189 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1191 if (len
<= low_size
)
1193 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1194 memcpy (valbuf
, buf
, len
);
1196 else if (len
<= (low_size
+ high_size
))
1198 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1199 memcpy (valbuf
, buf
, low_size
);
1200 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1201 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1204 internal_error (__FILE__
, __LINE__
,
1205 "Cannot extract return value of %d bytes long.", len
);
1209 /* Write into the appropriate registers a function return value stored
1210 in VALBUF of type TYPE, given in virtual format. */
1213 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1216 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1217 int len
= TYPE_LENGTH (type
);
1219 /* Define I387_ST0_REGNUM such that we use the proper definitions
1220 for the architecture. */
1221 #define I387_ST0_REGNUM I386_ST0_REGNUM
1223 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1224 && TYPE_NFIELDS (type
) == 1)
1226 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1230 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1233 char buf
[I386_MAX_REGISTER_SIZE
];
1235 if (tdep
->st0_regnum
< 0)
1237 warning ("Cannot set floating-point return value.");
1241 /* Returning floating-point values is a bit tricky. Apart from
1242 storing the return value in %st(0), we have to simulate the
1243 state of the FPU at function return point. */
1245 /* Convert the value found in VALBUF to the extended
1246 floating-point format used by the FPU. This is probably
1247 not exactly how it would happen on the target itself, but
1248 it is the best we can do. */
1249 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1250 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1252 /* Set the top of the floating-point register stack to 7. The
1253 actual value doesn't really matter, but 7 is what a normal
1254 function return would end up with if the program started out
1255 with a freshly initialized FPU. */
1256 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1258 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1260 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1261 the floating-point register stack to 7, the appropriate value
1262 for the tag word is 0x3fff. */
1263 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1267 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1268 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1270 if (len
<= low_size
)
1271 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1272 else if (len
<= (low_size
+ high_size
))
1274 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1275 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1276 len
- low_size
, (char *) valbuf
+ low_size
);
1279 internal_error (__FILE__
, __LINE__
,
1280 "Cannot store return value of %d bytes long.", len
);
1283 #undef I387_ST0_REGNUM
1286 /* Extract from REGCACHE, which contains the (raw) register state, the
1287 address in which a function should return its structure value, as a
1291 i386_extract_struct_value_address (struct regcache
*regcache
)
1295 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1296 return extract_unsigned_integer (buf
, 4);
1300 /* This is the variable that is set with "set struct-convention", and
1301 its legitimate values. */
1302 static const char default_struct_convention
[] = "default";
1303 static const char pcc_struct_convention
[] = "pcc";
1304 static const char reg_struct_convention
[] = "reg";
1305 static const char *valid_conventions
[] =
1307 default_struct_convention
,
1308 pcc_struct_convention
,
1309 reg_struct_convention
,
1312 static const char *struct_convention
= default_struct_convention
;
1315 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1317 enum struct_return struct_return
;
1319 if (struct_convention
== default_struct_convention
)
1320 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1321 else if (struct_convention
== pcc_struct_convention
)
1322 struct_return
= pcc_struct_return
;
1324 struct_return
= reg_struct_return
;
1326 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1331 /* Return the GDB type object for the "standard" data type of data in
1332 register REGNUM. Perhaps %esi and %edi should go here, but
1333 potentially they could be used for things other than address. */
1335 static struct type
*
1336 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1338 if (regnum
== I386_EIP_REGNUM
1339 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1340 return lookup_pointer_type (builtin_type_void
);
1342 if (i386_fp_regnum_p (regnum
))
1343 return builtin_type_i387_ext
;
1345 if (i386_sse_regnum_p (gdbarch
, regnum
))
1346 return builtin_type_vec128i
;
1348 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1349 return builtin_type_vec64i
;
1351 return builtin_type_int
;
1354 /* Map a cooked register onto a raw register or memory. For the i386,
1355 the MMX registers need to be mapped onto floating point registers. */
1358 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1360 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1365 /* Define I387_ST0_REGNUM such that we use the proper definitions
1366 for REGCACHE's architecture. */
1367 #define I387_ST0_REGNUM tdep->st0_regnum
1369 mmxreg
= regnum
- tdep
->mm0_regnum
;
1370 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1371 tos
= (fstat
>> 11) & 0x7;
1372 fpreg
= (mmxreg
+ tos
) % 8;
1374 return (I387_ST0_REGNUM
+ fpreg
);
1376 #undef I387_ST0_REGNUM
1380 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1381 int regnum
, void *buf
)
1383 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1385 char mmx_buf
[MAX_REGISTER_SIZE
];
1386 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1388 /* Extract (always little endian). */
1389 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1390 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1393 regcache_raw_read (regcache
, regnum
, buf
);
1397 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1398 int regnum
, const void *buf
)
1400 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1402 char mmx_buf
[MAX_REGISTER_SIZE
];
1403 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1406 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1407 /* ... Modify ... (always little endian). */
1408 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1410 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1413 regcache_raw_write (regcache
, regnum
, buf
);
1417 /* These registers don't have pervasive standard uses. Move them to
1418 i386-tdep.h if necessary. */
1420 #define I386_EBX_REGNUM 3 /* %ebx */
1421 #define I386_ECX_REGNUM 1 /* %ecx */
1422 #define I386_ESI_REGNUM 6 /* %esi */
1423 #define I386_EDI_REGNUM 7 /* %edi */
1425 /* Return the register number of the register allocated by GCC after
1426 REGNUM, or -1 if there is no such register. */
1429 i386_next_regnum (int regnum
)
1431 /* GCC allocates the registers in the order:
1433 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1435 Since storing a variable in %esp doesn't make any sense we return
1436 -1 for %ebp and for %esp itself. */
1437 static int next_regnum
[] =
1439 I386_EDX_REGNUM
, /* Slot for %eax. */
1440 I386_EBX_REGNUM
, /* Slot for %ecx. */
1441 I386_ECX_REGNUM
, /* Slot for %edx. */
1442 I386_ESI_REGNUM
, /* Slot for %ebx. */
1443 -1, -1, /* Slots for %esp and %ebp. */
1444 I386_EDI_REGNUM
, /* Slot for %esi. */
1445 I386_EBP_REGNUM
/* Slot for %edi. */
1448 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1449 return next_regnum
[regnum
];
1454 /* Return nonzero if a value of type TYPE stored in register REGNUM
1455 needs any special handling. */
1458 i386_convert_register_p (int regnum
, struct type
*type
)
1460 int len
= TYPE_LENGTH (type
);
1462 /* Values may be spread across multiple registers. Most debugging
1463 formats aren't expressive enough to specify the locations, so
1464 some heuristics is involved. Right now we only handle types that
1465 have a length that is a multiple of the word size, since GCC
1466 doesn't seem to put any other types into registers. */
1467 if (len
> 4 && len
% 4 == 0)
1469 int last_regnum
= regnum
;
1473 last_regnum
= i386_next_regnum (last_regnum
);
1477 if (last_regnum
!= -1)
1481 return i386_fp_regnum_p (regnum
);
1484 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1485 return its contents in TO. */
1488 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1489 struct type
*type
, void *to
)
1491 int len
= TYPE_LENGTH (type
);
1494 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1495 available in FRAME (i.e. if it wasn't saved)? */
1497 if (i386_fp_regnum_p (regnum
))
1499 i387_register_to_value (frame
, regnum
, type
, to
);
1503 /* Read a value spread accross multiple registers. */
1505 gdb_assert (len
> 4 && len
% 4 == 0);
1509 gdb_assert (regnum
!= -1);
1510 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1512 get_frame_register (frame
, regnum
, buf
);
1513 regnum
= i386_next_regnum (regnum
);
1519 /* Write the contents FROM of a value of type TYPE into register
1520 REGNUM in frame FRAME. */
1523 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1524 struct type
*type
, const void *from
)
1526 int len
= TYPE_LENGTH (type
);
1527 const char *buf
= from
;
1529 if (i386_fp_regnum_p (regnum
))
1531 i387_value_to_register (frame
, regnum
, type
, from
);
1535 /* Write a value spread accross multiple registers. */
1537 gdb_assert (len
> 4 && len
% 4 == 0);
1541 gdb_assert (regnum
!= -1);
1542 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1544 put_frame_register (frame
, regnum
, buf
);
1545 regnum
= i386_next_regnum (regnum
);
1553 #ifdef STATIC_TRANSFORM_NAME
1554 /* SunPRO encodes the static variables. This is not related to C++
1555 mangling, it is done for C too. */
1558 sunpro_static_transform_name (char *name
)
1561 if (IS_STATIC_TRANSFORM_NAME (name
))
1563 /* For file-local statics there will be a period, a bunch of
1564 junk (the contents of which match a string given in the
1565 N_OPT), a period and the name. For function-local statics
1566 there will be a bunch of junk (which seems to change the
1567 second character from 'A' to 'B'), a period, the name of the
1568 function, and the name. So just skip everything before the
1570 p
= strrchr (name
, '.');
1576 #endif /* STATIC_TRANSFORM_NAME */
1579 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1582 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1584 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1586 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1587 struct minimal_symbol
*indsym
=
1588 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1589 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1593 if (strncmp (symname
, "__imp_", 6) == 0
1594 || strncmp (symname
, "_imp_", 5) == 0)
1595 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1598 return 0; /* Not a trampoline. */
1602 /* Return non-zero if PC and NAME show that we are in a signal
1606 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1608 return (name
&& strcmp ("_sigtramp", name
) == 0);
1612 /* We have two flavours of disassembly. The machinery on this page
1613 deals with switching between those. */
1616 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1618 gdb_assert (disassembly_flavor
== att_flavor
1619 || disassembly_flavor
== intel_flavor
);
1621 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1622 constified, cast to prevent a compiler warning. */
1623 info
->disassembler_options
= (char *) disassembly_flavor
;
1624 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1626 return print_insn_i386 (pc
, info
);
1630 /* There are a few i386 architecture variants that differ only
1631 slightly from the generic i386 target. For now, we don't give them
1632 their own source file, but include them here. As a consequence,
1633 they'll always be included. */
1635 /* System V Release 4 (SVR4). */
1638 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1640 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1641 currently unknown. */
1642 return (name
&& (strcmp ("_sigreturn", name
) == 0
1643 || strcmp ("_sigacthandler", name
) == 0
1644 || strcmp ("sigvechandler", name
) == 0));
1647 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1648 routine, return the address of the associated sigcontext (ucontext)
1652 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1657 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1658 sp
= extract_unsigned_integer (buf
, 4);
1660 return read_memory_unsigned_integer (sp
+ 8, 4);
1667 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1669 /* DJGPP doesn't have any special frames for signal handlers. */
1677 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1679 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1680 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1683 /* System V Release 4 (SVR4). */
1686 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1688 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1690 /* System V Release 4 uses ELF. */
1691 i386_elf_init_abi (info
, gdbarch
);
1693 /* System V Release 4 has shared libraries. */
1694 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1695 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1697 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1698 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1699 tdep
->sc_pc_offset
= 36 + 14 * 4;
1700 tdep
->sc_sp_offset
= 36 + 17 * 4;
1702 tdep
->jb_pc_offset
= 20;
1708 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1710 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1712 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1714 tdep
->jb_pc_offset
= 36;
1720 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1722 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1724 tdep
->jb_pc_offset
= 24;
1728 /* i386 register groups. In addition to the normal groups, add "mmx"
1731 static struct reggroup
*i386_sse_reggroup
;
1732 static struct reggroup
*i386_mmx_reggroup
;
1735 i386_init_reggroups (void)
1737 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1738 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1742 i386_add_reggroups (struct gdbarch
*gdbarch
)
1744 reggroup_add (gdbarch
, i386_sse_reggroup
);
1745 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1746 reggroup_add (gdbarch
, general_reggroup
);
1747 reggroup_add (gdbarch
, float_reggroup
);
1748 reggroup_add (gdbarch
, all_reggroup
);
1749 reggroup_add (gdbarch
, save_reggroup
);
1750 reggroup_add (gdbarch
, restore_reggroup
);
1751 reggroup_add (gdbarch
, vector_reggroup
);
1752 reggroup_add (gdbarch
, system_reggroup
);
1756 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1757 struct reggroup
*group
)
1759 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1760 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1761 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1762 || i386_fpc_regnum_p (regnum
));
1763 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1765 if (group
== i386_mmx_reggroup
)
1766 return mmx_regnum_p
;
1767 if (group
== i386_sse_reggroup
)
1768 return sse_regnum_p
;
1769 if (group
== vector_reggroup
)
1770 return (mmx_regnum_p
|| sse_regnum_p
);
1771 if (group
== float_reggroup
)
1773 if (group
== general_reggroup
)
1774 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1776 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1780 /* Get the ARGIth function argument for the current function. */
1783 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1786 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1787 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1791 static struct gdbarch
*
1792 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1794 struct gdbarch_tdep
*tdep
;
1795 struct gdbarch
*gdbarch
;
1797 /* If there is already a candidate, use it. */
1798 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1800 return arches
->gdbarch
;
1802 /* Allocate space for the new architecture. */
1803 tdep
= XMALLOC (struct gdbarch_tdep
);
1804 gdbarch
= gdbarch_alloc (&info
, tdep
);
1806 /* The default settings include the FPU registers, the MMX registers
1807 and the SSE registers. This can be overidden for a specific ABI
1808 by adjusting the members `st0_regnum', `mm0_regnum' and
1809 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1810 will show up in the output of "info all-registers". Ideally we
1811 should try to autodetect whether they are available, such that we
1812 can prevent "info all-registers" from displaying registers that
1815 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1816 [the SSE registers] always (even when they don't exist) or never
1817 showing them to the user (even when they do exist), I prefer the
1818 former over the latter. */
1820 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1822 /* The MMX registers are implemented as pseudo-registers. Put off
1823 caclulating the register number for %mm0 until we know the number
1824 of raw registers. */
1825 tdep
->mm0_regnum
= 0;
1827 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1828 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1830 tdep
->jb_pc_offset
= -1;
1831 tdep
->struct_return
= pcc_struct_return
;
1832 tdep
->sigtramp_start
= 0;
1833 tdep
->sigtramp_end
= 0;
1834 tdep
->sigcontext_addr
= NULL
;
1835 tdep
->sc_reg_offset
= NULL
;
1836 tdep
->sc_pc_offset
= -1;
1837 tdep
->sc_sp_offset
= -1;
1839 /* The format used for `long double' on almost all i386 targets is
1840 the i387 extended floating-point format. In fact, of all targets
1841 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1842 on having a `long double' that's not `long' at all. */
1843 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1845 /* Although the i387 extended floating-point has only 80 significant
1846 bits, a `long double' actually takes up 96, probably to enforce
1848 set_gdbarch_long_double_bit (gdbarch
, 96);
1850 /* The default ABI includes general-purpose registers,
1851 floating-point registers, and the SSE registers. */
1852 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1853 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1854 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1856 /* Register numbers of various important registers. */
1857 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1858 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1859 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1860 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1862 /* Use the "default" register numbering scheme for stabs and COFF. */
1863 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1864 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1866 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1867 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1868 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1870 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1871 be in use on any of the supported i386 targets. */
1873 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1875 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1877 /* Call dummy code. */
1878 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1880 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1881 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1882 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1884 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1885 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1886 set_gdbarch_extract_struct_value_address (gdbarch
,
1887 i386_extract_struct_value_address
);
1888 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1890 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1892 /* Stack grows downward. */
1893 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1895 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1896 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1897 set_gdbarch_function_start_offset (gdbarch
, 0);
1899 set_gdbarch_frame_args_skip (gdbarch
, 8);
1900 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1902 /* Wire in the MMX registers. */
1903 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1904 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1905 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1907 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1909 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1911 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1913 /* Add the i386 register groups. */
1914 i386_add_reggroups (gdbarch
);
1915 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1917 /* Helper for function argument information. */
1918 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1920 /* Hook in the DWARF CFI frame unwinder. */
1921 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1923 frame_base_set_default (gdbarch
, &i386_frame_base
);
1925 /* Hook in ABI-specific overrides, if they have been registered. */
1926 gdbarch_init_osabi (info
, gdbarch
);
1928 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
1929 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
1931 /* Unless support for MMX has been disabled, make %mm0 the first
1933 if (tdep
->mm0_regnum
== 0)
1934 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
1939 static enum gdb_osabi
1940 i386_coff_osabi_sniffer (bfd
*abfd
)
1942 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1943 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1944 return GDB_OSABI_GO32
;
1946 return GDB_OSABI_UNKNOWN
;
1949 static enum gdb_osabi
1950 i386_nlm_osabi_sniffer (bfd
*abfd
)
1952 return GDB_OSABI_NETWARE
;
1956 /* Provide a prototype to silence -Wmissing-prototypes. */
1957 void _initialize_i386_tdep (void);
1960 _initialize_i386_tdep (void)
1962 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1964 /* Add the variable that controls the disassembly flavor. */
1966 struct cmd_list_element
*new_cmd
;
1968 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1970 &disassembly_flavor
,
1972 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1973 and the default value is \"att\".",
1975 add_show_from_set (new_cmd
, &showlist
);
1978 /* Add the variable that controls the convention for returning
1981 struct cmd_list_element
*new_cmd
;
1983 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1985 &struct_convention
, "\
1986 Set the convention for returning small structs, valid values \
1987 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1989 add_show_from_set (new_cmd
, &showlist
);
1992 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1993 i386_coff_osabi_sniffer
);
1994 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1995 i386_nlm_osabi_sniffer
);
1997 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1998 i386_svr4_init_abi
);
1999 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2000 i386_go32_init_abi
);
2001 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2004 /* Initialize the i386 specific register groups. */
2005 i386_init_reggroups ();