1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
25 #include "dummy-frame.h"
26 #include "dwarf2-frame.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
38 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
54 static char *i386_register_names
[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
71 /* Register names for MMX pseudo-registers. */
73 static char *i386_mmx_names
[] =
75 "mm0", "mm1", "mm2", "mm3",
76 "mm4", "mm5", "mm6", "mm7"
79 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
82 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
84 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
89 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
95 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
97 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
99 #define I387_ST0_REGNUM tdep->st0_regnum
100 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
102 if (I387_NUM_XMM_REGS
== 0)
105 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
107 #undef I387_ST0_REGNUM
108 #undef I387_NUM_XMM_REGS
112 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
114 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
116 #define I387_ST0_REGNUM tdep->st0_regnum
117 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
119 if (I387_NUM_XMM_REGS
== 0)
122 return (regnum
== I387_MXCSR_REGNUM
);
124 #undef I387_ST0_REGNUM
125 #undef I387_NUM_XMM_REGS
128 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
129 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
130 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
135 i386_fp_regnum_p (int regnum
)
137 if (I387_ST0_REGNUM
< 0)
140 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
144 i386_fpc_regnum_p (int regnum
)
146 if (I387_ST0_REGNUM
< 0)
149 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
152 /* Return the name of register REGNUM. */
155 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
157 if (i386_mmx_regnum_p (gdbarch
, regnum
))
158 return i386_mmx_names
[regnum
- I387_MM0_REGNUM
];
160 if (regnum
>= 0 && regnum
< i386_num_register_names
)
161 return i386_register_names
[regnum
];
166 /* Convert a dbx register number REG to the appropriate register
167 number used by GDB. */
170 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
172 /* This implements what GCC calls the "default" register map
173 (dbx_register_map[]). */
175 if (reg
>= 0 && reg
<= 7)
177 /* General-purpose registers. The debug info calls %ebp
178 register 4, and %esp register 5. */
185 else if (reg
>= 12 && reg
<= 19)
187 /* Floating-point registers. */
188 return reg
- 12 + I387_ST0_REGNUM
;
190 else if (reg
>= 21 && reg
<= 28)
193 return reg
- 21 + I387_XMM0_REGNUM
;
195 else if (reg
>= 29 && reg
<= 36)
198 return reg
- 29 + I387_MM0_REGNUM
;
201 /* This will hopefully provoke a warning. */
202 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
205 /* Convert SVR4 register number REG to the appropriate register number
209 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
211 /* This implements the GCC register map that tries to be compatible
212 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
214 /* The SVR4 register numbering includes %eip and %eflags, and
215 numbers the floating point registers differently. */
216 if (reg
>= 0 && reg
<= 9)
218 /* General-purpose registers. */
221 else if (reg
>= 11 && reg
<= 18)
223 /* Floating-point registers. */
224 return reg
- 11 + I387_ST0_REGNUM
;
226 else if (reg
>= 21 && reg
<= 36)
228 /* The SSE and MMX registers have the same numbers as with dbx. */
229 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
234 case 37: return I387_FCTRL_REGNUM
;
235 case 38: return I387_FSTAT_REGNUM
;
236 case 39: return I387_MXCSR_REGNUM
;
237 case 40: return I386_ES_REGNUM
;
238 case 41: return I386_CS_REGNUM
;
239 case 42: return I386_SS_REGNUM
;
240 case 43: return I386_DS_REGNUM
;
241 case 44: return I386_FS_REGNUM
;
242 case 45: return I386_GS_REGNUM
;
245 /* This will hopefully provoke a warning. */
246 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
249 #undef I387_ST0_REGNUM
250 #undef I387_MM0_REGNUM
251 #undef I387_NUM_XMM_REGS
254 /* This is the variable that is set with "set disassembly-flavor", and
255 its legitimate values. */
256 static const char att_flavor
[] = "att";
257 static const char intel_flavor
[] = "intel";
258 static const char *valid_flavors
[] =
264 static const char *disassembly_flavor
= att_flavor
;
267 /* Use the program counter to determine the contents and size of a
268 breakpoint instruction. Return a pointer to a string of bytes that
269 encode a breakpoint instruction, store the length of the string in
270 *LEN and optionally adjust *PC to point to the correct memory
271 location for inserting the breakpoint.
273 On the i386 we have a single breakpoint that fits in a single byte
274 and can be inserted anywhere.
276 This function is 64-bit safe. */
278 static const gdb_byte
*
279 i386_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
281 static gdb_byte break_insn
[] = { 0xcc }; /* int 3 */
283 *len
= sizeof (break_insn
);
287 #ifdef I386_REGNO_TO_SYMMETRY
288 #error "The Sequent Symmetry is no longer supported."
291 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
292 and %esp "belong" to the calling function. Therefore these
293 registers should be saved if they're going to be modified. */
295 /* The maximum number of saved registers. This should include all
296 registers mentioned above, and %eip. */
297 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
299 struct i386_frame_cache
306 /* Saved registers. */
307 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
312 /* Stack space reserved for local variables. */
316 /* Allocate and initialize a frame cache. */
318 static struct i386_frame_cache
*
319 i386_alloc_frame_cache (void)
321 struct i386_frame_cache
*cache
;
324 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
328 cache
->sp_offset
= -4;
331 /* Saved registers. We initialize these to -1 since zero is a valid
332 offset (that's where %ebp is supposed to be stored). */
333 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
334 cache
->saved_regs
[i
] = -1;
336 cache
->stack_align
= 0;
337 cache
->pc_in_eax
= 0;
339 /* Frameless until proven otherwise. */
345 /* If the instruction at PC is a jump, return the address of its
346 target. Otherwise, return PC. */
349 i386_follow_jump (CORE_ADDR pc
)
355 read_memory_nobpt (pc
, &op
, 1);
359 op
= read_memory_unsigned_integer (pc
+ 1, 1);
365 /* Relative jump: if data16 == 0, disp32, else disp16. */
368 delta
= read_memory_integer (pc
+ 2, 2);
370 /* Include the size of the jmp instruction (including the
376 delta
= read_memory_integer (pc
+ 1, 4);
378 /* Include the size of the jmp instruction. */
383 /* Relative jump, disp8 (ignore data16). */
384 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
393 /* Check whether PC points at a prologue for a function returning a
394 structure or union. If so, it updates CACHE and returns the
395 address of the first instruction after the code sequence that
396 removes the "hidden" argument from the stack or CURRENT_PC,
397 whichever is smaller. Otherwise, return PC. */
400 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
401 struct i386_frame_cache
*cache
)
403 /* Functions that return a structure or union start with:
406 xchgl %eax, (%esp) 0x87 0x04 0x24
407 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
409 (the System V compiler puts out the second `xchg' instruction,
410 and the assembler doesn't try to optimize it, so the 'sib' form
411 gets generated). This sequence is used to get the address of the
412 return buffer for a function that returns a structure. */
413 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
414 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
418 if (current_pc
<= pc
)
421 read_memory_nobpt (pc
, &op
, 1);
423 if (op
!= 0x58) /* popl %eax */
426 read_memory_nobpt (pc
+ 1, buf
, 4);
427 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
430 if (current_pc
== pc
)
432 cache
->sp_offset
+= 4;
436 if (current_pc
== pc
+ 1)
438 cache
->pc_in_eax
= 1;
442 if (buf
[1] == proto1
[1])
449 i386_skip_probe (CORE_ADDR pc
)
451 /* A function may start with
465 read_memory_nobpt (pc
, &op
, 1);
467 if (op
== 0x68 || op
== 0x6a)
471 /* Skip past the `pushl' instruction; it has either a one-byte or a
472 four-byte operand, depending on the opcode. */
478 /* Read the following 8 bytes, which should be `call _probe' (6
479 bytes) followed by `addl $4,%esp' (2 bytes). */
480 read_memory (pc
+ delta
, buf
, sizeof (buf
));
481 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
482 pc
+= delta
+ sizeof (buf
);
488 /* GCC 4.1 and later, can put code in the prologue to realign the
489 stack pointer. Check whether PC points to such code, and update
490 CACHE accordingly. Return the first instruction after the code
491 sequence or CURRENT_PC, whichever is smaller. If we don't
492 recognize the code, return PC. */
495 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
496 struct i386_frame_cache
*cache
)
498 /* The register used by the compiler to perform the stack re-alignment
499 is, in order of preference, either %ecx, %edx, or %eax. GCC should
500 never use %ebx as it always treats it as callee-saved, whereas
501 the compiler can only use caller-saved registers. */
502 static const gdb_byte insns_ecx
[10] = {
503 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
504 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
505 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
507 static const gdb_byte insns_edx
[10] = {
508 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
509 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
510 0xff, 0x72, 0xfc /* pushl -4(%edx) */
512 static const gdb_byte insns_eax
[10] = {
513 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
514 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
515 0xff, 0x70, 0xfc /* pushl -4(%eax) */
519 if (target_read_memory (pc
, buf
, sizeof buf
)
520 || (memcmp (buf
, insns_ecx
, sizeof buf
) != 0
521 && memcmp (buf
, insns_edx
, sizeof buf
) != 0
522 && memcmp (buf
, insns_eax
, sizeof buf
) != 0))
525 if (current_pc
> pc
+ 4)
526 cache
->stack_align
= 1;
528 return min (pc
+ 10, current_pc
);
531 /* Maximum instruction length we need to handle. */
532 #define I386_MAX_INSN_LEN 6
534 /* Instruction description. */
538 gdb_byte insn
[I386_MAX_INSN_LEN
];
539 gdb_byte mask
[I386_MAX_INSN_LEN
];
542 /* Search for the instruction at PC in the list SKIP_INSNS. Return
543 the first instruction description that matches. Otherwise, return
546 static struct i386_insn
*
547 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*skip_insns
)
549 struct i386_insn
*insn
;
552 read_memory_nobpt (pc
, &op
, 1);
554 for (insn
= skip_insns
; insn
->len
> 0; insn
++)
556 if ((op
& insn
->mask
[0]) == insn
->insn
[0])
558 gdb_byte buf
[I386_MAX_INSN_LEN
- 1];
559 int insn_matched
= 1;
562 gdb_assert (insn
->len
> 1);
563 gdb_assert (insn
->len
<= I386_MAX_INSN_LEN
);
565 read_memory_nobpt (pc
+ 1, buf
, insn
->len
- 1);
566 for (i
= 1; i
< insn
->len
; i
++)
568 if ((buf
[i
- 1] & insn
->mask
[i
]) != insn
->insn
[i
])
580 /* Some special instructions that might be migrated by GCC into the
581 part of the prologue that sets up the new stack frame. Because the
582 stack frame hasn't been setup yet, no registers have been saved
583 yet, and only the scratch registers %eax, %ecx and %edx can be
586 struct i386_insn i386_frame_setup_skip_insns
[] =
588 /* Check for `movb imm8, r' and `movl imm32, r'.
590 ??? Should we handle 16-bit operand-sizes here? */
592 /* `movb imm8, %al' and `movb imm8, %ah' */
593 /* `movb imm8, %cl' and `movb imm8, %ch' */
594 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
595 /* `movb imm8, %dl' and `movb imm8, %dh' */
596 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
597 /* `movl imm32, %eax' and `movl imm32, %ecx' */
598 { 5, { 0xb8 }, { 0xfe } },
599 /* `movl imm32, %edx' */
600 { 5, { 0xba }, { 0xff } },
602 /* Check for `mov imm32, r32'. Note that there is an alternative
603 encoding for `mov m32, %eax'.
605 ??? Should we handle SIB adressing here?
606 ??? Should we handle 16-bit operand-sizes here? */
608 /* `movl m32, %eax' */
609 { 5, { 0xa1 }, { 0xff } },
610 /* `movl m32, %eax' and `mov; m32, %ecx' */
611 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
612 /* `movl m32, %edx' */
613 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
615 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
616 Because of the symmetry, there are actually two ways to encode
617 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
618 opcode bytes 0x31 and 0x33 for `xorl'. */
620 /* `subl %eax, %eax' */
621 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
622 /* `subl %ecx, %ecx' */
623 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
624 /* `subl %edx, %edx' */
625 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
626 /* `xorl %eax, %eax' */
627 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
628 /* `xorl %ecx, %ecx' */
629 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
630 /* `xorl %edx, %edx' */
631 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
635 /* Check whether PC points at a code that sets up a new stack frame.
636 If so, it updates CACHE and returns the address of the first
637 instruction after the sequence that sets up the frame or LIMIT,
638 whichever is smaller. If we don't recognize the code, return PC. */
641 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR limit
,
642 struct i386_frame_cache
*cache
)
644 struct i386_insn
*insn
;
651 read_memory_nobpt (pc
, &op
, 1);
653 if (op
== 0x55) /* pushl %ebp */
655 /* Take into account that we've executed the `pushl %ebp' that
656 starts this instruction sequence. */
657 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
658 cache
->sp_offset
+= 4;
661 /* If that's all, return now. */
665 /* Check for some special instructions that might be migrated by
666 GCC into the prologue and skip them. At this point in the
667 prologue, code should only touch the scratch registers %eax,
668 %ecx and %edx, so while the number of posibilities is sheer,
671 Make sure we only skip these instructions if we later see the
672 `movl %esp, %ebp' that actually sets up the frame. */
673 while (pc
+ skip
< limit
)
675 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
682 /* If that's all, return now. */
683 if (limit
<= pc
+ skip
)
686 read_memory_nobpt (pc
+ skip
, &op
, 1);
688 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
692 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xec)
696 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xe5)
703 /* OK, we actually have a frame. We just don't know how large
704 it is yet. Set its size to zero. We'll adjust it if
705 necessary. We also now commit to skipping the special
706 instructions mentioned before. */
710 /* If that's all, return now. */
714 /* Check for stack adjustment
718 NOTE: You can't subtract a 16-bit immediate from a 32-bit
719 reg, so we don't have to worry about a data16 prefix. */
720 read_memory_nobpt (pc
, &op
, 1);
723 /* `subl' with 8-bit immediate. */
724 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
725 /* Some instruction starting with 0x83 other than `subl'. */
728 /* `subl' with signed 8-bit immediate (though it wouldn't
729 make sense to be negative). */
730 cache
->locals
= read_memory_integer (pc
+ 2, 1);
735 /* Maybe it is `subl' with a 32-bit immediate. */
736 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
737 /* Some instruction starting with 0x81 other than `subl'. */
740 /* It is `subl' with a 32-bit immediate. */
741 cache
->locals
= read_memory_integer (pc
+ 2, 4);
746 /* Some instruction other than `subl'. */
750 else if (op
== 0xc8) /* enter */
752 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
759 /* Check whether PC points at code that saves registers on the stack.
760 If so, it updates CACHE and returns the address of the first
761 instruction after the register saves or CURRENT_PC, whichever is
762 smaller. Otherwise, return PC. */
765 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
766 struct i386_frame_cache
*cache
)
768 CORE_ADDR offset
= 0;
772 if (cache
->locals
> 0)
773 offset
-= cache
->locals
;
774 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
776 read_memory_nobpt (pc
, &op
, 1);
777 if (op
< 0x50 || op
> 0x57)
781 cache
->saved_regs
[op
- 0x50] = offset
;
782 cache
->sp_offset
+= 4;
789 /* Do a full analysis of the prologue at PC and update CACHE
790 accordingly. Bail out early if CURRENT_PC is reached. Return the
791 address where the analysis stopped.
793 We handle these cases:
795 The startup sequence can be at the start of the function, or the
796 function can start with a branch to startup code at the end.
798 %ebp can be set up with either the 'enter' instruction, or "pushl
799 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
800 once used in the System V compiler).
802 Local space is allocated just below the saved %ebp by either the
803 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
804 16-bit unsigned argument for space to allocate, and the 'addl'
805 instruction could have either a signed byte, or 32-bit immediate.
807 Next, the registers used by this function are pushed. With the
808 System V compiler they will always be in the order: %edi, %esi,
809 %ebx (and sometimes a harmless bug causes it to also save but not
810 restore %eax); however, the code below is willing to see the pushes
811 in any order, and will handle up to 8 of them.
813 If the setup sequence is at the end of the function, then the next
814 instruction will be a branch back to the start. */
817 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
818 struct i386_frame_cache
*cache
)
820 pc
= i386_follow_jump (pc
);
821 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
822 pc
= i386_skip_probe (pc
);
823 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
824 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
825 return i386_analyze_register_saves (pc
, current_pc
, cache
);
828 /* Return PC of first real instruction. */
831 i386_skip_prologue (CORE_ADDR start_pc
)
833 static gdb_byte pic_pat
[6] =
835 0xe8, 0, 0, 0, 0, /* call 0x0 */
836 0x5b, /* popl %ebx */
838 struct i386_frame_cache cache
;
844 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
845 if (cache
.locals
< 0)
848 /* Found valid frame setup. */
850 /* The native cc on SVR4 in -K PIC mode inserts the following code
851 to get the address of the global offset table (GOT) into register
856 movl %ebx,x(%ebp) (optional)
859 This code is with the rest of the prologue (at the end of the
860 function), so we have to skip it to get to the first real
861 instruction at the start of the function. */
863 for (i
= 0; i
< 6; i
++)
865 read_memory_nobpt (pc
+ i
, &op
, 1);
866 if (pic_pat
[i
] != op
)
873 read_memory_nobpt (pc
+ delta
, &op
, 1);
875 if (op
== 0x89) /* movl %ebx, x(%ebp) */
877 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
879 if (op
== 0x5d) /* One byte offset from %ebp. */
881 else if (op
== 0x9d) /* Four byte offset from %ebp. */
883 else /* Unexpected instruction. */
886 read_memory_nobpt (pc
+ delta
, &op
, 1);
890 if (delta
> 0 && op
== 0x81
891 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3)
897 /* If the function starts with a branch (to startup code at the end)
898 the last instruction should bring us back to the first
899 instruction of the real code. */
900 if (i386_follow_jump (start_pc
) != start_pc
)
901 pc
= i386_follow_jump (pc
);
906 /* This function is 64-bit safe. */
909 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
913 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
914 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
920 static struct i386_frame_cache
*
921 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
923 struct i386_frame_cache
*cache
;
930 cache
= i386_alloc_frame_cache ();
933 /* In principle, for normal frames, %ebp holds the frame pointer,
934 which holds the base address for the current stack frame.
935 However, for functions that don't need it, the frame pointer is
936 optional. For these "frameless" functions the frame pointer is
937 actually the frame pointer of the calling frame. Signal
938 trampolines are just a special case of a "frameless" function.
939 They (usually) share their frame pointer with the frame that was
940 in progress when the signal occurred. */
942 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
943 cache
->base
= extract_unsigned_integer (buf
, 4);
944 if (cache
->base
== 0)
947 /* For normal frames, %eip is stored at 4(%ebp). */
948 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
950 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
952 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
954 if (cache
->stack_align
)
956 /* Saved stack pointer has been saved in %ecx. */
957 frame_unwind_register (next_frame
, I386_ECX_REGNUM
, buf
);
958 cache
->saved_sp
= extract_unsigned_integer(buf
, 4);
961 if (cache
->locals
< 0)
963 /* We didn't find a valid frame, which means that CACHE->base
964 currently holds the frame pointer for our calling frame. If
965 we're at the start of a function, or somewhere half-way its
966 prologue, the function's frame probably hasn't been fully
967 setup yet. Try to reconstruct the base address for the stack
968 frame by looking at the stack pointer. For truly "frameless"
969 functions this might work too. */
971 if (cache
->stack_align
)
973 /* We're halfway aligning the stack. */
974 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
975 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
977 /* This will be added back below. */
978 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
982 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
983 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
987 /* Now that we have the base address for the stack frame we can
988 calculate the value of %esp in the calling frame. */
989 if (cache
->saved_sp
== 0)
990 cache
->saved_sp
= cache
->base
+ 8;
992 /* Adjust all the saved registers such that they contain addresses
993 instead of offsets. */
994 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
995 if (cache
->saved_regs
[i
] != -1)
996 cache
->saved_regs
[i
] += cache
->base
;
1002 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1003 struct frame_id
*this_id
)
1005 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1007 /* This marks the outermost frame. */
1008 if (cache
->base
== 0)
1011 /* See the end of i386_push_dummy_call. */
1012 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
1016 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1017 int regnum
, int *optimizedp
,
1018 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1019 int *realnump
, gdb_byte
*valuep
)
1021 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1023 gdb_assert (regnum
>= 0);
1025 /* The System V ABI says that:
1027 "The flags register contains the system flags, such as the
1028 direction flag and the carry flag. The direction flag must be
1029 set to the forward (that is, zero) direction before entry and
1030 upon exit from a function. Other user flags have no specified
1031 role in the standard calling sequence and are not preserved."
1033 To guarantee the "upon exit" part of that statement we fake a
1034 saved flags register that has its direction flag cleared.
1036 Note that GCC doesn't seem to rely on the fact that the direction
1037 flag is cleared after a function return; it always explicitly
1038 clears the flag before operations where it matters.
1040 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1041 right thing to do. The way we fake the flags register here makes
1042 it impossible to change it. */
1044 if (regnum
== I386_EFLAGS_REGNUM
)
1054 /* Clear the direction flag. */
1055 val
= frame_unwind_register_unsigned (next_frame
,
1056 I386_EFLAGS_REGNUM
);
1058 store_unsigned_integer (valuep
, 4, val
);
1064 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
1067 *lvalp
= lval_register
;
1069 *realnump
= I386_EAX_REGNUM
;
1071 frame_unwind_register (next_frame
, (*realnump
), valuep
);
1075 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
1083 /* Store the value. */
1084 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
1089 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1092 *lvalp
= lval_memory
;
1093 *addrp
= cache
->saved_regs
[regnum
];
1097 /* Read the value in from memory. */
1098 read_memory (*addrp
, valuep
,
1099 register_size (get_frame_arch (next_frame
), regnum
));
1105 *lvalp
= lval_register
;
1109 frame_unwind_register (next_frame
, (*realnump
), valuep
);
1112 static const struct frame_unwind i386_frame_unwind
=
1116 i386_frame_prev_register
1119 static const struct frame_unwind
*
1120 i386_frame_sniffer (struct frame_info
*next_frame
)
1122 return &i386_frame_unwind
;
1126 /* Signal trampolines. */
1128 static struct i386_frame_cache
*
1129 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1131 struct i386_frame_cache
*cache
;
1132 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1139 cache
= i386_alloc_frame_cache ();
1141 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1142 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
1144 addr
= tdep
->sigcontext_addr (next_frame
);
1145 if (tdep
->sc_reg_offset
)
1149 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1151 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1152 if (tdep
->sc_reg_offset
[i
] != -1)
1153 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1157 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1158 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1161 *this_cache
= cache
;
1166 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1167 struct frame_id
*this_id
)
1169 struct i386_frame_cache
*cache
=
1170 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1172 /* See the end of i386_push_dummy_call. */
1173 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1177 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1179 int regnum
, int *optimizedp
,
1180 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1181 int *realnump
, gdb_byte
*valuep
)
1183 /* Make sure we've initialized the cache. */
1184 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1186 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1187 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1190 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1193 i386_sigtramp_frame_this_id
,
1194 i386_sigtramp_frame_prev_register
1197 static const struct frame_unwind
*
1198 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1200 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1202 /* We shouldn't even bother if we don't have a sigcontext_addr
1204 if (tdep
->sigcontext_addr
== NULL
)
1207 if (tdep
->sigtramp_p
!= NULL
)
1209 if (tdep
->sigtramp_p (next_frame
))
1210 return &i386_sigtramp_frame_unwind
;
1213 if (tdep
->sigtramp_start
!= 0)
1215 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1217 gdb_assert (tdep
->sigtramp_end
!= 0);
1218 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1219 return &i386_sigtramp_frame_unwind
;
1227 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1229 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1234 static const struct frame_base i386_frame_base
=
1237 i386_frame_base_address
,
1238 i386_frame_base_address
,
1239 i386_frame_base_address
1242 static struct frame_id
1243 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1248 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1249 fp
= extract_unsigned_integer (buf
, 4);
1251 /* See the end of i386_push_dummy_call. */
1252 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1256 /* Figure out where the longjmp will land. Slurp the args out of the
1257 stack. We expect the first arg to be a pointer to the jmp_buf
1258 structure from which we extract the address that we will land at.
1259 This address is copied into PC. This routine returns non-zero on
1262 This function is 64-bit safe. */
1265 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1268 CORE_ADDR sp
, jb_addr
;
1269 int jb_pc_offset
= gdbarch_tdep (get_frame_arch (frame
))->jb_pc_offset
;
1270 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1272 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1273 longjmp will land. */
1274 if (jb_pc_offset
== -1)
1277 /* Don't use I386_ESP_REGNUM here, since this function is also used
1279 get_frame_register (frame
, gdbarch_sp_regnum (get_frame_arch (frame
)), buf
);
1280 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1281 if (target_read_memory (sp
+ len
, buf
, len
))
1284 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1285 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1288 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1294 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1295 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1296 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1297 CORE_ADDR struct_addr
)
1302 /* Push arguments in reverse order. */
1303 for (i
= nargs
- 1; i
>= 0; i
--)
1305 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
1307 /* The System V ABI says that:
1309 "An argument's size is increased, if necessary, to make it a
1310 multiple of [32-bit] words. This may require tail padding,
1311 depending on the size of the argument."
1313 This makes sure the stack stays word-aligned. */
1314 sp
-= (len
+ 3) & ~3;
1315 write_memory (sp
, value_contents_all (args
[i
]), len
);
1318 /* Push value address. */
1322 store_unsigned_integer (buf
, 4, struct_addr
);
1323 write_memory (sp
, buf
, 4);
1326 /* Store return address. */
1328 store_unsigned_integer (buf
, 4, bp_addr
);
1329 write_memory (sp
, buf
, 4);
1331 /* Finally, update the stack pointer... */
1332 store_unsigned_integer (buf
, 4, sp
);
1333 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1335 /* ...and fake a frame pointer. */
1336 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1338 /* MarkK wrote: This "+ 8" is all over the place:
1339 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1340 i386_unwind_dummy_id). It's there, since all frame unwinders for
1341 a given target have to agree (within a certain margin) on the
1342 definition of the stack address of a frame. Otherwise
1343 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1344 stack address *before* the function call as a frame's CFA. On
1345 the i386, when %ebp is used as a frame pointer, the offset
1346 between the contents %ebp and the CFA as defined by GCC. */
1350 /* These registers are used for returning integers (and on some
1351 targets also for returning `struct' and `union' values when their
1352 size and alignment match an integer type). */
1353 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1354 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1356 /* Read, for architecture GDBARCH, a function return value of TYPE
1357 from REGCACHE, and copy that into VALBUF. */
1360 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1361 struct regcache
*regcache
, gdb_byte
*valbuf
)
1363 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1364 int len
= TYPE_LENGTH (type
);
1365 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1367 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1369 if (tdep
->st0_regnum
< 0)
1371 warning (_("Cannot find floating-point return value."));
1372 memset (valbuf
, 0, len
);
1376 /* Floating-point return values can be found in %st(0). Convert
1377 its contents to the desired type. This is probably not
1378 exactly how it would happen on the target itself, but it is
1379 the best we can do. */
1380 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1381 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1385 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1386 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1388 if (len
<= low_size
)
1390 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1391 memcpy (valbuf
, buf
, len
);
1393 else if (len
<= (low_size
+ high_size
))
1395 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1396 memcpy (valbuf
, buf
, low_size
);
1397 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1398 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1401 internal_error (__FILE__
, __LINE__
,
1402 _("Cannot extract return value of %d bytes long."), len
);
1406 /* Write, for architecture GDBARCH, a function return value of TYPE
1407 from VALBUF into REGCACHE. */
1410 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1411 struct regcache
*regcache
, const gdb_byte
*valbuf
)
1413 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1414 int len
= TYPE_LENGTH (type
);
1416 /* Define I387_ST0_REGNUM such that we use the proper definitions
1417 for the architecture. */
1418 #define I387_ST0_REGNUM I386_ST0_REGNUM
1420 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1423 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1425 if (tdep
->st0_regnum
< 0)
1427 warning (_("Cannot set floating-point return value."));
1431 /* Returning floating-point values is a bit tricky. Apart from
1432 storing the return value in %st(0), we have to simulate the
1433 state of the FPU at function return point. */
1435 /* Convert the value found in VALBUF to the extended
1436 floating-point format used by the FPU. This is probably
1437 not exactly how it would happen on the target itself, but
1438 it is the best we can do. */
1439 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1440 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1442 /* Set the top of the floating-point register stack to 7. The
1443 actual value doesn't really matter, but 7 is what a normal
1444 function return would end up with if the program started out
1445 with a freshly initialized FPU. */
1446 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1448 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1450 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1451 the floating-point register stack to 7, the appropriate value
1452 for the tag word is 0x3fff. */
1453 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1457 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1458 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1460 if (len
<= low_size
)
1461 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1462 else if (len
<= (low_size
+ high_size
))
1464 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1465 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1466 len
- low_size
, valbuf
+ low_size
);
1469 internal_error (__FILE__
, __LINE__
,
1470 _("Cannot store return value of %d bytes long."), len
);
1473 #undef I387_ST0_REGNUM
1477 /* This is the variable that is set with "set struct-convention", and
1478 its legitimate values. */
1479 static const char default_struct_convention
[] = "default";
1480 static const char pcc_struct_convention
[] = "pcc";
1481 static const char reg_struct_convention
[] = "reg";
1482 static const char *valid_conventions
[] =
1484 default_struct_convention
,
1485 pcc_struct_convention
,
1486 reg_struct_convention
,
1489 static const char *struct_convention
= default_struct_convention
;
1491 /* Return non-zero if TYPE, which is assumed to be a structure,
1492 a union type, or an array type, should be returned in registers
1493 for architecture GDBARCH. */
1496 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1498 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1499 enum type_code code
= TYPE_CODE (type
);
1500 int len
= TYPE_LENGTH (type
);
1502 gdb_assert (code
== TYPE_CODE_STRUCT
1503 || code
== TYPE_CODE_UNION
1504 || code
== TYPE_CODE_ARRAY
);
1506 if (struct_convention
== pcc_struct_convention
1507 || (struct_convention
== default_struct_convention
1508 && tdep
->struct_return
== pcc_struct_return
))
1511 /* Structures consisting of a single `float', `double' or 'long
1512 double' member are returned in %st(0). */
1513 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1515 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1516 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1517 return (len
== 4 || len
== 8 || len
== 12);
1520 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1523 /* Determine, for architecture GDBARCH, how a return value of TYPE
1524 should be returned. If it is supposed to be returned in registers,
1525 and READBUF is non-zero, read the appropriate value from REGCACHE,
1526 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1527 from WRITEBUF into REGCACHE. */
1529 static enum return_value_convention
1530 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1531 struct regcache
*regcache
, gdb_byte
*readbuf
,
1532 const gdb_byte
*writebuf
)
1534 enum type_code code
= TYPE_CODE (type
);
1536 if ((code
== TYPE_CODE_STRUCT
1537 || code
== TYPE_CODE_UNION
1538 || code
== TYPE_CODE_ARRAY
)
1539 && !i386_reg_struct_return_p (gdbarch
, type
))
1541 /* The System V ABI says that:
1543 "A function that returns a structure or union also sets %eax
1544 to the value of the original address of the caller's area
1545 before it returns. Thus when the caller receives control
1546 again, the address of the returned object resides in register
1547 %eax and can be used to access the object."
1549 So the ABI guarantees that we can always find the return
1550 value just after the function has returned. */
1552 /* Note that the ABI doesn't mention functions returning arrays,
1553 which is something possible in certain languages such as Ada.
1554 In this case, the value is returned as if it was wrapped in
1555 a record, so the convention applied to records also applies
1562 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
1563 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1566 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
1569 /* This special case is for structures consisting of a single
1570 `float', `double' or 'long double' member. These structures are
1571 returned in %st(0). For these structures, we call ourselves
1572 recursively, changing TYPE into the type of the first member of
1573 the structure. Since that should work for all structures that
1574 have only one member, we don't bother to check the member's type
1576 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1578 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1579 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1583 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1585 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1587 return RETURN_VALUE_REGISTER_CONVENTION
;
1591 /* Type for %eflags. */
1592 struct type
*i386_eflags_type
;
1594 /* Type for %mxcsr. */
1595 struct type
*i386_mxcsr_type
;
1597 /* Construct types for ISA-specific registers. */
1599 i386_init_types (void)
1603 type
= init_flags_type ("builtin_type_i386_eflags", 4);
1604 append_flags_type_flag (type
, 0, "CF");
1605 append_flags_type_flag (type
, 1, NULL
);
1606 append_flags_type_flag (type
, 2, "PF");
1607 append_flags_type_flag (type
, 4, "AF");
1608 append_flags_type_flag (type
, 6, "ZF");
1609 append_flags_type_flag (type
, 7, "SF");
1610 append_flags_type_flag (type
, 8, "TF");
1611 append_flags_type_flag (type
, 9, "IF");
1612 append_flags_type_flag (type
, 10, "DF");
1613 append_flags_type_flag (type
, 11, "OF");
1614 append_flags_type_flag (type
, 14, "NT");
1615 append_flags_type_flag (type
, 16, "RF");
1616 append_flags_type_flag (type
, 17, "VM");
1617 append_flags_type_flag (type
, 18, "AC");
1618 append_flags_type_flag (type
, 19, "VIF");
1619 append_flags_type_flag (type
, 20, "VIP");
1620 append_flags_type_flag (type
, 21, "ID");
1621 i386_eflags_type
= type
;
1623 type
= init_flags_type ("builtin_type_i386_mxcsr", 4);
1624 append_flags_type_flag (type
, 0, "IE");
1625 append_flags_type_flag (type
, 1, "DE");
1626 append_flags_type_flag (type
, 2, "ZE");
1627 append_flags_type_flag (type
, 3, "OE");
1628 append_flags_type_flag (type
, 4, "UE");
1629 append_flags_type_flag (type
, 5, "PE");
1630 append_flags_type_flag (type
, 6, "DAZ");
1631 append_flags_type_flag (type
, 7, "IM");
1632 append_flags_type_flag (type
, 8, "DM");
1633 append_flags_type_flag (type
, 9, "ZM");
1634 append_flags_type_flag (type
, 10, "OM");
1635 append_flags_type_flag (type
, 11, "UM");
1636 append_flags_type_flag (type
, 12, "PM");
1637 append_flags_type_flag (type
, 15, "FZ");
1638 i386_mxcsr_type
= type
;
1641 /* Construct vector type for MMX registers. */
1643 i386_mmx_type (struct gdbarch
*gdbarch
)
1645 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1647 if (!tdep
->i386_mmx_type
)
1649 /* The type we're building is this: */
1651 union __gdb_builtin_type_vec64i
1654 int32_t v2_int32
[2];
1655 int16_t v4_int16
[4];
1662 t
= init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
1663 append_composite_type_field (t
, "uint64", builtin_type_int64
);
1664 append_composite_type_field (t
, "v2_int32",
1665 init_vector_type (builtin_type_int32
, 2));
1666 append_composite_type_field (t
, "v4_int16",
1667 init_vector_type (builtin_type_int16
, 4));
1668 append_composite_type_field (t
, "v8_int8",
1669 init_vector_type (builtin_type_int8
, 8));
1671 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1672 TYPE_NAME (t
) = "builtin_type_vec64i";
1673 tdep
->i386_mmx_type
= t
;
1676 return tdep
->i386_mmx_type
;
1680 i386_sse_type (struct gdbarch
*gdbarch
)
1682 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1684 if (!tdep
->i386_sse_type
)
1686 /* The type we're building is this: */
1688 union __gdb_builtin_type_vec128i
1691 int64_t v2_int64
[2];
1692 int32_t v4_int32
[4];
1693 int16_t v8_int16
[8];
1694 int8_t v16_int8
[16];
1695 double v2_double
[2];
1702 t
= init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION
);
1703 append_composite_type_field (t
, "v4_float",
1704 init_vector_type (builtin_type_float
, 4));
1705 append_composite_type_field (t
, "v2_double",
1706 init_vector_type (builtin_type_double
, 2));
1707 append_composite_type_field (t
, "v16_int8",
1708 init_vector_type (builtin_type_int8
, 16));
1709 append_composite_type_field (t
, "v8_int16",
1710 init_vector_type (builtin_type_int16
, 8));
1711 append_composite_type_field (t
, "v4_int32",
1712 init_vector_type (builtin_type_int32
, 4));
1713 append_composite_type_field (t
, "v2_int64",
1714 init_vector_type (builtin_type_int64
, 2));
1715 append_composite_type_field (t
, "uint128", builtin_type_int128
);
1717 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1718 TYPE_NAME (t
) = "builtin_type_vec128i";
1719 tdep
->i386_sse_type
= t
;
1722 return tdep
->i386_sse_type
;
1725 /* Return the GDB type object for the "standard" data type of data in
1726 register REGNUM. Perhaps %esi and %edi should go here, but
1727 potentially they could be used for things other than address. */
1729 static struct type
*
1730 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1732 if (regnum
== I386_EIP_REGNUM
)
1733 return builtin_type_void_func_ptr
;
1735 if (regnum
== I386_EFLAGS_REGNUM
)
1736 return i386_eflags_type
;
1738 if (regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1739 return builtin_type_void_data_ptr
;
1741 if (i386_fp_regnum_p (regnum
))
1742 return builtin_type_i387_ext
;
1744 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1745 return i386_mmx_type (gdbarch
);
1747 if (i386_sse_regnum_p (gdbarch
, regnum
))
1748 return i386_sse_type (gdbarch
);
1750 #define I387_ST0_REGNUM I386_ST0_REGNUM
1751 #define I387_NUM_XMM_REGS (gdbarch_tdep (gdbarch)->num_xmm_regs)
1753 if (regnum
== I387_MXCSR_REGNUM
)
1754 return i386_mxcsr_type
;
1756 #undef I387_ST0_REGNUM
1757 #undef I387_NUM_XMM_REGS
1759 return builtin_type_int
;
1762 /* Map a cooked register onto a raw register or memory. For the i386,
1763 the MMX registers need to be mapped onto floating point registers. */
1766 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1768 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1773 /* Define I387_ST0_REGNUM such that we use the proper definitions
1774 for REGCACHE's architecture. */
1775 #define I387_ST0_REGNUM tdep->st0_regnum
1777 mmxreg
= regnum
- tdep
->mm0_regnum
;
1778 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1779 tos
= (fstat
>> 11) & 0x7;
1780 fpreg
= (mmxreg
+ tos
) % 8;
1782 return (I387_ST0_REGNUM
+ fpreg
);
1784 #undef I387_ST0_REGNUM
1788 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1789 int regnum
, gdb_byte
*buf
)
1791 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1793 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1794 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1796 /* Extract (always little endian). */
1797 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1798 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1801 regcache_raw_read (regcache
, regnum
, buf
);
1805 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1806 int regnum
, const gdb_byte
*buf
)
1808 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1810 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1811 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1814 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1815 /* ... Modify ... (always little endian). */
1816 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1818 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1821 regcache_raw_write (regcache
, regnum
, buf
);
1825 /* Return the register number of the register allocated by GCC after
1826 REGNUM, or -1 if there is no such register. */
1829 i386_next_regnum (int regnum
)
1831 /* GCC allocates the registers in the order:
1833 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1835 Since storing a variable in %esp doesn't make any sense we return
1836 -1 for %ebp and for %esp itself. */
1837 static int next_regnum
[] =
1839 I386_EDX_REGNUM
, /* Slot for %eax. */
1840 I386_EBX_REGNUM
, /* Slot for %ecx. */
1841 I386_ECX_REGNUM
, /* Slot for %edx. */
1842 I386_ESI_REGNUM
, /* Slot for %ebx. */
1843 -1, -1, /* Slots for %esp and %ebp. */
1844 I386_EDI_REGNUM
, /* Slot for %esi. */
1845 I386_EBP_REGNUM
/* Slot for %edi. */
1848 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1849 return next_regnum
[regnum
];
1854 /* Return nonzero if a value of type TYPE stored in register REGNUM
1855 needs any special handling. */
1858 i386_convert_register_p (struct gdbarch
*gdbarch
, int regnum
, struct type
*type
)
1860 int len
= TYPE_LENGTH (type
);
1862 /* Values may be spread across multiple registers. Most debugging
1863 formats aren't expressive enough to specify the locations, so
1864 some heuristics is involved. Right now we only handle types that
1865 have a length that is a multiple of the word size, since GCC
1866 doesn't seem to put any other types into registers. */
1867 if (len
> 4 && len
% 4 == 0)
1869 int last_regnum
= regnum
;
1873 last_regnum
= i386_next_regnum (last_regnum
);
1877 if (last_regnum
!= -1)
1881 return i387_convert_register_p (gdbarch
, regnum
, type
);
1884 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1885 return its contents in TO. */
1888 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1889 struct type
*type
, gdb_byte
*to
)
1891 int len
= TYPE_LENGTH (type
);
1893 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1894 available in FRAME (i.e. if it wasn't saved)? */
1896 if (i386_fp_regnum_p (regnum
))
1898 i387_register_to_value (frame
, regnum
, type
, to
);
1902 /* Read a value spread across multiple registers. */
1904 gdb_assert (len
> 4 && len
% 4 == 0);
1908 gdb_assert (regnum
!= -1);
1909 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
1911 get_frame_register (frame
, regnum
, to
);
1912 regnum
= i386_next_regnum (regnum
);
1918 /* Write the contents FROM of a value of type TYPE into register
1919 REGNUM in frame FRAME. */
1922 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1923 struct type
*type
, const gdb_byte
*from
)
1925 int len
= TYPE_LENGTH (type
);
1927 if (i386_fp_regnum_p (regnum
))
1929 i387_value_to_register (frame
, regnum
, type
, from
);
1933 /* Write a value spread across multiple registers. */
1935 gdb_assert (len
> 4 && len
% 4 == 0);
1939 gdb_assert (regnum
!= -1);
1940 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
1942 put_frame_register (frame
, regnum
, from
);
1943 regnum
= i386_next_regnum (regnum
);
1949 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1950 in the general-purpose register set REGSET to register cache
1951 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1954 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1955 int regnum
, const void *gregs
, size_t len
)
1957 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1958 const gdb_byte
*regs
= gregs
;
1961 gdb_assert (len
== tdep
->sizeof_gregset
);
1963 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1965 if ((regnum
== i
|| regnum
== -1)
1966 && tdep
->gregset_reg_offset
[i
] != -1)
1967 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1971 /* Collect register REGNUM from the register cache REGCACHE and store
1972 it in the buffer specified by GREGS and LEN as described by the
1973 general-purpose register set REGSET. If REGNUM is -1, do this for
1974 all registers in REGSET. */
1977 i386_collect_gregset (const struct regset
*regset
,
1978 const struct regcache
*regcache
,
1979 int regnum
, void *gregs
, size_t len
)
1981 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1982 gdb_byte
*regs
= gregs
;
1985 gdb_assert (len
== tdep
->sizeof_gregset
);
1987 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1989 if ((regnum
== i
|| regnum
== -1)
1990 && tdep
->gregset_reg_offset
[i
] != -1)
1991 regcache_raw_collect (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1995 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
1996 in the floating-point register set REGSET to register cache
1997 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2000 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
2001 int regnum
, const void *fpregs
, size_t len
)
2003 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2005 if (len
== I387_SIZEOF_FXSAVE
)
2007 i387_supply_fxsave (regcache
, regnum
, fpregs
);
2011 gdb_assert (len
== tdep
->sizeof_fpregset
);
2012 i387_supply_fsave (regcache
, regnum
, fpregs
);
2015 /* Collect register REGNUM from the register cache REGCACHE and store
2016 it in the buffer specified by FPREGS and LEN as described by the
2017 floating-point register set REGSET. If REGNUM is -1, do this for
2018 all registers in REGSET. */
2021 i386_collect_fpregset (const struct regset
*regset
,
2022 const struct regcache
*regcache
,
2023 int regnum
, void *fpregs
, size_t len
)
2025 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2027 if (len
== I387_SIZEOF_FXSAVE
)
2029 i387_collect_fxsave (regcache
, regnum
, fpregs
);
2033 gdb_assert (len
== tdep
->sizeof_fpregset
);
2034 i387_collect_fsave (regcache
, regnum
, fpregs
);
2037 /* Return the appropriate register set for the core section identified
2038 by SECT_NAME and SECT_SIZE. */
2040 const struct regset
*
2041 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
2042 const char *sect_name
, size_t sect_size
)
2044 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2046 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
2048 if (tdep
->gregset
== NULL
)
2049 tdep
->gregset
= regset_alloc (gdbarch
, i386_supply_gregset
,
2050 i386_collect_gregset
);
2051 return tdep
->gregset
;
2054 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
2055 || (strcmp (sect_name
, ".reg-xfp") == 0
2056 && sect_size
== I387_SIZEOF_FXSAVE
))
2058 if (tdep
->fpregset
== NULL
)
2059 tdep
->fpregset
= regset_alloc (gdbarch
, i386_supply_fpregset
,
2060 i386_collect_fpregset
);
2061 return tdep
->fpregset
;
2068 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2071 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
2073 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
2075 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
2076 struct minimal_symbol
*indsym
=
2077 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
2078 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
2082 if (strncmp (symname
, "__imp_", 6) == 0
2083 || strncmp (symname
, "_imp_", 5) == 0)
2084 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
2087 return 0; /* Not a trampoline. */
2091 /* Return whether the frame preceding NEXT_FRAME corresponds to a
2092 sigtramp routine. */
2095 i386_sigtramp_p (struct frame_info
*next_frame
)
2097 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2100 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2101 return (name
&& strcmp ("_sigtramp", name
) == 0);
2105 /* We have two flavours of disassembly. The machinery on this page
2106 deals with switching between those. */
2109 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
2111 gdb_assert (disassembly_flavor
== att_flavor
2112 || disassembly_flavor
== intel_flavor
);
2114 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2115 constified, cast to prevent a compiler warning. */
2116 info
->disassembler_options
= (char *) disassembly_flavor
;
2117 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
2119 return print_insn_i386 (pc
, info
);
2123 /* There are a few i386 architecture variants that differ only
2124 slightly from the generic i386 target. For now, we don't give them
2125 their own source file, but include them here. As a consequence,
2126 they'll always be included. */
2128 /* System V Release 4 (SVR4). */
2130 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
2131 sigtramp routine. */
2134 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
2136 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2139 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2140 currently unknown. */
2141 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2142 return (name
&& (strcmp ("_sigreturn", name
) == 0
2143 || strcmp ("_sigacthandler", name
) == 0
2144 || strcmp ("sigvechandler", name
) == 0));
2147 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
2148 routine, return the address of the associated sigcontext (ucontext)
2152 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
2157 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
2158 sp
= extract_unsigned_integer (buf
, 4);
2160 return read_memory_unsigned_integer (sp
+ 8, 4);
2167 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2169 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2170 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2173 /* System V Release 4 (SVR4). */
2176 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2178 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2180 /* System V Release 4 uses ELF. */
2181 i386_elf_init_abi (info
, gdbarch
);
2183 /* System V Release 4 has shared libraries. */
2184 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
2186 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
2187 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
2188 tdep
->sc_pc_offset
= 36 + 14 * 4;
2189 tdep
->sc_sp_offset
= 36 + 17 * 4;
2191 tdep
->jb_pc_offset
= 20;
2197 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2199 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2201 /* DJGPP doesn't have any special frames for signal handlers. */
2202 tdep
->sigtramp_p
= NULL
;
2204 tdep
->jb_pc_offset
= 36;
2208 /* i386 register groups. In addition to the normal groups, add "mmx"
2211 static struct reggroup
*i386_sse_reggroup
;
2212 static struct reggroup
*i386_mmx_reggroup
;
2215 i386_init_reggroups (void)
2217 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
2218 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
2222 i386_add_reggroups (struct gdbarch
*gdbarch
)
2224 reggroup_add (gdbarch
, i386_sse_reggroup
);
2225 reggroup_add (gdbarch
, i386_mmx_reggroup
);
2226 reggroup_add (gdbarch
, general_reggroup
);
2227 reggroup_add (gdbarch
, float_reggroup
);
2228 reggroup_add (gdbarch
, all_reggroup
);
2229 reggroup_add (gdbarch
, save_reggroup
);
2230 reggroup_add (gdbarch
, restore_reggroup
);
2231 reggroup_add (gdbarch
, vector_reggroup
);
2232 reggroup_add (gdbarch
, system_reggroup
);
2236 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
2237 struct reggroup
*group
)
2239 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
2240 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
2241 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
2242 || i386_fpc_regnum_p (regnum
));
2243 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
2245 if (group
== i386_mmx_reggroup
)
2246 return mmx_regnum_p
;
2247 if (group
== i386_sse_reggroup
)
2248 return sse_regnum_p
;
2249 if (group
== vector_reggroup
)
2250 return (mmx_regnum_p
|| sse_regnum_p
);
2251 if (group
== float_reggroup
)
2253 if (group
== general_reggroup
)
2254 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
2256 return default_register_reggroup_p (gdbarch
, regnum
, group
);
2260 /* Get the ARGIth function argument for the current function. */
2263 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
2266 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
2267 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
2271 static struct gdbarch
*
2272 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2274 struct gdbarch_tdep
*tdep
;
2275 struct gdbarch
*gdbarch
;
2277 /* If there is already a candidate, use it. */
2278 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2280 return arches
->gdbarch
;
2282 /* Allocate space for the new architecture. */
2283 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2284 gdbarch
= gdbarch_alloc (&info
, tdep
);
2286 /* General-purpose registers. */
2287 tdep
->gregset
= NULL
;
2288 tdep
->gregset_reg_offset
= NULL
;
2289 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
2290 tdep
->sizeof_gregset
= 0;
2292 /* Floating-point registers. */
2293 tdep
->fpregset
= NULL
;
2294 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
2296 /* The default settings include the FPU registers, the MMX registers
2297 and the SSE registers. This can be overridden for a specific ABI
2298 by adjusting the members `st0_regnum', `mm0_regnum' and
2299 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2300 will show up in the output of "info all-registers". Ideally we
2301 should try to autodetect whether they are available, such that we
2302 can prevent "info all-registers" from displaying registers that
2305 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2306 [the SSE registers] always (even when they don't exist) or never
2307 showing them to the user (even when they do exist), I prefer the
2308 former over the latter. */
2310 tdep
->st0_regnum
= I386_ST0_REGNUM
;
2312 /* The MMX registers are implemented as pseudo-registers. Put off
2313 calculating the register number for %mm0 until we know the number
2314 of raw registers. */
2315 tdep
->mm0_regnum
= 0;
2317 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2318 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
2320 tdep
->jb_pc_offset
= -1;
2321 tdep
->struct_return
= pcc_struct_return
;
2322 tdep
->sigtramp_start
= 0;
2323 tdep
->sigtramp_end
= 0;
2324 tdep
->sigtramp_p
= i386_sigtramp_p
;
2325 tdep
->sigcontext_addr
= NULL
;
2326 tdep
->sc_reg_offset
= NULL
;
2327 tdep
->sc_pc_offset
= -1;
2328 tdep
->sc_sp_offset
= -1;
2330 /* The format used for `long double' on almost all i386 targets is
2331 the i387 extended floating-point format. In fact, of all targets
2332 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2333 on having a `long double' that's not `long' at all. */
2334 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
2336 /* Although the i387 extended floating-point has only 80 significant
2337 bits, a `long double' actually takes up 96, probably to enforce
2339 set_gdbarch_long_double_bit (gdbarch
, 96);
2341 /* The default ABI includes general-purpose registers,
2342 floating-point registers, and the SSE registers. */
2343 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2344 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2345 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2347 /* Register numbers of various important registers. */
2348 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2349 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2350 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2351 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2353 /* NOTE: kettenis/20040418: GCC does have two possible register
2354 numbering schemes on the i386: dbx and SVR4. These schemes
2355 differ in how they number %ebp, %esp, %eflags, and the
2356 floating-point registers, and are implemented by the arrays
2357 dbx_register_map[] and svr4_dbx_register_map in
2358 gcc/config/i386.c. GCC also defines a third numbering scheme in
2359 gcc/config/i386.c, which it designates as the "default" register
2360 map used in 64bit mode. This last register numbering scheme is
2361 implemented in dbx64_register_map, and is used for AMD64; see
2364 Currently, each GCC i386 target always uses the same register
2365 numbering scheme across all its supported debugging formats
2366 i.e. SDB (COFF), stabs and DWARF 2. This is because
2367 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2368 DBX_REGISTER_NUMBER macro which is defined by each target's
2369 respective config header in a manner independent of the requested
2370 output debugging format.
2372 This does not match the arrangement below, which presumes that
2373 the SDB and stabs numbering schemes differ from the DWARF and
2374 DWARF 2 ones. The reason for this arrangement is that it is
2375 likely to get the numbering scheme for the target's
2376 default/native debug format right. For targets where GCC is the
2377 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2378 targets where the native toolchain uses a different numbering
2379 scheme for a particular debug format (stabs-in-ELF on Solaris)
2380 the defaults below will have to be overridden, like
2381 i386_elf_init_abi() does. */
2383 /* Use the dbx register numbering scheme for stabs and COFF. */
2384 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2385 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2387 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2388 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2389 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2391 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
2392 be in use on any of the supported i386 targets. */
2394 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2396 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2398 /* Call dummy code. */
2399 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2401 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2402 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2403 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2405 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2407 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2409 /* Stack grows downward. */
2410 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2412 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2413 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2415 set_gdbarch_frame_args_skip (gdbarch
, 8);
2417 /* Wire in the MMX registers. */
2418 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2419 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2420 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2422 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2424 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2426 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2428 /* Add the i386 register groups. */
2429 i386_add_reggroups (gdbarch
);
2430 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2432 /* Helper for function argument information. */
2433 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2435 /* Hook in the DWARF CFI frame unwinder. */
2436 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2438 frame_base_set_default (gdbarch
, &i386_frame_base
);
2440 /* Hook in ABI-specific overrides, if they have been registered. */
2441 gdbarch_init_osabi (info
, gdbarch
);
2443 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2444 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2446 /* If we have a register mapping, enable the generic core file
2447 support, unless it has already been enabled. */
2448 if (tdep
->gregset_reg_offset
2449 && !gdbarch_regset_from_core_section_p (gdbarch
))
2450 set_gdbarch_regset_from_core_section (gdbarch
,
2451 i386_regset_from_core_section
);
2453 /* Unless support for MMX has been disabled, make %mm0 the first
2455 if (tdep
->mm0_regnum
== 0)
2456 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2461 static enum gdb_osabi
2462 i386_coff_osabi_sniffer (bfd
*abfd
)
2464 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2465 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2466 return GDB_OSABI_GO32
;
2468 return GDB_OSABI_UNKNOWN
;
2472 /* Provide a prototype to silence -Wmissing-prototypes. */
2473 void _initialize_i386_tdep (void);
2476 _initialize_i386_tdep (void)
2478 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2480 /* Add the variable that controls the disassembly flavor. */
2481 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
2482 &disassembly_flavor
, _("\
2483 Set the disassembly flavor."), _("\
2484 Show the disassembly flavor."), _("\
2485 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2487 NULL
, /* FIXME: i18n: */
2488 &setlist
, &showlist
);
2490 /* Add the variable that controls the convention for returning
2492 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
2493 &struct_convention
, _("\
2494 Set the convention for returning small structs."), _("\
2495 Show the convention for returning small structs."), _("\
2496 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2499 NULL
, /* FIXME: i18n: */
2500 &setlist
, &showlist
);
2502 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2503 i386_coff_osabi_sniffer
);
2505 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2506 i386_svr4_init_abi
);
2507 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2508 i386_go32_init_abi
);
2510 /* Initialize the i386-specific register groups & types. */
2511 i386_init_reggroups ();