1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REG. */
157 i386_register_name (int reg
)
159 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
160 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
162 if (reg
>= 0 && reg
< i386_num_register_names
)
163 return i386_register_names
[reg
];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg
>= 0 && reg
<= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg
>= 12 && reg
<= 19)
189 /* Floating-point registers. */
190 return reg
- 12 + I387_ST0_REGNUM
;
192 else if (reg
>= 21 && reg
<= 28)
195 return reg
- 21 + I387_XMM0_REGNUM
;
197 else if (reg
>= 29 && reg
<= 36)
200 return reg
- 29 + I387_MM0_REGNUM
;
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS
+ NUM_PSEUDO_REGS
;
207 /* Convert SVR4 register number REG to the appropriate register number
211 i386_svr4_reg_to_regnum (int reg
)
213 /* This implements the GCC register map that tries to be compatible
214 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
216 /* The SVR4 register numbering includes %eip and %eflags, and
217 numbers the floating point registers differently. */
218 if (reg
>= 0 && reg
<= 9)
220 /* General-purpose registers. */
223 else if (reg
>= 11 && reg
<= 18)
225 /* Floating-point registers. */
226 return reg
- 11 + I387_ST0_REGNUM
;
230 /* The SSE and MMX registers have the same numbers as with dbx. */
231 return i386_dbx_reg_to_regnum (reg
);
234 /* This will hopefully provoke a warning. */
235 return NUM_REGS
+ NUM_PSEUDO_REGS
;
238 #undef I387_ST0_REGNUM
239 #undef I387_MM0_REGNUM
240 #undef I387_NUM_XMM_REGS
243 /* This is the variable that is set with "set disassembly-flavor", and
244 its legitimate values. */
245 static const char att_flavor
[] = "att";
246 static const char intel_flavor
[] = "intel";
247 static const char *valid_flavors
[] =
253 static const char *disassembly_flavor
= att_flavor
;
256 /* Use the program counter to determine the contents and size of a
257 breakpoint instruction. Return a pointer to a string of bytes that
258 encode a breakpoint instruction, store the length of the string in
259 *LEN and optionally adjust *PC to point to the correct memory
260 location for inserting the breakpoint.
262 On the i386 we have a single breakpoint that fits in a single byte
263 and can be inserted anywhere.
265 This function is 64-bit safe. */
267 static const unsigned char *
268 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
270 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
272 *len
= sizeof (break_insn
);
276 #ifdef I386_REGNO_TO_SYMMETRY
277 #error "The Sequent Symmetry is no longer supported."
280 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
281 and %esp "belong" to the calling function. Therefore these
282 registers should be saved if they're going to be modified. */
284 /* The maximum number of saved registers. This should include all
285 registers mentioned above, and %eip. */
286 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
288 struct i386_frame_cache
295 /* Saved registers. */
296 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
300 /* Stack space reserved for local variables. */
304 /* Allocate and initialize a frame cache. */
306 static struct i386_frame_cache
*
307 i386_alloc_frame_cache (void)
309 struct i386_frame_cache
*cache
;
312 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
316 cache
->sp_offset
= -4;
319 /* Saved registers. We initialize these to -1 since zero is a valid
320 offset (that's where %ebp is supposed to be stored). */
321 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
322 cache
->saved_regs
[i
] = -1;
324 cache
->pc_in_eax
= 0;
326 /* Frameless until proven otherwise. */
332 /* If the instruction at PC is a jump, return the address of its
333 target. Otherwise, return PC. */
336 i386_follow_jump (CORE_ADDR pc
)
342 op
= read_memory_unsigned_integer (pc
, 1);
346 op
= read_memory_unsigned_integer (pc
+ 1, 1);
352 /* Relative jump: if data16 == 0, disp32, else disp16. */
355 delta
= read_memory_integer (pc
+ 2, 2);
357 /* Include the size of the jmp instruction (including the
363 delta
= read_memory_integer (pc
+ 1, 4);
365 /* Include the size of the jmp instruction. */
370 /* Relative jump, disp8 (ignore data16). */
371 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
380 /* Check whether PC points at a prologue for a function returning a
381 structure or union. If so, it updates CACHE and returns the
382 address of the first instruction after the code sequence that
383 removes the "hidden" argument from the stack or CURRENT_PC,
384 whichever is smaller. Otherwise, return PC. */
387 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
388 struct i386_frame_cache
*cache
)
390 /* Functions that return a structure or union start with:
393 xchgl %eax, (%esp) 0x87 0x04 0x24
394 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
396 (the System V compiler puts out the second `xchg' instruction,
397 and the assembler doesn't try to optimize it, so the 'sib' form
398 gets generated). This sequence is used to get the address of the
399 return buffer for a function that returns a structure. */
400 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
401 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
402 unsigned char buf
[4];
405 if (current_pc
<= pc
)
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
!= 0x58) /* popl %eax */
413 read_memory (pc
+ 1, buf
, 4);
414 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
417 if (current_pc
== pc
)
419 cache
->sp_offset
+= 4;
423 if (current_pc
== pc
+ 1)
425 cache
->pc_in_eax
= 1;
429 if (buf
[1] == proto1
[1])
436 i386_skip_probe (CORE_ADDR pc
)
438 /* A function may start with
449 unsigned char buf
[8];
452 op
= read_memory_unsigned_integer (pc
, 1);
454 if (op
== 0x68 || op
== 0x6a)
458 /* Skip past the `pushl' instruction; it has either a one-byte or a
459 four-byte operand, depending on the opcode. */
465 /* Read the following 8 bytes, which should be `call _probe' (6
466 bytes) followed by `addl $4,%esp' (2 bytes). */
467 read_memory (pc
+ delta
, buf
, sizeof (buf
));
468 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
469 pc
+= delta
+ sizeof (buf
);
475 /* Check whether PC points at a code that sets up a new stack frame.
476 If so, it updates CACHE and returns the address of the first
477 instruction after the sequence that sets removes the "hidden"
478 argument from the stack or CURRENT_PC, whichever is smaller.
479 Otherwise, return PC. */
482 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
483 struct i386_frame_cache
*cache
)
488 if (current_pc
<= pc
)
491 op
= read_memory_unsigned_integer (pc
, 1);
493 if (op
== 0x55) /* pushl %ebp */
495 /* Take into account that we've executed the `pushl %ebp' that
496 starts this instruction sequence. */
497 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
498 cache
->sp_offset
+= 4;
500 /* If that's all, return now. */
501 if (current_pc
<= pc
+ 1)
504 op
= read_memory_unsigned_integer (pc
+ 1, 1);
506 /* Check for some special instructions that might be migrated
507 by GCC into the prologue. We check for
521 Because of the symmetry, there are actually two ways to
522 encode these instructions; with opcode bytes 0x29 and 0x2b
523 for `subl' and opcode bytes 0x31 and 0x33 for `xorl'.
525 Make sure we only skip these instructions if we later see the
526 `movl %esp, %ebp' that actually sets up the frame. */
527 while (op
== 0x29 || op
== 0x2b || op
== 0x31 || op
== 0x33)
529 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
532 case 0xdb: /* %ebx */
533 case 0xc9: /* %ecx */
534 case 0xd2: /* %edx */
535 case 0xc0: /* %eax */
542 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
545 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
549 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
553 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
560 /* OK, we actually have a frame. We just don't know how large
561 it is yet. Set its size to zero. We'll adjust it if
562 necessary. We also now commit to skipping the special
563 instructions mentioned before. */
567 /* If that's all, return now. */
568 if (current_pc
<= pc
+ 3)
571 /* Check for stack adjustment
575 NOTE: You can't subtract a 16 bit immediate from a 32 bit
576 reg, so we don't have to worry about a data16 prefix. */
577 op
= read_memory_unsigned_integer (pc
+ 3, 1);
580 /* `subl' with 8 bit immediate. */
581 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
582 /* Some instruction starting with 0x83 other than `subl'. */
585 /* `subl' with signed byte immediate (though it wouldn't make
586 sense to be negative). */
587 cache
->locals
= read_memory_integer (pc
+ 5, 1);
592 /* Maybe it is `subl' with a 32 bit immedediate. */
593 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
594 /* Some instruction starting with 0x81 other than `subl'. */
597 /* It is `subl' with a 32 bit immediate. */
598 cache
->locals
= read_memory_integer (pc
+ 5, 4);
603 /* Some instruction other than `subl'. */
607 else if (op
== 0xc8) /* enter $XXX */
609 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
616 /* Check whether PC points at code that saves registers on the stack.
617 If so, it updates CACHE and returns the address of the first
618 instruction after the register saves or CURRENT_PC, whichever is
619 smaller. Otherwise, return PC. */
622 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
623 struct i386_frame_cache
*cache
)
625 CORE_ADDR offset
= 0;
629 if (cache
->locals
> 0)
630 offset
-= cache
->locals
;
631 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
633 op
= read_memory_unsigned_integer (pc
, 1);
634 if (op
< 0x50 || op
> 0x57)
638 cache
->saved_regs
[op
- 0x50] = offset
;
639 cache
->sp_offset
+= 4;
646 /* Do a full analysis of the prologue at PC and update CACHE
647 accordingly. Bail out early if CURRENT_PC is reached. Return the
648 address where the analysis stopped.
650 We handle these cases:
652 The startup sequence can be at the start of the function, or the
653 function can start with a branch to startup code at the end.
655 %ebp can be set up with either the 'enter' instruction, or "pushl
656 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
657 once used in the System V compiler).
659 Local space is allocated just below the saved %ebp by either the
660 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
661 bit unsigned argument for space to allocate, and the 'addl'
662 instruction could have either a signed byte, or 32 bit immediate.
664 Next, the registers used by this function are pushed. With the
665 System V compiler they will always be in the order: %edi, %esi,
666 %ebx (and sometimes a harmless bug causes it to also save but not
667 restore %eax); however, the code below is willing to see the pushes
668 in any order, and will handle up to 8 of them.
670 If the setup sequence is at the end of the function, then the next
671 instruction will be a branch back to the start. */
674 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
675 struct i386_frame_cache
*cache
)
677 pc
= i386_follow_jump (pc
);
678 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
679 pc
= i386_skip_probe (pc
);
680 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
681 return i386_analyze_register_saves (pc
, current_pc
, cache
);
684 /* Return PC of first real instruction. */
687 i386_skip_prologue (CORE_ADDR start_pc
)
689 static unsigned char pic_pat
[6] =
691 0xe8, 0, 0, 0, 0, /* call 0x0 */
692 0x5b, /* popl %ebx */
694 struct i386_frame_cache cache
;
700 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
701 if (cache
.locals
< 0)
704 /* Found valid frame setup. */
706 /* The native cc on SVR4 in -K PIC mode inserts the following code
707 to get the address of the global offset table (GOT) into register
712 movl %ebx,x(%ebp) (optional)
715 This code is with the rest of the prologue (at the end of the
716 function), so we have to skip it to get to the first real
717 instruction at the start of the function. */
719 for (i
= 0; i
< 6; i
++)
721 op
= read_memory_unsigned_integer (pc
+ i
, 1);
722 if (pic_pat
[i
] != op
)
729 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
731 if (op
== 0x89) /* movl %ebx, x(%ebp) */
733 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
735 if (op
== 0x5d) /* One byte offset from %ebp. */
737 else if (op
== 0x9d) /* Four byte offset from %ebp. */
739 else /* Unexpected instruction. */
742 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
746 if (delta
> 0 && op
== 0x81
747 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
753 return i386_follow_jump (pc
);
756 /* This function is 64-bit safe. */
759 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
763 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
764 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
770 static struct i386_frame_cache
*
771 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
773 struct i386_frame_cache
*cache
;
780 cache
= i386_alloc_frame_cache ();
783 /* In principle, for normal frames, %ebp holds the frame pointer,
784 which holds the base address for the current stack frame.
785 However, for functions that don't need it, the frame pointer is
786 optional. For these "frameless" functions the frame pointer is
787 actually the frame pointer of the calling frame. Signal
788 trampolines are just a special case of a "frameless" function.
789 They (usually) share their frame pointer with the frame that was
790 in progress when the signal occurred. */
792 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
793 cache
->base
= extract_unsigned_integer (buf
, 4);
794 if (cache
->base
== 0)
797 /* For normal frames, %eip is stored at 4(%ebp). */
798 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
800 cache
->pc
= frame_func_unwind (next_frame
);
802 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
804 if (cache
->locals
< 0)
806 /* We didn't find a valid frame, which means that CACHE->base
807 currently holds the frame pointer for our calling frame. If
808 we're at the start of a function, or somewhere half-way its
809 prologue, the function's frame probably hasn't been fully
810 setup yet. Try to reconstruct the base address for the stack
811 frame by looking at the stack pointer. For truly "frameless"
812 functions this might work too. */
814 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
815 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
818 /* Now that we have the base address for the stack frame we can
819 calculate the value of %esp in the calling frame. */
820 cache
->saved_sp
= cache
->base
+ 8;
822 /* Adjust all the saved registers such that they contain addresses
823 instead of offsets. */
824 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
825 if (cache
->saved_regs
[i
] != -1)
826 cache
->saved_regs
[i
] += cache
->base
;
832 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
833 struct frame_id
*this_id
)
835 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
837 /* This marks the outermost frame. */
838 if (cache
->base
== 0)
841 /* See the end of i386_push_dummy_call. */
842 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
846 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
847 int regnum
, int *optimizedp
,
848 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
849 int *realnump
, void *valuep
)
851 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
853 gdb_assert (regnum
>= 0);
855 /* The System V ABI says that:
857 "The flags register contains the system flags, such as the
858 direction flag and the carry flag. The direction flag must be
859 set to the forward (that is, zero) direction before entry and
860 upon exit from a function. Other user flags have no specified
861 role in the standard calling sequence and are not preserved."
863 To guarantee the "upon exit" part of that statement we fake a
864 saved flags register that has its direction flag cleared.
866 Note that GCC doesn't seem to rely on the fact that the direction
867 flag is cleared after a function return; it always explicitly
868 clears the flag before operations where it matters.
870 FIXME: kettenis/20030316: I'm not quite sure whether this is the
871 right thing to do. The way we fake the flags register here makes
872 it impossible to change it. */
874 if (regnum
== I386_EFLAGS_REGNUM
)
884 /* Clear the direction flag. */
885 val
= frame_unwind_register_unsigned (next_frame
,
888 store_unsigned_integer (valuep
, 4, val
);
894 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
896 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
897 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
901 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
909 /* Store the value. */
910 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
915 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
918 *lvalp
= lval_memory
;
919 *addrp
= cache
->saved_regs
[regnum
];
923 /* Read the value in from memory. */
924 read_memory (*addrp
, valuep
,
925 register_size (current_gdbarch
, regnum
));
930 frame_register_unwind (next_frame
, regnum
,
931 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
934 static const struct frame_unwind i386_frame_unwind
=
938 i386_frame_prev_register
941 static const struct frame_unwind
*
942 i386_frame_sniffer (struct frame_info
*next_frame
)
944 return &i386_frame_unwind
;
948 /* Signal trampolines. */
950 static struct i386_frame_cache
*
951 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
953 struct i386_frame_cache
*cache
;
954 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
961 cache
= i386_alloc_frame_cache ();
963 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
964 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
966 addr
= tdep
->sigcontext_addr (next_frame
);
967 if (tdep
->sc_reg_offset
)
971 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
973 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
974 if (tdep
->sc_reg_offset
[i
] != -1)
975 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
979 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
980 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
988 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
989 struct frame_id
*this_id
)
991 struct i386_frame_cache
*cache
=
992 i386_sigtramp_frame_cache (next_frame
, this_cache
);
994 /* See the end of i386_push_dummy_call. */
995 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
999 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1001 int regnum
, int *optimizedp
,
1002 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1003 int *realnump
, void *valuep
)
1005 /* Make sure we've initialized the cache. */
1006 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1008 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1009 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1012 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1015 i386_sigtramp_frame_this_id
,
1016 i386_sigtramp_frame_prev_register
1019 static const struct frame_unwind
*
1020 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1022 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1024 /* We shouldn't even bother if we don't have a sigcontext_addr
1026 if (tdep
->sigcontext_addr
== NULL
)
1029 if (tdep
->sigtramp_p
!= NULL
)
1031 if (tdep
->sigtramp_p (next_frame
))
1032 return &i386_sigtramp_frame_unwind
;
1035 if (tdep
->sigtramp_start
!= 0)
1037 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1039 gdb_assert (tdep
->sigtramp_end
!= 0);
1040 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1041 return &i386_sigtramp_frame_unwind
;
1049 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1051 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1056 static const struct frame_base i386_frame_base
=
1059 i386_frame_base_address
,
1060 i386_frame_base_address
,
1061 i386_frame_base_address
1064 static struct frame_id
1065 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1070 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1071 fp
= extract_unsigned_integer (buf
, 4);
1073 /* See the end of i386_push_dummy_call. */
1074 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1078 /* Figure out where the longjmp will land. Slurp the args out of the
1079 stack. We expect the first arg to be a pointer to the jmp_buf
1080 structure from which we extract the address that we will land at.
1081 This address is copied into PC. This routine returns non-zero on
1084 This function is 64-bit safe. */
1087 i386_get_longjmp_target (CORE_ADDR
*pc
)
1090 CORE_ADDR sp
, jb_addr
;
1091 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1092 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1094 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1095 longjmp will land. */
1096 if (jb_pc_offset
== -1)
1099 /* Don't use I386_ESP_REGNUM here, since this function is also used
1101 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1102 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1103 if (target_read_memory (sp
+ len
, buf
, len
))
1106 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1107 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1110 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1116 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1117 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1118 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1119 CORE_ADDR struct_addr
)
1124 /* Push arguments in reverse order. */
1125 for (i
= nargs
- 1; i
>= 0; i
--)
1127 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1129 /* The System V ABI says that:
1131 "An argument's size is increased, if necessary, to make it a
1132 multiple of [32-bit] words. This may require tail padding,
1133 depending on the size of the argument."
1135 This makes sure the stack says word-aligned. */
1136 sp
-= (len
+ 3) & ~3;
1137 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1140 /* Push value address. */
1144 store_unsigned_integer (buf
, 4, struct_addr
);
1145 write_memory (sp
, buf
, 4);
1148 /* Store return address. */
1150 store_unsigned_integer (buf
, 4, bp_addr
);
1151 write_memory (sp
, buf
, 4);
1153 /* Finally, update the stack pointer... */
1154 store_unsigned_integer (buf
, 4, sp
);
1155 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1157 /* ...and fake a frame pointer. */
1158 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1160 /* MarkK wrote: This "+ 8" is all over the place:
1161 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1162 i386_unwind_dummy_id). It's there, since all frame unwinders for
1163 a given target have to agree (within a certain margin) on the
1164 defenition of the stack address of a frame. Otherwise
1165 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1166 stack address *before* the function call as a frame's CFA. On
1167 the i386, when %ebp is used as a frame pointer, the offset
1168 between the contents %ebp and the CFA as defined by GCC. */
1172 /* These registers are used for returning integers (and on some
1173 targets also for returning `struct' and `union' values when their
1174 size and alignment match an integer type). */
1175 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1176 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1178 /* Read, for architecture GDBARCH, a function return value of TYPE
1179 from REGCACHE, and copy that into VALBUF. */
1182 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1183 struct regcache
*regcache
, void *valbuf
)
1185 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1186 int len
= TYPE_LENGTH (type
);
1187 char buf
[I386_MAX_REGISTER_SIZE
];
1189 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1191 if (tdep
->st0_regnum
< 0)
1193 warning ("Cannot find floating-point return value.");
1194 memset (valbuf
, 0, len
);
1198 /* Floating-point return values can be found in %st(0). Convert
1199 its contents to the desired type. This is probably not
1200 exactly how it would happen on the target itself, but it is
1201 the best we can do. */
1202 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1203 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1207 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1208 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1210 if (len
<= low_size
)
1212 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1213 memcpy (valbuf
, buf
, len
);
1215 else if (len
<= (low_size
+ high_size
))
1217 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1218 memcpy (valbuf
, buf
, low_size
);
1219 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1220 memcpy ((char *) valbuf
+ low_size
, buf
, len
- low_size
);
1223 internal_error (__FILE__
, __LINE__
,
1224 "Cannot extract return value of %d bytes long.", len
);
1228 /* Write, for architecture GDBARCH, a function return value of TYPE
1229 from VALBUF into REGCACHE. */
1232 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1233 struct regcache
*regcache
, const void *valbuf
)
1235 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1236 int len
= TYPE_LENGTH (type
);
1238 /* Define I387_ST0_REGNUM such that we use the proper definitions
1239 for the architecture. */
1240 #define I387_ST0_REGNUM I386_ST0_REGNUM
1242 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1245 char buf
[I386_MAX_REGISTER_SIZE
];
1247 if (tdep
->st0_regnum
< 0)
1249 warning ("Cannot set floating-point return value.");
1253 /* Returning floating-point values is a bit tricky. Apart from
1254 storing the return value in %st(0), we have to simulate the
1255 state of the FPU at function return point. */
1257 /* Convert the value found in VALBUF to the extended
1258 floating-point format used by the FPU. This is probably
1259 not exactly how it would happen on the target itself, but
1260 it is the best we can do. */
1261 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1262 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1264 /* Set the top of the floating-point register stack to 7. The
1265 actual value doesn't really matter, but 7 is what a normal
1266 function return would end up with if the program started out
1267 with a freshly initialized FPU. */
1268 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1270 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1272 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1273 the floating-point register stack to 7, the appropriate value
1274 for the tag word is 0x3fff. */
1275 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1279 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1280 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1282 if (len
<= low_size
)
1283 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1284 else if (len
<= (low_size
+ high_size
))
1286 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1287 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1288 len
- low_size
, (char *) valbuf
+ low_size
);
1291 internal_error (__FILE__
, __LINE__
,
1292 "Cannot store return value of %d bytes long.", len
);
1295 #undef I387_ST0_REGNUM
1299 /* This is the variable that is set with "set struct-convention", and
1300 its legitimate values. */
1301 static const char default_struct_convention
[] = "default";
1302 static const char pcc_struct_convention
[] = "pcc";
1303 static const char reg_struct_convention
[] = "reg";
1304 static const char *valid_conventions
[] =
1306 default_struct_convention
,
1307 pcc_struct_convention
,
1308 reg_struct_convention
,
1311 static const char *struct_convention
= default_struct_convention
;
1313 /* Return non-zero if TYPE, which is assumed to be a structure or
1314 union type, should be returned in registers for architecture
1318 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1320 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1321 enum type_code code
= TYPE_CODE (type
);
1322 int len
= TYPE_LENGTH (type
);
1324 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1326 if (struct_convention
== pcc_struct_convention
1327 || (struct_convention
== default_struct_convention
1328 && tdep
->struct_return
== pcc_struct_return
))
1331 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1334 /* Determine, for architecture GDBARCH, how a return value of TYPE
1335 should be returned. If it is supposed to be returned in registers,
1336 and READBUF is non-zero, read the appropriate value from REGCACHE,
1337 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1338 from WRITEBUF into REGCACHE. */
1340 static enum return_value_convention
1341 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1342 struct regcache
*regcache
, void *readbuf
,
1343 const void *writebuf
)
1345 enum type_code code
= TYPE_CODE (type
);
1347 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1348 && !i386_reg_struct_return_p (gdbarch
, type
))
1349 return RETURN_VALUE_STRUCT_CONVENTION
;
1351 /* This special case is for structures consisting of a single
1352 `float' or `double' member. These structures are returned in
1353 %st(0). For these structures, we call ourselves recursively,
1354 changing TYPE into the type of the first member of the structure.
1355 Since that should work for all structures that have only one
1356 member, we don't bother to check the member's type here. */
1357 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1359 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1360 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1364 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1366 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1368 return RETURN_VALUE_REGISTER_CONVENTION
;
1372 /* Return the GDB type object for the "standard" data type of data in
1373 register REGNUM. Perhaps %esi and %edi should go here, but
1374 potentially they could be used for things other than address. */
1376 static struct type
*
1377 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1379 if (regnum
== I386_EIP_REGNUM
1380 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1381 return lookup_pointer_type (builtin_type_void
);
1383 if (i386_fp_regnum_p (regnum
))
1384 return builtin_type_i387_ext
;
1386 if (i386_sse_regnum_p (gdbarch
, regnum
))
1387 return builtin_type_vec128i
;
1389 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1390 return builtin_type_vec64i
;
1392 return builtin_type_int
;
1395 /* Map a cooked register onto a raw register or memory. For the i386,
1396 the MMX registers need to be mapped onto floating point registers. */
1399 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1401 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1406 /* Define I387_ST0_REGNUM such that we use the proper definitions
1407 for REGCACHE's architecture. */
1408 #define I387_ST0_REGNUM tdep->st0_regnum
1410 mmxreg
= regnum
- tdep
->mm0_regnum
;
1411 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1412 tos
= (fstat
>> 11) & 0x7;
1413 fpreg
= (mmxreg
+ tos
) % 8;
1415 return (I387_ST0_REGNUM
+ fpreg
);
1417 #undef I387_ST0_REGNUM
1421 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1422 int regnum
, void *buf
)
1424 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1426 char mmx_buf
[MAX_REGISTER_SIZE
];
1427 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1429 /* Extract (always little endian). */
1430 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1431 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1434 regcache_raw_read (regcache
, regnum
, buf
);
1438 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1439 int regnum
, const void *buf
)
1441 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1443 char mmx_buf
[MAX_REGISTER_SIZE
];
1444 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1447 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1448 /* ... Modify ... (always little endian). */
1449 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1451 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1454 regcache_raw_write (regcache
, regnum
, buf
);
1458 /* Return the register number of the register allocated by GCC after
1459 REGNUM, or -1 if there is no such register. */
1462 i386_next_regnum (int regnum
)
1464 /* GCC allocates the registers in the order:
1466 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1468 Since storing a variable in %esp doesn't make any sense we return
1469 -1 for %ebp and for %esp itself. */
1470 static int next_regnum
[] =
1472 I386_EDX_REGNUM
, /* Slot for %eax. */
1473 I386_EBX_REGNUM
, /* Slot for %ecx. */
1474 I386_ECX_REGNUM
, /* Slot for %edx. */
1475 I386_ESI_REGNUM
, /* Slot for %ebx. */
1476 -1, -1, /* Slots for %esp and %ebp. */
1477 I386_EDI_REGNUM
, /* Slot for %esi. */
1478 I386_EBP_REGNUM
/* Slot for %edi. */
1481 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1482 return next_regnum
[regnum
];
1487 /* Return nonzero if a value of type TYPE stored in register REGNUM
1488 needs any special handling. */
1491 i386_convert_register_p (int regnum
, struct type
*type
)
1493 int len
= TYPE_LENGTH (type
);
1495 /* Values may be spread across multiple registers. Most debugging
1496 formats aren't expressive enough to specify the locations, so
1497 some heuristics is involved. Right now we only handle types that
1498 have a length that is a multiple of the word size, since GCC
1499 doesn't seem to put any other types into registers. */
1500 if (len
> 4 && len
% 4 == 0)
1502 int last_regnum
= regnum
;
1506 last_regnum
= i386_next_regnum (last_regnum
);
1510 if (last_regnum
!= -1)
1514 return i386_fp_regnum_p (regnum
);
1517 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1518 return its contents in TO. */
1521 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1522 struct type
*type
, void *to
)
1524 int len
= TYPE_LENGTH (type
);
1527 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1528 available in FRAME (i.e. if it wasn't saved)? */
1530 if (i386_fp_regnum_p (regnum
))
1532 i387_register_to_value (frame
, regnum
, type
, to
);
1536 /* Read a value spread accross multiple registers. */
1538 gdb_assert (len
> 4 && len
% 4 == 0);
1542 gdb_assert (regnum
!= -1);
1543 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1545 get_frame_register (frame
, regnum
, buf
);
1546 regnum
= i386_next_regnum (regnum
);
1552 /* Write the contents FROM of a value of type TYPE into register
1553 REGNUM in frame FRAME. */
1556 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1557 struct type
*type
, const void *from
)
1559 int len
= TYPE_LENGTH (type
);
1560 const char *buf
= from
;
1562 if (i386_fp_regnum_p (regnum
))
1564 i387_value_to_register (frame
, regnum
, type
, from
);
1568 /* Write a value spread accross multiple registers. */
1570 gdb_assert (len
> 4 && len
% 4 == 0);
1574 gdb_assert (regnum
!= -1);
1575 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1577 put_frame_register (frame
, regnum
, buf
);
1578 regnum
= i386_next_regnum (regnum
);
1584 /* Supply register REGNUM from the general-purpose register set REGSET
1585 to register cache REGCACHE. If REGNUM is -1, do this for all
1586 registers in REGSET. */
1589 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1590 int regnum
, const void *gregs
, size_t len
)
1592 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1593 const char *regs
= gregs
;
1596 gdb_assert (len
== tdep
->sizeof_gregset
);
1598 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1600 if ((regnum
== i
|| regnum
== -1)
1601 && tdep
->gregset_reg_offset
[i
] != -1)
1602 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1606 /* Supply register REGNUM from the floating-point register set REGSET
1607 to register cache REGCACHE. If REGNUM is -1, do this for all
1608 registers in REGSET. */
1611 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1612 int regnum
, const void *fpregs
, size_t len
)
1614 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1616 if (len
== I387_SIZEOF_FXSAVE
)
1618 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1622 gdb_assert (len
== tdep
->sizeof_fpregset
);
1623 i387_supply_fsave (regcache
, regnum
, fpregs
);
1626 /* Return the appropriate register set for the core section identified
1627 by SECT_NAME and SECT_SIZE. */
1629 const struct regset
*
1630 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1631 const char *sect_name
, size_t sect_size
)
1633 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1635 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1637 if (tdep
->gregset
== NULL
)
1639 tdep
->gregset
= XMALLOC (struct regset
);
1640 tdep
->gregset
->descr
= tdep
;
1641 tdep
->gregset
->supply_regset
= i386_supply_gregset
;
1643 return tdep
->gregset
;
1646 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1647 || (strcmp (sect_name
, ".reg-xfp") == 0
1648 && sect_size
== I387_SIZEOF_FXSAVE
))
1650 if (tdep
->fpregset
== NULL
)
1652 tdep
->fpregset
= XMALLOC (struct regset
);
1653 tdep
->fpregset
->descr
= tdep
;
1654 tdep
->fpregset
->supply_regset
= i386_supply_fpregset
;
1656 return tdep
->fpregset
;
1663 #ifdef STATIC_TRANSFORM_NAME
1664 /* SunPRO encodes the static variables. This is not related to C++
1665 mangling, it is done for C too. */
1668 sunpro_static_transform_name (char *name
)
1671 if (IS_STATIC_TRANSFORM_NAME (name
))
1673 /* For file-local statics there will be a period, a bunch of
1674 junk (the contents of which match a string given in the
1675 N_OPT), a period and the name. For function-local statics
1676 there will be a bunch of junk (which seems to change the
1677 second character from 'A' to 'B'), a period, the name of the
1678 function, and the name. So just skip everything before the
1680 p
= strrchr (name
, '.');
1686 #endif /* STATIC_TRANSFORM_NAME */
1689 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1692 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1694 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1696 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1697 struct minimal_symbol
*indsym
=
1698 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1699 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1703 if (strncmp (symname
, "__imp_", 6) == 0
1704 || strncmp (symname
, "_imp_", 5) == 0)
1705 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1708 return 0; /* Not a trampoline. */
1712 /* Return whether the frame preceding NEXT_FRAME corresponds to a
1713 sigtramp routine. */
1716 i386_sigtramp_p (struct frame_info
*next_frame
)
1718 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1721 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1722 return (name
&& strcmp ("_sigtramp", name
) == 0);
1726 /* We have two flavours of disassembly. The machinery on this page
1727 deals with switching between those. */
1730 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1732 gdb_assert (disassembly_flavor
== att_flavor
1733 || disassembly_flavor
== intel_flavor
);
1735 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1736 constified, cast to prevent a compiler warning. */
1737 info
->disassembler_options
= (char *) disassembly_flavor
;
1738 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1740 return print_insn_i386 (pc
, info
);
1744 /* There are a few i386 architecture variants that differ only
1745 slightly from the generic i386 target. For now, we don't give them
1746 their own source file, but include them here. As a consequence,
1747 they'll always be included. */
1749 /* System V Release 4 (SVR4). */
1751 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
1752 sigtramp routine. */
1755 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
1757 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1760 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1761 currently unknown. */
1762 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1763 return (name
&& (strcmp ("_sigreturn", name
) == 0
1764 || strcmp ("_sigacthandler", name
) == 0
1765 || strcmp ("sigvechandler", name
) == 0));
1768 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1769 routine, return the address of the associated sigcontext (ucontext)
1773 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1778 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1779 sp
= extract_unsigned_integer (buf
, 4);
1781 return read_memory_unsigned_integer (sp
+ 8, 4);
1788 i386_coff_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1790 /* We typically use DWARF-in-COFF with the dbx register numbering. */
1791 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
1792 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
1798 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1800 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
1801 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
1804 /* System V Release 4 (SVR4). */
1807 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1809 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1811 /* System V Release 4 uses ELF. */
1812 i386_elf_init_abi (info
, gdbarch
);
1814 /* System V Release 4 has shared libraries. */
1815 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1816 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1818 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
1819 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1820 tdep
->sc_pc_offset
= 36 + 14 * 4;
1821 tdep
->sc_sp_offset
= 36 + 17 * 4;
1823 tdep
->jb_pc_offset
= 20;
1829 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1831 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1833 /* DJGPP doesn't have any special frames for signal handlers. */
1834 tdep
->sigtramp_p
= NULL
;
1836 tdep
->jb_pc_offset
= 36;
1842 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1844 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1846 tdep
->jb_pc_offset
= 24;
1850 /* i386 register groups. In addition to the normal groups, add "mmx"
1853 static struct reggroup
*i386_sse_reggroup
;
1854 static struct reggroup
*i386_mmx_reggroup
;
1857 i386_init_reggroups (void)
1859 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1860 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1864 i386_add_reggroups (struct gdbarch
*gdbarch
)
1866 reggroup_add (gdbarch
, i386_sse_reggroup
);
1867 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1868 reggroup_add (gdbarch
, general_reggroup
);
1869 reggroup_add (gdbarch
, float_reggroup
);
1870 reggroup_add (gdbarch
, all_reggroup
);
1871 reggroup_add (gdbarch
, save_reggroup
);
1872 reggroup_add (gdbarch
, restore_reggroup
);
1873 reggroup_add (gdbarch
, vector_reggroup
);
1874 reggroup_add (gdbarch
, system_reggroup
);
1878 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1879 struct reggroup
*group
)
1881 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1882 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1883 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1884 || i386_fpc_regnum_p (regnum
));
1885 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1887 if (group
== i386_mmx_reggroup
)
1888 return mmx_regnum_p
;
1889 if (group
== i386_sse_reggroup
)
1890 return sse_regnum_p
;
1891 if (group
== vector_reggroup
)
1892 return (mmx_regnum_p
|| sse_regnum_p
);
1893 if (group
== float_reggroup
)
1895 if (group
== general_reggroup
)
1896 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1898 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1902 /* Get the ARGIth function argument for the current function. */
1905 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1908 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1909 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1913 static struct gdbarch
*
1914 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1916 struct gdbarch_tdep
*tdep
;
1917 struct gdbarch
*gdbarch
;
1919 /* If there is already a candidate, use it. */
1920 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1922 return arches
->gdbarch
;
1924 /* Allocate space for the new architecture. */
1925 tdep
= XMALLOC (struct gdbarch_tdep
);
1926 gdbarch
= gdbarch_alloc (&info
, tdep
);
1928 /* General-purpose registers. */
1929 tdep
->gregset
= NULL
;
1930 tdep
->gregset_reg_offset
= NULL
;
1931 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1932 tdep
->sizeof_gregset
= 0;
1934 /* Floating-point registers. */
1935 tdep
->fpregset
= NULL
;
1936 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1938 /* The default settings include the FPU registers, the MMX registers
1939 and the SSE registers. This can be overidden for a specific ABI
1940 by adjusting the members `st0_regnum', `mm0_regnum' and
1941 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1942 will show up in the output of "info all-registers". Ideally we
1943 should try to autodetect whether they are available, such that we
1944 can prevent "info all-registers" from displaying registers that
1947 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1948 [the SSE registers] always (even when they don't exist) or never
1949 showing them to the user (even when they do exist), I prefer the
1950 former over the latter. */
1952 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1954 /* The MMX registers are implemented as pseudo-registers. Put off
1955 caclulating the register number for %mm0 until we know the number
1956 of raw registers. */
1957 tdep
->mm0_regnum
= 0;
1959 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1960 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1962 tdep
->jb_pc_offset
= -1;
1963 tdep
->struct_return
= pcc_struct_return
;
1964 tdep
->sigtramp_start
= 0;
1965 tdep
->sigtramp_end
= 0;
1966 tdep
->sigtramp_p
= i386_sigtramp_p
;
1967 tdep
->sigcontext_addr
= NULL
;
1968 tdep
->sc_reg_offset
= NULL
;
1969 tdep
->sc_pc_offset
= -1;
1970 tdep
->sc_sp_offset
= -1;
1972 /* The format used for `long double' on almost all i386 targets is
1973 the i387 extended floating-point format. In fact, of all targets
1974 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1975 on having a `long double' that's not `long' at all. */
1976 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1978 /* Although the i387 extended floating-point has only 80 significant
1979 bits, a `long double' actually takes up 96, probably to enforce
1981 set_gdbarch_long_double_bit (gdbarch
, 96);
1983 /* The default ABI includes general-purpose registers,
1984 floating-point registers, and the SSE registers. */
1985 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1986 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1987 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1989 /* Register numbers of various important registers. */
1990 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1991 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1992 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1993 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1995 /* NOTE: kettenis/20040418: GCC does have two possible register
1996 numbering schemes on the i386: dbx and SVR4. These schemes
1997 differ in how they number %ebp, %esp, %eflags, and the
1998 floating-point registers, and are implemented by the attays
1999 dbx_register_map[] and svr4_dbx_register_map in
2000 gcc/config/i386.c. GCC also defines a third numbering scheme in
2001 gcc/config/i386.c, which it designates as the "default" register
2002 map used in 64bit mode. This last register numbering scheme is
2003 implemented in dbx64_register_map, and us used for AMD64; see
2006 Currently, each GCC i386 target always uses the same register
2007 numbering scheme across all its supported debugging formats
2008 i.e. SDB (COFF), stabs and DWARF 2. This is because
2009 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2010 DBX_REGISTER_NUMBER macro which is defined by each target's
2011 respective config header in a manner independent of the requested
2012 output debugging format.
2014 This does not match the arrangement below, which presumes that
2015 the SDB and stabs numbering schemes differ from the DWARF and
2016 DWARF 2 ones. The reason for this arrangement is that it is
2017 likely to get the numbering scheme for the target's
2018 default/native debug format right. For targets where GCC is the
2019 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2020 targets where the native toolchain uses a different numbering
2021 scheme for a particular debug format (stabs-in-ELF on Solaris)
2022 the defaults below will have to be overridden, like the functions
2023 i386_coff_init_abi() and i386_elf_init_abi() do. */
2025 /* Use the dbx register numbering scheme for stabs and COFF. */
2026 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2027 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2029 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2030 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2031 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2033 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2034 be in use on any of the supported i386 targets. */
2036 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2038 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2040 /* Call dummy code. */
2041 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2043 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2044 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2045 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2047 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2049 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2051 /* Stack grows downward. */
2052 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2054 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2055 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2057 set_gdbarch_frame_args_skip (gdbarch
, 8);
2059 /* Wire in the MMX registers. */
2060 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2061 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2062 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2064 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2066 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2068 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2070 /* Add the i386 register groups. */
2071 i386_add_reggroups (gdbarch
);
2072 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2074 /* Helper for function argument information. */
2075 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2077 /* Hook in the DWARF CFI frame unwinder. */
2078 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2080 frame_base_set_default (gdbarch
, &i386_frame_base
);
2082 /* Hook in ABI-specific overrides, if they have been registered. */
2083 gdbarch_init_osabi (info
, gdbarch
);
2085 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2086 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2088 /* If we have a register mapping, enable the generic core file
2089 support, unless it has already been enabled. */
2090 if (tdep
->gregset_reg_offset
2091 && !gdbarch_regset_from_core_section_p (gdbarch
))
2092 set_gdbarch_regset_from_core_section (gdbarch
,
2093 i386_regset_from_core_section
);
2095 /* Unless support for MMX has been disabled, make %mm0 the first
2097 if (tdep
->mm0_regnum
== 0)
2098 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2103 static enum gdb_osabi
2104 i386_coff_osabi_sniffer (bfd
*abfd
)
2106 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2107 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2108 return GDB_OSABI_GO32
;
2110 return GDB_OSABI_UNKNOWN
;
2113 static enum gdb_osabi
2114 i386_nlm_osabi_sniffer (bfd
*abfd
)
2116 return GDB_OSABI_NETWARE
;
2120 /* Provide a prototype to silence -Wmissing-prototypes. */
2121 void _initialize_i386_tdep (void);
2124 _initialize_i386_tdep (void)
2126 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2128 /* Add the variable that controls the disassembly flavor. */
2130 struct cmd_list_element
*new_cmd
;
2132 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2134 &disassembly_flavor
,
2136 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2137 and the default value is \"att\".",
2139 add_show_from_set (new_cmd
, &showlist
);
2142 /* Add the variable that controls the convention for returning
2145 struct cmd_list_element
*new_cmd
;
2147 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2149 &struct_convention
, "\
2150 Set the convention for returning small structs, valid values \
2151 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2153 add_show_from_set (new_cmd
, &showlist
);
2156 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2157 i386_coff_osabi_sniffer
);
2158 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2159 i386_nlm_osabi_sniffer
);
2161 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2162 i386_svr4_init_abi
);
2163 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2164 i386_go32_init_abi
);
2165 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2168 /* Initialize the i386 specific register groups. */
2169 i386_init_reggroups ();