1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
54 /* Names of the registers. The first 10 registers match the register
55 numbering scheme used by GCC for stabs and DWARF. */
57 static char *i386_register_names
[] =
59 "eax", "ecx", "edx", "ebx",
60 "esp", "ebp", "esi", "edi",
61 "eip", "eflags", "cs", "ss",
62 "ds", "es", "fs", "gs",
63 "st0", "st1", "st2", "st3",
64 "st4", "st5", "st6", "st7",
65 "fctrl", "fstat", "ftag", "fiseg",
66 "fioff", "foseg", "fooff", "fop",
67 "xmm0", "xmm1", "xmm2", "xmm3",
68 "xmm4", "xmm5", "xmm6", "xmm7",
72 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
76 static char *i386_mmx_names
[] =
78 "mm0", "mm1", "mm2", "mm3",
79 "mm4", "mm5", "mm6", "mm7"
82 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
85 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
87 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
92 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
98 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
100 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
102 #define I387_ST0_REGNUM tdep->st0_regnum
103 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
105 if (I387_NUM_XMM_REGS
== 0)
108 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
110 #undef I387_ST0_REGNUM
111 #undef I387_NUM_XMM_REGS
115 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
117 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
119 #define I387_ST0_REGNUM tdep->st0_regnum
120 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
122 if (I387_NUM_XMM_REGS
== 0)
125 return (regnum
== I387_MXCSR_REGNUM
);
127 #undef I387_ST0_REGNUM
128 #undef I387_NUM_XMM_REGS
131 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
132 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
133 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
138 i386_fp_regnum_p (int regnum
)
140 if (I387_ST0_REGNUM
< 0)
143 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
147 i386_fpc_regnum_p (int regnum
)
149 if (I387_ST0_REGNUM
< 0)
152 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
155 /* Return the name of register REG. */
158 i386_register_name (int reg
)
160 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
161 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
163 if (reg
>= 0 && reg
< i386_num_register_names
)
164 return i386_register_names
[reg
];
169 /* Convert stabs register number REG to the appropriate register
170 number used by GDB. */
173 i386_stab_reg_to_regnum (int reg
)
175 /* This implements what GCC calls the "default" register map. */
176 if (reg
>= 0 && reg
<= 7)
178 /* General-purpose registers. */
181 else if (reg
>= 12 && reg
<= 19)
183 /* Floating-point registers. */
184 return reg
- 12 + I387_ST0_REGNUM
;
186 else if (reg
>= 21 && reg
<= 28)
189 return reg
- 21 + I387_XMM0_REGNUM
;
191 else if (reg
>= 29 && reg
<= 36)
194 return reg
- 29 + I387_MM0_REGNUM
;
197 /* This will hopefully provoke a warning. */
198 return NUM_REGS
+ NUM_PSEUDO_REGS
;
201 /* Convert DWARF register number REG to the appropriate register
202 number used by GDB. */
205 i386_dwarf_reg_to_regnum (int reg
)
207 /* The DWARF register numbering includes %eip and %eflags, and
208 numbers the floating point registers differently. */
209 if (reg
>= 0 && reg
<= 9)
211 /* General-purpose registers. */
214 else if (reg
>= 11 && reg
<= 18)
216 /* Floating-point registers. */
217 return reg
- 11 + I387_ST0_REGNUM
;
221 /* The SSE and MMX registers have identical numbers as in stabs. */
222 return i386_stab_reg_to_regnum (reg
);
225 /* This will hopefully provoke a warning. */
226 return NUM_REGS
+ NUM_PSEUDO_REGS
;
229 #undef I387_ST0_REGNUM
230 #undef I387_MM0_REGNUM
231 #undef I387_NUM_XMM_REGS
234 /* This is the variable that is set with "set disassembly-flavor", and
235 its legitimate values. */
236 static const char att_flavor
[] = "att";
237 static const char intel_flavor
[] = "intel";
238 static const char *valid_flavors
[] =
244 static const char *disassembly_flavor
= att_flavor
;
247 /* Use the program counter to determine the contents and size of a
248 breakpoint instruction. Return a pointer to a string of bytes that
249 encode a breakpoint instruction, store the length of the string in
250 *LEN and optionally adjust *PC to point to the correct memory
251 location for inserting the breakpoint.
253 On the i386 we have a single breakpoint that fits in a single byte
254 and can be inserted anywhere.
256 This function is 64-bit safe. */
258 static const unsigned char *
259 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
261 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
263 *len
= sizeof (break_insn
);
267 #ifdef I386_REGNO_TO_SYMMETRY
268 #error "The Sequent Symmetry is no longer supported."
271 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
272 and %esp "belong" to the calling function. Therefore these
273 registers should be saved if they're going to be modified. */
275 /* The maximum number of saved registers. This should include all
276 registers mentioned above, and %eip. */
277 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
279 struct i386_frame_cache
286 /* Saved registers. */
287 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
291 /* Stack space reserved for local variables. */
295 /* Allocate and initialize a frame cache. */
297 static struct i386_frame_cache
*
298 i386_alloc_frame_cache (void)
300 struct i386_frame_cache
*cache
;
303 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
307 cache
->sp_offset
= -4;
310 /* Saved registers. We initialize these to -1 since zero is a valid
311 offset (that's where %ebp is supposed to be stored). */
312 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
313 cache
->saved_regs
[i
] = -1;
315 cache
->pc_in_eax
= 0;
317 /* Frameless until proven otherwise. */
323 /* If the instruction at PC is a jump, return the address of its
324 target. Otherwise, return PC. */
327 i386_follow_jump (CORE_ADDR pc
)
333 op
= read_memory_unsigned_integer (pc
, 1);
337 op
= read_memory_unsigned_integer (pc
+ 1, 1);
343 /* Relative jump: if data16 == 0, disp32, else disp16. */
346 delta
= read_memory_integer (pc
+ 2, 2);
348 /* Include the size of the jmp instruction (including the
354 delta
= read_memory_integer (pc
+ 1, 4);
356 /* Include the size of the jmp instruction. */
361 /* Relative jump, disp8 (ignore data16). */
362 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
371 /* Check whether PC points at a prologue for a function returning a
372 structure or union. If so, it updates CACHE and returns the
373 address of the first instruction after the code sequence that
374 removes the "hidden" argument from the stack or CURRENT_PC,
375 whichever is smaller. Otherwise, return PC. */
378 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
379 struct i386_frame_cache
*cache
)
381 /* Functions that return a structure or union start with:
384 xchgl %eax, (%esp) 0x87 0x04 0x24
385 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
387 (the System V compiler puts out the second `xchg' instruction,
388 and the assembler doesn't try to optimize it, so the 'sib' form
389 gets generated). This sequence is used to get the address of the
390 return buffer for a function that returns a structure. */
391 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
392 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
393 unsigned char buf
[4];
396 if (current_pc
<= pc
)
399 op
= read_memory_unsigned_integer (pc
, 1);
401 if (op
!= 0x58) /* popl %eax */
404 read_memory (pc
+ 1, buf
, 4);
405 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
408 if (current_pc
== pc
)
410 cache
->sp_offset
+= 4;
414 if (current_pc
== pc
+ 1)
416 cache
->pc_in_eax
= 1;
420 if (buf
[1] == proto1
[1])
427 i386_skip_probe (CORE_ADDR pc
)
429 /* A function may start with
440 unsigned char buf
[8];
443 op
= read_memory_unsigned_integer (pc
, 1);
445 if (op
== 0x68 || op
== 0x6a)
449 /* Skip past the `pushl' instruction; it has either a one-byte or a
450 four-byte operand, depending on the opcode. */
456 /* Read the following 8 bytes, which should be `call _probe' (6
457 bytes) followed by `addl $4,%esp' (2 bytes). */
458 read_memory (pc
+ delta
, buf
, sizeof (buf
));
459 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
460 pc
+= delta
+ sizeof (buf
);
466 /* Check whether PC points at a code that sets up a new stack frame.
467 If so, it updates CACHE and returns the address of the first
468 instruction after the sequence that sets removes the "hidden"
469 argument from the stack or CURRENT_PC, whichever is smaller.
470 Otherwise, return PC. */
473 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
474 struct i386_frame_cache
*cache
)
479 if (current_pc
<= pc
)
482 op
= read_memory_unsigned_integer (pc
, 1);
484 if (op
== 0x55) /* pushl %ebp */
486 /* Take into account that we've executed the `pushl %ebp' that
487 starts this instruction sequence. */
488 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
489 cache
->sp_offset
+= 4;
491 /* If that's all, return now. */
492 if (current_pc
<= pc
+ 1)
495 op
= read_memory_unsigned_integer (pc
+ 1, 1);
497 /* Check for some special instructions that might be migrated
498 by GCC into the prologue. We check for
512 Because of the symmetry, there are actually two ways to
513 encode these instructions; with opcode bytes 0x29 and 0x2b
514 for `subl' and opcode bytes 0x31 and 0x33 for `xorl'.
516 Make sure we only skip these instructions if we later see the
517 `movl %esp, %ebp' that actually sets up the frame. */
518 while (op
== 0x29 || op
== 0x2b || op
== 0x31 || op
== 0x33)
520 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
523 case 0xdb: /* %ebx */
524 case 0xc9: /* %ecx */
525 case 0xd2: /* %edx */
526 case 0xc0: /* %eax */
533 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
536 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
540 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
544 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
551 /* OK, we actually have a frame. We just don't know how large
552 it is yet. Set its size to zero. We'll adjust it if
553 necessary. We also now commit to skipping the special
554 instructions mentioned before. */
558 /* If that's all, return now. */
559 if (current_pc
<= pc
+ 3)
562 /* Check for stack adjustment
566 NOTE: You can't subtract a 16 bit immediate from a 32 bit
567 reg, so we don't have to worry about a data16 prefix. */
568 op
= read_memory_unsigned_integer (pc
+ 3, 1);
571 /* `subl' with 8 bit immediate. */
572 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
573 /* Some instruction starting with 0x83 other than `subl'. */
576 /* `subl' with signed byte immediate (though it wouldn't make
577 sense to be negative). */
578 cache
->locals
= read_memory_integer (pc
+ 5, 1);
583 /* Maybe it is `subl' with a 32 bit immedediate. */
584 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
585 /* Some instruction starting with 0x81 other than `subl'. */
588 /* It is `subl' with a 32 bit immediate. */
589 cache
->locals
= read_memory_integer (pc
+ 5, 4);
594 /* Some instruction other than `subl'. */
598 else if (op
== 0xc8) /* enter $XXX */
600 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
607 /* Check whether PC points at code that saves registers on the stack.
608 If so, it updates CACHE and returns the address of the first
609 instruction after the register saves or CURRENT_PC, whichever is
610 smaller. Otherwise, return PC. */
613 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
614 struct i386_frame_cache
*cache
)
616 CORE_ADDR offset
= 0;
620 if (cache
->locals
> 0)
621 offset
-= cache
->locals
;
622 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
624 op
= read_memory_unsigned_integer (pc
, 1);
625 if (op
< 0x50 || op
> 0x57)
629 cache
->saved_regs
[op
- 0x50] = offset
;
630 cache
->sp_offset
+= 4;
637 /* Do a full analysis of the prologue at PC and update CACHE
638 accordingly. Bail out early if CURRENT_PC is reached. Return the
639 address where the analysis stopped.
641 We handle these cases:
643 The startup sequence can be at the start of the function, or the
644 function can start with a branch to startup code at the end.
646 %ebp can be set up with either the 'enter' instruction, or "pushl
647 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
648 once used in the System V compiler).
650 Local space is allocated just below the saved %ebp by either the
651 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
652 bit unsigned argument for space to allocate, and the 'addl'
653 instruction could have either a signed byte, or 32 bit immediate.
655 Next, the registers used by this function are pushed. With the
656 System V compiler they will always be in the order: %edi, %esi,
657 %ebx (and sometimes a harmless bug causes it to also save but not
658 restore %eax); however, the code below is willing to see the pushes
659 in any order, and will handle up to 8 of them.
661 If the setup sequence is at the end of the function, then the next
662 instruction will be a branch back to the start. */
665 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
666 struct i386_frame_cache
*cache
)
668 pc
= i386_follow_jump (pc
);
669 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
670 pc
= i386_skip_probe (pc
);
671 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
672 return i386_analyze_register_saves (pc
, current_pc
, cache
);
675 /* Return PC of first real instruction. */
678 i386_skip_prologue (CORE_ADDR start_pc
)
680 static unsigned char pic_pat
[6] =
682 0xe8, 0, 0, 0, 0, /* call 0x0 */
683 0x5b, /* popl %ebx */
685 struct i386_frame_cache cache
;
691 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
692 if (cache
.locals
< 0)
695 /* Found valid frame setup. */
697 /* The native cc on SVR4 in -K PIC mode inserts the following code
698 to get the address of the global offset table (GOT) into register
703 movl %ebx,x(%ebp) (optional)
706 This code is with the rest of the prologue (at the end of the
707 function), so we have to skip it to get to the first real
708 instruction at the start of the function. */
710 for (i
= 0; i
< 6; i
++)
712 op
= read_memory_unsigned_integer (pc
+ i
, 1);
713 if (pic_pat
[i
] != op
)
720 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
722 if (op
== 0x89) /* movl %ebx, x(%ebp) */
724 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
726 if (op
== 0x5d) /* One byte offset from %ebp. */
728 else if (op
== 0x9d) /* Four byte offset from %ebp. */
730 else /* Unexpected instruction. */
733 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
737 if (delta
> 0 && op
== 0x81
738 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
744 return i386_follow_jump (pc
);
747 /* This function is 64-bit safe. */
750 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
754 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
755 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
761 static struct i386_frame_cache
*
762 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
764 struct i386_frame_cache
*cache
;
771 cache
= i386_alloc_frame_cache ();
774 /* In principle, for normal frames, %ebp holds the frame pointer,
775 which holds the base address for the current stack frame.
776 However, for functions that don't need it, the frame pointer is
777 optional. For these "frameless" functions the frame pointer is
778 actually the frame pointer of the calling frame. Signal
779 trampolines are just a special case of a "frameless" function.
780 They (usually) share their frame pointer with the frame that was
781 in progress when the signal occurred. */
783 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
784 cache
->base
= extract_unsigned_integer (buf
, 4);
785 if (cache
->base
== 0)
788 /* For normal frames, %eip is stored at 4(%ebp). */
789 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
791 cache
->pc
= frame_func_unwind (next_frame
);
793 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
795 if (cache
->locals
< 0)
797 /* We didn't find a valid frame, which means that CACHE->base
798 currently holds the frame pointer for our calling frame. If
799 we're at the start of a function, or somewhere half-way its
800 prologue, the function's frame probably hasn't been fully
801 setup yet. Try to reconstruct the base address for the stack
802 frame by looking at the stack pointer. For truly "frameless"
803 functions this might work too. */
805 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
806 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
809 /* Now that we have the base address for the stack frame we can
810 calculate the value of %esp in the calling frame. */
811 cache
->saved_sp
= cache
->base
+ 8;
813 /* Adjust all the saved registers such that they contain addresses
814 instead of offsets. */
815 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
816 if (cache
->saved_regs
[i
] != -1)
817 cache
->saved_regs
[i
] += cache
->base
;
823 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
824 struct frame_id
*this_id
)
826 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
828 /* This marks the outermost frame. */
829 if (cache
->base
== 0)
832 /* See the end of i386_push_dummy_call. */
833 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
837 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
838 int regnum
, int *optimizedp
,
839 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
840 int *realnump
, void *valuep
)
842 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
844 gdb_assert (regnum
>= 0);
846 /* The System V ABI says that:
848 "The flags register contains the system flags, such as the
849 direction flag and the carry flag. The direction flag must be
850 set to the forward (that is, zero) direction before entry and
851 upon exit from a function. Other user flags have no specified
852 role in the standard calling sequence and are not preserved."
854 To guarantee the "upon exit" part of that statement we fake a
855 saved flags register that has its direction flag cleared.
857 Note that GCC doesn't seem to rely on the fact that the direction
858 flag is cleared after a function return; it always explicitly
859 clears the flag before operations where it matters.
861 FIXME: kettenis/20030316: I'm not quite sure whether this is the
862 right thing to do. The way we fake the flags register here makes
863 it impossible to change it. */
865 if (regnum
== I386_EFLAGS_REGNUM
)
875 /* Clear the direction flag. */
876 val
= frame_unwind_register_unsigned (next_frame
,
879 store_unsigned_integer (valuep
, 4, val
);
885 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
887 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
888 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
892 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
900 /* Store the value. */
901 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
906 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
909 *lvalp
= lval_memory
;
910 *addrp
= cache
->saved_regs
[regnum
];
914 /* Read the value in from memory. */
915 read_memory (*addrp
, valuep
,
916 register_size (current_gdbarch
, regnum
));
921 frame_register_unwind (next_frame
, regnum
,
922 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
925 static const struct frame_unwind i386_frame_unwind
=
929 i386_frame_prev_register
932 static const struct frame_unwind
*
933 i386_frame_sniffer (struct frame_info
*next_frame
)
935 return &i386_frame_unwind
;
939 /* Signal trampolines. */
941 static struct i386_frame_cache
*
942 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
944 struct i386_frame_cache
*cache
;
945 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
952 cache
= i386_alloc_frame_cache ();
954 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
955 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
957 addr
= tdep
->sigcontext_addr (next_frame
);
958 if (tdep
->sc_reg_offset
)
962 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
964 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
965 if (tdep
->sc_reg_offset
[i
] != -1)
966 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
970 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
971 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
979 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
980 struct frame_id
*this_id
)
982 struct i386_frame_cache
*cache
=
983 i386_sigtramp_frame_cache (next_frame
, this_cache
);
985 /* See the end of i386_push_dummy_call. */
986 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
990 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
992 int regnum
, int *optimizedp
,
993 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
994 int *realnump
, void *valuep
)
996 /* Make sure we've initialized the cache. */
997 i386_sigtramp_frame_cache (next_frame
, this_cache
);
999 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1000 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1003 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1006 i386_sigtramp_frame_this_id
,
1007 i386_sigtramp_frame_prev_register
1010 static const struct frame_unwind
*
1011 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1013 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1016 /* We shouldn't even bother to try if the OSABI didn't register
1017 a sigcontext_addr handler. */
1018 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
1021 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1022 if (PC_IN_SIGTRAMP (pc
, name
))
1023 return &i386_sigtramp_frame_unwind
;
1030 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1032 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1037 static const struct frame_base i386_frame_base
=
1040 i386_frame_base_address
,
1041 i386_frame_base_address
,
1042 i386_frame_base_address
1045 static struct frame_id
1046 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1051 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1052 fp
= extract_unsigned_integer (buf
, 4);
1054 /* See the end of i386_push_dummy_call. */
1055 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1059 /* Figure out where the longjmp will land. Slurp the args out of the
1060 stack. We expect the first arg to be a pointer to the jmp_buf
1061 structure from which we extract the address that we will land at.
1062 This address is copied into PC. This routine returns non-zero on
1065 This function is 64-bit safe. */
1068 i386_get_longjmp_target (CORE_ADDR
*pc
)
1071 CORE_ADDR sp
, jb_addr
;
1072 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1073 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1075 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1076 longjmp will land. */
1077 if (jb_pc_offset
== -1)
1080 /* Don't use I386_ESP_REGNUM here, since this function is also used
1082 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1083 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1084 if (target_read_memory (sp
+ len
, buf
, len
))
1087 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1088 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1091 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1097 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1098 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1099 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1100 CORE_ADDR struct_addr
)
1105 /* Push arguments in reverse order. */
1106 for (i
= nargs
- 1; i
>= 0; i
--)
1108 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1110 /* The System V ABI says that:
1112 "An argument's size is increased, if necessary, to make it a
1113 multiple of [32-bit] words. This may require tail padding,
1114 depending on the size of the argument."
1116 This makes sure the stack says word-aligned. */
1117 sp
-= (len
+ 3) & ~3;
1118 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1121 /* Push value address. */
1125 store_unsigned_integer (buf
, 4, struct_addr
);
1126 write_memory (sp
, buf
, 4);
1129 /* Store return address. */
1131 store_unsigned_integer (buf
, 4, bp_addr
);
1132 write_memory (sp
, buf
, 4);
1134 /* Finally, update the stack pointer... */
1135 store_unsigned_integer (buf
, 4, sp
);
1136 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1138 /* ...and fake a frame pointer. */
1139 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1141 /* MarkK wrote: This "+ 8" is all over the place:
1142 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1143 i386_unwind_dummy_id). It's there, since all frame unwinders for
1144 a given target have to agree (within a certain margin) on the
1145 defenition of the stack address of a frame. Otherwise
1146 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1147 stack address *before* the function call as a frame's CFA. On
1148 the i386, when %ebp is used as a frame pointer, the offset
1149 between the contents %ebp and the CFA as defined by GCC. */
1153 /* These registers are used for returning integers (and on some
1154 targets also for returning `struct' and `union' values when their
1155 size and alignment match an integer type). */
1156 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1157 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1159 /* Read, for architecture GDBARCH, a function return value of TYPE
1160 from REGCACHE, and copy that into VALBUF. */
1163 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1164 struct regcache
*regcache
, void *valbuf
)
1166 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1167 int len
= TYPE_LENGTH (type
);
1168 char buf
[I386_MAX_REGISTER_SIZE
];
1170 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1172 if (tdep
->st0_regnum
< 0)
1174 warning ("Cannot find floating-point return value.");
1175 memset (valbuf
, 0, len
);
1179 /* Floating-point return values can be found in %st(0). Convert
1180 its contents to the desired type. This is probably not
1181 exactly how it would happen on the target itself, but it is
1182 the best we can do. */
1183 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1184 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1188 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1189 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1191 if (len
<= low_size
)
1193 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1194 memcpy (valbuf
, buf
, len
);
1196 else if (len
<= (low_size
+ high_size
))
1198 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1199 memcpy (valbuf
, buf
, low_size
);
1200 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1201 memcpy ((char *) valbuf
+ low_size
, buf
, len
- low_size
);
1204 internal_error (__FILE__
, __LINE__
,
1205 "Cannot extract return value of %d bytes long.", len
);
1209 /* Write, for architecture GDBARCH, a function return value of TYPE
1210 from VALBUF into REGCACHE. */
1213 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1214 struct regcache
*regcache
, const void *valbuf
)
1216 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1217 int len
= TYPE_LENGTH (type
);
1219 /* Define I387_ST0_REGNUM such that we use the proper definitions
1220 for the architecture. */
1221 #define I387_ST0_REGNUM I386_ST0_REGNUM
1223 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1226 char buf
[I386_MAX_REGISTER_SIZE
];
1228 if (tdep
->st0_regnum
< 0)
1230 warning ("Cannot set floating-point return value.");
1234 /* Returning floating-point values is a bit tricky. Apart from
1235 storing the return value in %st(0), we have to simulate the
1236 state of the FPU at function return point. */
1238 /* Convert the value found in VALBUF to the extended
1239 floating-point format used by the FPU. This is probably
1240 not exactly how it would happen on the target itself, but
1241 it is the best we can do. */
1242 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1243 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1245 /* Set the top of the floating-point register stack to 7. The
1246 actual value doesn't really matter, but 7 is what a normal
1247 function return would end up with if the program started out
1248 with a freshly initialized FPU. */
1249 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1251 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1253 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1254 the floating-point register stack to 7, the appropriate value
1255 for the tag word is 0x3fff. */
1256 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1260 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1261 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1263 if (len
<= low_size
)
1264 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1265 else if (len
<= (low_size
+ high_size
))
1267 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1268 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1269 len
- low_size
, (char *) valbuf
+ low_size
);
1272 internal_error (__FILE__
, __LINE__
,
1273 "Cannot store return value of %d bytes long.", len
);
1276 #undef I387_ST0_REGNUM
1280 /* This is the variable that is set with "set struct-convention", and
1281 its legitimate values. */
1282 static const char default_struct_convention
[] = "default";
1283 static const char pcc_struct_convention
[] = "pcc";
1284 static const char reg_struct_convention
[] = "reg";
1285 static const char *valid_conventions
[] =
1287 default_struct_convention
,
1288 pcc_struct_convention
,
1289 reg_struct_convention
,
1292 static const char *struct_convention
= default_struct_convention
;
1294 /* Return non-zero if TYPE, which is assumed to be a structure or
1295 union type, should be returned in registers for architecture
1299 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1301 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1302 enum type_code code
= TYPE_CODE (type
);
1303 int len
= TYPE_LENGTH (type
);
1305 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1307 if (struct_convention
== pcc_struct_convention
1308 || (struct_convention
== default_struct_convention
1309 && tdep
->struct_return
== pcc_struct_return
))
1312 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1315 /* Determine, for architecture GDBARCH, how a return value of TYPE
1316 should be returned. If it is supposed to be returned in registers,
1317 and READBUF is non-zero, read the appropriate value from REGCACHE,
1318 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1319 from WRITEBUF into REGCACHE. */
1321 static enum return_value_convention
1322 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1323 struct regcache
*regcache
, void *readbuf
,
1324 const void *writebuf
)
1326 enum type_code code
= TYPE_CODE (type
);
1328 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1329 && !i386_reg_struct_return_p (gdbarch
, type
))
1330 return RETURN_VALUE_STRUCT_CONVENTION
;
1332 /* This special case is for structures consisting of a single
1333 `float' or `double' member. These structures are returned in
1334 %st(0). For these structures, we call ourselves recursively,
1335 changing TYPE into the type of the first member of the structure.
1336 Since that should work for all structures that have only one
1337 member, we don't bother to check the member's type here. */
1338 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1340 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1341 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1345 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1347 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1349 return RETURN_VALUE_REGISTER_CONVENTION
;
1353 /* Return the GDB type object for the "standard" data type of data in
1354 register REGNUM. Perhaps %esi and %edi should go here, but
1355 potentially they could be used for things other than address. */
1357 static struct type
*
1358 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1360 if (regnum
== I386_EIP_REGNUM
1361 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1362 return lookup_pointer_type (builtin_type_void
);
1364 if (i386_fp_regnum_p (regnum
))
1365 return builtin_type_i387_ext
;
1367 if (i386_sse_regnum_p (gdbarch
, regnum
))
1368 return builtin_type_vec128i
;
1370 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1371 return builtin_type_vec64i
;
1373 return builtin_type_int
;
1376 /* Map a cooked register onto a raw register or memory. For the i386,
1377 the MMX registers need to be mapped onto floating point registers. */
1380 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1382 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1387 /* Define I387_ST0_REGNUM such that we use the proper definitions
1388 for REGCACHE's architecture. */
1389 #define I387_ST0_REGNUM tdep->st0_regnum
1391 mmxreg
= regnum
- tdep
->mm0_regnum
;
1392 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1393 tos
= (fstat
>> 11) & 0x7;
1394 fpreg
= (mmxreg
+ tos
) % 8;
1396 return (I387_ST0_REGNUM
+ fpreg
);
1398 #undef I387_ST0_REGNUM
1402 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1403 int regnum
, void *buf
)
1405 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1407 char mmx_buf
[MAX_REGISTER_SIZE
];
1408 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1410 /* Extract (always little endian). */
1411 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1412 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1415 regcache_raw_read (regcache
, regnum
, buf
);
1419 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1420 int regnum
, const void *buf
)
1422 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1424 char mmx_buf
[MAX_REGISTER_SIZE
];
1425 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1428 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1429 /* ... Modify ... (always little endian). */
1430 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1432 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1435 regcache_raw_write (regcache
, regnum
, buf
);
1439 /* Return the register number of the register allocated by GCC after
1440 REGNUM, or -1 if there is no such register. */
1443 i386_next_regnum (int regnum
)
1445 /* GCC allocates the registers in the order:
1447 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1449 Since storing a variable in %esp doesn't make any sense we return
1450 -1 for %ebp and for %esp itself. */
1451 static int next_regnum
[] =
1453 I386_EDX_REGNUM
, /* Slot for %eax. */
1454 I386_EBX_REGNUM
, /* Slot for %ecx. */
1455 I386_ECX_REGNUM
, /* Slot for %edx. */
1456 I386_ESI_REGNUM
, /* Slot for %ebx. */
1457 -1, -1, /* Slots for %esp and %ebp. */
1458 I386_EDI_REGNUM
, /* Slot for %esi. */
1459 I386_EBP_REGNUM
/* Slot for %edi. */
1462 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1463 return next_regnum
[regnum
];
1468 /* Return nonzero if a value of type TYPE stored in register REGNUM
1469 needs any special handling. */
1472 i386_convert_register_p (int regnum
, struct type
*type
)
1474 int len
= TYPE_LENGTH (type
);
1476 /* Values may be spread across multiple registers. Most debugging
1477 formats aren't expressive enough to specify the locations, so
1478 some heuristics is involved. Right now we only handle types that
1479 have a length that is a multiple of the word size, since GCC
1480 doesn't seem to put any other types into registers. */
1481 if (len
> 4 && len
% 4 == 0)
1483 int last_regnum
= regnum
;
1487 last_regnum
= i386_next_regnum (last_regnum
);
1491 if (last_regnum
!= -1)
1495 return i386_fp_regnum_p (regnum
);
1498 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1499 return its contents in TO. */
1502 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1503 struct type
*type
, void *to
)
1505 int len
= TYPE_LENGTH (type
);
1508 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1509 available in FRAME (i.e. if it wasn't saved)? */
1511 if (i386_fp_regnum_p (regnum
))
1513 i387_register_to_value (frame
, regnum
, type
, to
);
1517 /* Read a value spread accross multiple registers. */
1519 gdb_assert (len
> 4 && len
% 4 == 0);
1523 gdb_assert (regnum
!= -1);
1524 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1526 get_frame_register (frame
, regnum
, buf
);
1527 regnum
= i386_next_regnum (regnum
);
1533 /* Write the contents FROM of a value of type TYPE into register
1534 REGNUM in frame FRAME. */
1537 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1538 struct type
*type
, const void *from
)
1540 int len
= TYPE_LENGTH (type
);
1541 const char *buf
= from
;
1543 if (i386_fp_regnum_p (regnum
))
1545 i387_value_to_register (frame
, regnum
, type
, from
);
1549 /* Write a value spread accross multiple registers. */
1551 gdb_assert (len
> 4 && len
% 4 == 0);
1555 gdb_assert (regnum
!= -1);
1556 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1558 put_frame_register (frame
, regnum
, buf
);
1559 regnum
= i386_next_regnum (regnum
);
1565 /* Supply register REGNUM from the general-purpose register set REGSET
1566 to register cache REGCACHE. If REGNUM is -1, do this for all
1567 registers in REGSET. */
1570 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1571 int regnum
, const void *gregs
, size_t len
)
1573 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1574 const char *regs
= gregs
;
1577 gdb_assert (len
== tdep
->sizeof_gregset
);
1579 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1581 if ((regnum
== i
|| regnum
== -1)
1582 && tdep
->gregset_reg_offset
[i
] != -1)
1583 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1587 /* Supply register REGNUM from the floating-point register set REGSET
1588 to register cache REGCACHE. If REGNUM is -1, do this for all
1589 registers in REGSET. */
1592 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1593 int regnum
, const void *fpregs
, size_t len
)
1595 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1597 if (len
== I387_SIZEOF_FXSAVE
)
1599 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1603 gdb_assert (len
== tdep
->sizeof_fpregset
);
1604 i387_supply_fsave (regcache
, regnum
, fpregs
);
1607 /* Return the appropriate register set for the core section identified
1608 by SECT_NAME and SECT_SIZE. */
1610 const struct regset
*
1611 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1612 const char *sect_name
, size_t sect_size
)
1614 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1616 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1618 if (tdep
->gregset
== NULL
)
1620 tdep
->gregset
= XMALLOC (struct regset
);
1621 tdep
->gregset
->descr
= tdep
;
1622 tdep
->gregset
->supply_regset
= i386_supply_gregset
;
1624 return tdep
->gregset
;
1627 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1628 || (strcmp (sect_name
, ".reg-xfp") == 0
1629 && sect_size
== I387_SIZEOF_FXSAVE
))
1631 if (tdep
->fpregset
== NULL
)
1633 tdep
->fpregset
= XMALLOC (struct regset
);
1634 tdep
->fpregset
->descr
= tdep
;
1635 tdep
->fpregset
->supply_regset
= i386_supply_fpregset
;
1637 return tdep
->fpregset
;
1644 #ifdef STATIC_TRANSFORM_NAME
1645 /* SunPRO encodes the static variables. This is not related to C++
1646 mangling, it is done for C too. */
1649 sunpro_static_transform_name (char *name
)
1652 if (IS_STATIC_TRANSFORM_NAME (name
))
1654 /* For file-local statics there will be a period, a bunch of
1655 junk (the contents of which match a string given in the
1656 N_OPT), a period and the name. For function-local statics
1657 there will be a bunch of junk (which seems to change the
1658 second character from 'A' to 'B'), a period, the name of the
1659 function, and the name. So just skip everything before the
1661 p
= strrchr (name
, '.');
1667 #endif /* STATIC_TRANSFORM_NAME */
1670 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1673 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1675 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1677 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1678 struct minimal_symbol
*indsym
=
1679 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1680 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1684 if (strncmp (symname
, "__imp_", 6) == 0
1685 || strncmp (symname
, "_imp_", 5) == 0)
1686 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1689 return 0; /* Not a trampoline. */
1693 /* Return non-zero if PC and NAME show that we are in a signal
1697 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1699 return (name
&& strcmp ("_sigtramp", name
) == 0);
1703 /* We have two flavours of disassembly. The machinery on this page
1704 deals with switching between those. */
1707 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1709 gdb_assert (disassembly_flavor
== att_flavor
1710 || disassembly_flavor
== intel_flavor
);
1712 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1713 constified, cast to prevent a compiler warning. */
1714 info
->disassembler_options
= (char *) disassembly_flavor
;
1715 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1717 return print_insn_i386 (pc
, info
);
1721 /* There are a few i386 architecture variants that differ only
1722 slightly from the generic i386 target. For now, we don't give them
1723 their own source file, but include them here. As a consequence,
1724 they'll always be included. */
1726 /* System V Release 4 (SVR4). */
1729 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1731 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1732 currently unknown. */
1733 return (name
&& (strcmp ("_sigreturn", name
) == 0
1734 || strcmp ("_sigacthandler", name
) == 0
1735 || strcmp ("sigvechandler", name
) == 0));
1738 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1739 routine, return the address of the associated sigcontext (ucontext)
1743 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1748 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1749 sp
= extract_unsigned_integer (buf
, 4);
1751 return read_memory_unsigned_integer (sp
+ 8, 4);
1758 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1760 /* DJGPP doesn't have any special frames for signal handlers. */
1768 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1770 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1771 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1774 /* System V Release 4 (SVR4). */
1777 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1779 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1781 /* System V Release 4 uses ELF. */
1782 i386_elf_init_abi (info
, gdbarch
);
1784 /* System V Release 4 has shared libraries. */
1785 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1786 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1788 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1789 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1790 tdep
->sc_pc_offset
= 36 + 14 * 4;
1791 tdep
->sc_sp_offset
= 36 + 17 * 4;
1793 tdep
->jb_pc_offset
= 20;
1799 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1801 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1803 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1805 tdep
->jb_pc_offset
= 36;
1811 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1813 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1815 tdep
->jb_pc_offset
= 24;
1819 /* i386 register groups. In addition to the normal groups, add "mmx"
1822 static struct reggroup
*i386_sse_reggroup
;
1823 static struct reggroup
*i386_mmx_reggroup
;
1826 i386_init_reggroups (void)
1828 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1829 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1833 i386_add_reggroups (struct gdbarch
*gdbarch
)
1835 reggroup_add (gdbarch
, i386_sse_reggroup
);
1836 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1837 reggroup_add (gdbarch
, general_reggroup
);
1838 reggroup_add (gdbarch
, float_reggroup
);
1839 reggroup_add (gdbarch
, all_reggroup
);
1840 reggroup_add (gdbarch
, save_reggroup
);
1841 reggroup_add (gdbarch
, restore_reggroup
);
1842 reggroup_add (gdbarch
, vector_reggroup
);
1843 reggroup_add (gdbarch
, system_reggroup
);
1847 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1848 struct reggroup
*group
)
1850 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1851 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1852 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1853 || i386_fpc_regnum_p (regnum
));
1854 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1856 if (group
== i386_mmx_reggroup
)
1857 return mmx_regnum_p
;
1858 if (group
== i386_sse_reggroup
)
1859 return sse_regnum_p
;
1860 if (group
== vector_reggroup
)
1861 return (mmx_regnum_p
|| sse_regnum_p
);
1862 if (group
== float_reggroup
)
1864 if (group
== general_reggroup
)
1865 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1867 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1871 /* Get the ARGIth function argument for the current function. */
1874 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1877 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1878 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1882 static struct gdbarch
*
1883 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1885 struct gdbarch_tdep
*tdep
;
1886 struct gdbarch
*gdbarch
;
1888 /* If there is already a candidate, use it. */
1889 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1891 return arches
->gdbarch
;
1893 /* Allocate space for the new architecture. */
1894 tdep
= XMALLOC (struct gdbarch_tdep
);
1895 gdbarch
= gdbarch_alloc (&info
, tdep
);
1897 /* General-purpose registers. */
1898 tdep
->gregset
= NULL
;
1899 tdep
->gregset_reg_offset
= NULL
;
1900 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1901 tdep
->sizeof_gregset
= 0;
1903 /* Floating-point registers. */
1904 tdep
->fpregset
= NULL
;
1905 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1907 /* The default settings include the FPU registers, the MMX registers
1908 and the SSE registers. This can be overidden for a specific ABI
1909 by adjusting the members `st0_regnum', `mm0_regnum' and
1910 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1911 will show up in the output of "info all-registers". Ideally we
1912 should try to autodetect whether they are available, such that we
1913 can prevent "info all-registers" from displaying registers that
1916 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1917 [the SSE registers] always (even when they don't exist) or never
1918 showing them to the user (even when they do exist), I prefer the
1919 former over the latter. */
1921 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1923 /* The MMX registers are implemented as pseudo-registers. Put off
1924 caclulating the register number for %mm0 until we know the number
1925 of raw registers. */
1926 tdep
->mm0_regnum
= 0;
1928 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1929 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1931 tdep
->jb_pc_offset
= -1;
1932 tdep
->struct_return
= pcc_struct_return
;
1933 tdep
->sigtramp_start
= 0;
1934 tdep
->sigtramp_end
= 0;
1935 tdep
->sigcontext_addr
= NULL
;
1936 tdep
->sc_reg_offset
= NULL
;
1937 tdep
->sc_pc_offset
= -1;
1938 tdep
->sc_sp_offset
= -1;
1940 /* The format used for `long double' on almost all i386 targets is
1941 the i387 extended floating-point format. In fact, of all targets
1942 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1943 on having a `long double' that's not `long' at all. */
1944 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1946 /* Although the i387 extended floating-point has only 80 significant
1947 bits, a `long double' actually takes up 96, probably to enforce
1949 set_gdbarch_long_double_bit (gdbarch
, 96);
1951 /* The default ABI includes general-purpose registers,
1952 floating-point registers, and the SSE registers. */
1953 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1954 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1955 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1957 /* Register numbers of various important registers. */
1958 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1959 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1960 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1961 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1963 /* Use the "default" register numbering scheme for stabs and COFF. */
1964 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1965 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1967 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1968 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1969 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1971 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1972 be in use on any of the supported i386 targets. */
1974 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1976 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1978 /* Call dummy code. */
1979 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1981 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1982 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1983 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1985 set_gdbarch_return_value (gdbarch
, i386_return_value
);
1987 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1989 /* Stack grows downward. */
1990 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1992 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1993 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1995 set_gdbarch_frame_args_skip (gdbarch
, 8);
1996 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1998 /* Wire in the MMX registers. */
1999 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2000 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2001 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2003 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2005 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2007 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2009 /* Add the i386 register groups. */
2010 i386_add_reggroups (gdbarch
);
2011 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2013 /* Helper for function argument information. */
2014 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2016 /* Hook in the DWARF CFI frame unwinder. */
2017 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2019 frame_base_set_default (gdbarch
, &i386_frame_base
);
2021 /* Hook in ABI-specific overrides, if they have been registered. */
2022 gdbarch_init_osabi (info
, gdbarch
);
2024 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2025 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2027 /* If we have a register mapping, enable the generic core file
2028 support, unless it has already been enabled. */
2029 if (tdep
->gregset_reg_offset
2030 && !gdbarch_regset_from_core_section_p (gdbarch
))
2031 set_gdbarch_regset_from_core_section (gdbarch
,
2032 i386_regset_from_core_section
);
2034 /* Unless support for MMX has been disabled, make %mm0 the first
2036 if (tdep
->mm0_regnum
== 0)
2037 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2042 static enum gdb_osabi
2043 i386_coff_osabi_sniffer (bfd
*abfd
)
2045 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2046 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2047 return GDB_OSABI_GO32
;
2049 return GDB_OSABI_UNKNOWN
;
2052 static enum gdb_osabi
2053 i386_nlm_osabi_sniffer (bfd
*abfd
)
2055 return GDB_OSABI_NETWARE
;
2059 /* Provide a prototype to silence -Wmissing-prototypes. */
2060 void _initialize_i386_tdep (void);
2063 _initialize_i386_tdep (void)
2065 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2067 /* Add the variable that controls the disassembly flavor. */
2069 struct cmd_list_element
*new_cmd
;
2071 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2073 &disassembly_flavor
,
2075 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2076 and the default value is \"att\".",
2078 add_show_from_set (new_cmd
, &showlist
);
2081 /* Add the variable that controls the convention for returning
2084 struct cmd_list_element
*new_cmd
;
2086 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2088 &struct_convention
, "\
2089 Set the convention for returning small structs, valid values \
2090 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2092 add_show_from_set (new_cmd
, &showlist
);
2095 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2096 i386_coff_osabi_sniffer
);
2097 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2098 i386_nlm_osabi_sniffer
);
2100 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2101 i386_svr4_init_abi
);
2102 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2103 i386_go32_init_abi
);
2104 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2107 /* Initialize the i386 specific register groups. */
2108 i386_init_reggroups ();