1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
47 #include "gdb_assert.h"
48 #include "gdb_string.h"
50 #include "i386-tdep.h"
51 #include "i387-tdep.h"
53 /* Names of the registers. The first 10 registers match the register
54 numbering scheme used by GCC for stabs and DWARF. */
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REG. */
157 i386_register_name (int reg
)
159 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
160 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
162 if (reg
>= 0 && reg
< i386_num_register_names
)
163 return i386_register_names
[reg
];
168 /* Convert stabs register number REG to the appropriate register
169 number used by GDB. */
172 i386_stab_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map. */
175 if (reg
>= 0 && reg
<= 7)
177 /* General-purpose registers. */
180 else if (reg
>= 12 && reg
<= 19)
182 /* Floating-point registers. */
183 return reg
- 12 + I387_ST0_REGNUM
;
185 else if (reg
>= 21 && reg
<= 28)
188 return reg
- 21 + I387_XMM0_REGNUM
;
190 else if (reg
>= 29 && reg
<= 36)
193 return reg
- 29 + I387_MM0_REGNUM
;
196 /* This will hopefully provoke a warning. */
197 return NUM_REGS
+ NUM_PSEUDO_REGS
;
200 /* Convert DWARF register number REG to the appropriate register
201 number used by GDB. */
204 i386_dwarf_reg_to_regnum (int reg
)
206 /* The DWARF register numbering includes %eip and %eflags, and
207 numbers the floating point registers differently. */
208 if (reg
>= 0 && reg
<= 9)
210 /* General-purpose registers. */
213 else if (reg
>= 11 && reg
<= 18)
215 /* Floating-point registers. */
216 return reg
- 11 + I387_ST0_REGNUM
;
220 /* The SSE and MMX registers have identical numbers as in stabs. */
221 return i386_stab_reg_to_regnum (reg
);
224 /* This will hopefully provoke a warning. */
225 return NUM_REGS
+ NUM_PSEUDO_REGS
;
228 #undef I387_ST0_REGNUM
229 #undef I387_MM0_REGNUM
230 #undef I387_NUM_XMM_REGS
233 /* This is the variable that is set with "set disassembly-flavor", and
234 its legitimate values. */
235 static const char att_flavor
[] = "att";
236 static const char intel_flavor
[] = "intel";
237 static const char *valid_flavors
[] =
243 static const char *disassembly_flavor
= att_flavor
;
246 /* Use the program counter to determine the contents and size of a
247 breakpoint instruction. Return a pointer to a string of bytes that
248 encode a breakpoint instruction, store the length of the string in
249 *LEN and optionally adjust *PC to point to the correct memory
250 location for inserting the breakpoint.
252 On the i386 we have a single breakpoint that fits in a single byte
253 and can be inserted anywhere.
255 This function is 64-bit safe. */
257 static const unsigned char *
258 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
260 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
262 *len
= sizeof (break_insn
);
266 #ifdef I386_REGNO_TO_SYMMETRY
267 #error "The Sequent Symmetry is no longer supported."
270 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
271 and %esp "belong" to the calling function. Therefore these
272 registers should be saved if they're going to be modified. */
274 /* The maximum number of saved registers. This should include all
275 registers mentioned above, and %eip. */
276 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
278 struct i386_frame_cache
285 /* Saved registers. */
286 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
290 /* Stack space reserved for local variables. */
294 /* Allocate and initialize a frame cache. */
296 static struct i386_frame_cache
*
297 i386_alloc_frame_cache (void)
299 struct i386_frame_cache
*cache
;
302 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
306 cache
->sp_offset
= -4;
309 /* Saved registers. We initialize these to -1 since zero is a valid
310 offset (that's where %ebp is supposed to be stored). */
311 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
312 cache
->saved_regs
[i
] = -1;
314 cache
->pc_in_eax
= 0;
316 /* Frameless until proven otherwise. */
322 /* If the instruction at PC is a jump, return the address of its
323 target. Otherwise, return PC. */
326 i386_follow_jump (CORE_ADDR pc
)
332 op
= read_memory_unsigned_integer (pc
, 1);
336 op
= read_memory_unsigned_integer (pc
+ 1, 1);
342 /* Relative jump: if data16 == 0, disp32, else disp16. */
345 delta
= read_memory_integer (pc
+ 2, 2);
347 /* Include the size of the jmp instruction (including the
353 delta
= read_memory_integer (pc
+ 1, 4);
355 /* Include the size of the jmp instruction. */
360 /* Relative jump, disp8 (ignore data16). */
361 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
370 /* Check whether PC points at a prologue for a function returning a
371 structure or union. If so, it updates CACHE and returns the
372 address of the first instruction after the code sequence that
373 removes the "hidden" argument from the stack or CURRENT_PC,
374 whichever is smaller. Otherwise, return PC. */
377 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
378 struct i386_frame_cache
*cache
)
380 /* Functions that return a structure or union start with:
383 xchgl %eax, (%esp) 0x87 0x04 0x24
384 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
386 (the System V compiler puts out the second `xchg' instruction,
387 and the assembler doesn't try to optimize it, so the 'sib' form
388 gets generated). This sequence is used to get the address of the
389 return buffer for a function that returns a structure. */
390 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
391 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
392 unsigned char buf
[4];
395 if (current_pc
<= pc
)
398 op
= read_memory_unsigned_integer (pc
, 1);
400 if (op
!= 0x58) /* popl %eax */
403 read_memory (pc
+ 1, buf
, 4);
404 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
407 if (current_pc
== pc
)
409 cache
->sp_offset
+= 4;
413 if (current_pc
== pc
+ 1)
415 cache
->pc_in_eax
= 1;
419 if (buf
[1] == proto1
[1])
426 i386_skip_probe (CORE_ADDR pc
)
428 /* A function may start with
439 unsigned char buf
[8];
442 op
= read_memory_unsigned_integer (pc
, 1);
444 if (op
== 0x68 || op
== 0x6a)
448 /* Skip past the `pushl' instruction; it has either a one-byte or a
449 four-byte operand, depending on the opcode. */
455 /* Read the following 8 bytes, which should be `call _probe' (6
456 bytes) followed by `addl $4,%esp' (2 bytes). */
457 read_memory (pc
+ delta
, buf
, sizeof (buf
));
458 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
459 pc
+= delta
+ sizeof (buf
);
465 /* Check whether PC points at a code that sets up a new stack frame.
466 If so, it updates CACHE and returns the address of the first
467 instruction after the sequence that sets removes the "hidden"
468 argument from the stack or CURRENT_PC, whichever is smaller.
469 Otherwise, return PC. */
472 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
473 struct i386_frame_cache
*cache
)
478 if (current_pc
<= pc
)
481 op
= read_memory_unsigned_integer (pc
, 1);
483 if (op
== 0x55) /* pushl %ebp */
485 /* Take into account that we've executed the `pushl %ebp' that
486 starts this instruction sequence. */
487 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
488 cache
->sp_offset
+= 4;
490 /* If that's all, return now. */
491 if (current_pc
<= pc
+ 1)
494 op
= read_memory_unsigned_integer (pc
+ 1, 1);
496 /* Check for some special instructions that might be migrated
497 by GCC into the prologue. We check for
511 Make sure we only skip these instructions if we later see the
512 `movl %esp, %ebp' that actually sets up the frame. */
513 while (op
== 0x29 || op
== 0x31)
515 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
518 case 0xdb: /* %ebx */
519 case 0xc9: /* %ecx */
520 case 0xd2: /* %edx */
521 case 0xc0: /* %eax */
528 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
531 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
535 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
539 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
546 /* OK, we actually have a frame. We just don't know how large
547 it is yet. Set its size to zero. We'll adjust it if
548 necessary. We also now commit to skipping the special
549 instructions mentioned before. */
553 /* If that's all, return now. */
554 if (current_pc
<= pc
+ 3)
557 /* Check for stack adjustment
561 NOTE: You can't subtract a 16 bit immediate from a 32 bit
562 reg, so we don't have to worry about a data16 prefix. */
563 op
= read_memory_unsigned_integer (pc
+ 3, 1);
566 /* `subl' with 8 bit immediate. */
567 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
568 /* Some instruction starting with 0x83 other than `subl'. */
571 /* `subl' with signed byte immediate (though it wouldn't make
572 sense to be negative). */
573 cache
->locals
= read_memory_integer (pc
+ 5, 1);
578 /* Maybe it is `subl' with a 32 bit immedediate. */
579 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
580 /* Some instruction starting with 0x81 other than `subl'. */
583 /* It is `subl' with a 32 bit immediate. */
584 cache
->locals
= read_memory_integer (pc
+ 5, 4);
589 /* Some instruction other than `subl'. */
593 else if (op
== 0xc8) /* enter $XXX */
595 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
602 /* Check whether PC points at code that saves registers on the stack.
603 If so, it updates CACHE and returns the address of the first
604 instruction after the register saves or CURRENT_PC, whichever is
605 smaller. Otherwise, return PC. */
608 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
609 struct i386_frame_cache
*cache
)
611 CORE_ADDR offset
= 0;
615 if (cache
->locals
> 0)
616 offset
-= cache
->locals
;
617 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
619 op
= read_memory_unsigned_integer (pc
, 1);
620 if (op
< 0x50 || op
> 0x57)
624 cache
->saved_regs
[op
- 0x50] = offset
;
625 cache
->sp_offset
+= 4;
632 /* Do a full analysis of the prologue at PC and update CACHE
633 accordingly. Bail out early if CURRENT_PC is reached. Return the
634 address where the analysis stopped.
636 We handle these cases:
638 The startup sequence can be at the start of the function, or the
639 function can start with a branch to startup code at the end.
641 %ebp can be set up with either the 'enter' instruction, or "pushl
642 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
643 once used in the System V compiler).
645 Local space is allocated just below the saved %ebp by either the
646 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
647 bit unsigned argument for space to allocate, and the 'addl'
648 instruction could have either a signed byte, or 32 bit immediate.
650 Next, the registers used by this function are pushed. With the
651 System V compiler they will always be in the order: %edi, %esi,
652 %ebx (and sometimes a harmless bug causes it to also save but not
653 restore %eax); however, the code below is willing to see the pushes
654 in any order, and will handle up to 8 of them.
656 If the setup sequence is at the end of the function, then the next
657 instruction will be a branch back to the start. */
660 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
661 struct i386_frame_cache
*cache
)
663 pc
= i386_follow_jump (pc
);
664 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
665 pc
= i386_skip_probe (pc
);
666 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
667 return i386_analyze_register_saves (pc
, current_pc
, cache
);
670 /* Return PC of first real instruction. */
673 i386_skip_prologue (CORE_ADDR start_pc
)
675 static unsigned char pic_pat
[6] =
677 0xe8, 0, 0, 0, 0, /* call 0x0 */
678 0x5b, /* popl %ebx */
680 struct i386_frame_cache cache
;
686 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
687 if (cache
.locals
< 0)
690 /* Found valid frame setup. */
692 /* The native cc on SVR4 in -K PIC mode inserts the following code
693 to get the address of the global offset table (GOT) into register
698 movl %ebx,x(%ebp) (optional)
701 This code is with the rest of the prologue (at the end of the
702 function), so we have to skip it to get to the first real
703 instruction at the start of the function. */
705 for (i
= 0; i
< 6; i
++)
707 op
= read_memory_unsigned_integer (pc
+ i
, 1);
708 if (pic_pat
[i
] != op
)
715 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
717 if (op
== 0x89) /* movl %ebx, x(%ebp) */
719 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
721 if (op
== 0x5d) /* One byte offset from %ebp. */
723 else if (op
== 0x9d) /* Four byte offset from %ebp. */
725 else /* Unexpected instruction. */
728 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
732 if (delta
> 0 && op
== 0x81
733 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
739 return i386_follow_jump (pc
);
742 /* This function is 64-bit safe. */
745 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
749 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
750 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
756 static struct i386_frame_cache
*
757 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
759 struct i386_frame_cache
*cache
;
766 cache
= i386_alloc_frame_cache ();
769 /* In principle, for normal frames, %ebp holds the frame pointer,
770 which holds the base address for the current stack frame.
771 However, for functions that don't need it, the frame pointer is
772 optional. For these "frameless" functions the frame pointer is
773 actually the frame pointer of the calling frame. Signal
774 trampolines are just a special case of a "frameless" function.
775 They (usually) share their frame pointer with the frame that was
776 in progress when the signal occurred. */
778 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
779 cache
->base
= extract_unsigned_integer (buf
, 4);
780 if (cache
->base
== 0)
783 /* For normal frames, %eip is stored at 4(%ebp). */
784 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
786 cache
->pc
= frame_func_unwind (next_frame
);
788 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
790 if (cache
->locals
< 0)
792 /* We didn't find a valid frame, which means that CACHE->base
793 currently holds the frame pointer for our calling frame. If
794 we're at the start of a function, or somewhere half-way its
795 prologue, the function's frame probably hasn't been fully
796 setup yet. Try to reconstruct the base address for the stack
797 frame by looking at the stack pointer. For truly "frameless"
798 functions this might work too. */
800 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
801 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
804 /* Now that we have the base address for the stack frame we can
805 calculate the value of %esp in the calling frame. */
806 cache
->saved_sp
= cache
->base
+ 8;
808 /* Adjust all the saved registers such that they contain addresses
809 instead of offsets. */
810 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
811 if (cache
->saved_regs
[i
] != -1)
812 cache
->saved_regs
[i
] += cache
->base
;
818 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
819 struct frame_id
*this_id
)
821 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
823 /* This marks the outermost frame. */
824 if (cache
->base
== 0)
827 /* See the end of i386_push_dummy_call. */
828 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
832 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
833 int regnum
, int *optimizedp
,
834 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
835 int *realnump
, void *valuep
)
837 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
839 gdb_assert (regnum
>= 0);
841 /* The System V ABI says that:
843 "The flags register contains the system flags, such as the
844 direction flag and the carry flag. The direction flag must be
845 set to the forward (that is, zero) direction before entry and
846 upon exit from a function. Other user flags have no specified
847 role in the standard calling sequence and are not preserved."
849 To guarantee the "upon exit" part of that statement we fake a
850 saved flags register that has its direction flag cleared.
852 Note that GCC doesn't seem to rely on the fact that the direction
853 flag is cleared after a function return; it always explicitly
854 clears the flag before operations where it matters.
856 FIXME: kettenis/20030316: I'm not quite sure whether this is the
857 right thing to do. The way we fake the flags register here makes
858 it impossible to change it. */
860 if (regnum
== I386_EFLAGS_REGNUM
)
870 /* Clear the direction flag. */
871 val
= frame_unwind_register_unsigned (next_frame
,
874 store_unsigned_integer (valuep
, 4, val
);
880 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
882 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
883 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
887 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
895 /* Store the value. */
896 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
901 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
904 *lvalp
= lval_memory
;
905 *addrp
= cache
->saved_regs
[regnum
];
909 /* Read the value in from memory. */
910 read_memory (*addrp
, valuep
,
911 register_size (current_gdbarch
, regnum
));
916 frame_register_unwind (next_frame
, regnum
,
917 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
920 static const struct frame_unwind i386_frame_unwind
=
924 i386_frame_prev_register
927 static const struct frame_unwind
*
928 i386_frame_sniffer (struct frame_info
*next_frame
)
930 return &i386_frame_unwind
;
934 /* Signal trampolines. */
936 static struct i386_frame_cache
*
937 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
939 struct i386_frame_cache
*cache
;
940 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
947 cache
= i386_alloc_frame_cache ();
949 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
950 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
952 addr
= tdep
->sigcontext_addr (next_frame
);
953 if (tdep
->sc_reg_offset
)
957 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
959 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
960 if (tdep
->sc_reg_offset
[i
] != -1)
961 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
965 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
966 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
974 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
975 struct frame_id
*this_id
)
977 struct i386_frame_cache
*cache
=
978 i386_sigtramp_frame_cache (next_frame
, this_cache
);
980 /* See the end of i386_push_dummy_call. */
981 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
985 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
987 int regnum
, int *optimizedp
,
988 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
989 int *realnump
, void *valuep
)
991 /* Make sure we've initialized the cache. */
992 i386_sigtramp_frame_cache (next_frame
, this_cache
);
994 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
995 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
998 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1001 i386_sigtramp_frame_this_id
,
1002 i386_sigtramp_frame_prev_register
1005 static const struct frame_unwind
*
1006 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1008 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1011 /* We shouldn't even bother to try if the OSABI didn't register
1012 a sigcontext_addr handler. */
1013 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
1016 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1017 if (PC_IN_SIGTRAMP (pc
, name
))
1018 return &i386_sigtramp_frame_unwind
;
1025 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1027 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1032 static const struct frame_base i386_frame_base
=
1035 i386_frame_base_address
,
1036 i386_frame_base_address
,
1037 i386_frame_base_address
1040 static struct frame_id
1041 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1046 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1047 fp
= extract_unsigned_integer (buf
, 4);
1049 /* See the end of i386_push_dummy_call. */
1050 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1054 /* Figure out where the longjmp will land. Slurp the args out of the
1055 stack. We expect the first arg to be a pointer to the jmp_buf
1056 structure from which we extract the address that we will land at.
1057 This address is copied into PC. This routine returns non-zero on
1060 This function is 64-bit safe. */
1063 i386_get_longjmp_target (CORE_ADDR
*pc
)
1066 CORE_ADDR sp
, jb_addr
;
1067 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1068 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1070 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1071 longjmp will land. */
1072 if (jb_pc_offset
== -1)
1075 /* Don't use I386_ESP_REGNUM here, since this function is also used
1077 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1078 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1079 if (target_read_memory (sp
+ len
, buf
, len
))
1082 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1083 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1086 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1092 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1093 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1094 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1095 CORE_ADDR struct_addr
)
1100 /* Push arguments in reverse order. */
1101 for (i
= nargs
- 1; i
>= 0; i
--)
1103 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1105 /* The System V ABI says that:
1107 "An argument's size is increased, if necessary, to make it a
1108 multiple of [32-bit] words. This may require tail padding,
1109 depending on the size of the argument."
1111 This makes sure the stack says word-aligned. */
1112 sp
-= (len
+ 3) & ~3;
1113 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1116 /* Push value address. */
1120 store_unsigned_integer (buf
, 4, struct_addr
);
1121 write_memory (sp
, buf
, 4);
1124 /* Store return address. */
1126 store_unsigned_integer (buf
, 4, bp_addr
);
1127 write_memory (sp
, buf
, 4);
1129 /* Finally, update the stack pointer... */
1130 store_unsigned_integer (buf
, 4, sp
);
1131 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1133 /* ...and fake a frame pointer. */
1134 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1136 /* MarkK wrote: This "+ 8" is all over the place:
1137 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1138 i386_unwind_dummy_id). It's there, since all frame unwinders for
1139 a given target have to agree (within a certain margin) on the
1140 defenition of the stack address of a frame. Otherwise
1141 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1142 stack address *before* the function call as a frame's CFA. On
1143 the i386, when %ebp is used as a frame pointer, the offset
1144 between the contents %ebp and the CFA as defined by GCC. */
1148 /* These registers are used for returning integers (and on some
1149 targets also for returning `struct' and `union' values when their
1150 size and alignment match an integer type). */
1151 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1152 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1154 /* Extract from an array REGBUF containing the (raw) register state, a
1155 function return value of TYPE, and copy that, in virtual format,
1159 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1162 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1163 bfd_byte
*valbuf
= dst
;
1164 int len
= TYPE_LENGTH (type
);
1165 char buf
[I386_MAX_REGISTER_SIZE
];
1167 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1168 && TYPE_NFIELDS (type
) == 1)
1170 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1174 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1176 if (tdep
->st0_regnum
< 0)
1178 warning ("Cannot find floating-point return value.");
1179 memset (valbuf
, 0, len
);
1183 /* Floating-point return values can be found in %st(0). Convert
1184 its contents to the desired type. This is probably not
1185 exactly how it would happen on the target itself, but it is
1186 the best we can do. */
1187 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1188 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1192 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1193 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1195 if (len
<= low_size
)
1197 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1198 memcpy (valbuf
, buf
, len
);
1200 else if (len
<= (low_size
+ high_size
))
1202 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1203 memcpy (valbuf
, buf
, low_size
);
1204 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1205 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1208 internal_error (__FILE__
, __LINE__
,
1209 "Cannot extract return value of %d bytes long.", len
);
1213 /* Write into the appropriate registers a function return value stored
1214 in VALBUF of type TYPE, given in virtual format. */
1217 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1220 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1221 int len
= TYPE_LENGTH (type
);
1223 /* Define I387_ST0_REGNUM such that we use the proper definitions
1224 for the architecture. */
1225 #define I387_ST0_REGNUM I386_ST0_REGNUM
1227 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1228 && TYPE_NFIELDS (type
) == 1)
1230 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1234 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1237 char buf
[I386_MAX_REGISTER_SIZE
];
1239 if (tdep
->st0_regnum
< 0)
1241 warning ("Cannot set floating-point return value.");
1245 /* Returning floating-point values is a bit tricky. Apart from
1246 storing the return value in %st(0), we have to simulate the
1247 state of the FPU at function return point. */
1249 /* Convert the value found in VALBUF to the extended
1250 floating-point format used by the FPU. This is probably
1251 not exactly how it would happen on the target itself, but
1252 it is the best we can do. */
1253 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1254 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1256 /* Set the top of the floating-point register stack to 7. The
1257 actual value doesn't really matter, but 7 is what a normal
1258 function return would end up with if the program started out
1259 with a freshly initialized FPU. */
1260 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1262 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1264 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1265 the floating-point register stack to 7, the appropriate value
1266 for the tag word is 0x3fff. */
1267 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1271 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1272 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1274 if (len
<= low_size
)
1275 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1276 else if (len
<= (low_size
+ high_size
))
1278 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1279 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1280 len
- low_size
, (char *) valbuf
+ low_size
);
1283 internal_error (__FILE__
, __LINE__
,
1284 "Cannot store return value of %d bytes long.", len
);
1287 #undef I387_ST0_REGNUM
1290 /* Extract from REGCACHE, which contains the (raw) register state, the
1291 address in which a function should return its structure value, as a
1295 i386_extract_struct_value_address (struct regcache
*regcache
)
1299 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1300 return extract_unsigned_integer (buf
, 4);
1304 /* This is the variable that is set with "set struct-convention", and
1305 its legitimate values. */
1306 static const char default_struct_convention
[] = "default";
1307 static const char pcc_struct_convention
[] = "pcc";
1308 static const char reg_struct_convention
[] = "reg";
1309 static const char *valid_conventions
[] =
1311 default_struct_convention
,
1312 pcc_struct_convention
,
1313 reg_struct_convention
,
1316 static const char *struct_convention
= default_struct_convention
;
1319 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1321 enum struct_return struct_return
;
1323 if (struct_convention
== default_struct_convention
)
1324 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1325 else if (struct_convention
== pcc_struct_convention
)
1326 struct_return
= pcc_struct_return
;
1328 struct_return
= reg_struct_return
;
1330 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1335 /* Return the GDB type object for the "standard" data type of data in
1336 register REGNUM. Perhaps %esi and %edi should go here, but
1337 potentially they could be used for things other than address. */
1339 static struct type
*
1340 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1342 if (regnum
== I386_EIP_REGNUM
1343 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1344 return lookup_pointer_type (builtin_type_void
);
1346 if (i386_fp_regnum_p (regnum
))
1347 return builtin_type_i387_ext
;
1349 if (i386_sse_regnum_p (gdbarch
, regnum
))
1350 return builtin_type_vec128i
;
1352 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1353 return builtin_type_vec64i
;
1355 return builtin_type_int
;
1358 /* Map a cooked register onto a raw register or memory. For the i386,
1359 the MMX registers need to be mapped onto floating point registers. */
1362 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1364 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1369 /* Define I387_ST0_REGNUM such that we use the proper definitions
1370 for REGCACHE's architecture. */
1371 #define I387_ST0_REGNUM tdep->st0_regnum
1373 mmxreg
= regnum
- tdep
->mm0_regnum
;
1374 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1375 tos
= (fstat
>> 11) & 0x7;
1376 fpreg
= (mmxreg
+ tos
) % 8;
1378 return (I387_ST0_REGNUM
+ fpreg
);
1380 #undef I387_ST0_REGNUM
1384 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1385 int regnum
, void *buf
)
1387 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1389 char mmx_buf
[MAX_REGISTER_SIZE
];
1390 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1392 /* Extract (always little endian). */
1393 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1394 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1397 regcache_raw_read (regcache
, regnum
, buf
);
1401 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1402 int regnum
, const void *buf
)
1404 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1406 char mmx_buf
[MAX_REGISTER_SIZE
];
1407 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1410 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1411 /* ... Modify ... (always little endian). */
1412 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1414 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1417 regcache_raw_write (regcache
, regnum
, buf
);
1421 /* Return the register number of the register allocated by GCC after
1422 REGNUM, or -1 if there is no such register. */
1425 i386_next_regnum (int regnum
)
1427 /* GCC allocates the registers in the order:
1429 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1431 Since storing a variable in %esp doesn't make any sense we return
1432 -1 for %ebp and for %esp itself. */
1433 static int next_regnum
[] =
1435 I386_EDX_REGNUM
, /* Slot for %eax. */
1436 I386_EBX_REGNUM
, /* Slot for %ecx. */
1437 I386_ECX_REGNUM
, /* Slot for %edx. */
1438 I386_ESI_REGNUM
, /* Slot for %ebx. */
1439 -1, -1, /* Slots for %esp and %ebp. */
1440 I386_EDI_REGNUM
, /* Slot for %esi. */
1441 I386_EBP_REGNUM
/* Slot for %edi. */
1444 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1445 return next_regnum
[regnum
];
1450 /* Return nonzero if a value of type TYPE stored in register REGNUM
1451 needs any special handling. */
1454 i386_convert_register_p (int regnum
, struct type
*type
)
1456 int len
= TYPE_LENGTH (type
);
1458 /* Values may be spread across multiple registers. Most debugging
1459 formats aren't expressive enough to specify the locations, so
1460 some heuristics is involved. Right now we only handle types that
1461 have a length that is a multiple of the word size, since GCC
1462 doesn't seem to put any other types into registers. */
1463 if (len
> 4 && len
% 4 == 0)
1465 int last_regnum
= regnum
;
1469 last_regnum
= i386_next_regnum (last_regnum
);
1473 if (last_regnum
!= -1)
1477 return i386_fp_regnum_p (regnum
);
1480 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1481 return its contents in TO. */
1484 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1485 struct type
*type
, void *to
)
1487 int len
= TYPE_LENGTH (type
);
1490 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1491 available in FRAME (i.e. if it wasn't saved)? */
1493 if (i386_fp_regnum_p (regnum
))
1495 i387_register_to_value (frame
, regnum
, type
, to
);
1499 /* Read a value spread accross multiple registers. */
1501 gdb_assert (len
> 4 && len
% 4 == 0);
1505 gdb_assert (regnum
!= -1);
1506 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1508 get_frame_register (frame
, regnum
, buf
);
1509 regnum
= i386_next_regnum (regnum
);
1515 /* Write the contents FROM of a value of type TYPE into register
1516 REGNUM in frame FRAME. */
1519 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1520 struct type
*type
, const void *from
)
1522 int len
= TYPE_LENGTH (type
);
1523 const char *buf
= from
;
1525 if (i386_fp_regnum_p (regnum
))
1527 i387_value_to_register (frame
, regnum
, type
, from
);
1531 /* Write a value spread accross multiple registers. */
1533 gdb_assert (len
> 4 && len
% 4 == 0);
1537 gdb_assert (regnum
!= -1);
1538 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1540 put_frame_register (frame
, regnum
, buf
);
1541 regnum
= i386_next_regnum (regnum
);
1547 /* Supply register REGNUM from the general-purpose register set REGSET
1548 to register cache REGCACHE. If REGNUM is -1, do this for all
1549 registers in REGSET. */
1552 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1553 int regnum
, const void *gregs
, size_t len
)
1555 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1556 const char *regs
= gregs
;
1559 gdb_assert (len
== tdep
->sizeof_gregset
);
1561 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1563 if ((regnum
== i
|| regnum
== -1)
1564 && tdep
->gregset_reg_offset
[i
] != -1)
1565 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1569 /* Supply register REGNUM from the floating-point register set REGSET
1570 to register cache REGCACHE. If REGNUM is -1, do this for all
1571 registers in REGSET. */
1574 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1575 int regnum
, const void *fpregs
, size_t len
)
1577 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1579 gdb_assert (len
== tdep
->sizeof_fpregset
);
1580 i387_supply_fsave (regcache
, regnum
, fpregs
);
1583 /* Return the appropriate register set for the core section identified
1584 by SECT_NAME and SECT_SIZE. */
1586 const struct regset
*
1587 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1588 const char *sect_name
, size_t sect_size
)
1590 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1592 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1594 if (tdep
->gregset
== NULL
)
1596 tdep
->gregset
= XMALLOC (struct regset
);
1597 tdep
->gregset
->descr
= tdep
;
1598 tdep
->gregset
->supply_regset
= i386_supply_gregset
;
1600 return tdep
->gregset
;
1603 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1605 if (tdep
->fpregset
== NULL
)
1607 tdep
->fpregset
= XMALLOC (struct regset
);
1608 tdep
->fpregset
->descr
= tdep
;
1609 tdep
->fpregset
->supply_regset
= i386_supply_fpregset
;
1611 return tdep
->fpregset
;
1618 #ifdef STATIC_TRANSFORM_NAME
1619 /* SunPRO encodes the static variables. This is not related to C++
1620 mangling, it is done for C too. */
1623 sunpro_static_transform_name (char *name
)
1626 if (IS_STATIC_TRANSFORM_NAME (name
))
1628 /* For file-local statics there will be a period, a bunch of
1629 junk (the contents of which match a string given in the
1630 N_OPT), a period and the name. For function-local statics
1631 there will be a bunch of junk (which seems to change the
1632 second character from 'A' to 'B'), a period, the name of the
1633 function, and the name. So just skip everything before the
1635 p
= strrchr (name
, '.');
1641 #endif /* STATIC_TRANSFORM_NAME */
1644 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1647 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1649 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1651 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1652 struct minimal_symbol
*indsym
=
1653 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1654 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1658 if (strncmp (symname
, "__imp_", 6) == 0
1659 || strncmp (symname
, "_imp_", 5) == 0)
1660 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1663 return 0; /* Not a trampoline. */
1667 /* Return non-zero if PC and NAME show that we are in a signal
1671 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1673 return (name
&& strcmp ("_sigtramp", name
) == 0);
1677 /* We have two flavours of disassembly. The machinery on this page
1678 deals with switching between those. */
1681 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1683 gdb_assert (disassembly_flavor
== att_flavor
1684 || disassembly_flavor
== intel_flavor
);
1686 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1687 constified, cast to prevent a compiler warning. */
1688 info
->disassembler_options
= (char *) disassembly_flavor
;
1689 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1691 return print_insn_i386 (pc
, info
);
1695 /* There are a few i386 architecture variants that differ only
1696 slightly from the generic i386 target. For now, we don't give them
1697 their own source file, but include them here. As a consequence,
1698 they'll always be included. */
1700 /* System V Release 4 (SVR4). */
1703 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1705 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1706 currently unknown. */
1707 return (name
&& (strcmp ("_sigreturn", name
) == 0
1708 || strcmp ("_sigacthandler", name
) == 0
1709 || strcmp ("sigvechandler", name
) == 0));
1712 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1713 routine, return the address of the associated sigcontext (ucontext)
1717 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1722 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1723 sp
= extract_unsigned_integer (buf
, 4);
1725 return read_memory_unsigned_integer (sp
+ 8, 4);
1732 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1734 /* DJGPP doesn't have any special frames for signal handlers. */
1742 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1744 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1745 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1748 /* System V Release 4 (SVR4). */
1751 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1753 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1755 /* System V Release 4 uses ELF. */
1756 i386_elf_init_abi (info
, gdbarch
);
1758 /* System V Release 4 has shared libraries. */
1759 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1760 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1762 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1763 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1764 tdep
->sc_pc_offset
= 36 + 14 * 4;
1765 tdep
->sc_sp_offset
= 36 + 17 * 4;
1767 tdep
->jb_pc_offset
= 20;
1773 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1775 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1777 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1779 tdep
->jb_pc_offset
= 36;
1785 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1787 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1789 tdep
->jb_pc_offset
= 24;
1793 /* i386 register groups. In addition to the normal groups, add "mmx"
1796 static struct reggroup
*i386_sse_reggroup
;
1797 static struct reggroup
*i386_mmx_reggroup
;
1800 i386_init_reggroups (void)
1802 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1803 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1807 i386_add_reggroups (struct gdbarch
*gdbarch
)
1809 reggroup_add (gdbarch
, i386_sse_reggroup
);
1810 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1811 reggroup_add (gdbarch
, general_reggroup
);
1812 reggroup_add (gdbarch
, float_reggroup
);
1813 reggroup_add (gdbarch
, all_reggroup
);
1814 reggroup_add (gdbarch
, save_reggroup
);
1815 reggroup_add (gdbarch
, restore_reggroup
);
1816 reggroup_add (gdbarch
, vector_reggroup
);
1817 reggroup_add (gdbarch
, system_reggroup
);
1821 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1822 struct reggroup
*group
)
1824 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1825 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1826 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1827 || i386_fpc_regnum_p (regnum
));
1828 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1830 if (group
== i386_mmx_reggroup
)
1831 return mmx_regnum_p
;
1832 if (group
== i386_sse_reggroup
)
1833 return sse_regnum_p
;
1834 if (group
== vector_reggroup
)
1835 return (mmx_regnum_p
|| sse_regnum_p
);
1836 if (group
== float_reggroup
)
1838 if (group
== general_reggroup
)
1839 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1841 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1845 /* Get the ARGIth function argument for the current function. */
1848 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1851 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1852 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1856 static struct gdbarch
*
1857 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1859 struct gdbarch_tdep
*tdep
;
1860 struct gdbarch
*gdbarch
;
1862 /* If there is already a candidate, use it. */
1863 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1865 return arches
->gdbarch
;
1867 /* Allocate space for the new architecture. */
1868 tdep
= XMALLOC (struct gdbarch_tdep
);
1869 gdbarch
= gdbarch_alloc (&info
, tdep
);
1871 /* General-purpose registers. */
1872 tdep
->gregset
= NULL
;
1873 tdep
->gregset_reg_offset
= NULL
;
1874 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1875 tdep
->sizeof_gregset
= 0;
1877 /* Floating-point registers. */
1878 tdep
->fpregset
= NULL
;
1879 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1881 /* The default settings include the FPU registers, the MMX registers
1882 and the SSE registers. This can be overidden for a specific ABI
1883 by adjusting the members `st0_regnum', `mm0_regnum' and
1884 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1885 will show up in the output of "info all-registers". Ideally we
1886 should try to autodetect whether they are available, such that we
1887 can prevent "info all-registers" from displaying registers that
1890 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1891 [the SSE registers] always (even when they don't exist) or never
1892 showing them to the user (even when they do exist), I prefer the
1893 former over the latter. */
1895 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1897 /* The MMX registers are implemented as pseudo-registers. Put off
1898 caclulating the register number for %mm0 until we know the number
1899 of raw registers. */
1900 tdep
->mm0_regnum
= 0;
1902 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1903 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1905 tdep
->jb_pc_offset
= -1;
1906 tdep
->struct_return
= pcc_struct_return
;
1907 tdep
->sigtramp_start
= 0;
1908 tdep
->sigtramp_end
= 0;
1909 tdep
->sigcontext_addr
= NULL
;
1910 tdep
->sc_reg_offset
= NULL
;
1911 tdep
->sc_pc_offset
= -1;
1912 tdep
->sc_sp_offset
= -1;
1914 /* The format used for `long double' on almost all i386 targets is
1915 the i387 extended floating-point format. In fact, of all targets
1916 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1917 on having a `long double' that's not `long' at all. */
1918 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1920 /* Although the i387 extended floating-point has only 80 significant
1921 bits, a `long double' actually takes up 96, probably to enforce
1923 set_gdbarch_long_double_bit (gdbarch
, 96);
1925 /* The default ABI includes general-purpose registers,
1926 floating-point registers, and the SSE registers. */
1927 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1928 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1929 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1931 /* Register numbers of various important registers. */
1932 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1933 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1934 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1935 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1937 /* Use the "default" register numbering scheme for stabs and COFF. */
1938 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1939 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1941 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1942 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1943 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1945 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1946 be in use on any of the supported i386 targets. */
1948 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1950 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1952 /* Call dummy code. */
1953 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1955 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1956 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1957 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1959 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1960 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1961 set_gdbarch_extract_struct_value_address (gdbarch
,
1962 i386_extract_struct_value_address
);
1963 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1965 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1967 /* Stack grows downward. */
1968 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1970 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1971 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1972 set_gdbarch_function_start_offset (gdbarch
, 0);
1974 set_gdbarch_frame_args_skip (gdbarch
, 8);
1975 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1977 /* Wire in the MMX registers. */
1978 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1979 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1980 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1982 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1984 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1986 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1988 /* Add the i386 register groups. */
1989 i386_add_reggroups (gdbarch
);
1990 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1992 /* Helper for function argument information. */
1993 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1995 /* Hook in the DWARF CFI frame unwinder. */
1996 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1998 frame_base_set_default (gdbarch
, &i386_frame_base
);
2000 /* Hook in ABI-specific overrides, if they have been registered. */
2001 gdbarch_init_osabi (info
, gdbarch
);
2003 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2004 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2006 /* If we have a register mapping, enable the generic core file
2007 support, unless it has already been enabled. */
2008 if (tdep
->gregset_reg_offset
2009 && !gdbarch_regset_from_core_section_p (gdbarch
))
2010 set_gdbarch_regset_from_core_section (gdbarch
,
2011 i386_regset_from_core_section
);
2013 /* Unless support for MMX has been disabled, make %mm0 the first
2015 if (tdep
->mm0_regnum
== 0)
2016 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2021 static enum gdb_osabi
2022 i386_coff_osabi_sniffer (bfd
*abfd
)
2024 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2025 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2026 return GDB_OSABI_GO32
;
2028 return GDB_OSABI_UNKNOWN
;
2031 static enum gdb_osabi
2032 i386_nlm_osabi_sniffer (bfd
*abfd
)
2034 return GDB_OSABI_NETWARE
;
2038 /* Provide a prototype to silence -Wmissing-prototypes. */
2039 void _initialize_i386_tdep (void);
2042 _initialize_i386_tdep (void)
2044 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2046 /* Add the variable that controls the disassembly flavor. */
2048 struct cmd_list_element
*new_cmd
;
2050 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2052 &disassembly_flavor
,
2054 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2055 and the default value is \"att\".",
2057 add_show_from_set (new_cmd
, &showlist
);
2060 /* Add the variable that controls the convention for returning
2063 struct cmd_list_element
*new_cmd
;
2065 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2067 &struct_convention
, "\
2068 Set the convention for returning small structs, valid values \
2069 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2071 add_show_from_set (new_cmd
, &showlist
);
2074 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2075 i386_coff_osabi_sniffer
);
2076 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2077 i386_nlm_osabi_sniffer
);
2079 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2080 i386_svr4_init_abi
);
2081 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2082 i386_go32_init_abi
);
2083 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2086 /* Initialize the i386 specific register groups. */
2087 i386_init_reggroups ();