1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
28 #include "floatformat.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
38 #include "reggroups.h"
44 #include "gdb_assert.h"
45 #include "gdb_string.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
50 /* Names of the registers. The first 10 registers match the register
51 numbering scheme used by GCC for stabs and DWARF. */
53 static char *i386_register_names
[] =
55 "eax", "ecx", "edx", "ebx",
56 "esp", "ebp", "esi", "edi",
57 "eip", "eflags", "cs", "ss",
58 "ds", "es", "fs", "gs",
59 "st0", "st1", "st2", "st3",
60 "st4", "st5", "st6", "st7",
61 "fctrl", "fstat", "ftag", "fiseg",
62 "fioff", "foseg", "fooff", "fop",
63 "xmm0", "xmm1", "xmm2", "xmm3",
64 "xmm4", "xmm5", "xmm6", "xmm7",
68 static const int i386_num_register_names
=
69 (sizeof (i386_register_names
) / sizeof (*i386_register_names
));
73 static char *i386_mmx_names
[] =
75 "mm0", "mm1", "mm2", "mm3",
76 "mm4", "mm5", "mm6", "mm7"
79 static const int i386_num_mmx_regs
=
80 (sizeof (i386_mmx_names
) / sizeof (i386_mmx_names
[0]));
82 #define MM0_REGNUM NUM_REGS
85 i386_mmx_regnum_p (int regnum
)
87 return (regnum
>= MM0_REGNUM
88 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
94 i386_fp_regnum_p (int regnum
)
96 return (regnum
< NUM_REGS
97 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
101 i386_fpc_regnum_p (int regnum
)
103 return (regnum
< NUM_REGS
104 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
110 i386_sse_regnum_p (int regnum
)
112 return (regnum
< NUM_REGS
113 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
117 i386_mxcsr_regnum_p (int regnum
)
119 return (regnum
< NUM_REGS
120 && regnum
== MXCSR_REGNUM
);
123 /* Return the name of register REG. */
126 i386_register_name (int reg
)
128 if (i386_mmx_regnum_p (reg
))
129 return i386_mmx_names
[reg
- MM0_REGNUM
];
131 if (reg
>= 0 && reg
< i386_num_register_names
)
132 return i386_register_names
[reg
];
137 /* Convert stabs register number REG to the appropriate register
138 number used by GDB. */
141 i386_stab_reg_to_regnum (int reg
)
143 /* This implements what GCC calls the "default" register map. */
144 if (reg
>= 0 && reg
<= 7)
146 /* General-purpose registers. */
149 else if (reg
>= 12 && reg
<= 19)
151 /* Floating-point registers. */
152 return reg
- 12 + FP0_REGNUM
;
154 else if (reg
>= 21 && reg
<= 28)
157 return reg
- 21 + XMM0_REGNUM
;
159 else if (reg
>= 29 && reg
<= 36)
162 return reg
- 29 + MM0_REGNUM
;
165 /* This will hopefully provoke a warning. */
166 return NUM_REGS
+ NUM_PSEUDO_REGS
;
169 /* Convert DWARF register number REG to the appropriate register
170 number used by GDB. */
173 i386_dwarf_reg_to_regnum (int reg
)
175 /* The DWARF register numbering includes %eip and %eflags, and
176 numbers the floating point registers differently. */
177 if (reg
>= 0 && reg
<= 9)
179 /* General-purpose registers. */
182 else if (reg
>= 11 && reg
<= 18)
184 /* Floating-point registers. */
185 return reg
- 11 + FP0_REGNUM
;
189 /* The SSE and MMX registers have identical numbers as in stabs. */
190 return i386_stab_reg_to_regnum (reg
);
193 /* This will hopefully provoke a warning. */
194 return NUM_REGS
+ NUM_PSEUDO_REGS
;
198 /* This is the variable that is set with "set disassembly-flavor", and
199 its legitimate values. */
200 static const char att_flavor
[] = "att";
201 static const char intel_flavor
[] = "intel";
202 static const char *valid_flavors
[] =
208 static const char *disassembly_flavor
= att_flavor
;
211 /* Use the program counter to determine the contents and size of a
212 breakpoint instruction. Return a pointer to a string of bytes that
213 encode a breakpoint instruction, store the length of the string in
214 *LEN and optionally adjust *PC to point to the correct memory
215 location for inserting the breakpoint.
217 On the i386 we have a single breakpoint that fits in a single byte
218 and can be inserted anywhere.
220 This function is 64-bit safe. */
222 static const unsigned char *
223 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
225 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
227 *len
= sizeof (break_insn
);
231 #ifdef I386_REGNO_TO_SYMMETRY
232 #error "The Sequent Symmetry is no longer supported."
235 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
236 and %esp "belong" to the calling function. Therefore these
237 registers should be saved if they're going to be modified. */
239 /* The maximum number of saved registers. This should include all
240 registers mentioned above, and %eip. */
241 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
243 struct i386_frame_cache
250 /* Saved registers. */
251 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
255 /* Stack space reserved for local variables. */
259 /* Allocate and initialize a frame cache. */
261 static struct i386_frame_cache
*
262 i386_alloc_frame_cache (void)
264 struct i386_frame_cache
*cache
;
267 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
271 cache
->sp_offset
= -4;
274 /* Saved registers. We initialize these to -1 since zero is a valid
275 offset (that's where %ebp is supposed to be stored). */
276 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
277 cache
->saved_regs
[i
] = -1;
279 cache
->pc_in_eax
= 0;
281 /* Frameless until proven otherwise. */
287 /* If the instruction at PC is a jump, return the address of its
288 target. Otherwise, return PC. */
291 i386_follow_jump (CORE_ADDR pc
)
297 op
= read_memory_unsigned_integer (pc
, 1);
301 op
= read_memory_unsigned_integer (pc
+ 1, 1);
307 /* Relative jump: if data16 == 0, disp32, else disp16. */
310 delta
= read_memory_integer (pc
+ 2, 2);
312 /* Include the size of the jmp instruction (including the
318 delta
= read_memory_integer (pc
+ 1, 4);
320 /* Include the size of the jmp instruction. */
325 /* Relative jump, disp8 (ignore data16). */
326 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
335 /* Check whether PC points at a prologue for a function returning a
336 structure or union. If so, it updates CACHE and returns the
337 address of the first instruction after the code sequence that
338 removes the "hidden" argument from the stack or CURRENT_PC,
339 whichever is smaller. Otherwise, return PC. */
342 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
343 struct i386_frame_cache
*cache
)
345 /* Functions that return a structure or union start with:
348 xchgl %eax, (%esp) 0x87 0x04 0x24
349 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
351 (the System V compiler puts out the second `xchg' instruction,
352 and the assembler doesn't try to optimize it, so the 'sib' form
353 gets generated). This sequence is used to get the address of the
354 return buffer for a function that returns a structure. */
355 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
356 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
357 unsigned char buf
[4];
360 if (current_pc
<= pc
)
363 op
= read_memory_unsigned_integer (pc
, 1);
365 if (op
!= 0x58) /* popl %eax */
368 read_memory (pc
+ 1, buf
, 4);
369 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
372 if (current_pc
== pc
)
374 cache
->sp_offset
+= 4;
378 if (current_pc
== pc
+ 1)
380 cache
->pc_in_eax
= 1;
384 if (buf
[1] == proto1
[1])
391 i386_skip_probe (CORE_ADDR pc
)
393 /* A function may start with
404 unsigned char buf
[8];
407 op
= read_memory_unsigned_integer (pc
, 1);
409 if (op
== 0x68 || op
== 0x6a)
413 /* Skip past the `pushl' instruction; it has either a one-byte or a
414 four-byte operand, depending on the opcode. */
420 /* Read the following 8 bytes, which should be `call _probe' (6
421 bytes) followed by `addl $4,%esp' (2 bytes). */
422 read_memory (pc
+ delta
, buf
, sizeof (buf
));
423 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
424 pc
+= delta
+ sizeof (buf
);
430 /* Check whether PC points at a code that sets up a new stack frame.
431 If so, it updates CACHE and returns the address of the first
432 instruction after the sequence that sets removes the "hidden"
433 argument from the stack or CURRENT_PC, whichever is smaller.
434 Otherwise, return PC. */
437 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
438 struct i386_frame_cache
*cache
)
442 if (current_pc
<= pc
)
445 op
= read_memory_unsigned_integer (pc
, 1);
447 if (op
== 0x55) /* pushl %ebp */
449 /* Take into account that we've executed the `pushl %ebp' that
450 starts this instruction sequence. */
451 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
452 cache
->sp_offset
+= 4;
454 /* If that's all, return now. */
455 if (current_pc
<= pc
+ 1)
458 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
459 op
= read_memory_unsigned_integer (pc
+ 1, 1);
463 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xec)
467 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xe5)
474 /* OK, we actually have a frame. We just don't know how large it is
475 yet. Set its size to zero. We'll adjust it if necessary. */
478 /* If that's all, return now. */
479 if (current_pc
<= pc
+ 3)
482 /* Check for stack adjustment
486 NOTE: You can't subtract a 16 bit immediate from a 32 bit
487 reg, so we don't have to worry about a data16 prefix. */
488 op
= read_memory_unsigned_integer (pc
+ 3, 1);
491 /* `subl' with 8 bit immediate. */
492 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
493 /* Some instruction starting with 0x83 other than `subl'. */
496 /* `subl' with signed byte immediate (though it wouldn't make
497 sense to be negative). */
498 cache
->locals
= read_memory_integer (pc
+ 5, 1);
503 /* Maybe it is `subl' with a 32 bit immedediate. */
504 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
505 /* Some instruction starting with 0x81 other than `subl'. */
508 /* It is `subl' with a 32 bit immediate. */
509 cache
->locals
= read_memory_integer (pc
+ 5, 4);
514 /* Some instruction other than `subl'. */
518 else if (op
== 0xc8) /* enter $XXX */
520 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
527 /* Check whether PC points at code that saves registers on the stack.
528 If so, it updates CACHE and returns the address of the first
529 instruction after the register saves or CURRENT_PC, whichever is
530 smaller. Otherwise, return PC. */
533 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
534 struct i386_frame_cache
*cache
)
536 if (cache
->locals
>= 0)
542 offset
= - 4 - cache
->locals
;
543 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
545 op
= read_memory_unsigned_integer (pc
, 1);
546 if (op
< 0x50 || op
> 0x57)
549 cache
->saved_regs
[op
- 0x50] = offset
;
558 /* Do a full analysis of the prologue at PC and update CACHE
559 accordingly. Bail out early if CURRENT_PC is reached. Return the
560 address where the analysis stopped.
562 We handle these cases:
564 The startup sequence can be at the start of the function, or the
565 function can start with a branch to startup code at the end.
567 %ebp can be set up with either the 'enter' instruction, or "pushl
568 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
569 once used in the System V compiler).
571 Local space is allocated just below the saved %ebp by either the
572 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
573 bit unsigned argument for space to allocate, and the 'addl'
574 instruction could have either a signed byte, or 32 bit immediate.
576 Next, the registers used by this function are pushed. With the
577 System V compiler they will always be in the order: %edi, %esi,
578 %ebx (and sometimes a harmless bug causes it to also save but not
579 restore %eax); however, the code below is willing to see the pushes
580 in any order, and will handle up to 8 of them.
582 If the setup sequence is at the end of the function, then the next
583 instruction will be a branch back to the start. */
586 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
587 struct i386_frame_cache
*cache
)
589 pc
= i386_follow_jump (pc
);
590 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
591 pc
= i386_skip_probe (pc
);
592 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
593 return i386_analyze_register_saves (pc
, current_pc
, cache
);
596 /* Return PC of first real instruction. */
599 i386_skip_prologue (CORE_ADDR start_pc
)
601 static unsigned char pic_pat
[6] =
603 0xe8, 0, 0, 0, 0, /* call 0x0 */
604 0x5b, /* popl %ebx */
606 struct i386_frame_cache cache
;
612 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
613 if (cache
.locals
< 0)
616 /* Found valid frame setup. */
618 /* The native cc on SVR4 in -K PIC mode inserts the following code
619 to get the address of the global offset table (GOT) into register
624 movl %ebx,x(%ebp) (optional)
627 This code is with the rest of the prologue (at the end of the
628 function), so we have to skip it to get to the first real
629 instruction at the start of the function. */
631 for (i
= 0; i
< 6; i
++)
633 op
= read_memory_unsigned_integer (pc
+ i
, 1);
634 if (pic_pat
[i
] != op
)
641 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
643 if (op
== 0x89) /* movl %ebx, x(%ebp) */
645 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
647 if (op
== 0x5d) /* One byte offset from %ebp. */
649 else if (op
== 0x9d) /* Four byte offset from %ebp. */
651 else /* Unexpected instruction. */
654 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
658 if (delta
> 0 && op
== 0x81
659 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
665 return i386_follow_jump (pc
);
668 /* This function is 64-bit safe. */
671 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
675 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
676 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
682 static struct i386_frame_cache
*
683 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
685 struct i386_frame_cache
*cache
;
692 cache
= i386_alloc_frame_cache ();
695 /* In principle, for normal frames, %ebp holds the frame pointer,
696 which holds the base address for the current stack frame.
697 However, for functions that don't need it, the frame pointer is
698 optional. For these "frameless" functions the frame pointer is
699 actually the frame pointer of the calling frame. Signal
700 trampolines are just a special case of a "frameless" function.
701 They (usually) share their frame pointer with the frame that was
702 in progress when the signal occurred. */
704 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
705 cache
->base
= extract_unsigned_integer (buf
, 4);
706 if (cache
->base
== 0)
709 /* For normal frames, %eip is stored at 4(%ebp). */
710 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
712 cache
->pc
= frame_func_unwind (next_frame
);
714 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
716 if (cache
->locals
< 0)
718 /* We didn't find a valid frame, which means that CACHE->base
719 currently holds the frame pointer for our calling frame. If
720 we're at the start of a function, or somewhere half-way its
721 prologue, the function's frame probably hasn't been fully
722 setup yet. Try to reconstruct the base address for the stack
723 frame by looking at the stack pointer. For truly "frameless"
724 functions this might work too. */
726 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
727 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
730 /* Now that we have the base address for the stack frame we can
731 calculate the value of %esp in the calling frame. */
732 cache
->saved_sp
= cache
->base
+ 8;
734 /* Adjust all the saved registers such that they contain addresses
735 instead of offsets. */
736 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
737 if (cache
->saved_regs
[i
] != -1)
738 cache
->saved_regs
[i
] += cache
->base
;
744 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
745 struct frame_id
*this_id
)
747 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
749 /* This marks the outermost frame. */
750 if (cache
->base
== 0)
753 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
757 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
758 int regnum
, int *optimizedp
,
759 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
760 int *realnump
, void *valuep
)
762 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
764 gdb_assert (regnum
>= 0);
766 /* The System V ABI says that:
768 "The flags register contains the system flags, such as the
769 direction flag and the carry flag. The direction flag must be
770 set to the forward (that is, zero) direction before entry and
771 upon exit from a function. Other user flags have no specified
772 role in the standard calling sequence and are not preserved."
774 To guarantee the "upon exit" part of that statement we fake a
775 saved flags register that has its direction flag cleared.
777 Note that GCC doesn't seem to rely on the fact that the direction
778 flag is cleared after a function return; it always explicitly
779 clears the flag before operations where it matters.
781 FIXME: kettenis/20030316: I'm not quite sure whether this is the
782 right thing to do. The way we fake the flags register here makes
783 it impossible to change it. */
785 if (regnum
== I386_EFLAGS_REGNUM
)
795 /* Clear the direction flag. */
796 frame_unwind_unsigned_register (next_frame
, PS_REGNUM
, &val
);
798 store_unsigned_integer (valuep
, 4, val
);
804 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
806 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
807 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
811 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
819 /* Store the value. */
820 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
825 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
828 *lvalp
= lval_memory
;
829 *addrp
= cache
->saved_regs
[regnum
];
833 /* Read the value in from memory. */
834 read_memory (*addrp
, valuep
,
835 register_size (current_gdbarch
, regnum
));
840 frame_register_unwind (next_frame
, regnum
,
841 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
844 static const struct frame_unwind i386_frame_unwind
=
848 i386_frame_prev_register
851 static const struct frame_unwind
*
852 i386_frame_p (CORE_ADDR pc
)
854 return &i386_frame_unwind
;
858 /* Signal trampolines. */
860 static struct i386_frame_cache
*
861 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
863 struct i386_frame_cache
*cache
;
864 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
871 cache
= i386_alloc_frame_cache ();
873 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
874 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
876 addr
= tdep
->sigcontext_addr (next_frame
);
877 if (tdep
->sc_reg_offset
)
881 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
883 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
884 if (tdep
->sc_reg_offset
[i
] != -1)
885 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
889 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
890 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
898 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
899 struct frame_id
*this_id
)
901 struct i386_frame_cache
*cache
=
902 i386_sigtramp_frame_cache (next_frame
, this_cache
);
904 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
908 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
910 int regnum
, int *optimizedp
,
911 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
912 int *realnump
, void *valuep
)
914 /* Make sure we've initialized the cache. */
915 i386_sigtramp_frame_cache (next_frame
, this_cache
);
917 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
918 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
921 static const struct frame_unwind i386_sigtramp_frame_unwind
=
924 i386_sigtramp_frame_this_id
,
925 i386_sigtramp_frame_prev_register
928 static const struct frame_unwind
*
929 i386_sigtramp_frame_p (CORE_ADDR pc
)
933 /* We shouldn't even bother to try if the OSABI didn't register
934 a sigcontext_addr handler. */
935 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
938 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
939 if (PC_IN_SIGTRAMP (pc
, name
))
940 return &i386_sigtramp_frame_unwind
;
947 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
949 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
954 static const struct frame_base i386_frame_base
=
957 i386_frame_base_address
,
958 i386_frame_base_address
,
959 i386_frame_base_address
963 i386_save_dummy_frame_tos (CORE_ADDR sp
)
965 generic_save_dummy_frame_tos (sp
+ 8);
968 static struct frame_id
969 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
974 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
975 fp
= extract_unsigned_integer (buf
, 4);
977 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
981 /* Figure out where the longjmp will land. Slurp the args out of the
982 stack. We expect the first arg to be a pointer to the jmp_buf
983 structure from which we extract the address that we will land at.
984 This address is copied into PC. This routine returns non-zero on
987 This function is 64-bit safe. */
990 i386_get_longjmp_target (CORE_ADDR
*pc
)
993 CORE_ADDR sp
, jb_addr
;
994 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
995 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
997 /* If JB_PC_OFFSET is -1, we have no way to find out where the
998 longjmp will land. */
999 if (jb_pc_offset
== -1)
1002 sp
= read_register (SP_REGNUM
);
1003 if (target_read_memory (sp
+ len
, buf
, len
))
1006 jb_addr
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1007 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1010 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1016 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1017 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1018 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1019 CORE_ADDR struct_addr
)
1024 /* Push arguments in reverse order. */
1025 for (i
= nargs
- 1; i
>= 0; i
--)
1027 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1029 /* The System V ABI says that:
1031 "An argument's size is increased, if necessary, to make it a
1032 multiple of [32-bit] words. This may require tail padding,
1033 depending on the size of the argument."
1035 This makes sure the stack says word-aligned. */
1036 sp
-= (len
+ 3) & ~3;
1037 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1040 /* Push value address. */
1044 store_unsigned_integer (buf
, 4, struct_addr
);
1045 write_memory (sp
, buf
, 4);
1048 /* Store return address. */
1050 store_unsigned_integer (buf
, 4, bp_addr
);
1051 write_memory (sp
, buf
, 4);
1053 /* Finally, update the stack pointer... */
1054 store_unsigned_integer (buf
, 4, sp
);
1055 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1057 /* ...and fake a frame pointer. */
1058 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1063 /* These registers are used for returning integers (and on some
1064 targets also for returning `struct' and `union' values when their
1065 size and alignment match an integer type). */
1066 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1067 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1069 /* Extract from an array REGBUF containing the (raw) register state, a
1070 function return value of TYPE, and copy that, in virtual format,
1074 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1077 bfd_byte
*valbuf
= dst
;
1078 int len
= TYPE_LENGTH (type
);
1079 char buf
[I386_MAX_REGISTER_SIZE
];
1081 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1082 && TYPE_NFIELDS (type
) == 1)
1084 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1088 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1092 warning ("Cannot find floating-point return value.");
1093 memset (valbuf
, 0, len
);
1097 /* Floating-point return values can be found in %st(0). Convert
1098 its contents to the desired type. This is probably not
1099 exactly how it would happen on the target itself, but it is
1100 the best we can do. */
1101 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1102 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1106 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1107 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1109 if (len
<= low_size
)
1111 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1112 memcpy (valbuf
, buf
, len
);
1114 else if (len
<= (low_size
+ high_size
))
1116 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1117 memcpy (valbuf
, buf
, low_size
);
1118 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1119 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1122 internal_error (__FILE__
, __LINE__
,
1123 "Cannot extract return value of %d bytes long.", len
);
1127 /* Write into the appropriate registers a function return value stored
1128 in VALBUF of type TYPE, given in virtual format. */
1131 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1134 int len
= TYPE_LENGTH (type
);
1136 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1137 && TYPE_NFIELDS (type
) == 1)
1139 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1143 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1146 char buf
[FPU_REG_RAW_SIZE
];
1150 warning ("Cannot set floating-point return value.");
1154 /* Returning floating-point values is a bit tricky. Apart from
1155 storing the return value in %st(0), we have to simulate the
1156 state of the FPU at function return point. */
1158 /* Convert the value found in VALBUF to the extended
1159 floating-point format used by the FPU. This is probably
1160 not exactly how it would happen on the target itself, but
1161 it is the best we can do. */
1162 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1163 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1165 /* Set the top of the floating-point register stack to 7. The
1166 actual value doesn't really matter, but 7 is what a normal
1167 function return would end up with if the program started out
1168 with a freshly initialized FPU. */
1169 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1171 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1173 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1174 the floating-point register stack to 7, the appropriate value
1175 for the tag word is 0x3fff. */
1176 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1180 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1181 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1183 if (len
<= low_size
)
1184 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1185 else if (len
<= (low_size
+ high_size
))
1187 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1188 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1189 len
- low_size
, (char *) valbuf
+ low_size
);
1192 internal_error (__FILE__
, __LINE__
,
1193 "Cannot store return value of %d bytes long.", len
);
1197 /* Extract from REGCACHE, which contains the (raw) register state, the
1198 address in which a function should return its structure value, as a
1202 i386_extract_struct_value_address (struct regcache
*regcache
)
1206 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1207 return extract_unsigned_integer (buf
, 4);
1211 /* This is the variable that is set with "set struct-convention", and
1212 its legitimate values. */
1213 static const char default_struct_convention
[] = "default";
1214 static const char pcc_struct_convention
[] = "pcc";
1215 static const char reg_struct_convention
[] = "reg";
1216 static const char *valid_conventions
[] =
1218 default_struct_convention
,
1219 pcc_struct_convention
,
1220 reg_struct_convention
,
1223 static const char *struct_convention
= default_struct_convention
;
1226 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1228 enum struct_return struct_return
;
1230 if (struct_convention
== default_struct_convention
)
1231 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1232 else if (struct_convention
== pcc_struct_convention
)
1233 struct_return
= pcc_struct_return
;
1235 struct_return
= reg_struct_return
;
1237 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1242 /* Return the GDB type object for the "standard" data type of data in
1243 register REGNUM. Perhaps %esi and %edi should go here, but
1244 potentially they could be used for things other than address. */
1246 static struct type
*
1247 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1249 if (regnum
== I386_EIP_REGNUM
1250 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1251 return lookup_pointer_type (builtin_type_void
);
1253 if (i386_fp_regnum_p (regnum
))
1254 return builtin_type_i387_ext
;
1256 if (i386_sse_regnum_p (regnum
))
1257 return builtin_type_vec128i
;
1259 if (i386_mmx_regnum_p (regnum
))
1260 return builtin_type_vec64i
;
1262 return builtin_type_int
;
1265 /* Map a cooked register onto a raw register or memory. For the i386,
1266 the MMX registers need to be mapped onto floating point registers. */
1269 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1276 mmxi
= regnum
- MM0_REGNUM
;
1277 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1278 tos
= (fstat
>> 11) & 0x7;
1279 fpi
= (mmxi
+ tos
) % 8;
1281 return (FP0_REGNUM
+ fpi
);
1285 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1286 int regnum
, void *buf
)
1288 if (i386_mmx_regnum_p (regnum
))
1290 char mmx_buf
[MAX_REGISTER_SIZE
];
1291 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1293 /* Extract (always little endian). */
1294 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1295 memcpy (buf
, mmx_buf
, REGISTER_RAW_SIZE (regnum
));
1298 regcache_raw_read (regcache
, regnum
, buf
);
1302 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1303 int regnum
, const void *buf
)
1305 if (i386_mmx_regnum_p (regnum
))
1307 char mmx_buf
[MAX_REGISTER_SIZE
];
1308 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1311 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1312 /* ... Modify ... (always little endian). */
1313 memcpy (mmx_buf
, buf
, REGISTER_RAW_SIZE (regnum
));
1315 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1318 regcache_raw_write (regcache
, regnum
, buf
);
1321 /* Return true iff register REGNUM's virtual format is different from
1322 its raw format. Note that this definition assumes that the host
1323 supports IEEE 32-bit floats, since it doesn't say that SSE
1324 registers need conversion. Even if we can't find a counterexample,
1325 this is still sloppy. */
1328 i386_register_convertible (int regnum
)
1330 return i386_fp_regnum_p (regnum
);
1333 /* Convert data from raw format for register REGNUM in buffer FROM to
1334 virtual format with type TYPE in buffer TO. */
1337 i386_register_convert_to_virtual (int regnum
, struct type
*type
,
1338 char *from
, char *to
)
1340 gdb_assert (i386_fp_regnum_p (regnum
));
1342 /* We only support floating-point values. */
1343 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
1345 warning ("Cannot convert floating-point register value "
1346 "to non-floating-point type.");
1347 memset (to
, 0, TYPE_LENGTH (type
));
1351 /* Convert to TYPE. This should be a no-op if TYPE is equivalent to
1352 the extended floating-point format used by the FPU. */
1353 convert_typed_floating (from
, builtin_type_i387_ext
, to
, type
);
1356 /* Convert data from virtual format with type TYPE in buffer FROM to
1357 raw format for register REGNUM in buffer TO. */
1360 i386_register_convert_to_raw (struct type
*type
, int regnum
,
1361 char *from
, char *to
)
1363 gdb_assert (i386_fp_regnum_p (regnum
));
1365 /* We only support floating-point values. */
1366 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
1368 warning ("Cannot convert non-floating-point type "
1369 "to floating-point register value.");
1370 memset (to
, 0, TYPE_LENGTH (type
));
1374 /* Convert from TYPE. This should be a no-op if TYPE is equivalent
1375 to the extended floating-point format used by the FPU. */
1376 convert_typed_floating (from
, type
, to
, builtin_type_i387_ext
);
1380 #ifdef STATIC_TRANSFORM_NAME
1381 /* SunPRO encodes the static variables. This is not related to C++
1382 mangling, it is done for C too. */
1385 sunpro_static_transform_name (char *name
)
1388 if (IS_STATIC_TRANSFORM_NAME (name
))
1390 /* For file-local statics there will be a period, a bunch of
1391 junk (the contents of which match a string given in the
1392 N_OPT), a period and the name. For function-local statics
1393 there will be a bunch of junk (which seems to change the
1394 second character from 'A' to 'B'), a period, the name of the
1395 function, and the name. So just skip everything before the
1397 p
= strrchr (name
, '.');
1403 #endif /* STATIC_TRANSFORM_NAME */
1406 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1409 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1411 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1413 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1414 struct minimal_symbol
*indsym
=
1415 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1416 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1420 if (strncmp (symname
, "__imp_", 6) == 0
1421 || strncmp (symname
, "_imp_", 5) == 0)
1422 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1425 return 0; /* Not a trampoline. */
1429 /* Return non-zero if PC and NAME show that we are in a signal
1433 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1435 return (name
&& strcmp ("_sigtramp", name
) == 0);
1439 /* We have two flavours of disassembly. The machinery on this page
1440 deals with switching between those. */
1443 i386_print_insn (bfd_vma pc
, disassemble_info
*info
)
1445 gdb_assert (disassembly_flavor
== att_flavor
1446 || disassembly_flavor
== intel_flavor
);
1448 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1449 constified, cast to prevent a compiler warning. */
1450 info
->disassembler_options
= (char *) disassembly_flavor
;
1451 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1453 return print_insn_i386 (pc
, info
);
1457 /* There are a few i386 architecture variants that differ only
1458 slightly from the generic i386 target. For now, we don't give them
1459 their own source file, but include them here. As a consequence,
1460 they'll always be included. */
1462 /* System V Release 4 (SVR4). */
1465 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1467 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1468 currently unknown. */
1469 return (name
&& (strcmp ("_sigreturn", name
) == 0
1470 || strcmp ("_sigacthandler", name
) == 0
1471 || strcmp ("sigvechandler", name
) == 0));
1474 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1475 routine, return the address of the associated sigcontext (ucontext)
1479 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1484 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1485 sp
= extract_unsigned_integer (buf
, 4);
1487 return read_memory_unsigned_integer (sp
+ 8, 4);
1494 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1496 /* DJGPP doesn't have any special frames for signal handlers. */
1504 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1506 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1507 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1510 /* System V Release 4 (SVR4). */
1513 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1515 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1517 /* System V Release 4 uses ELF. */
1518 i386_elf_init_abi (info
, gdbarch
);
1520 /* System V Release 4 has shared libraries. */
1521 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1522 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1524 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1525 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1526 tdep
->sc_pc_offset
= 36 + 14 * 4;
1527 tdep
->sc_sp_offset
= 36 + 17 * 4;
1529 tdep
->jb_pc_offset
= 20;
1535 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1537 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1539 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1541 tdep
->jb_pc_offset
= 36;
1547 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1549 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1551 tdep
->jb_pc_offset
= 24;
1555 /* i386 register groups. In addition to the normal groups, add "mmx"
1558 static struct reggroup
*i386_sse_reggroup
;
1559 static struct reggroup
*i386_mmx_reggroup
;
1562 i386_init_reggroups (void)
1564 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1565 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1569 i386_add_reggroups (struct gdbarch
*gdbarch
)
1571 reggroup_add (gdbarch
, i386_sse_reggroup
);
1572 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1573 reggroup_add (gdbarch
, general_reggroup
);
1574 reggroup_add (gdbarch
, float_reggroup
);
1575 reggroup_add (gdbarch
, all_reggroup
);
1576 reggroup_add (gdbarch
, save_reggroup
);
1577 reggroup_add (gdbarch
, restore_reggroup
);
1578 reggroup_add (gdbarch
, vector_reggroup
);
1579 reggroup_add (gdbarch
, system_reggroup
);
1583 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1584 struct reggroup
*group
)
1586 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1587 || i386_mxcsr_regnum_p (regnum
));
1588 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1589 || i386_fpc_regnum_p (regnum
));
1590 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1592 if (group
== i386_mmx_reggroup
)
1593 return mmx_regnum_p
;
1594 if (group
== i386_sse_reggroup
)
1595 return sse_regnum_p
;
1596 if (group
== vector_reggroup
)
1597 return (mmx_regnum_p
|| sse_regnum_p
);
1598 if (group
== float_reggroup
)
1600 if (group
== general_reggroup
)
1601 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1603 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1607 static struct gdbarch
*
1608 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1610 struct gdbarch_tdep
*tdep
;
1611 struct gdbarch
*gdbarch
;
1613 /* If there is already a candidate, use it. */
1614 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1616 return arches
->gdbarch
;
1618 /* Allocate space for the new architecture. */
1619 tdep
= XMALLOC (struct gdbarch_tdep
);
1620 gdbarch
= gdbarch_alloc (&info
, tdep
);
1622 /* The i386 default settings don't include the SSE registers.
1623 FIXME: kettenis/20020614: They do include the FPU registers for
1624 now, which probably is not quite right. */
1625 tdep
->num_xmm_regs
= 0;
1627 tdep
->jb_pc_offset
= -1;
1628 tdep
->struct_return
= pcc_struct_return
;
1629 tdep
->sigtramp_start
= 0;
1630 tdep
->sigtramp_end
= 0;
1631 tdep
->sigcontext_addr
= NULL
;
1632 tdep
->sc_reg_offset
= NULL
;
1633 tdep
->sc_pc_offset
= -1;
1634 tdep
->sc_sp_offset
= -1;
1636 /* The format used for `long double' on almost all i386 targets is
1637 the i387 extended floating-point format. In fact, of all targets
1638 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1639 on having a `long double' that's not `long' at all. */
1640 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1642 /* Although the i387 extended floating-point has only 80 significant
1643 bits, a `long double' actually takes up 96, probably to enforce
1645 set_gdbarch_long_double_bit (gdbarch
, 96);
1647 /* The default ABI includes general-purpose registers and
1648 floating-point registers. */
1649 set_gdbarch_num_regs (gdbarch
, I386_NUM_GREGS
+ I386_NUM_FREGS
);
1650 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1651 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1653 /* Register numbers of various important registers. */
1654 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1655 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1656 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1657 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1659 /* Use the "default" register numbering scheme for stabs and COFF. */
1660 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1661 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1663 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1664 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1665 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1667 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1668 be in use on any of the supported i386 targets. */
1670 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1672 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1674 /* Call dummy code. */
1675 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1677 set_gdbarch_register_convertible (gdbarch
, i386_register_convertible
);
1678 set_gdbarch_register_convert_to_virtual (gdbarch
,
1679 i386_register_convert_to_virtual
);
1680 set_gdbarch_register_convert_to_raw (gdbarch
, i386_register_convert_to_raw
);
1682 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1683 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1684 set_gdbarch_extract_struct_value_address (gdbarch
,
1685 i386_extract_struct_value_address
);
1686 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1688 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1690 /* Stack grows downward. */
1691 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1693 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1694 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1695 set_gdbarch_function_start_offset (gdbarch
, 0);
1697 set_gdbarch_frame_args_skip (gdbarch
, 8);
1698 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1699 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1701 /* Wire in the MMX registers. */
1702 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1703 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1704 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1706 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1708 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1709 set_gdbarch_save_dummy_frame_tos (gdbarch
, i386_save_dummy_frame_tos
);
1711 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1713 /* Add the i386 register groups. */
1714 i386_add_reggroups (gdbarch
);
1715 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1717 frame_base_set_default (gdbarch
, &i386_frame_base
);
1719 /* Hook in ABI-specific overrides, if they have been registered. */
1720 gdbarch_init_osabi (info
, gdbarch
);
1722 frame_unwind_append_predicate (gdbarch
, i386_sigtramp_frame_p
);
1723 frame_unwind_append_predicate (gdbarch
, i386_frame_p
);
1728 static enum gdb_osabi
1729 i386_coff_osabi_sniffer (bfd
*abfd
)
1731 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1732 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1733 return GDB_OSABI_GO32
;
1735 return GDB_OSABI_UNKNOWN
;
1738 static enum gdb_osabi
1739 i386_nlm_osabi_sniffer (bfd
*abfd
)
1741 return GDB_OSABI_NETWARE
;
1745 /* Provide a prototype to silence -Wmissing-prototypes. */
1746 void _initialize_i386_tdep (void);
1749 _initialize_i386_tdep (void)
1751 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1753 /* Add the variable that controls the disassembly flavor. */
1755 struct cmd_list_element
*new_cmd
;
1757 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1759 &disassembly_flavor
,
1761 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1762 and the default value is \"att\".",
1764 add_show_from_set (new_cmd
, &showlist
);
1767 /* Add the variable that controls the convention for returning
1770 struct cmd_list_element
*new_cmd
;
1772 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1774 &struct_convention
, "\
1775 Set the convention for returning small structs, valid values \
1776 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1778 add_show_from_set (new_cmd
, &showlist
);
1781 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1782 i386_coff_osabi_sniffer
);
1783 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1784 i386_nlm_osabi_sniffer
);
1786 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1787 i386_svr4_init_abi
);
1788 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1789 i386_go32_init_abi
);
1790 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1793 /* Initialize the i386 specific register groups. */
1794 i386_init_reggroups ();