1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
52 /* Names of the registers. The first 10 registers match the register
53 numbering scheme used by GCC for stabs and DWARF. */
55 static char *i386_register_names
[] =
57 "eax", "ecx", "edx", "ebx",
58 "esp", "ebp", "esi", "edi",
59 "eip", "eflags", "cs", "ss",
60 "ds", "es", "fs", "gs",
61 "st0", "st1", "st2", "st3",
62 "st4", "st5", "st6", "st7",
63 "fctrl", "fstat", "ftag", "fiseg",
64 "fioff", "foseg", "fooff", "fop",
65 "xmm0", "xmm1", "xmm2", "xmm3",
66 "xmm4", "xmm5", "xmm6", "xmm7",
70 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
74 static char *i386_mmx_names
[] =
76 "mm0", "mm1", "mm2", "mm3",
77 "mm4", "mm5", "mm6", "mm7"
80 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
82 #define MM0_REGNUM NUM_REGS
85 i386_mmx_regnum_p (int regnum
)
87 return (regnum
>= MM0_REGNUM
88 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
94 i386_fp_regnum_p (int regnum
)
96 return (regnum
< NUM_REGS
97 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
101 i386_fpc_regnum_p (int regnum
)
103 return (regnum
< NUM_REGS
104 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
110 i386_sse_regnum_p (int regnum
)
112 return (regnum
< NUM_REGS
113 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
117 i386_mxcsr_regnum_p (int regnum
)
119 return (regnum
< NUM_REGS
120 && regnum
== MXCSR_REGNUM
);
123 /* Return the name of register REG. */
126 i386_register_name (int reg
)
128 if (i386_mmx_regnum_p (reg
))
129 return i386_mmx_names
[reg
- MM0_REGNUM
];
131 if (reg
>= 0 && reg
< i386_num_register_names
)
132 return i386_register_names
[reg
];
137 /* Convert stabs register number REG to the appropriate register
138 number used by GDB. */
141 i386_stab_reg_to_regnum (int reg
)
143 /* This implements what GCC calls the "default" register map. */
144 if (reg
>= 0 && reg
<= 7)
146 /* General-purpose registers. */
149 else if (reg
>= 12 && reg
<= 19)
151 /* Floating-point registers. */
152 return reg
- 12 + FP0_REGNUM
;
154 else if (reg
>= 21 && reg
<= 28)
157 return reg
- 21 + XMM0_REGNUM
;
159 else if (reg
>= 29 && reg
<= 36)
162 return reg
- 29 + MM0_REGNUM
;
165 /* This will hopefully provoke a warning. */
166 return NUM_REGS
+ NUM_PSEUDO_REGS
;
169 /* Convert DWARF register number REG to the appropriate register
170 number used by GDB. */
173 i386_dwarf_reg_to_regnum (int reg
)
175 /* The DWARF register numbering includes %eip and %eflags, and
176 numbers the floating point registers differently. */
177 if (reg
>= 0 && reg
<= 9)
179 /* General-purpose registers. */
182 else if (reg
>= 11 && reg
<= 18)
184 /* Floating-point registers. */
185 return reg
- 11 + FP0_REGNUM
;
189 /* The SSE and MMX registers have identical numbers as in stabs. */
190 return i386_stab_reg_to_regnum (reg
);
193 /* This will hopefully provoke a warning. */
194 return NUM_REGS
+ NUM_PSEUDO_REGS
;
198 /* This is the variable that is set with "set disassembly-flavor", and
199 its legitimate values. */
200 static const char att_flavor
[] = "att";
201 static const char intel_flavor
[] = "intel";
202 static const char *valid_flavors
[] =
208 static const char *disassembly_flavor
= att_flavor
;
211 /* Use the program counter to determine the contents and size of a
212 breakpoint instruction. Return a pointer to a string of bytes that
213 encode a breakpoint instruction, store the length of the string in
214 *LEN and optionally adjust *PC to point to the correct memory
215 location for inserting the breakpoint.
217 On the i386 we have a single breakpoint that fits in a single byte
218 and can be inserted anywhere.
220 This function is 64-bit safe. */
222 static const unsigned char *
223 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
225 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
227 *len
= sizeof (break_insn
);
231 #ifdef I386_REGNO_TO_SYMMETRY
232 #error "The Sequent Symmetry is no longer supported."
235 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
236 and %esp "belong" to the calling function. Therefore these
237 registers should be saved if they're going to be modified. */
239 /* The maximum number of saved registers. This should include all
240 registers mentioned above, and %eip. */
241 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
243 struct i386_frame_cache
250 /* Saved registers. */
251 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
255 /* Stack space reserved for local variables. */
259 /* Allocate and initialize a frame cache. */
261 static struct i386_frame_cache
*
262 i386_alloc_frame_cache (void)
264 struct i386_frame_cache
*cache
;
267 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
271 cache
->sp_offset
= -4;
274 /* Saved registers. We initialize these to -1 since zero is a valid
275 offset (that's where %ebp is supposed to be stored). */
276 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
277 cache
->saved_regs
[i
] = -1;
279 cache
->pc_in_eax
= 0;
281 /* Frameless until proven otherwise. */
287 /* If the instruction at PC is a jump, return the address of its
288 target. Otherwise, return PC. */
291 i386_follow_jump (CORE_ADDR pc
)
297 op
= read_memory_unsigned_integer (pc
, 1);
301 op
= read_memory_unsigned_integer (pc
+ 1, 1);
307 /* Relative jump: if data16 == 0, disp32, else disp16. */
310 delta
= read_memory_integer (pc
+ 2, 2);
312 /* Include the size of the jmp instruction (including the
318 delta
= read_memory_integer (pc
+ 1, 4);
320 /* Include the size of the jmp instruction. */
325 /* Relative jump, disp8 (ignore data16). */
326 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
335 /* Check whether PC points at a prologue for a function returning a
336 structure or union. If so, it updates CACHE and returns the
337 address of the first instruction after the code sequence that
338 removes the "hidden" argument from the stack or CURRENT_PC,
339 whichever is smaller. Otherwise, return PC. */
342 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
343 struct i386_frame_cache
*cache
)
345 /* Functions that return a structure or union start with:
348 xchgl %eax, (%esp) 0x87 0x04 0x24
349 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
351 (the System V compiler puts out the second `xchg' instruction,
352 and the assembler doesn't try to optimize it, so the 'sib' form
353 gets generated). This sequence is used to get the address of the
354 return buffer for a function that returns a structure. */
355 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
356 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
357 unsigned char buf
[4];
360 if (current_pc
<= pc
)
363 op
= read_memory_unsigned_integer (pc
, 1);
365 if (op
!= 0x58) /* popl %eax */
368 read_memory (pc
+ 1, buf
, 4);
369 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
372 if (current_pc
== pc
)
374 cache
->sp_offset
+= 4;
378 if (current_pc
== pc
+ 1)
380 cache
->pc_in_eax
= 1;
384 if (buf
[1] == proto1
[1])
391 i386_skip_probe (CORE_ADDR pc
)
393 /* A function may start with
404 unsigned char buf
[8];
407 op
= read_memory_unsigned_integer (pc
, 1);
409 if (op
== 0x68 || op
== 0x6a)
413 /* Skip past the `pushl' instruction; it has either a one-byte or a
414 four-byte operand, depending on the opcode. */
420 /* Read the following 8 bytes, which should be `call _probe' (6
421 bytes) followed by `addl $4,%esp' (2 bytes). */
422 read_memory (pc
+ delta
, buf
, sizeof (buf
));
423 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
424 pc
+= delta
+ sizeof (buf
);
430 /* Check whether PC points at a code that sets up a new stack frame.
431 If so, it updates CACHE and returns the address of the first
432 instruction after the sequence that sets removes the "hidden"
433 argument from the stack or CURRENT_PC, whichever is smaller.
434 Otherwise, return PC. */
437 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
438 struct i386_frame_cache
*cache
)
443 if (current_pc
<= pc
)
446 op
= read_memory_unsigned_integer (pc
, 1);
448 if (op
== 0x55) /* pushl %ebp */
450 /* Take into account that we've executed the `pushl %ebp' that
451 starts this instruction sequence. */
452 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
453 cache
->sp_offset
+= 4;
455 /* If that's all, return now. */
456 if (current_pc
<= pc
+ 1)
459 op
= read_memory_unsigned_integer (pc
+ 1, 1);
461 /* Check for some special instructions that might be migrated
462 by GCC into the prologue. We check for
474 Make sure we only skip these instructions if we later see the
475 `movl %esp, %ebp' that actually sets up the frame. */
476 while (op
== 0x29 || op
== 0x31)
478 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
481 case 0xdb: /* %ebx */
482 case 0xc9: /* %ecx */
483 case 0xd2: /* %edx */
490 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
493 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
497 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
501 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
508 /* OK, we actually have a frame. We just don't know how large
509 it is yet. Set its size to zero. We'll adjust it if
510 necessary. We also now commit to skipping the special
511 instructions mentioned before. */
515 /* If that's all, return now. */
516 if (current_pc
<= pc
+ 3)
519 /* Check for stack adjustment
523 NOTE: You can't subtract a 16 bit immediate from a 32 bit
524 reg, so we don't have to worry about a data16 prefix. */
525 op
= read_memory_unsigned_integer (pc
+ 3, 1);
528 /* `subl' with 8 bit immediate. */
529 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
530 /* Some instruction starting with 0x83 other than `subl'. */
533 /* `subl' with signed byte immediate (though it wouldn't make
534 sense to be negative). */
535 cache
->locals
= read_memory_integer (pc
+ 5, 1);
540 /* Maybe it is `subl' with a 32 bit immedediate. */
541 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
542 /* Some instruction starting with 0x81 other than `subl'. */
545 /* It is `subl' with a 32 bit immediate. */
546 cache
->locals
= read_memory_integer (pc
+ 5, 4);
551 /* Some instruction other than `subl'. */
555 else if (op
== 0xc8) /* enter $XXX */
557 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
564 /* Check whether PC points at code that saves registers on the stack.
565 If so, it updates CACHE and returns the address of the first
566 instruction after the register saves or CURRENT_PC, whichever is
567 smaller. Otherwise, return PC. */
570 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
571 struct i386_frame_cache
*cache
)
573 CORE_ADDR offset
= 0;
577 if (cache
->locals
> 0)
578 offset
-= cache
->locals
;
579 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
581 op
= read_memory_unsigned_integer (pc
, 1);
582 if (op
< 0x50 || op
> 0x57)
586 cache
->saved_regs
[op
- 0x50] = offset
;
587 cache
->sp_offset
+= 4;
594 /* Do a full analysis of the prologue at PC and update CACHE
595 accordingly. Bail out early if CURRENT_PC is reached. Return the
596 address where the analysis stopped.
598 We handle these cases:
600 The startup sequence can be at the start of the function, or the
601 function can start with a branch to startup code at the end.
603 %ebp can be set up with either the 'enter' instruction, or "pushl
604 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
605 once used in the System V compiler).
607 Local space is allocated just below the saved %ebp by either the
608 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
609 bit unsigned argument for space to allocate, and the 'addl'
610 instruction could have either a signed byte, or 32 bit immediate.
612 Next, the registers used by this function are pushed. With the
613 System V compiler they will always be in the order: %edi, %esi,
614 %ebx (and sometimes a harmless bug causes it to also save but not
615 restore %eax); however, the code below is willing to see the pushes
616 in any order, and will handle up to 8 of them.
618 If the setup sequence is at the end of the function, then the next
619 instruction will be a branch back to the start. */
622 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
623 struct i386_frame_cache
*cache
)
625 pc
= i386_follow_jump (pc
);
626 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
627 pc
= i386_skip_probe (pc
);
628 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
629 return i386_analyze_register_saves (pc
, current_pc
, cache
);
632 /* Return PC of first real instruction. */
635 i386_skip_prologue (CORE_ADDR start_pc
)
637 static unsigned char pic_pat
[6] =
639 0xe8, 0, 0, 0, 0, /* call 0x0 */
640 0x5b, /* popl %ebx */
642 struct i386_frame_cache cache
;
648 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
649 if (cache
.locals
< 0)
652 /* Found valid frame setup. */
654 /* The native cc on SVR4 in -K PIC mode inserts the following code
655 to get the address of the global offset table (GOT) into register
660 movl %ebx,x(%ebp) (optional)
663 This code is with the rest of the prologue (at the end of the
664 function), so we have to skip it to get to the first real
665 instruction at the start of the function. */
667 for (i
= 0; i
< 6; i
++)
669 op
= read_memory_unsigned_integer (pc
+ i
, 1);
670 if (pic_pat
[i
] != op
)
677 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
679 if (op
== 0x89) /* movl %ebx, x(%ebp) */
681 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
683 if (op
== 0x5d) /* One byte offset from %ebp. */
685 else if (op
== 0x9d) /* Four byte offset from %ebp. */
687 else /* Unexpected instruction. */
690 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
694 if (delta
> 0 && op
== 0x81
695 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
701 return i386_follow_jump (pc
);
704 /* This function is 64-bit safe. */
707 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
711 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
712 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
718 static struct i386_frame_cache
*
719 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
721 struct i386_frame_cache
*cache
;
728 cache
= i386_alloc_frame_cache ();
731 /* In principle, for normal frames, %ebp holds the frame pointer,
732 which holds the base address for the current stack frame.
733 However, for functions that don't need it, the frame pointer is
734 optional. For these "frameless" functions the frame pointer is
735 actually the frame pointer of the calling frame. Signal
736 trampolines are just a special case of a "frameless" function.
737 They (usually) share their frame pointer with the frame that was
738 in progress when the signal occurred. */
740 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
741 cache
->base
= extract_unsigned_integer (buf
, 4);
742 if (cache
->base
== 0)
745 /* For normal frames, %eip is stored at 4(%ebp). */
746 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
748 cache
->pc
= frame_func_unwind (next_frame
);
750 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
752 if (cache
->locals
< 0)
754 /* We didn't find a valid frame, which means that CACHE->base
755 currently holds the frame pointer for our calling frame. If
756 we're at the start of a function, or somewhere half-way its
757 prologue, the function's frame probably hasn't been fully
758 setup yet. Try to reconstruct the base address for the stack
759 frame by looking at the stack pointer. For truly "frameless"
760 functions this might work too. */
762 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
763 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
766 /* Now that we have the base address for the stack frame we can
767 calculate the value of %esp in the calling frame. */
768 cache
->saved_sp
= cache
->base
+ 8;
770 /* Adjust all the saved registers such that they contain addresses
771 instead of offsets. */
772 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
773 if (cache
->saved_regs
[i
] != -1)
774 cache
->saved_regs
[i
] += cache
->base
;
780 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
781 struct frame_id
*this_id
)
783 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
785 /* This marks the outermost frame. */
786 if (cache
->base
== 0)
789 /* See the end of i386_push_dummy_call. */
790 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
794 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
795 int regnum
, int *optimizedp
,
796 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
797 int *realnump
, void *valuep
)
799 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
801 gdb_assert (regnum
>= 0);
803 /* The System V ABI says that:
805 "The flags register contains the system flags, such as the
806 direction flag and the carry flag. The direction flag must be
807 set to the forward (that is, zero) direction before entry and
808 upon exit from a function. Other user flags have no specified
809 role in the standard calling sequence and are not preserved."
811 To guarantee the "upon exit" part of that statement we fake a
812 saved flags register that has its direction flag cleared.
814 Note that GCC doesn't seem to rely on the fact that the direction
815 flag is cleared after a function return; it always explicitly
816 clears the flag before operations where it matters.
818 FIXME: kettenis/20030316: I'm not quite sure whether this is the
819 right thing to do. The way we fake the flags register here makes
820 it impossible to change it. */
822 if (regnum
== I386_EFLAGS_REGNUM
)
832 /* Clear the direction flag. */
833 val
= frame_unwind_register_unsigned (next_frame
,
836 store_unsigned_integer (valuep
, 4, val
);
842 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
844 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
845 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
849 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
857 /* Store the value. */
858 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
863 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
866 *lvalp
= lval_memory
;
867 *addrp
= cache
->saved_regs
[regnum
];
871 /* Read the value in from memory. */
872 read_memory (*addrp
, valuep
,
873 register_size (current_gdbarch
, regnum
));
878 frame_register_unwind (next_frame
, regnum
,
879 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
882 static const struct frame_unwind i386_frame_unwind
=
886 i386_frame_prev_register
889 static const struct frame_unwind
*
890 i386_frame_sniffer (struct frame_info
*next_frame
)
892 return &i386_frame_unwind
;
896 /* Signal trampolines. */
898 static struct i386_frame_cache
*
899 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
901 struct i386_frame_cache
*cache
;
902 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
909 cache
= i386_alloc_frame_cache ();
911 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
912 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
914 addr
= tdep
->sigcontext_addr (next_frame
);
915 if (tdep
->sc_reg_offset
)
919 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
921 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
922 if (tdep
->sc_reg_offset
[i
] != -1)
923 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
927 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
928 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
936 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
937 struct frame_id
*this_id
)
939 struct i386_frame_cache
*cache
=
940 i386_sigtramp_frame_cache (next_frame
, this_cache
);
942 /* See the end of i386_push_dummy_call. */
943 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
947 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
949 int regnum
, int *optimizedp
,
950 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
951 int *realnump
, void *valuep
)
953 /* Make sure we've initialized the cache. */
954 i386_sigtramp_frame_cache (next_frame
, this_cache
);
956 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
957 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
960 static const struct frame_unwind i386_sigtramp_frame_unwind
=
963 i386_sigtramp_frame_this_id
,
964 i386_sigtramp_frame_prev_register
967 static const struct frame_unwind
*
968 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
970 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
973 /* We shouldn't even bother to try if the OSABI didn't register
974 a sigcontext_addr handler. */
975 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
978 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
979 if (PC_IN_SIGTRAMP (pc
, name
))
980 return &i386_sigtramp_frame_unwind
;
987 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
989 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
994 static const struct frame_base i386_frame_base
=
997 i386_frame_base_address
,
998 i386_frame_base_address
,
999 i386_frame_base_address
1002 static struct frame_id
1003 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1008 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1009 fp
= extract_unsigned_integer (buf
, 4);
1011 /* See the end of i386_push_dummy_call. */
1012 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1016 /* Figure out where the longjmp will land. Slurp the args out of the
1017 stack. We expect the first arg to be a pointer to the jmp_buf
1018 structure from which we extract the address that we will land at.
1019 This address is copied into PC. This routine returns non-zero on
1022 This function is 64-bit safe. */
1025 i386_get_longjmp_target (CORE_ADDR
*pc
)
1028 CORE_ADDR sp
, jb_addr
;
1029 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1030 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1032 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1033 longjmp will land. */
1034 if (jb_pc_offset
== -1)
1037 /* Don't use I386_ESP_REGNUM here, since this function is also used
1039 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1040 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1041 if (target_read_memory (sp
+ len
, buf
, len
))
1044 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1045 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1048 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1054 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1055 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1056 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1057 CORE_ADDR struct_addr
)
1062 /* Push arguments in reverse order. */
1063 for (i
= nargs
- 1; i
>= 0; i
--)
1065 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1067 /* The System V ABI says that:
1069 "An argument's size is increased, if necessary, to make it a
1070 multiple of [32-bit] words. This may require tail padding,
1071 depending on the size of the argument."
1073 This makes sure the stack says word-aligned. */
1074 sp
-= (len
+ 3) & ~3;
1075 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1078 /* Push value address. */
1082 store_unsigned_integer (buf
, 4, struct_addr
);
1083 write_memory (sp
, buf
, 4);
1086 /* Store return address. */
1088 store_unsigned_integer (buf
, 4, bp_addr
);
1089 write_memory (sp
, buf
, 4);
1091 /* Finally, update the stack pointer... */
1092 store_unsigned_integer (buf
, 4, sp
);
1093 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1095 /* ...and fake a frame pointer. */
1096 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1098 /* MarkK wrote: This "+ 8" is all over the place:
1099 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1100 i386_unwind_dummy_id). It's there, since all frame unwinders for
1101 a given target have to agree (within a certain margin) on the
1102 defenition of the stack address of a frame. Otherwise
1103 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1104 stack address *before* the function call as a frame's CFA. On
1105 the i386, when %ebp is used as a frame pointer, the offset
1106 between the contents %ebp and the CFA as defined by GCC. */
1110 /* These registers are used for returning integers (and on some
1111 targets also for returning `struct' and `union' values when their
1112 size and alignment match an integer type). */
1113 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1114 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1116 /* Extract from an array REGBUF containing the (raw) register state, a
1117 function return value of TYPE, and copy that, in virtual format,
1121 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1124 bfd_byte
*valbuf
= dst
;
1125 int len
= TYPE_LENGTH (type
);
1126 char buf
[I386_MAX_REGISTER_SIZE
];
1128 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1129 && TYPE_NFIELDS (type
) == 1)
1131 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1135 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1139 warning ("Cannot find floating-point return value.");
1140 memset (valbuf
, 0, len
);
1144 /* Floating-point return values can be found in %st(0). Convert
1145 its contents to the desired type. This is probably not
1146 exactly how it would happen on the target itself, but it is
1147 the best we can do. */
1148 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1149 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1153 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1154 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1156 if (len
<= low_size
)
1158 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1159 memcpy (valbuf
, buf
, len
);
1161 else if (len
<= (low_size
+ high_size
))
1163 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1164 memcpy (valbuf
, buf
, low_size
);
1165 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1166 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1169 internal_error (__FILE__
, __LINE__
,
1170 "Cannot extract return value of %d bytes long.", len
);
1174 /* Write into the appropriate registers a function return value stored
1175 in VALBUF of type TYPE, given in virtual format. */
1178 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1181 int len
= TYPE_LENGTH (type
);
1183 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1184 && TYPE_NFIELDS (type
) == 1)
1186 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1190 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1193 char buf
[FPU_REG_RAW_SIZE
];
1197 warning ("Cannot set floating-point return value.");
1201 /* Returning floating-point values is a bit tricky. Apart from
1202 storing the return value in %st(0), we have to simulate the
1203 state of the FPU at function return point. */
1205 /* Convert the value found in VALBUF to the extended
1206 floating-point format used by the FPU. This is probably
1207 not exactly how it would happen on the target itself, but
1208 it is the best we can do. */
1209 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1210 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1212 /* Set the top of the floating-point register stack to 7. The
1213 actual value doesn't really matter, but 7 is what a normal
1214 function return would end up with if the program started out
1215 with a freshly initialized FPU. */
1216 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1218 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1220 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1221 the floating-point register stack to 7, the appropriate value
1222 for the tag word is 0x3fff. */
1223 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1227 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1228 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1230 if (len
<= low_size
)
1231 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1232 else if (len
<= (low_size
+ high_size
))
1234 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1235 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1236 len
- low_size
, (char *) valbuf
+ low_size
);
1239 internal_error (__FILE__
, __LINE__
,
1240 "Cannot store return value of %d bytes long.", len
);
1244 /* Extract from REGCACHE, which contains the (raw) register state, the
1245 address in which a function should return its structure value, as a
1249 i386_extract_struct_value_address (struct regcache
*regcache
)
1253 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1254 return extract_unsigned_integer (buf
, 4);
1258 /* This is the variable that is set with "set struct-convention", and
1259 its legitimate values. */
1260 static const char default_struct_convention
[] = "default";
1261 static const char pcc_struct_convention
[] = "pcc";
1262 static const char reg_struct_convention
[] = "reg";
1263 static const char *valid_conventions
[] =
1265 default_struct_convention
,
1266 pcc_struct_convention
,
1267 reg_struct_convention
,
1270 static const char *struct_convention
= default_struct_convention
;
1273 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1275 enum struct_return struct_return
;
1277 if (struct_convention
== default_struct_convention
)
1278 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1279 else if (struct_convention
== pcc_struct_convention
)
1280 struct_return
= pcc_struct_return
;
1282 struct_return
= reg_struct_return
;
1284 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1289 /* Return the GDB type object for the "standard" data type of data in
1290 register REGNUM. Perhaps %esi and %edi should go here, but
1291 potentially they could be used for things other than address. */
1293 static struct type
*
1294 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1296 if (regnum
== I386_EIP_REGNUM
1297 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1298 return lookup_pointer_type (builtin_type_void
);
1300 if (i386_fp_regnum_p (regnum
))
1301 return builtin_type_i387_ext
;
1303 if (i386_sse_regnum_p (regnum
))
1304 return builtin_type_vec128i
;
1306 if (i386_mmx_regnum_p (regnum
))
1307 return builtin_type_vec64i
;
1309 return builtin_type_int
;
1312 /* Map a cooked register onto a raw register or memory. For the i386,
1313 the MMX registers need to be mapped onto floating point registers. */
1316 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1323 mmxi
= regnum
- MM0_REGNUM
;
1324 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1325 tos
= (fstat
>> 11) & 0x7;
1326 fpi
= (mmxi
+ tos
) % 8;
1328 return (FP0_REGNUM
+ fpi
);
1332 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1333 int regnum
, void *buf
)
1335 if (i386_mmx_regnum_p (regnum
))
1337 char mmx_buf
[MAX_REGISTER_SIZE
];
1338 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1340 /* Extract (always little endian). */
1341 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1342 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1345 regcache_raw_read (regcache
, regnum
, buf
);
1349 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1350 int regnum
, const void *buf
)
1352 if (i386_mmx_regnum_p (regnum
))
1354 char mmx_buf
[MAX_REGISTER_SIZE
];
1355 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1358 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1359 /* ... Modify ... (always little endian). */
1360 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1362 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1365 regcache_raw_write (regcache
, regnum
, buf
);
1369 /* These registers don't have pervasive standard uses. Move them to
1370 i386-tdep.h if necessary. */
1372 #define I386_EBX_REGNUM 3 /* %ebx */
1373 #define I386_ECX_REGNUM 1 /* %ecx */
1374 #define I386_ESI_REGNUM 6 /* %esi */
1375 #define I386_EDI_REGNUM 7 /* %edi */
1377 /* Return the register number of the register allocated by GCC after
1378 REGNUM, or -1 if there is no such register. */
1381 i386_next_regnum (int regnum
)
1383 /* GCC allocates the registers in the order:
1385 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1387 Since storing a variable in %esp doesn't make any sense we return
1388 -1 for %ebp and for %esp itself. */
1389 static int next_regnum
[] =
1391 I386_EDX_REGNUM
, /* Slot for %eax. */
1392 I386_EBX_REGNUM
, /* Slot for %ecx. */
1393 I386_ECX_REGNUM
, /* Slot for %edx. */
1394 I386_ESI_REGNUM
, /* Slot for %ebx. */
1395 -1, -1, /* Slots for %esp and %ebp. */
1396 I386_EDI_REGNUM
, /* Slot for %esi. */
1397 I386_EBP_REGNUM
/* Slot for %edi. */
1400 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1401 return next_regnum
[regnum
];
1406 /* Return nonzero if a value of type TYPE stored in register REGNUM
1407 needs any special handling. */
1410 i386_convert_register_p (int regnum
, struct type
*type
)
1412 int len
= TYPE_LENGTH (type
);
1414 /* Values may be spread across multiple registers. Most debugging
1415 formats aren't expressive enough to specify the locations, so
1416 some heuristics is involved. Right now we only handle types that
1417 have a length that is a multiple of the word size, since GCC
1418 doesn't seem to put any other types into registers. */
1419 if (len
> 4 && len
% 4 == 0)
1421 int last_regnum
= regnum
;
1425 last_regnum
= i386_next_regnum (last_regnum
);
1429 if (last_regnum
!= -1)
1433 return i386_fp_regnum_p (regnum
);
1436 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1437 return its contents in TO. */
1440 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1441 struct type
*type
, void *to
)
1443 int len
= TYPE_LENGTH (type
);
1446 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1447 available in FRAME (i.e. if it wasn't saved)? */
1449 if (i386_fp_regnum_p (regnum
))
1451 i387_register_to_value (frame
, regnum
, type
, to
);
1455 /* Read a value spread accross multiple registers. */
1457 gdb_assert (len
> 4 && len
% 4 == 0);
1461 gdb_assert (regnum
!= -1);
1462 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1464 get_frame_register (frame
, regnum
, buf
);
1465 regnum
= i386_next_regnum (regnum
);
1471 /* Write the contents FROM of a value of type TYPE into register
1472 REGNUM in frame FRAME. */
1475 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1476 struct type
*type
, const void *from
)
1478 int len
= TYPE_LENGTH (type
);
1479 const char *buf
= from
;
1481 if (i386_fp_regnum_p (regnum
))
1483 i387_value_to_register (frame
, regnum
, type
, from
);
1487 /* Write a value spread accross multiple registers. */
1489 gdb_assert (len
> 4 && len
% 4 == 0);
1493 gdb_assert (regnum
!= -1);
1494 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1496 put_frame_register (frame
, regnum
, buf
);
1497 regnum
= i386_next_regnum (regnum
);
1505 #ifdef STATIC_TRANSFORM_NAME
1506 /* SunPRO encodes the static variables. This is not related to C++
1507 mangling, it is done for C too. */
1510 sunpro_static_transform_name (char *name
)
1513 if (IS_STATIC_TRANSFORM_NAME (name
))
1515 /* For file-local statics there will be a period, a bunch of
1516 junk (the contents of which match a string given in the
1517 N_OPT), a period and the name. For function-local statics
1518 there will be a bunch of junk (which seems to change the
1519 second character from 'A' to 'B'), a period, the name of the
1520 function, and the name. So just skip everything before the
1522 p
= strrchr (name
, '.');
1528 #endif /* STATIC_TRANSFORM_NAME */
1531 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1534 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1536 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1538 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1539 struct minimal_symbol
*indsym
=
1540 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1541 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1545 if (strncmp (symname
, "__imp_", 6) == 0
1546 || strncmp (symname
, "_imp_", 5) == 0)
1547 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1550 return 0; /* Not a trampoline. */
1554 /* Return non-zero if PC and NAME show that we are in a signal
1558 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1560 return (name
&& strcmp ("_sigtramp", name
) == 0);
1564 /* We have two flavours of disassembly. The machinery on this page
1565 deals with switching between those. */
1568 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1570 gdb_assert (disassembly_flavor
== att_flavor
1571 || disassembly_flavor
== intel_flavor
);
1573 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1574 constified, cast to prevent a compiler warning. */
1575 info
->disassembler_options
= (char *) disassembly_flavor
;
1576 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1578 return print_insn_i386 (pc
, info
);
1582 /* There are a few i386 architecture variants that differ only
1583 slightly from the generic i386 target. For now, we don't give them
1584 their own source file, but include them here. As a consequence,
1585 they'll always be included. */
1587 /* System V Release 4 (SVR4). */
1590 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1592 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1593 currently unknown. */
1594 return (name
&& (strcmp ("_sigreturn", name
) == 0
1595 || strcmp ("_sigacthandler", name
) == 0
1596 || strcmp ("sigvechandler", name
) == 0));
1599 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1600 routine, return the address of the associated sigcontext (ucontext)
1604 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1609 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1610 sp
= extract_unsigned_integer (buf
, 4);
1612 return read_memory_unsigned_integer (sp
+ 8, 4);
1619 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1621 /* DJGPP doesn't have any special frames for signal handlers. */
1629 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1631 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1632 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1635 /* System V Release 4 (SVR4). */
1638 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1640 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1642 /* System V Release 4 uses ELF. */
1643 i386_elf_init_abi (info
, gdbarch
);
1645 /* System V Release 4 has shared libraries. */
1646 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1647 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1649 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1650 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1651 tdep
->sc_pc_offset
= 36 + 14 * 4;
1652 tdep
->sc_sp_offset
= 36 + 17 * 4;
1654 tdep
->jb_pc_offset
= 20;
1660 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1662 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1664 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1666 tdep
->jb_pc_offset
= 36;
1672 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1674 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1676 tdep
->jb_pc_offset
= 24;
1680 /* i386 register groups. In addition to the normal groups, add "mmx"
1683 static struct reggroup
*i386_sse_reggroup
;
1684 static struct reggroup
*i386_mmx_reggroup
;
1687 i386_init_reggroups (void)
1689 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1690 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1694 i386_add_reggroups (struct gdbarch
*gdbarch
)
1696 reggroup_add (gdbarch
, i386_sse_reggroup
);
1697 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1698 reggroup_add (gdbarch
, general_reggroup
);
1699 reggroup_add (gdbarch
, float_reggroup
);
1700 reggroup_add (gdbarch
, all_reggroup
);
1701 reggroup_add (gdbarch
, save_reggroup
);
1702 reggroup_add (gdbarch
, restore_reggroup
);
1703 reggroup_add (gdbarch
, vector_reggroup
);
1704 reggroup_add (gdbarch
, system_reggroup
);
1708 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1709 struct reggroup
*group
)
1711 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1712 || i386_mxcsr_regnum_p (regnum
));
1713 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1714 || i386_fpc_regnum_p (regnum
));
1715 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1717 if (group
== i386_mmx_reggroup
)
1718 return mmx_regnum_p
;
1719 if (group
== i386_sse_reggroup
)
1720 return sse_regnum_p
;
1721 if (group
== vector_reggroup
)
1722 return (mmx_regnum_p
|| sse_regnum_p
);
1723 if (group
== float_reggroup
)
1725 if (group
== general_reggroup
)
1726 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1728 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1732 /* Get the ARGIth function argument for the current function. */
1735 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1738 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1739 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1743 static struct gdbarch
*
1744 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1746 struct gdbarch_tdep
*tdep
;
1747 struct gdbarch
*gdbarch
;
1749 /* If there is already a candidate, use it. */
1750 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1752 return arches
->gdbarch
;
1754 /* Allocate space for the new architecture. */
1755 tdep
= XMALLOC (struct gdbarch_tdep
);
1756 gdbarch
= gdbarch_alloc (&info
, tdep
);
1758 /* The i386 default settings now include the SSE registers.
1759 I386_NUM_XREGS includes mxcsr, and we don't want to count
1760 this as one of the xmm regs -- which is why we subtract one.
1762 Note: kevinb/2003-07-14: Whatever Mark's concerns are about the
1763 FPU registers in the FIXME below apply to the SSE registers as well.
1764 The only problem that I see is that these registers will show up
1765 in "info all-registers" even on CPUs where they don't exist. IMO,
1766 however, if it's a choice between printing them always (even when
1767 they don't exist) or never showing them to the user (even when they
1768 do exist), I prefer the former over the latter. Ideally, of course,
1769 we'd somehow autodetect that we have them (or not) and display them
1770 when we have them and suppress them when we don't.
1772 FIXME: kettenis/20020614: They do include the FPU registers for
1773 now, which probably is not quite right. */
1774 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1776 tdep
->jb_pc_offset
= -1;
1777 tdep
->struct_return
= pcc_struct_return
;
1778 tdep
->sigtramp_start
= 0;
1779 tdep
->sigtramp_end
= 0;
1780 tdep
->sigcontext_addr
= NULL
;
1781 tdep
->sc_reg_offset
= NULL
;
1782 tdep
->sc_pc_offset
= -1;
1783 tdep
->sc_sp_offset
= -1;
1785 /* The format used for `long double' on almost all i386 targets is
1786 the i387 extended floating-point format. In fact, of all targets
1787 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1788 on having a `long double' that's not `long' at all. */
1789 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1791 /* Although the i387 extended floating-point has only 80 significant
1792 bits, a `long double' actually takes up 96, probably to enforce
1794 set_gdbarch_long_double_bit (gdbarch
, 96);
1796 /* The default ABI includes general-purpose registers,
1797 floating-point registers, and the SSE registers. */
1798 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1799 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1800 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1802 /* Register numbers of various important registers. */
1803 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1804 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1805 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1806 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1808 /* Use the "default" register numbering scheme for stabs and COFF. */
1809 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1810 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1812 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1813 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1814 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1816 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1817 be in use on any of the supported i386 targets. */
1819 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1821 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1823 /* Call dummy code. */
1824 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1826 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1827 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1828 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1830 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1831 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1832 set_gdbarch_extract_struct_value_address (gdbarch
,
1833 i386_extract_struct_value_address
);
1834 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1836 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1838 /* Stack grows downward. */
1839 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1841 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1842 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1843 set_gdbarch_function_start_offset (gdbarch
, 0);
1845 set_gdbarch_frame_args_skip (gdbarch
, 8);
1846 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1848 /* Wire in the MMX registers. */
1849 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1850 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1851 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1853 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1855 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1857 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1859 /* Add the i386 register groups. */
1860 i386_add_reggroups (gdbarch
);
1861 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1863 /* Helper for function argument information. */
1864 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1866 /* Hook in the DWARF CFI frame unwinder. */
1867 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1869 frame_base_set_default (gdbarch
, &i386_frame_base
);
1871 /* Hook in ABI-specific overrides, if they have been registered. */
1872 gdbarch_init_osabi (info
, gdbarch
);
1874 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
1875 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
1880 static enum gdb_osabi
1881 i386_coff_osabi_sniffer (bfd
*abfd
)
1883 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1884 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1885 return GDB_OSABI_GO32
;
1887 return GDB_OSABI_UNKNOWN
;
1890 static enum gdb_osabi
1891 i386_nlm_osabi_sniffer (bfd
*abfd
)
1893 return GDB_OSABI_NETWARE
;
1897 /* Provide a prototype to silence -Wmissing-prototypes. */
1898 void _initialize_i386_tdep (void);
1901 _initialize_i386_tdep (void)
1903 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1905 /* Add the variable that controls the disassembly flavor. */
1907 struct cmd_list_element
*new_cmd
;
1909 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1911 &disassembly_flavor
,
1913 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1914 and the default value is \"att\".",
1916 add_show_from_set (new_cmd
, &showlist
);
1919 /* Add the variable that controls the convention for returning
1922 struct cmd_list_element
*new_cmd
;
1924 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1926 &struct_convention
, "\
1927 Set the convention for returning small structs, valid values \
1928 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1930 add_show_from_set (new_cmd
, &showlist
);
1933 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1934 i386_coff_osabi_sniffer
);
1935 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1936 i386_nlm_osabi_sniffer
);
1938 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1939 i386_svr4_init_abi
);
1940 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1941 i386_go32_init_abi
);
1942 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1945 /* Initialize the i386 specific register groups. */
1946 i386_init_reggroups ();