1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
45 #include "gdb_assert.h"
46 #include "gdb_string.h"
48 #include "i386-tdep.h"
49 #include "i387-tdep.h"
51 /* Names of the registers. The first 10 registers match the register
52 numbering scheme used by GCC for stabs and DWARF. */
54 static char *i386_register_names
[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names
=
70 (sizeof (i386_register_names
) / sizeof (*i386_register_names
));
74 static char *i386_mmx_names
[] =
76 "mm0", "mm1", "mm2", "mm3",
77 "mm4", "mm5", "mm6", "mm7"
80 static const int i386_num_mmx_regs
=
81 (sizeof (i386_mmx_names
) / sizeof (i386_mmx_names
[0]));
83 #define MM0_REGNUM NUM_REGS
86 i386_mmx_regnum_p (int regnum
)
88 return (regnum
>= MM0_REGNUM
89 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
95 i386_fp_regnum_p (int regnum
)
97 return (regnum
< NUM_REGS
98 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
102 i386_fpc_regnum_p (int regnum
)
104 return (regnum
< NUM_REGS
105 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
111 i386_sse_regnum_p (int regnum
)
113 return (regnum
< NUM_REGS
114 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
118 i386_mxcsr_regnum_p (int regnum
)
120 return (regnum
< NUM_REGS
121 && regnum
== MXCSR_REGNUM
);
124 /* Return the name of register REG. */
127 i386_register_name (int reg
)
129 if (i386_mmx_regnum_p (reg
))
130 return i386_mmx_names
[reg
- MM0_REGNUM
];
132 if (reg
>= 0 && reg
< i386_num_register_names
)
133 return i386_register_names
[reg
];
138 /* Convert stabs register number REG to the appropriate register
139 number used by GDB. */
142 i386_stab_reg_to_regnum (int reg
)
144 /* This implements what GCC calls the "default" register map. */
145 if (reg
>= 0 && reg
<= 7)
147 /* General-purpose registers. */
150 else if (reg
>= 12 && reg
<= 19)
152 /* Floating-point registers. */
153 return reg
- 12 + FP0_REGNUM
;
155 else if (reg
>= 21 && reg
<= 28)
158 return reg
- 21 + XMM0_REGNUM
;
160 else if (reg
>= 29 && reg
<= 36)
163 return reg
- 29 + MM0_REGNUM
;
166 /* This will hopefully provoke a warning. */
167 return NUM_REGS
+ NUM_PSEUDO_REGS
;
170 /* Convert DWARF register number REG to the appropriate register
171 number used by GDB. */
174 i386_dwarf_reg_to_regnum (int reg
)
176 /* The DWARF register numbering includes %eip and %eflags, and
177 numbers the floating point registers differently. */
178 if (reg
>= 0 && reg
<= 9)
180 /* General-purpose registers. */
183 else if (reg
>= 11 && reg
<= 18)
185 /* Floating-point registers. */
186 return reg
- 11 + FP0_REGNUM
;
190 /* The SSE and MMX registers have identical numbers as in stabs. */
191 return i386_stab_reg_to_regnum (reg
);
194 /* This will hopefully provoke a warning. */
195 return NUM_REGS
+ NUM_PSEUDO_REGS
;
199 /* This is the variable that is set with "set disassembly-flavor", and
200 its legitimate values. */
201 static const char att_flavor
[] = "att";
202 static const char intel_flavor
[] = "intel";
203 static const char *valid_flavors
[] =
209 static const char *disassembly_flavor
= att_flavor
;
212 /* Use the program counter to determine the contents and size of a
213 breakpoint instruction. Return a pointer to a string of bytes that
214 encode a breakpoint instruction, store the length of the string in
215 *LEN and optionally adjust *PC to point to the correct memory
216 location for inserting the breakpoint.
218 On the i386 we have a single breakpoint that fits in a single byte
219 and can be inserted anywhere.
221 This function is 64-bit safe. */
223 static const unsigned char *
224 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
226 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
228 *len
= sizeof (break_insn
);
232 #ifdef I386_REGNO_TO_SYMMETRY
233 #error "The Sequent Symmetry is no longer supported."
236 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
237 and %esp "belong" to the calling function. Therefore these
238 registers should be saved if they're going to be modified. */
240 /* The maximum number of saved registers. This should include all
241 registers mentioned above, and %eip. */
242 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
244 struct i386_frame_cache
251 /* Saved registers. */
252 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
256 /* Stack space reserved for local variables. */
260 /* Allocate and initialize a frame cache. */
262 static struct i386_frame_cache
*
263 i386_alloc_frame_cache (void)
265 struct i386_frame_cache
*cache
;
268 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
272 cache
->sp_offset
= -4;
275 /* Saved registers. We initialize these to -1 since zero is a valid
276 offset (that's where %ebp is supposed to be stored). */
277 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
278 cache
->saved_regs
[i
] = -1;
280 cache
->pc_in_eax
= 0;
282 /* Frameless until proven otherwise. */
288 /* If the instruction at PC is a jump, return the address of its
289 target. Otherwise, return PC. */
292 i386_follow_jump (CORE_ADDR pc
)
298 op
= read_memory_unsigned_integer (pc
, 1);
302 op
= read_memory_unsigned_integer (pc
+ 1, 1);
308 /* Relative jump: if data16 == 0, disp32, else disp16. */
311 delta
= read_memory_integer (pc
+ 2, 2);
313 /* Include the size of the jmp instruction (including the
319 delta
= read_memory_integer (pc
+ 1, 4);
321 /* Include the size of the jmp instruction. */
326 /* Relative jump, disp8 (ignore data16). */
327 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
336 /* Check whether PC points at a prologue for a function returning a
337 structure or union. If so, it updates CACHE and returns the
338 address of the first instruction after the code sequence that
339 removes the "hidden" argument from the stack or CURRENT_PC,
340 whichever is smaller. Otherwise, return PC. */
343 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
344 struct i386_frame_cache
*cache
)
346 /* Functions that return a structure or union start with:
349 xchgl %eax, (%esp) 0x87 0x04 0x24
350 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
352 (the System V compiler puts out the second `xchg' instruction,
353 and the assembler doesn't try to optimize it, so the 'sib' form
354 gets generated). This sequence is used to get the address of the
355 return buffer for a function that returns a structure. */
356 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
357 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
358 unsigned char buf
[4];
361 if (current_pc
<= pc
)
364 op
= read_memory_unsigned_integer (pc
, 1);
366 if (op
!= 0x58) /* popl %eax */
369 read_memory (pc
+ 1, buf
, 4);
370 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
373 if (current_pc
== pc
)
375 cache
->sp_offset
+= 4;
379 if (current_pc
== pc
+ 1)
381 cache
->pc_in_eax
= 1;
385 if (buf
[1] == proto1
[1])
392 i386_skip_probe (CORE_ADDR pc
)
394 /* A function may start with
405 unsigned char buf
[8];
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
== 0x68 || op
== 0x6a)
414 /* Skip past the `pushl' instruction; it has either a one-byte or a
415 four-byte operand, depending on the opcode. */
421 /* Read the following 8 bytes, which should be `call _probe' (6
422 bytes) followed by `addl $4,%esp' (2 bytes). */
423 read_memory (pc
+ delta
, buf
, sizeof (buf
));
424 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
425 pc
+= delta
+ sizeof (buf
);
431 /* Check whether PC points at a code that sets up a new stack frame.
432 If so, it updates CACHE and returns the address of the first
433 instruction after the sequence that sets removes the "hidden"
434 argument from the stack or CURRENT_PC, whichever is smaller.
435 Otherwise, return PC. */
438 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
439 struct i386_frame_cache
*cache
)
443 if (current_pc
<= pc
)
446 op
= read_memory_unsigned_integer (pc
, 1);
448 if (op
== 0x55) /* pushl %ebp */
450 /* Take into account that we've executed the `pushl %ebp' that
451 starts this instruction sequence. */
452 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
453 cache
->sp_offset
+= 4;
455 /* If that's all, return now. */
456 if (current_pc
<= pc
+ 1)
459 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
460 op
= read_memory_unsigned_integer (pc
+ 1, 1);
464 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xec)
468 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xe5)
475 /* OK, we actually have a frame. We just don't know how large it is
476 yet. Set its size to zero. We'll adjust it if necessary. */
479 /* If that's all, return now. */
480 if (current_pc
<= pc
+ 3)
483 /* Check for stack adjustment
487 NOTE: You can't subtract a 16 bit immediate from a 32 bit
488 reg, so we don't have to worry about a data16 prefix. */
489 op
= read_memory_unsigned_integer (pc
+ 3, 1);
492 /* `subl' with 8 bit immediate. */
493 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
494 /* Some instruction starting with 0x83 other than `subl'. */
497 /* `subl' with signed byte immediate (though it wouldn't make
498 sense to be negative). */
499 cache
->locals
= read_memory_integer (pc
+ 5, 1);
504 /* Maybe it is `subl' with a 32 bit immedediate. */
505 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
506 /* Some instruction starting with 0x81 other than `subl'. */
509 /* It is `subl' with a 32 bit immediate. */
510 cache
->locals
= read_memory_integer (pc
+ 5, 4);
515 /* Some instruction other than `subl'. */
519 else if (op
== 0xc8) /* enter $XXX */
521 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
528 /* Check whether PC points at code that saves registers on the stack.
529 If so, it updates CACHE and returns the address of the first
530 instruction after the register saves or CURRENT_PC, whichever is
531 smaller. Otherwise, return PC. */
534 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
535 struct i386_frame_cache
*cache
)
537 if (cache
->locals
>= 0)
543 offset
= - 4 - cache
->locals
;
544 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
546 op
= read_memory_unsigned_integer (pc
, 1);
547 if (op
< 0x50 || op
> 0x57)
550 cache
->saved_regs
[op
- 0x50] = offset
;
559 /* Do a full analysis of the prologue at PC and update CACHE
560 accordingly. Bail out early if CURRENT_PC is reached. Return the
561 address where the analysis stopped.
563 We handle these cases:
565 The startup sequence can be at the start of the function, or the
566 function can start with a branch to startup code at the end.
568 %ebp can be set up with either the 'enter' instruction, or "pushl
569 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
570 once used in the System V compiler).
572 Local space is allocated just below the saved %ebp by either the
573 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
574 bit unsigned argument for space to allocate, and the 'addl'
575 instruction could have either a signed byte, or 32 bit immediate.
577 Next, the registers used by this function are pushed. With the
578 System V compiler they will always be in the order: %edi, %esi,
579 %ebx (and sometimes a harmless bug causes it to also save but not
580 restore %eax); however, the code below is willing to see the pushes
581 in any order, and will handle up to 8 of them.
583 If the setup sequence is at the end of the function, then the next
584 instruction will be a branch back to the start. */
587 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
588 struct i386_frame_cache
*cache
)
590 pc
= i386_follow_jump (pc
);
591 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
592 pc
= i386_skip_probe (pc
);
593 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
594 return i386_analyze_register_saves (pc
, current_pc
, cache
);
597 /* Return PC of first real instruction. */
600 i386_skip_prologue (CORE_ADDR start_pc
)
602 static unsigned char pic_pat
[6] =
604 0xe8, 0, 0, 0, 0, /* call 0x0 */
605 0x5b, /* popl %ebx */
607 struct i386_frame_cache cache
;
613 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
614 if (cache
.locals
< 0)
617 /* Found valid frame setup. */
619 /* The native cc on SVR4 in -K PIC mode inserts the following code
620 to get the address of the global offset table (GOT) into register
625 movl %ebx,x(%ebp) (optional)
628 This code is with the rest of the prologue (at the end of the
629 function), so we have to skip it to get to the first real
630 instruction at the start of the function. */
632 for (i
= 0; i
< 6; i
++)
634 op
= read_memory_unsigned_integer (pc
+ i
, 1);
635 if (pic_pat
[i
] != op
)
642 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
644 if (op
== 0x89) /* movl %ebx, x(%ebp) */
646 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
648 if (op
== 0x5d) /* One byte offset from %ebp. */
650 else if (op
== 0x9d) /* Four byte offset from %ebp. */
652 else /* Unexpected instruction. */
655 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
659 if (delta
> 0 && op
== 0x81
660 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
666 return i386_follow_jump (pc
);
669 /* This function is 64-bit safe. */
672 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
676 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
677 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
683 static struct i386_frame_cache
*
684 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
686 struct i386_frame_cache
*cache
;
693 cache
= i386_alloc_frame_cache ();
696 /* In principle, for normal frames, %ebp holds the frame pointer,
697 which holds the base address for the current stack frame.
698 However, for functions that don't need it, the frame pointer is
699 optional. For these "frameless" functions the frame pointer is
700 actually the frame pointer of the calling frame. Signal
701 trampolines are just a special case of a "frameless" function.
702 They (usually) share their frame pointer with the frame that was
703 in progress when the signal occurred. */
705 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
706 cache
->base
= extract_unsigned_integer (buf
, 4);
707 if (cache
->base
== 0)
710 /* For normal frames, %eip is stored at 4(%ebp). */
711 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
713 cache
->pc
= frame_func_unwind (next_frame
);
715 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
717 if (cache
->locals
< 0)
719 /* We didn't find a valid frame, which means that CACHE->base
720 currently holds the frame pointer for our calling frame. If
721 we're at the start of a function, or somewhere half-way its
722 prologue, the function's frame probably hasn't been fully
723 setup yet. Try to reconstruct the base address for the stack
724 frame by looking at the stack pointer. For truly "frameless"
725 functions this might work too. */
727 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
728 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
731 /* Now that we have the base address for the stack frame we can
732 calculate the value of %esp in the calling frame. */
733 cache
->saved_sp
= cache
->base
+ 8;
735 /* Adjust all the saved registers such that they contain addresses
736 instead of offsets. */
737 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
738 if (cache
->saved_regs
[i
] != -1)
739 cache
->saved_regs
[i
] += cache
->base
;
745 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
746 struct frame_id
*this_id
)
748 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
750 /* This marks the outermost frame. */
751 if (cache
->base
== 0)
754 /* See the end of i386_push_dummy_call. */
755 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
759 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
760 int regnum
, int *optimizedp
,
761 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
762 int *realnump
, void *valuep
)
764 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
766 gdb_assert (regnum
>= 0);
768 /* The System V ABI says that:
770 "The flags register contains the system flags, such as the
771 direction flag and the carry flag. The direction flag must be
772 set to the forward (that is, zero) direction before entry and
773 upon exit from a function. Other user flags have no specified
774 role in the standard calling sequence and are not preserved."
776 To guarantee the "upon exit" part of that statement we fake a
777 saved flags register that has its direction flag cleared.
779 Note that GCC doesn't seem to rely on the fact that the direction
780 flag is cleared after a function return; it always explicitly
781 clears the flag before operations where it matters.
783 FIXME: kettenis/20030316: I'm not quite sure whether this is the
784 right thing to do. The way we fake the flags register here makes
785 it impossible to change it. */
787 if (regnum
== I386_EFLAGS_REGNUM
)
797 /* Clear the direction flag. */
798 frame_unwind_unsigned_register (next_frame
, PS_REGNUM
, &val
);
800 store_unsigned_integer (valuep
, 4, val
);
806 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
808 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
809 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
813 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
821 /* Store the value. */
822 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
827 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
830 *lvalp
= lval_memory
;
831 *addrp
= cache
->saved_regs
[regnum
];
835 /* Read the value in from memory. */
836 read_memory (*addrp
, valuep
,
837 register_size (current_gdbarch
, regnum
));
842 frame_register_unwind (next_frame
, regnum
,
843 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
846 static const struct frame_unwind i386_frame_unwind
=
850 i386_frame_prev_register
853 static const struct frame_unwind
*
854 i386_frame_sniffer (struct frame_info
*next_frame
)
856 return &i386_frame_unwind
;
860 /* Signal trampolines. */
862 static struct i386_frame_cache
*
863 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
865 struct i386_frame_cache
*cache
;
866 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
873 cache
= i386_alloc_frame_cache ();
875 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
876 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
878 addr
= tdep
->sigcontext_addr (next_frame
);
879 if (tdep
->sc_reg_offset
)
883 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
885 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
886 if (tdep
->sc_reg_offset
[i
] != -1)
887 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
891 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
892 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
900 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
901 struct frame_id
*this_id
)
903 struct i386_frame_cache
*cache
=
904 i386_sigtramp_frame_cache (next_frame
, this_cache
);
906 /* See the end of i386_push_dummy_call. */
907 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
911 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
913 int regnum
, int *optimizedp
,
914 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
915 int *realnump
, void *valuep
)
917 /* Make sure we've initialized the cache. */
918 i386_sigtramp_frame_cache (next_frame
, this_cache
);
920 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
921 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
924 static const struct frame_unwind i386_sigtramp_frame_unwind
=
927 i386_sigtramp_frame_this_id
,
928 i386_sigtramp_frame_prev_register
931 static const struct frame_unwind
*
932 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
934 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
937 /* We shouldn't even bother to try if the OSABI didn't register
938 a sigcontext_addr handler. */
939 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
942 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
943 if (PC_IN_SIGTRAMP (pc
, name
))
944 return &i386_sigtramp_frame_unwind
;
951 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
953 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
958 static const struct frame_base i386_frame_base
=
961 i386_frame_base_address
,
962 i386_frame_base_address
,
963 i386_frame_base_address
966 static struct frame_id
967 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
972 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
973 fp
= extract_unsigned_integer (buf
, 4);
975 /* See the end of i386_push_dummy_call. */
976 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
980 /* Figure out where the longjmp will land. Slurp the args out of the
981 stack. We expect the first arg to be a pointer to the jmp_buf
982 structure from which we extract the address that we will land at.
983 This address is copied into PC. This routine returns non-zero on
986 This function is 64-bit safe. */
989 i386_get_longjmp_target (CORE_ADDR
*pc
)
992 CORE_ADDR sp
, jb_addr
;
993 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
994 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
996 /* If JB_PC_OFFSET is -1, we have no way to find out where the
997 longjmp will land. */
998 if (jb_pc_offset
== -1)
1001 sp
= read_register (SP_REGNUM
);
1002 if (target_read_memory (sp
+ len
, buf
, len
))
1005 jb_addr
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1006 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1009 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1015 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1016 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1017 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1018 CORE_ADDR struct_addr
)
1023 /* Push arguments in reverse order. */
1024 for (i
= nargs
- 1; i
>= 0; i
--)
1026 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1028 /* The System V ABI says that:
1030 "An argument's size is increased, if necessary, to make it a
1031 multiple of [32-bit] words. This may require tail padding,
1032 depending on the size of the argument."
1034 This makes sure the stack says word-aligned. */
1035 sp
-= (len
+ 3) & ~3;
1036 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1039 /* Push value address. */
1043 store_unsigned_integer (buf
, 4, struct_addr
);
1044 write_memory (sp
, buf
, 4);
1047 /* Store return address. */
1049 store_unsigned_integer (buf
, 4, bp_addr
);
1050 write_memory (sp
, buf
, 4);
1052 /* Finally, update the stack pointer... */
1053 store_unsigned_integer (buf
, 4, sp
);
1054 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1056 /* ...and fake a frame pointer. */
1057 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1059 /* MarkK wrote: This "+ 8" is all over the place:
1060 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1061 i386_unwind_dummy_id). It's there, since all frame unwinders for
1062 a given target have to agree (within a certain margin) on the
1063 defenition of the stack address of a frame. Otherwise
1064 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1065 stack address *before* the function call as a frame's CFA. On
1066 the i386, when %ebp is used as a frame pointer, the offset
1067 between the contents %ebp and the CFA as defined by GCC. */
1071 /* These registers are used for returning integers (and on some
1072 targets also for returning `struct' and `union' values when their
1073 size and alignment match an integer type). */
1074 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1075 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1077 /* Extract from an array REGBUF containing the (raw) register state, a
1078 function return value of TYPE, and copy that, in virtual format,
1082 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1085 bfd_byte
*valbuf
= dst
;
1086 int len
= TYPE_LENGTH (type
);
1087 char buf
[I386_MAX_REGISTER_SIZE
];
1089 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1090 && TYPE_NFIELDS (type
) == 1)
1092 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1096 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1100 warning ("Cannot find floating-point return value.");
1101 memset (valbuf
, 0, len
);
1105 /* Floating-point return values can be found in %st(0). Convert
1106 its contents to the desired type. This is probably not
1107 exactly how it would happen on the target itself, but it is
1108 the best we can do. */
1109 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1110 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1114 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1115 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1117 if (len
<= low_size
)
1119 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1120 memcpy (valbuf
, buf
, len
);
1122 else if (len
<= (low_size
+ high_size
))
1124 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1125 memcpy (valbuf
, buf
, low_size
);
1126 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1127 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1130 internal_error (__FILE__
, __LINE__
,
1131 "Cannot extract return value of %d bytes long.", len
);
1135 /* Write into the appropriate registers a function return value stored
1136 in VALBUF of type TYPE, given in virtual format. */
1139 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1142 int len
= TYPE_LENGTH (type
);
1144 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1145 && TYPE_NFIELDS (type
) == 1)
1147 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1151 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1154 char buf
[FPU_REG_RAW_SIZE
];
1158 warning ("Cannot set floating-point return value.");
1162 /* Returning floating-point values is a bit tricky. Apart from
1163 storing the return value in %st(0), we have to simulate the
1164 state of the FPU at function return point. */
1166 /* Convert the value found in VALBUF to the extended
1167 floating-point format used by the FPU. This is probably
1168 not exactly how it would happen on the target itself, but
1169 it is the best we can do. */
1170 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1171 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1173 /* Set the top of the floating-point register stack to 7. The
1174 actual value doesn't really matter, but 7 is what a normal
1175 function return would end up with if the program started out
1176 with a freshly initialized FPU. */
1177 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1179 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1181 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1182 the floating-point register stack to 7, the appropriate value
1183 for the tag word is 0x3fff. */
1184 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1188 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1189 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1191 if (len
<= low_size
)
1192 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1193 else if (len
<= (low_size
+ high_size
))
1195 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1196 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1197 len
- low_size
, (char *) valbuf
+ low_size
);
1200 internal_error (__FILE__
, __LINE__
,
1201 "Cannot store return value of %d bytes long.", len
);
1205 /* Extract from REGCACHE, which contains the (raw) register state, the
1206 address in which a function should return its structure value, as a
1210 i386_extract_struct_value_address (struct regcache
*regcache
)
1214 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1215 return extract_unsigned_integer (buf
, 4);
1219 /* This is the variable that is set with "set struct-convention", and
1220 its legitimate values. */
1221 static const char default_struct_convention
[] = "default";
1222 static const char pcc_struct_convention
[] = "pcc";
1223 static const char reg_struct_convention
[] = "reg";
1224 static const char *valid_conventions
[] =
1226 default_struct_convention
,
1227 pcc_struct_convention
,
1228 reg_struct_convention
,
1231 static const char *struct_convention
= default_struct_convention
;
1234 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1236 enum struct_return struct_return
;
1238 if (struct_convention
== default_struct_convention
)
1239 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1240 else if (struct_convention
== pcc_struct_convention
)
1241 struct_return
= pcc_struct_return
;
1243 struct_return
= reg_struct_return
;
1245 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1250 /* Return the GDB type object for the "standard" data type of data in
1251 register REGNUM. Perhaps %esi and %edi should go here, but
1252 potentially they could be used for things other than address. */
1254 static struct type
*
1255 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1257 if (regnum
== I386_EIP_REGNUM
1258 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1259 return lookup_pointer_type (builtin_type_void
);
1261 if (i386_fp_regnum_p (regnum
))
1262 return builtin_type_i387_ext
;
1264 if (i386_sse_regnum_p (regnum
))
1265 return builtin_type_vec128i
;
1267 if (i386_mmx_regnum_p (regnum
))
1268 return builtin_type_vec64i
;
1270 return builtin_type_int
;
1273 /* Map a cooked register onto a raw register or memory. For the i386,
1274 the MMX registers need to be mapped onto floating point registers. */
1277 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1284 mmxi
= regnum
- MM0_REGNUM
;
1285 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1286 tos
= (fstat
>> 11) & 0x7;
1287 fpi
= (mmxi
+ tos
) % 8;
1289 return (FP0_REGNUM
+ fpi
);
1293 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1294 int regnum
, void *buf
)
1296 if (i386_mmx_regnum_p (regnum
))
1298 char mmx_buf
[MAX_REGISTER_SIZE
];
1299 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1301 /* Extract (always little endian). */
1302 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1303 memcpy (buf
, mmx_buf
, REGISTER_RAW_SIZE (regnum
));
1306 regcache_raw_read (regcache
, regnum
, buf
);
1310 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1311 int regnum
, const void *buf
)
1313 if (i386_mmx_regnum_p (regnum
))
1315 char mmx_buf
[MAX_REGISTER_SIZE
];
1316 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1319 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1320 /* ... Modify ... (always little endian). */
1321 memcpy (mmx_buf
, buf
, REGISTER_RAW_SIZE (regnum
));
1323 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1326 regcache_raw_write (regcache
, regnum
, buf
);
1330 /* These registers don't have pervasive standard uses. Move them to
1331 i386-tdep.h if necessary. */
1333 #define I386_EBX_REGNUM 3 /* %ebx */
1334 #define I386_ECX_REGNUM 1 /* %ecx */
1335 #define I386_ESI_REGNUM 6 /* %esi */
1336 #define I386_EDI_REGNUM 7 /* %edi */
1338 /* Return the register number of the register allocated by GCC after
1339 REGNUM, or -1 if there is no such register. */
1342 i386_next_regnum (int regnum
)
1344 /* GCC allocates the registers in the order:
1346 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1348 Since storing a variable in %esp doesn't make any sense we return
1349 -1 for %ebp and for %esp itself. */
1350 static int next_regnum
[] =
1352 I386_EDX_REGNUM
, /* Slot for %eax. */
1353 I386_EBX_REGNUM
, /* Slot for %ecx. */
1354 I386_ECX_REGNUM
, /* Slot for %edx. */
1355 I386_ESI_REGNUM
, /* Slot for %ebx. */
1356 -1, -1, /* Slots for %esp and %ebp. */
1357 I386_EDI_REGNUM
, /* Slot for %esi. */
1358 I386_EBP_REGNUM
/* Slot for %edi. */
1361 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1362 return next_regnum
[regnum
];
1367 /* Return nonzero if a value of type TYPE stored in register REGNUM
1368 needs any special handling. */
1371 i386_convert_register_p (int regnum
, struct type
*type
)
1373 int len
= TYPE_LENGTH (type
);
1375 /* Values may be spread across multiple registers. Most debugging
1376 formats aren't expressive enough to specify the locations, so
1377 some heuristics is involved. Right now we only handle types that
1378 have a length that is a multiple of the word size, since GCC
1379 doesn't seem to put any other types into registers. */
1380 if (len
> 4 && len
% 4 == 0)
1382 int last_regnum
= regnum
;
1386 last_regnum
= i386_next_regnum (last_regnum
);
1390 if (last_regnum
!= -1)
1394 return i386_fp_regnum_p (regnum
);
1397 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1398 return its contents in TO. */
1401 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1402 struct type
*type
, void *to
)
1404 int len
= TYPE_LENGTH (type
);
1407 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1408 available in FRAME (i.e. if it wasn't saved)? */
1410 if (i386_fp_regnum_p (regnum
))
1412 i387_register_to_value (frame
, regnum
, type
, to
);
1416 /* Read a value spread accross multiple registers. */
1418 gdb_assert (len
> 4 && len
% 4 == 0);
1422 gdb_assert (regnum
!= -1);
1423 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1425 frame_read_register (frame
, regnum
, buf
);
1426 regnum
= i386_next_regnum (regnum
);
1432 /* Write the contents FROM of a value of type TYPE into register
1433 REGNUM in frame FRAME. */
1436 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1437 struct type
*type
, const void *from
)
1439 int len
= TYPE_LENGTH (type
);
1440 const char *buf
= from
;
1442 if (i386_fp_regnum_p (regnum
))
1444 i387_value_to_register (frame
, regnum
, type
, from
);
1448 /* Write a value spread accross multiple registers. */
1450 gdb_assert (len
> 4 && len
% 4 == 0);
1454 gdb_assert (regnum
!= -1);
1455 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1457 put_frame_register (frame
, regnum
, buf
);
1458 regnum
= i386_next_regnum (regnum
);
1466 #ifdef STATIC_TRANSFORM_NAME
1467 /* SunPRO encodes the static variables. This is not related to C++
1468 mangling, it is done for C too. */
1471 sunpro_static_transform_name (char *name
)
1474 if (IS_STATIC_TRANSFORM_NAME (name
))
1476 /* For file-local statics there will be a period, a bunch of
1477 junk (the contents of which match a string given in the
1478 N_OPT), a period and the name. For function-local statics
1479 there will be a bunch of junk (which seems to change the
1480 second character from 'A' to 'B'), a period, the name of the
1481 function, and the name. So just skip everything before the
1483 p
= strrchr (name
, '.');
1489 #endif /* STATIC_TRANSFORM_NAME */
1492 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1495 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1497 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1499 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1500 struct minimal_symbol
*indsym
=
1501 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1502 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1506 if (strncmp (symname
, "__imp_", 6) == 0
1507 || strncmp (symname
, "_imp_", 5) == 0)
1508 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1511 return 0; /* Not a trampoline. */
1515 /* Return non-zero if PC and NAME show that we are in a signal
1519 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1521 return (name
&& strcmp ("_sigtramp", name
) == 0);
1525 /* We have two flavours of disassembly. The machinery on this page
1526 deals with switching between those. */
1529 i386_print_insn (bfd_vma pc
, disassemble_info
*info
)
1531 gdb_assert (disassembly_flavor
== att_flavor
1532 || disassembly_flavor
== intel_flavor
);
1534 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1535 constified, cast to prevent a compiler warning. */
1536 info
->disassembler_options
= (char *) disassembly_flavor
;
1537 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1539 return print_insn_i386 (pc
, info
);
1543 /* There are a few i386 architecture variants that differ only
1544 slightly from the generic i386 target. For now, we don't give them
1545 their own source file, but include them here. As a consequence,
1546 they'll always be included. */
1548 /* System V Release 4 (SVR4). */
1551 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1553 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1554 currently unknown. */
1555 return (name
&& (strcmp ("_sigreturn", name
) == 0
1556 || strcmp ("_sigacthandler", name
) == 0
1557 || strcmp ("sigvechandler", name
) == 0));
1560 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1561 routine, return the address of the associated sigcontext (ucontext)
1565 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1570 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1571 sp
= extract_unsigned_integer (buf
, 4);
1573 return read_memory_unsigned_integer (sp
+ 8, 4);
1580 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1582 /* DJGPP doesn't have any special frames for signal handlers. */
1590 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1592 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1593 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1596 /* System V Release 4 (SVR4). */
1599 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1601 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1603 /* System V Release 4 uses ELF. */
1604 i386_elf_init_abi (info
, gdbarch
);
1606 /* System V Release 4 has shared libraries. */
1607 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1608 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1610 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1611 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1612 tdep
->sc_pc_offset
= 36 + 14 * 4;
1613 tdep
->sc_sp_offset
= 36 + 17 * 4;
1615 tdep
->jb_pc_offset
= 20;
1621 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1623 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1625 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1627 tdep
->jb_pc_offset
= 36;
1633 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1635 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1637 tdep
->jb_pc_offset
= 24;
1641 /* i386 register groups. In addition to the normal groups, add "mmx"
1644 static struct reggroup
*i386_sse_reggroup
;
1645 static struct reggroup
*i386_mmx_reggroup
;
1648 i386_init_reggroups (void)
1650 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1651 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1655 i386_add_reggroups (struct gdbarch
*gdbarch
)
1657 reggroup_add (gdbarch
, i386_sse_reggroup
);
1658 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1659 reggroup_add (gdbarch
, general_reggroup
);
1660 reggroup_add (gdbarch
, float_reggroup
);
1661 reggroup_add (gdbarch
, all_reggroup
);
1662 reggroup_add (gdbarch
, save_reggroup
);
1663 reggroup_add (gdbarch
, restore_reggroup
);
1664 reggroup_add (gdbarch
, vector_reggroup
);
1665 reggroup_add (gdbarch
, system_reggroup
);
1669 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1670 struct reggroup
*group
)
1672 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1673 || i386_mxcsr_regnum_p (regnum
));
1674 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1675 || i386_fpc_regnum_p (regnum
));
1676 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1678 if (group
== i386_mmx_reggroup
)
1679 return mmx_regnum_p
;
1680 if (group
== i386_sse_reggroup
)
1681 return sse_regnum_p
;
1682 if (group
== vector_reggroup
)
1683 return (mmx_regnum_p
|| sse_regnum_p
);
1684 if (group
== float_reggroup
)
1686 if (group
== general_reggroup
)
1687 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1689 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1693 /* Get the ith function argument for the current function. */
1695 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1699 frame_read_register (frame
, SP_REGNUM
, &stack
);
1700 return read_memory_unsigned_integer (stack
+ (4 * (argi
+ 1)), 4);
1704 static struct gdbarch
*
1705 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1707 struct gdbarch_tdep
*tdep
;
1708 struct gdbarch
*gdbarch
;
1710 /* If there is already a candidate, use it. */
1711 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1713 return arches
->gdbarch
;
1715 /* Allocate space for the new architecture. */
1716 tdep
= XMALLOC (struct gdbarch_tdep
);
1717 gdbarch
= gdbarch_alloc (&info
, tdep
);
1719 /* The i386 default settings don't include the SSE registers.
1720 FIXME: kettenis/20020614: They do include the FPU registers for
1721 now, which probably is not quite right. */
1722 tdep
->num_xmm_regs
= 0;
1724 tdep
->jb_pc_offset
= -1;
1725 tdep
->struct_return
= pcc_struct_return
;
1726 tdep
->sigtramp_start
= 0;
1727 tdep
->sigtramp_end
= 0;
1728 tdep
->sigcontext_addr
= NULL
;
1729 tdep
->sc_reg_offset
= NULL
;
1730 tdep
->sc_pc_offset
= -1;
1731 tdep
->sc_sp_offset
= -1;
1733 /* The format used for `long double' on almost all i386 targets is
1734 the i387 extended floating-point format. In fact, of all targets
1735 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1736 on having a `long double' that's not `long' at all. */
1737 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1739 /* Although the i387 extended floating-point has only 80 significant
1740 bits, a `long double' actually takes up 96, probably to enforce
1742 set_gdbarch_long_double_bit (gdbarch
, 96);
1744 /* The default ABI includes general-purpose registers and
1745 floating-point registers. */
1746 set_gdbarch_num_regs (gdbarch
, I386_NUM_GREGS
+ I386_NUM_FREGS
);
1747 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1748 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1750 /* Register numbers of various important registers. */
1751 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1752 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1753 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1754 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1756 /* Use the "default" register numbering scheme for stabs and COFF. */
1757 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1758 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1760 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1761 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1762 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1764 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1765 be in use on any of the supported i386 targets. */
1767 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1769 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1771 /* Call dummy code. */
1772 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1774 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1775 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1776 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1778 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1779 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1780 set_gdbarch_extract_struct_value_address (gdbarch
,
1781 i386_extract_struct_value_address
);
1782 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1784 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1786 /* Stack grows downward. */
1787 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1789 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1790 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1791 set_gdbarch_function_start_offset (gdbarch
, 0);
1793 set_gdbarch_frame_args_skip (gdbarch
, 8);
1794 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1796 /* Wire in the MMX registers. */
1797 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1798 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1799 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1801 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1803 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1805 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1807 /* Add the i386 register groups. */
1808 i386_add_reggroups (gdbarch
);
1809 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1811 /* Helper for function argument information. */
1812 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1814 /* Hook in the DWARF CFI frame unwinder. */
1815 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1816 set_gdbarch_dwarf2_build_frame_info (gdbarch
, dwarf2_build_frame_info
);
1818 frame_base_set_default (gdbarch
, &i386_frame_base
);
1820 /* Hook in ABI-specific overrides, if they have been registered. */
1821 gdbarch_init_osabi (info
, gdbarch
);
1823 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
1824 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
1829 static enum gdb_osabi
1830 i386_coff_osabi_sniffer (bfd
*abfd
)
1832 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1833 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1834 return GDB_OSABI_GO32
;
1836 return GDB_OSABI_UNKNOWN
;
1839 static enum gdb_osabi
1840 i386_nlm_osabi_sniffer (bfd
*abfd
)
1842 return GDB_OSABI_NETWARE
;
1846 /* Provide a prototype to silence -Wmissing-prototypes. */
1847 void _initialize_i386_tdep (void);
1850 _initialize_i386_tdep (void)
1852 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1854 /* Add the variable that controls the disassembly flavor. */
1856 struct cmd_list_element
*new_cmd
;
1858 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1860 &disassembly_flavor
,
1862 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1863 and the default value is \"att\".",
1865 add_show_from_set (new_cmd
, &showlist
);
1868 /* Add the variable that controls the convention for returning
1871 struct cmd_list_element
*new_cmd
;
1873 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1875 &struct_convention
, "\
1876 Set the convention for returning small structs, valid values \
1877 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1879 add_show_from_set (new_cmd
, &showlist
);
1882 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1883 i386_coff_osabi_sniffer
);
1884 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1885 i386_nlm_osabi_sniffer
);
1887 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1888 i386_svr4_init_abi
);
1889 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1890 i386_go32_init_abi
);
1891 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1894 /* Initialize the i386 specific register groups. */
1895 i386_init_reggroups ();