1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
54 /* Names of the registers. The first 10 registers match the register
55 numbering scheme used by GCC for stabs and DWARF. */
57 static char *i386_register_names
[] =
59 "eax", "ecx", "edx", "ebx",
60 "esp", "ebp", "esi", "edi",
61 "eip", "eflags", "cs", "ss",
62 "ds", "es", "fs", "gs",
63 "st0", "st1", "st2", "st3",
64 "st4", "st5", "st6", "st7",
65 "fctrl", "fstat", "ftag", "fiseg",
66 "fioff", "foseg", "fooff", "fop",
67 "xmm0", "xmm1", "xmm2", "xmm3",
68 "xmm4", "xmm5", "xmm6", "xmm7",
72 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
76 static char *i386_mmx_names
[] =
78 "mm0", "mm1", "mm2", "mm3",
79 "mm4", "mm5", "mm6", "mm7"
82 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
85 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
87 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
92 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
98 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
100 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
102 #define I387_ST0_REGNUM tdep->st0_regnum
103 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
105 if (I387_NUM_XMM_REGS
== 0)
108 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
110 #undef I387_ST0_REGNUM
111 #undef I387_NUM_XMM_REGS
115 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
117 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
119 #define I387_ST0_REGNUM tdep->st0_regnum
120 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
122 if (I387_NUM_XMM_REGS
== 0)
125 return (regnum
== I387_MXCSR_REGNUM
);
127 #undef I387_ST0_REGNUM
128 #undef I387_NUM_XMM_REGS
131 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
132 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
133 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
138 i386_fp_regnum_p (int regnum
)
140 if (I387_ST0_REGNUM
< 0)
143 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
147 i386_fpc_regnum_p (int regnum
)
149 if (I387_ST0_REGNUM
< 0)
152 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
155 /* Return the name of register REG. */
158 i386_register_name (int reg
)
160 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
161 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
163 if (reg
>= 0 && reg
< i386_num_register_names
)
164 return i386_register_names
[reg
];
170 /* FIXME: jimb/2004-04-01: I don't think these functions are right.
171 For a given platform, GCC always uses the same register numbering
172 in both STABS and Dwarf2: gcc/dbxout.c and gcc/dwarf2out.c both use
173 the DBX_REGISTER_NUMBER macro, as defined by the config headers.
174 If you compile a program so that its variables are allocated to
175 floating-point registers, first with STABS and again with Dwarf 2,
176 you'll see that the variable's register numbers are the same in
179 GCC does use (at least) two different register numberings on the
180 i386; they differ in how they number %ebp, %esp, %eflags, and the
181 floating-point registers. And it has a third numbering for "64bit
182 mode", which I assume is x86_64. But it always uses a given
183 numbering in both STABS and Dwarf.
185 This does not match the arrangement we have below, which presumes
186 that STABS and Dwarf numberings are different, and does some
187 strange mixing and matching (e.g., registering the Dwarf 2 function
188 as the STABS function for "Generic i386 ELF") to get close enough
189 to the right effect on the platforms we care about.
191 If we wanted to match GCC, we should have two separate register
192 number translation functions (we handle x86_64 in a separate tdep
193 file altogether), one corresponding to each of GCC's i386 register
194 maps. And for a given platform, we would register one of them as
195 both the STABS and Dwarf 2 functions.
197 However, we don't aspire to match GCC; we aspire to match the
198 native system's tools. I don't have access to lots of different
199 native compilers and debuggers to verify that GCC is matching their
200 behavior in this regard. Is it sufficient to argue that we at
201 least want to match GNU's compiler, and say we'll fix bugs relative
202 to native tools as they're reported? */
205 /* Convert stabs register number REG to the appropriate register
206 number used by GDB. */
209 i386_stab_reg_to_regnum (int reg
)
211 /* This implements what GCC calls the "default" register map. */
212 if (reg
>= 0 && reg
<= 7)
214 /* General-purpose registers. The debug info calls %ebp
215 register 4, and %esp register 5. */
222 else if (reg
>= 12 && reg
<= 19)
224 /* Floating-point registers. */
225 return reg
- 12 + I387_ST0_REGNUM
;
227 else if (reg
>= 21 && reg
<= 28)
230 return reg
- 21 + I387_XMM0_REGNUM
;
232 else if (reg
>= 29 && reg
<= 36)
235 return reg
- 29 + I387_MM0_REGNUM
;
238 /* This will hopefully provoke a warning. */
239 return NUM_REGS
+ NUM_PSEUDO_REGS
;
242 /* Convert DWARF register number REG to the appropriate register
243 number used by GDB. */
246 i386_dwarf_reg_to_regnum (int reg
)
248 /* The DWARF register numbering includes %eip and %eflags, and
249 numbers the floating point registers differently. */
250 if (reg
>= 0 && reg
<= 9)
252 /* General-purpose registers. */
255 else if (reg
>= 11 && reg
<= 18)
257 /* Floating-point registers. */
258 return reg
- 11 + I387_ST0_REGNUM
;
262 /* The SSE and MMX registers have identical numbers as in stabs. */
263 return i386_stab_reg_to_regnum (reg
);
266 /* This will hopefully provoke a warning. */
267 return NUM_REGS
+ NUM_PSEUDO_REGS
;
270 #undef I387_ST0_REGNUM
271 #undef I387_MM0_REGNUM
272 #undef I387_NUM_XMM_REGS
275 /* This is the variable that is set with "set disassembly-flavor", and
276 its legitimate values. */
277 static const char att_flavor
[] = "att";
278 static const char intel_flavor
[] = "intel";
279 static const char *valid_flavors
[] =
285 static const char *disassembly_flavor
= att_flavor
;
288 /* Use the program counter to determine the contents and size of a
289 breakpoint instruction. Return a pointer to a string of bytes that
290 encode a breakpoint instruction, store the length of the string in
291 *LEN and optionally adjust *PC to point to the correct memory
292 location for inserting the breakpoint.
294 On the i386 we have a single breakpoint that fits in a single byte
295 and can be inserted anywhere.
297 This function is 64-bit safe. */
299 static const unsigned char *
300 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
302 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
304 *len
= sizeof (break_insn
);
308 #ifdef I386_REGNO_TO_SYMMETRY
309 #error "The Sequent Symmetry is no longer supported."
312 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
313 and %esp "belong" to the calling function. Therefore these
314 registers should be saved if they're going to be modified. */
316 /* The maximum number of saved registers. This should include all
317 registers mentioned above, and %eip. */
318 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
320 struct i386_frame_cache
327 /* Saved registers. */
328 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
332 /* Stack space reserved for local variables. */
336 /* Allocate and initialize a frame cache. */
338 static struct i386_frame_cache
*
339 i386_alloc_frame_cache (void)
341 struct i386_frame_cache
*cache
;
344 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
348 cache
->sp_offset
= -4;
351 /* Saved registers. We initialize these to -1 since zero is a valid
352 offset (that's where %ebp is supposed to be stored). */
353 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
354 cache
->saved_regs
[i
] = -1;
356 cache
->pc_in_eax
= 0;
358 /* Frameless until proven otherwise. */
364 /* If the instruction at PC is a jump, return the address of its
365 target. Otherwise, return PC. */
368 i386_follow_jump (CORE_ADDR pc
)
374 op
= read_memory_unsigned_integer (pc
, 1);
378 op
= read_memory_unsigned_integer (pc
+ 1, 1);
384 /* Relative jump: if data16 == 0, disp32, else disp16. */
387 delta
= read_memory_integer (pc
+ 2, 2);
389 /* Include the size of the jmp instruction (including the
395 delta
= read_memory_integer (pc
+ 1, 4);
397 /* Include the size of the jmp instruction. */
402 /* Relative jump, disp8 (ignore data16). */
403 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
412 /* Check whether PC points at a prologue for a function returning a
413 structure or union. If so, it updates CACHE and returns the
414 address of the first instruction after the code sequence that
415 removes the "hidden" argument from the stack or CURRENT_PC,
416 whichever is smaller. Otherwise, return PC. */
419 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
420 struct i386_frame_cache
*cache
)
422 /* Functions that return a structure or union start with:
425 xchgl %eax, (%esp) 0x87 0x04 0x24
426 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
428 (the System V compiler puts out the second `xchg' instruction,
429 and the assembler doesn't try to optimize it, so the 'sib' form
430 gets generated). This sequence is used to get the address of the
431 return buffer for a function that returns a structure. */
432 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
433 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
434 unsigned char buf
[4];
437 if (current_pc
<= pc
)
440 op
= read_memory_unsigned_integer (pc
, 1);
442 if (op
!= 0x58) /* popl %eax */
445 read_memory (pc
+ 1, buf
, 4);
446 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
449 if (current_pc
== pc
)
451 cache
->sp_offset
+= 4;
455 if (current_pc
== pc
+ 1)
457 cache
->pc_in_eax
= 1;
461 if (buf
[1] == proto1
[1])
468 i386_skip_probe (CORE_ADDR pc
)
470 /* A function may start with
481 unsigned char buf
[8];
484 op
= read_memory_unsigned_integer (pc
, 1);
486 if (op
== 0x68 || op
== 0x6a)
490 /* Skip past the `pushl' instruction; it has either a one-byte or a
491 four-byte operand, depending on the opcode. */
497 /* Read the following 8 bytes, which should be `call _probe' (6
498 bytes) followed by `addl $4,%esp' (2 bytes). */
499 read_memory (pc
+ delta
, buf
, sizeof (buf
));
500 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
501 pc
+= delta
+ sizeof (buf
);
507 /* Check whether PC points at a code that sets up a new stack frame.
508 If so, it updates CACHE and returns the address of the first
509 instruction after the sequence that sets removes the "hidden"
510 argument from the stack or CURRENT_PC, whichever is smaller.
511 Otherwise, return PC. */
514 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
515 struct i386_frame_cache
*cache
)
520 if (current_pc
<= pc
)
523 op
= read_memory_unsigned_integer (pc
, 1);
525 if (op
== 0x55) /* pushl %ebp */
527 /* Take into account that we've executed the `pushl %ebp' that
528 starts this instruction sequence. */
529 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
530 cache
->sp_offset
+= 4;
532 /* If that's all, return now. */
533 if (current_pc
<= pc
+ 1)
536 op
= read_memory_unsigned_integer (pc
+ 1, 1);
538 /* Check for some special instructions that might be migrated
539 by GCC into the prologue. We check for
553 Because of the symmetry, there are actually two ways to
554 encode these instructions; with opcode bytes 0x29 and 0x2b
555 for `subl' and opcode bytes 0x31 and 0x33 for `xorl'.
557 Make sure we only skip these instructions if we later see the
558 `movl %esp, %ebp' that actually sets up the frame. */
559 while (op
== 0x29 || op
== 0x2b || op
== 0x31 || op
== 0x33)
561 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
564 case 0xdb: /* %ebx */
565 case 0xc9: /* %ecx */
566 case 0xd2: /* %edx */
567 case 0xc0: /* %eax */
574 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
577 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
581 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
585 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
592 /* OK, we actually have a frame. We just don't know how large
593 it is yet. Set its size to zero. We'll adjust it if
594 necessary. We also now commit to skipping the special
595 instructions mentioned before. */
599 /* If that's all, return now. */
600 if (current_pc
<= pc
+ 3)
603 /* Check for stack adjustment
607 NOTE: You can't subtract a 16 bit immediate from a 32 bit
608 reg, so we don't have to worry about a data16 prefix. */
609 op
= read_memory_unsigned_integer (pc
+ 3, 1);
612 /* `subl' with 8 bit immediate. */
613 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
614 /* Some instruction starting with 0x83 other than `subl'. */
617 /* `subl' with signed byte immediate (though it wouldn't make
618 sense to be negative). */
619 cache
->locals
= read_memory_integer (pc
+ 5, 1);
624 /* Maybe it is `subl' with a 32 bit immedediate. */
625 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
626 /* Some instruction starting with 0x81 other than `subl'. */
629 /* It is `subl' with a 32 bit immediate. */
630 cache
->locals
= read_memory_integer (pc
+ 5, 4);
635 /* Some instruction other than `subl'. */
639 else if (op
== 0xc8) /* enter $XXX */
641 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
648 /* Check whether PC points at code that saves registers on the stack.
649 If so, it updates CACHE and returns the address of the first
650 instruction after the register saves or CURRENT_PC, whichever is
651 smaller. Otherwise, return PC. */
654 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
655 struct i386_frame_cache
*cache
)
657 CORE_ADDR offset
= 0;
661 if (cache
->locals
> 0)
662 offset
-= cache
->locals
;
663 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
665 op
= read_memory_unsigned_integer (pc
, 1);
666 if (op
< 0x50 || op
> 0x57)
670 cache
->saved_regs
[op
- 0x50] = offset
;
671 cache
->sp_offset
+= 4;
678 /* Do a full analysis of the prologue at PC and update CACHE
679 accordingly. Bail out early if CURRENT_PC is reached. Return the
680 address where the analysis stopped.
682 We handle these cases:
684 The startup sequence can be at the start of the function, or the
685 function can start with a branch to startup code at the end.
687 %ebp can be set up with either the 'enter' instruction, or "pushl
688 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
689 once used in the System V compiler).
691 Local space is allocated just below the saved %ebp by either the
692 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
693 bit unsigned argument for space to allocate, and the 'addl'
694 instruction could have either a signed byte, or 32 bit immediate.
696 Next, the registers used by this function are pushed. With the
697 System V compiler they will always be in the order: %edi, %esi,
698 %ebx (and sometimes a harmless bug causes it to also save but not
699 restore %eax); however, the code below is willing to see the pushes
700 in any order, and will handle up to 8 of them.
702 If the setup sequence is at the end of the function, then the next
703 instruction will be a branch back to the start. */
706 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
707 struct i386_frame_cache
*cache
)
709 pc
= i386_follow_jump (pc
);
710 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
711 pc
= i386_skip_probe (pc
);
712 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
713 return i386_analyze_register_saves (pc
, current_pc
, cache
);
716 /* Return PC of first real instruction. */
719 i386_skip_prologue (CORE_ADDR start_pc
)
721 static unsigned char pic_pat
[6] =
723 0xe8, 0, 0, 0, 0, /* call 0x0 */
724 0x5b, /* popl %ebx */
726 struct i386_frame_cache cache
;
732 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
733 if (cache
.locals
< 0)
736 /* Found valid frame setup. */
738 /* The native cc on SVR4 in -K PIC mode inserts the following code
739 to get the address of the global offset table (GOT) into register
744 movl %ebx,x(%ebp) (optional)
747 This code is with the rest of the prologue (at the end of the
748 function), so we have to skip it to get to the first real
749 instruction at the start of the function. */
751 for (i
= 0; i
< 6; i
++)
753 op
= read_memory_unsigned_integer (pc
+ i
, 1);
754 if (pic_pat
[i
] != op
)
761 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
763 if (op
== 0x89) /* movl %ebx, x(%ebp) */
765 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
767 if (op
== 0x5d) /* One byte offset from %ebp. */
769 else if (op
== 0x9d) /* Four byte offset from %ebp. */
771 else /* Unexpected instruction. */
774 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
778 if (delta
> 0 && op
== 0x81
779 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
785 return i386_follow_jump (pc
);
788 /* This function is 64-bit safe. */
791 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
795 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
796 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
802 static struct i386_frame_cache
*
803 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
805 struct i386_frame_cache
*cache
;
812 cache
= i386_alloc_frame_cache ();
815 /* In principle, for normal frames, %ebp holds the frame pointer,
816 which holds the base address for the current stack frame.
817 However, for functions that don't need it, the frame pointer is
818 optional. For these "frameless" functions the frame pointer is
819 actually the frame pointer of the calling frame. Signal
820 trampolines are just a special case of a "frameless" function.
821 They (usually) share their frame pointer with the frame that was
822 in progress when the signal occurred. */
824 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
825 cache
->base
= extract_unsigned_integer (buf
, 4);
826 if (cache
->base
== 0)
829 /* For normal frames, %eip is stored at 4(%ebp). */
830 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
832 cache
->pc
= frame_func_unwind (next_frame
);
834 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
836 if (cache
->locals
< 0)
838 /* We didn't find a valid frame, which means that CACHE->base
839 currently holds the frame pointer for our calling frame. If
840 we're at the start of a function, or somewhere half-way its
841 prologue, the function's frame probably hasn't been fully
842 setup yet. Try to reconstruct the base address for the stack
843 frame by looking at the stack pointer. For truly "frameless"
844 functions this might work too. */
846 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
847 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
850 /* Now that we have the base address for the stack frame we can
851 calculate the value of %esp in the calling frame. */
852 cache
->saved_sp
= cache
->base
+ 8;
854 /* Adjust all the saved registers such that they contain addresses
855 instead of offsets. */
856 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
857 if (cache
->saved_regs
[i
] != -1)
858 cache
->saved_regs
[i
] += cache
->base
;
864 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
865 struct frame_id
*this_id
)
867 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
869 /* This marks the outermost frame. */
870 if (cache
->base
== 0)
873 /* See the end of i386_push_dummy_call. */
874 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
878 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
879 int regnum
, int *optimizedp
,
880 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
881 int *realnump
, void *valuep
)
883 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
885 gdb_assert (regnum
>= 0);
887 /* The System V ABI says that:
889 "The flags register contains the system flags, such as the
890 direction flag and the carry flag. The direction flag must be
891 set to the forward (that is, zero) direction before entry and
892 upon exit from a function. Other user flags have no specified
893 role in the standard calling sequence and are not preserved."
895 To guarantee the "upon exit" part of that statement we fake a
896 saved flags register that has its direction flag cleared.
898 Note that GCC doesn't seem to rely on the fact that the direction
899 flag is cleared after a function return; it always explicitly
900 clears the flag before operations where it matters.
902 FIXME: kettenis/20030316: I'm not quite sure whether this is the
903 right thing to do. The way we fake the flags register here makes
904 it impossible to change it. */
906 if (regnum
== I386_EFLAGS_REGNUM
)
916 /* Clear the direction flag. */
917 val
= frame_unwind_register_unsigned (next_frame
,
920 store_unsigned_integer (valuep
, 4, val
);
926 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
928 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
929 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
933 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
941 /* Store the value. */
942 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
947 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
950 *lvalp
= lval_memory
;
951 *addrp
= cache
->saved_regs
[regnum
];
955 /* Read the value in from memory. */
956 read_memory (*addrp
, valuep
,
957 register_size (current_gdbarch
, regnum
));
962 frame_register_unwind (next_frame
, regnum
,
963 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
966 static const struct frame_unwind i386_frame_unwind
=
970 i386_frame_prev_register
973 static const struct frame_unwind
*
974 i386_frame_sniffer (struct frame_info
*next_frame
)
976 return &i386_frame_unwind
;
980 /* Signal trampolines. */
982 static struct i386_frame_cache
*
983 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
985 struct i386_frame_cache
*cache
;
986 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
993 cache
= i386_alloc_frame_cache ();
995 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
996 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
998 addr
= tdep
->sigcontext_addr (next_frame
);
999 if (tdep
->sc_reg_offset
)
1003 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1005 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1006 if (tdep
->sc_reg_offset
[i
] != -1)
1007 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1011 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1012 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1015 *this_cache
= cache
;
1020 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1021 struct frame_id
*this_id
)
1023 struct i386_frame_cache
*cache
=
1024 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1026 /* See the end of i386_push_dummy_call. */
1027 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1031 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1033 int regnum
, int *optimizedp
,
1034 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1035 int *realnump
, void *valuep
)
1037 /* Make sure we've initialized the cache. */
1038 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1040 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1041 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1044 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1047 i386_sigtramp_frame_this_id
,
1048 i386_sigtramp_frame_prev_register
1051 static const struct frame_unwind
*
1052 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1054 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1056 /* We shouldn't even bother if we don't have a sigcontext_addr
1058 if (tdep
->sigcontext_addr
== NULL
)
1061 if (tdep
->sigtramp_p
!= NULL
)
1063 if (tdep
->sigtramp_p (next_frame
))
1064 return &i386_sigtramp_frame_unwind
;
1067 if (tdep
->sigtramp_start
!= 0)
1069 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1071 gdb_assert (tdep
->sigtramp_end
!= 0);
1072 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1073 return &i386_sigtramp_frame_unwind
;
1081 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1083 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1088 static const struct frame_base i386_frame_base
=
1091 i386_frame_base_address
,
1092 i386_frame_base_address
,
1093 i386_frame_base_address
1096 static struct frame_id
1097 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1102 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1103 fp
= extract_unsigned_integer (buf
, 4);
1105 /* See the end of i386_push_dummy_call. */
1106 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1110 /* Figure out where the longjmp will land. Slurp the args out of the
1111 stack. We expect the first arg to be a pointer to the jmp_buf
1112 structure from which we extract the address that we will land at.
1113 This address is copied into PC. This routine returns non-zero on
1116 This function is 64-bit safe. */
1119 i386_get_longjmp_target (CORE_ADDR
*pc
)
1122 CORE_ADDR sp
, jb_addr
;
1123 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1124 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1126 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1127 longjmp will land. */
1128 if (jb_pc_offset
== -1)
1131 /* Don't use I386_ESP_REGNUM here, since this function is also used
1133 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1134 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1135 if (target_read_memory (sp
+ len
, buf
, len
))
1138 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1139 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1142 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1148 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1149 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1150 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1151 CORE_ADDR struct_addr
)
1156 /* Push arguments in reverse order. */
1157 for (i
= nargs
- 1; i
>= 0; i
--)
1159 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1161 /* The System V ABI says that:
1163 "An argument's size is increased, if necessary, to make it a
1164 multiple of [32-bit] words. This may require tail padding,
1165 depending on the size of the argument."
1167 This makes sure the stack says word-aligned. */
1168 sp
-= (len
+ 3) & ~3;
1169 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1172 /* Push value address. */
1176 store_unsigned_integer (buf
, 4, struct_addr
);
1177 write_memory (sp
, buf
, 4);
1180 /* Store return address. */
1182 store_unsigned_integer (buf
, 4, bp_addr
);
1183 write_memory (sp
, buf
, 4);
1185 /* Finally, update the stack pointer... */
1186 store_unsigned_integer (buf
, 4, sp
);
1187 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1189 /* ...and fake a frame pointer. */
1190 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1192 /* MarkK wrote: This "+ 8" is all over the place:
1193 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1194 i386_unwind_dummy_id). It's there, since all frame unwinders for
1195 a given target have to agree (within a certain margin) on the
1196 defenition of the stack address of a frame. Otherwise
1197 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1198 stack address *before* the function call as a frame's CFA. On
1199 the i386, when %ebp is used as a frame pointer, the offset
1200 between the contents %ebp and the CFA as defined by GCC. */
1204 /* These registers are used for returning integers (and on some
1205 targets also for returning `struct' and `union' values when their
1206 size and alignment match an integer type). */
1207 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1208 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1210 /* Read, for architecture GDBARCH, a function return value of TYPE
1211 from REGCACHE, and copy that into VALBUF. */
1214 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1215 struct regcache
*regcache
, void *valbuf
)
1217 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1218 int len
= TYPE_LENGTH (type
);
1219 char buf
[I386_MAX_REGISTER_SIZE
];
1221 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1223 if (tdep
->st0_regnum
< 0)
1225 warning ("Cannot find floating-point return value.");
1226 memset (valbuf
, 0, len
);
1230 /* Floating-point return values can be found in %st(0). Convert
1231 its contents to the desired type. This is probably not
1232 exactly how it would happen on the target itself, but it is
1233 the best we can do. */
1234 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1235 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1239 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1240 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1242 if (len
<= low_size
)
1244 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1245 memcpy (valbuf
, buf
, len
);
1247 else if (len
<= (low_size
+ high_size
))
1249 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1250 memcpy (valbuf
, buf
, low_size
);
1251 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1252 memcpy ((char *) valbuf
+ low_size
, buf
, len
- low_size
);
1255 internal_error (__FILE__
, __LINE__
,
1256 "Cannot extract return value of %d bytes long.", len
);
1260 /* Write, for architecture GDBARCH, a function return value of TYPE
1261 from VALBUF into REGCACHE. */
1264 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1265 struct regcache
*regcache
, const void *valbuf
)
1267 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1268 int len
= TYPE_LENGTH (type
);
1270 /* Define I387_ST0_REGNUM such that we use the proper definitions
1271 for the architecture. */
1272 #define I387_ST0_REGNUM I386_ST0_REGNUM
1274 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1277 char buf
[I386_MAX_REGISTER_SIZE
];
1279 if (tdep
->st0_regnum
< 0)
1281 warning ("Cannot set floating-point return value.");
1285 /* Returning floating-point values is a bit tricky. Apart from
1286 storing the return value in %st(0), we have to simulate the
1287 state of the FPU at function return point. */
1289 /* Convert the value found in VALBUF to the extended
1290 floating-point format used by the FPU. This is probably
1291 not exactly how it would happen on the target itself, but
1292 it is the best we can do. */
1293 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1294 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1296 /* Set the top of the floating-point register stack to 7. The
1297 actual value doesn't really matter, but 7 is what a normal
1298 function return would end up with if the program started out
1299 with a freshly initialized FPU. */
1300 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1302 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1304 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1305 the floating-point register stack to 7, the appropriate value
1306 for the tag word is 0x3fff. */
1307 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1311 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1312 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1314 if (len
<= low_size
)
1315 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1316 else if (len
<= (low_size
+ high_size
))
1318 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1319 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1320 len
- low_size
, (char *) valbuf
+ low_size
);
1323 internal_error (__FILE__
, __LINE__
,
1324 "Cannot store return value of %d bytes long.", len
);
1327 #undef I387_ST0_REGNUM
1331 /* This is the variable that is set with "set struct-convention", and
1332 its legitimate values. */
1333 static const char default_struct_convention
[] = "default";
1334 static const char pcc_struct_convention
[] = "pcc";
1335 static const char reg_struct_convention
[] = "reg";
1336 static const char *valid_conventions
[] =
1338 default_struct_convention
,
1339 pcc_struct_convention
,
1340 reg_struct_convention
,
1343 static const char *struct_convention
= default_struct_convention
;
1345 /* Return non-zero if TYPE, which is assumed to be a structure or
1346 union type, should be returned in registers for architecture
1350 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1352 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1353 enum type_code code
= TYPE_CODE (type
);
1354 int len
= TYPE_LENGTH (type
);
1356 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1358 if (struct_convention
== pcc_struct_convention
1359 || (struct_convention
== default_struct_convention
1360 && tdep
->struct_return
== pcc_struct_return
))
1363 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1366 /* Determine, for architecture GDBARCH, how a return value of TYPE
1367 should be returned. If it is supposed to be returned in registers,
1368 and READBUF is non-zero, read the appropriate value from REGCACHE,
1369 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1370 from WRITEBUF into REGCACHE. */
1372 static enum return_value_convention
1373 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1374 struct regcache
*regcache
, void *readbuf
,
1375 const void *writebuf
)
1377 enum type_code code
= TYPE_CODE (type
);
1379 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1380 && !i386_reg_struct_return_p (gdbarch
, type
))
1381 return RETURN_VALUE_STRUCT_CONVENTION
;
1383 /* This special case is for structures consisting of a single
1384 `float' or `double' member. These structures are returned in
1385 %st(0). For these structures, we call ourselves recursively,
1386 changing TYPE into the type of the first member of the structure.
1387 Since that should work for all structures that have only one
1388 member, we don't bother to check the member's type here. */
1389 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1391 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1392 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1396 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1398 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1400 return RETURN_VALUE_REGISTER_CONVENTION
;
1404 /* Return the GDB type object for the "standard" data type of data in
1405 register REGNUM. Perhaps %esi and %edi should go here, but
1406 potentially they could be used for things other than address. */
1408 static struct type
*
1409 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1411 if (regnum
== I386_EIP_REGNUM
1412 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1413 return lookup_pointer_type (builtin_type_void
);
1415 if (i386_fp_regnum_p (regnum
))
1416 return builtin_type_i387_ext
;
1418 if (i386_sse_regnum_p (gdbarch
, regnum
))
1419 return builtin_type_vec128i
;
1421 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1422 return builtin_type_vec64i
;
1424 return builtin_type_int
;
1427 /* Map a cooked register onto a raw register or memory. For the i386,
1428 the MMX registers need to be mapped onto floating point registers. */
1431 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1433 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1438 /* Define I387_ST0_REGNUM such that we use the proper definitions
1439 for REGCACHE's architecture. */
1440 #define I387_ST0_REGNUM tdep->st0_regnum
1442 mmxreg
= regnum
- tdep
->mm0_regnum
;
1443 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1444 tos
= (fstat
>> 11) & 0x7;
1445 fpreg
= (mmxreg
+ tos
) % 8;
1447 return (I387_ST0_REGNUM
+ fpreg
);
1449 #undef I387_ST0_REGNUM
1453 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1454 int regnum
, void *buf
)
1456 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1458 char mmx_buf
[MAX_REGISTER_SIZE
];
1459 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1461 /* Extract (always little endian). */
1462 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1463 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1466 regcache_raw_read (regcache
, regnum
, buf
);
1470 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1471 int regnum
, const void *buf
)
1473 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1475 char mmx_buf
[MAX_REGISTER_SIZE
];
1476 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1479 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1480 /* ... Modify ... (always little endian). */
1481 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1483 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1486 regcache_raw_write (regcache
, regnum
, buf
);
1490 /* Return the register number of the register allocated by GCC after
1491 REGNUM, or -1 if there is no such register. */
1494 i386_next_regnum (int regnum
)
1496 /* GCC allocates the registers in the order:
1498 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1500 Since storing a variable in %esp doesn't make any sense we return
1501 -1 for %ebp and for %esp itself. */
1502 static int next_regnum
[] =
1504 I386_EDX_REGNUM
, /* Slot for %eax. */
1505 I386_EBX_REGNUM
, /* Slot for %ecx. */
1506 I386_ECX_REGNUM
, /* Slot for %edx. */
1507 I386_ESI_REGNUM
, /* Slot for %ebx. */
1508 -1, -1, /* Slots for %esp and %ebp. */
1509 I386_EDI_REGNUM
, /* Slot for %esi. */
1510 I386_EBP_REGNUM
/* Slot for %edi. */
1513 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1514 return next_regnum
[regnum
];
1519 /* Return nonzero if a value of type TYPE stored in register REGNUM
1520 needs any special handling. */
1523 i386_convert_register_p (int regnum
, struct type
*type
)
1525 int len
= TYPE_LENGTH (type
);
1527 /* Values may be spread across multiple registers. Most debugging
1528 formats aren't expressive enough to specify the locations, so
1529 some heuristics is involved. Right now we only handle types that
1530 have a length that is a multiple of the word size, since GCC
1531 doesn't seem to put any other types into registers. */
1532 if (len
> 4 && len
% 4 == 0)
1534 int last_regnum
= regnum
;
1538 last_regnum
= i386_next_regnum (last_regnum
);
1542 if (last_regnum
!= -1)
1546 return i386_fp_regnum_p (regnum
);
1549 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1550 return its contents in TO. */
1553 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1554 struct type
*type
, void *to
)
1556 int len
= TYPE_LENGTH (type
);
1559 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1560 available in FRAME (i.e. if it wasn't saved)? */
1562 if (i386_fp_regnum_p (regnum
))
1564 i387_register_to_value (frame
, regnum
, type
, to
);
1568 /* Read a value spread accross multiple registers. */
1570 gdb_assert (len
> 4 && len
% 4 == 0);
1574 gdb_assert (regnum
!= -1);
1575 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1577 get_frame_register (frame
, regnum
, buf
);
1578 regnum
= i386_next_regnum (regnum
);
1584 /* Write the contents FROM of a value of type TYPE into register
1585 REGNUM in frame FRAME. */
1588 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1589 struct type
*type
, const void *from
)
1591 int len
= TYPE_LENGTH (type
);
1592 const char *buf
= from
;
1594 if (i386_fp_regnum_p (regnum
))
1596 i387_value_to_register (frame
, regnum
, type
, from
);
1600 /* Write a value spread accross multiple registers. */
1602 gdb_assert (len
> 4 && len
% 4 == 0);
1606 gdb_assert (regnum
!= -1);
1607 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1609 put_frame_register (frame
, regnum
, buf
);
1610 regnum
= i386_next_regnum (regnum
);
1616 /* Supply register REGNUM from the general-purpose register set REGSET
1617 to register cache REGCACHE. If REGNUM is -1, do this for all
1618 registers in REGSET. */
1621 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1622 int regnum
, const void *gregs
, size_t len
)
1624 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1625 const char *regs
= gregs
;
1628 gdb_assert (len
== tdep
->sizeof_gregset
);
1630 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1632 if ((regnum
== i
|| regnum
== -1)
1633 && tdep
->gregset_reg_offset
[i
] != -1)
1634 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1638 /* Supply register REGNUM from the floating-point register set REGSET
1639 to register cache REGCACHE. If REGNUM is -1, do this for all
1640 registers in REGSET. */
1643 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1644 int regnum
, const void *fpregs
, size_t len
)
1646 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1648 if (len
== I387_SIZEOF_FXSAVE
)
1650 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1654 gdb_assert (len
== tdep
->sizeof_fpregset
);
1655 i387_supply_fsave (regcache
, regnum
, fpregs
);
1658 /* Return the appropriate register set for the core section identified
1659 by SECT_NAME and SECT_SIZE. */
1661 const struct regset
*
1662 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1663 const char *sect_name
, size_t sect_size
)
1665 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1667 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1669 if (tdep
->gregset
== NULL
)
1671 tdep
->gregset
= XMALLOC (struct regset
);
1672 tdep
->gregset
->descr
= tdep
;
1673 tdep
->gregset
->supply_regset
= i386_supply_gregset
;
1675 return tdep
->gregset
;
1678 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1679 || (strcmp (sect_name
, ".reg-xfp") == 0
1680 && sect_size
== I387_SIZEOF_FXSAVE
))
1682 if (tdep
->fpregset
== NULL
)
1684 tdep
->fpregset
= XMALLOC (struct regset
);
1685 tdep
->fpregset
->descr
= tdep
;
1686 tdep
->fpregset
->supply_regset
= i386_supply_fpregset
;
1688 return tdep
->fpregset
;
1695 #ifdef STATIC_TRANSFORM_NAME
1696 /* SunPRO encodes the static variables. This is not related to C++
1697 mangling, it is done for C too. */
1700 sunpro_static_transform_name (char *name
)
1703 if (IS_STATIC_TRANSFORM_NAME (name
))
1705 /* For file-local statics there will be a period, a bunch of
1706 junk (the contents of which match a string given in the
1707 N_OPT), a period and the name. For function-local statics
1708 there will be a bunch of junk (which seems to change the
1709 second character from 'A' to 'B'), a period, the name of the
1710 function, and the name. So just skip everything before the
1712 p
= strrchr (name
, '.');
1718 #endif /* STATIC_TRANSFORM_NAME */
1721 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1724 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1726 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1728 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1729 struct minimal_symbol
*indsym
=
1730 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1731 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1735 if (strncmp (symname
, "__imp_", 6) == 0
1736 || strncmp (symname
, "_imp_", 5) == 0)
1737 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1740 return 0; /* Not a trampoline. */
1744 /* Return whether the frame preciding NEXT_FRAME corresponds to a
1745 sigtramp routine. */
1748 i386_sigtramp_p (struct frame_info
*next_frame
)
1750 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1753 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1754 return (name
&& strcmp ("_sigtramp", name
) == 0);
1758 /* We have two flavours of disassembly. The machinery on this page
1759 deals with switching between those. */
1762 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1764 gdb_assert (disassembly_flavor
== att_flavor
1765 || disassembly_flavor
== intel_flavor
);
1767 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1768 constified, cast to prevent a compiler warning. */
1769 info
->disassembler_options
= (char *) disassembly_flavor
;
1770 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1772 return print_insn_i386 (pc
, info
);
1776 /* There are a few i386 architecture variants that differ only
1777 slightly from the generic i386 target. For now, we don't give them
1778 their own source file, but include them here. As a consequence,
1779 they'll always be included. */
1781 /* System V Release 4 (SVR4). */
1783 /* Return whether the frame preciding NEXT_FRAME corresponds to a SVR4
1784 sigtramp routine. */
1787 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
1789 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1792 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1793 currently unknown. */
1794 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1795 return (name
&& (strcmp ("_sigreturn", name
) == 0
1796 || strcmp ("_sigacthandler", name
) == 0
1797 || strcmp ("sigvechandler", name
) == 0));
1800 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1801 routine, return the address of the associated sigcontext (ucontext)
1805 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1810 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1811 sp
= extract_unsigned_integer (buf
, 4);
1813 return read_memory_unsigned_integer (sp
+ 8, 4);
1820 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1822 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1823 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1826 /* System V Release 4 (SVR4). */
1829 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1831 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1833 /* System V Release 4 uses ELF. */
1834 i386_elf_init_abi (info
, gdbarch
);
1836 /* System V Release 4 has shared libraries. */
1837 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1838 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1840 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
1841 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1842 tdep
->sc_pc_offset
= 36 + 14 * 4;
1843 tdep
->sc_sp_offset
= 36 + 17 * 4;
1845 tdep
->jb_pc_offset
= 20;
1851 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1853 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1855 /* DJGPP doesn't have any special frames for signal handlers. */
1856 tdep
->sigtramp_p
= NULL
;
1858 tdep
->jb_pc_offset
= 36;
1864 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1866 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1868 tdep
->jb_pc_offset
= 24;
1872 /* i386 register groups. In addition to the normal groups, add "mmx"
1875 static struct reggroup
*i386_sse_reggroup
;
1876 static struct reggroup
*i386_mmx_reggroup
;
1879 i386_init_reggroups (void)
1881 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1882 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1886 i386_add_reggroups (struct gdbarch
*gdbarch
)
1888 reggroup_add (gdbarch
, i386_sse_reggroup
);
1889 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1890 reggroup_add (gdbarch
, general_reggroup
);
1891 reggroup_add (gdbarch
, float_reggroup
);
1892 reggroup_add (gdbarch
, all_reggroup
);
1893 reggroup_add (gdbarch
, save_reggroup
);
1894 reggroup_add (gdbarch
, restore_reggroup
);
1895 reggroup_add (gdbarch
, vector_reggroup
);
1896 reggroup_add (gdbarch
, system_reggroup
);
1900 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1901 struct reggroup
*group
)
1903 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1904 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1905 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1906 || i386_fpc_regnum_p (regnum
));
1907 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1909 if (group
== i386_mmx_reggroup
)
1910 return mmx_regnum_p
;
1911 if (group
== i386_sse_reggroup
)
1912 return sse_regnum_p
;
1913 if (group
== vector_reggroup
)
1914 return (mmx_regnum_p
|| sse_regnum_p
);
1915 if (group
== float_reggroup
)
1917 if (group
== general_reggroup
)
1918 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1920 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1924 /* Get the ARGIth function argument for the current function. */
1927 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1930 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1931 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1935 static struct gdbarch
*
1936 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1938 struct gdbarch_tdep
*tdep
;
1939 struct gdbarch
*gdbarch
;
1941 /* If there is already a candidate, use it. */
1942 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1944 return arches
->gdbarch
;
1946 /* Allocate space for the new architecture. */
1947 tdep
= XMALLOC (struct gdbarch_tdep
);
1948 gdbarch
= gdbarch_alloc (&info
, tdep
);
1950 /* General-purpose registers. */
1951 tdep
->gregset
= NULL
;
1952 tdep
->gregset_reg_offset
= NULL
;
1953 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1954 tdep
->sizeof_gregset
= 0;
1956 /* Floating-point registers. */
1957 tdep
->fpregset
= NULL
;
1958 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1960 /* The default settings include the FPU registers, the MMX registers
1961 and the SSE registers. This can be overidden for a specific ABI
1962 by adjusting the members `st0_regnum', `mm0_regnum' and
1963 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1964 will show up in the output of "info all-registers". Ideally we
1965 should try to autodetect whether they are available, such that we
1966 can prevent "info all-registers" from displaying registers that
1969 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1970 [the SSE registers] always (even when they don't exist) or never
1971 showing them to the user (even when they do exist), I prefer the
1972 former over the latter. */
1974 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1976 /* The MMX registers are implemented as pseudo-registers. Put off
1977 caclulating the register number for %mm0 until we know the number
1978 of raw registers. */
1979 tdep
->mm0_regnum
= 0;
1981 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1982 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1984 tdep
->jb_pc_offset
= -1;
1985 tdep
->struct_return
= pcc_struct_return
;
1986 tdep
->sigtramp_start
= 0;
1987 tdep
->sigtramp_end
= 0;
1988 tdep
->sigtramp_p
= i386_sigtramp_p
;
1989 tdep
->sigcontext_addr
= NULL
;
1990 tdep
->sc_reg_offset
= NULL
;
1991 tdep
->sc_pc_offset
= -1;
1992 tdep
->sc_sp_offset
= -1;
1994 /* The format used for `long double' on almost all i386 targets is
1995 the i387 extended floating-point format. In fact, of all targets
1996 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1997 on having a `long double' that's not `long' at all. */
1998 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
2000 /* Although the i387 extended floating-point has only 80 significant
2001 bits, a `long double' actually takes up 96, probably to enforce
2003 set_gdbarch_long_double_bit (gdbarch
, 96);
2005 /* The default ABI includes general-purpose registers,
2006 floating-point registers, and the SSE registers. */
2007 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2008 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2009 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2011 /* Register numbers of various important registers. */
2012 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2013 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2014 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2015 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2017 /* Use the "default" register numbering scheme for stabs and COFF. */
2018 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
2019 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
2021 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
2022 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
2023 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
2025 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2026 be in use on any of the supported i386 targets. */
2028 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2030 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2032 /* Call dummy code. */
2033 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2035 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2036 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2037 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2039 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2041 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2043 /* Stack grows downward. */
2044 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2046 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2047 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2049 set_gdbarch_frame_args_skip (gdbarch
, 8);
2051 /* Wire in the MMX registers. */
2052 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2053 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2054 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2056 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2058 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2060 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2062 /* Add the i386 register groups. */
2063 i386_add_reggroups (gdbarch
);
2064 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2066 /* Helper for function argument information. */
2067 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2069 /* Hook in the DWARF CFI frame unwinder. */
2070 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2072 frame_base_set_default (gdbarch
, &i386_frame_base
);
2074 /* Hook in ABI-specific overrides, if they have been registered. */
2075 gdbarch_init_osabi (info
, gdbarch
);
2077 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2078 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2080 /* If we have a register mapping, enable the generic core file
2081 support, unless it has already been enabled. */
2082 if (tdep
->gregset_reg_offset
2083 && !gdbarch_regset_from_core_section_p (gdbarch
))
2084 set_gdbarch_regset_from_core_section (gdbarch
,
2085 i386_regset_from_core_section
);
2087 /* Unless support for MMX has been disabled, make %mm0 the first
2089 if (tdep
->mm0_regnum
== 0)
2090 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2095 static enum gdb_osabi
2096 i386_coff_osabi_sniffer (bfd
*abfd
)
2098 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2099 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2100 return GDB_OSABI_GO32
;
2102 return GDB_OSABI_UNKNOWN
;
2105 static enum gdb_osabi
2106 i386_nlm_osabi_sniffer (bfd
*abfd
)
2108 return GDB_OSABI_NETWARE
;
2112 /* Provide a prototype to silence -Wmissing-prototypes. */
2113 void _initialize_i386_tdep (void);
2116 _initialize_i386_tdep (void)
2118 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2120 /* Add the variable that controls the disassembly flavor. */
2122 struct cmd_list_element
*new_cmd
;
2124 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2126 &disassembly_flavor
,
2128 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2129 and the default value is \"att\".",
2131 add_show_from_set (new_cmd
, &showlist
);
2134 /* Add the variable that controls the convention for returning
2137 struct cmd_list_element
*new_cmd
;
2139 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2141 &struct_convention
, "\
2142 Set the convention for returning small structs, valid values \
2143 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2145 add_show_from_set (new_cmd
, &showlist
);
2148 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2149 i386_coff_osabi_sniffer
);
2150 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2151 i386_nlm_osabi_sniffer
);
2153 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2154 i386_svr4_init_abi
);
2155 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2156 i386_go32_init_abi
);
2157 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2160 /* Initialize the i386 specific register groups. */
2161 i386_init_reggroups ();