gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright 2001, 2002, 2003
   4    Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 #ifndef I386_TDEP_H
  24 #define I386_TDEP_H
  25
  26 struct frame_info;
  27 struct gdbarch;
  28 struct reggroup;
  29
  30 /* GDB's i386 target supports both the 32-bit Intel Architecture
  31    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  32    a similar register layout for both.
  33
  34    - General purpose registers
  35    - FPU data registers
  36    - FPU control registers
  37    - SSE data registers
  38    - SSE control register
  39
  40    The general purpose registers for the x86-64 architecture are quite
  41    different from IA-32.  Therefore, the FP0_REGNUM target macro
  42    determines the register number at which the FPU data registers
  43    start.  The number of FPU data and control registers is the same
  44    for both architectures.  The number of SSE registers however,
  45    differs and is determined by the num_xmm_regs member of `struct
  46    gdbarch_tdep'.  */
  47
  48 /* Convention for returning structures.  */
  49
  50 enum struct_return
  51 {
  52   pcc_struct_return,            /* Return "short" structures in memory.  */
  53   reg_struct_return             /* Return "short" structures in registers.  */
  54 };
  55
  56 /* i386 architecture specific information.  */
  57 struct gdbarch_tdep
  58 {
  59   /* Register number for %st(0).  The register numbers for the other
  60      registers follow from this one.  Set this to -1 to indicate the
  61      absence of an FPU.  */
  62   int st0_regnum;
  63
  64   /* Register number for %mm0.  Set this to -1 to indicate the absence
  65      of MMX support.  */
  66   int mm0_regnum;
  67
  68   /* Number of SSE registers.  */
  69   int num_xmm_regs;
  70
  71   /* Offset of saved PC in jmp_buf.  */
  72   int jb_pc_offset;
  73
  74   /* Convention for returning structures.  */
  75   enum struct_return struct_return;
  76
  77   /* Address range where sigtramp lives.  */
  78   CORE_ADDR sigtramp_start;
  79   CORE_ADDR sigtramp_end;
  80
  81   /* Get address of sigcontext for sigtramp.  */
  82   CORE_ADDR (*sigcontext_addr) (struct frame_info *);
  83
  84   /* Offset of registers in `struct sigcontext'.  */
  85   int *sc_reg_offset;
  86   int sc_num_regs;
  87
  88   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
  89      is deprecated, please use `sc_reg_offset' instead.  */
  90   int sc_pc_offset;
  91   int sc_sp_offset;
  92 };
  93
  94 /* Floating-point registers.  */
  95
  96 #define FPU_REG_RAW_SIZE 10
  97
  98 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
  99    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 100    register cache.  */
 101
 102 /* "Generic" floating point control register.  */
 103 #define FPC_REGNUM      (FP0_REGNUM + 8)
 104
 105 /* FPU control word.  */
 106 #define FCTRL_REGNUM    FPC_REGNUM
 107
 108 /* FPU status word.  */
 109 #define FSTAT_REGNUM    (FPC_REGNUM + 1)
 110
 111 /* FPU register tag word.  */
 112 #define FTAG_REGNUM     (FPC_REGNUM + 2)
 113
 114 /* FPU instruction's code segment selector, called "FPU Instruction
 115    Pointer Selector" in the IA-32 manuals.  */
 116 #define FISEG_REGNUM    (FPC_REGNUM + 3)
 117
 118 /* FPU instruction's offset within segment.  */
 119 #define FIOFF_REGNUM    (FPC_REGNUM + 4)
 120
 121 /* FPU operand's data segment.  */
 122 #define FOSEG_REGNUM    (FPC_REGNUM + 5)
 123
 124 /* FPU operand's offset within segment */
 125 #define FOOFF_REGNUM    (FPC_REGNUM + 6)
 126
 127 /* FPU opcode, bottom eleven bits.  */
 128 #define FOP_REGNUM      (FPC_REGNUM + 7)
 129
 130 /* Return non-zero if REGNUM matches the FP register and the FP
 131    register set is active.  */
 132 extern int i386_fp_regnum_p (int regnum);
 133 extern int i386_fpc_regnum_p (int regnum);
 134
 135 /* SSE registers.  */
 136
 137 /* First SSE data register.  */
 138 #define XMM0_REGNUM     (FPC_REGNUM + 8)
 139
 140 /* SSE control/status register.  */
 141 #define MXCSR_REGNUM \
 142   (XMM0_REGNUM + gdbarch_tdep (current_gdbarch)->num_xmm_regs)
 143
 144 /* FIXME: kettenis/2001-11-24: Obsolete macro's.  */
 145 #define FCS_REGNUM FISEG_REGNUM
 146 #define FCOFF_REGNUM FIOFF_REGNUM
 147 #define FDS_REGNUM FOSEG_REGNUM
 148 #define FDOFF_REGNUM FOOFF_REGNUM
 149
 150 /* Register numbers of various important registers.  */
 151
 152 #define I386_EAX_REGNUM         0 /* %eax */
 153 #define I386_EDX_REGNUM         2 /* %edx */
 154 #define I386_ESP_REGNUM         4 /* %esp */
 155 #define I386_EBP_REGNUM         5 /* %ebp */
 156 #define I386_EIP_REGNUM         8 /* %eip */
 157 #define I386_EFLAGS_REGNUM      9 /* %eflags */
 158 #define I386_ST0_REGNUM         16 /* %st(0) */
 159
 160 #define I386_NUM_GREGS  16
 161 #define I386_NUM_FREGS  16
 162 #define I386_NUM_XREGS  9
 163
 164 #define I386_SSE_NUM_REGS       (I386_NUM_GREGS + I386_NUM_FREGS \
 165                                  + I386_NUM_XREGS)
 166
 167 /* Size of the largest register.  */
 168 #define I386_MAX_REGISTER_SIZE  16
 169
 170 /* Functions exported from i386-tdep.c.  */
 171 extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
 172 extern int i386_frameless_signal_p (struct frame_info *frame);
 173
 174 /* Return the name of register REG.  */
 175 extern char const *i386_register_name (int reg);
 176
 177 /* Return non-zero if REGNUM is a member of the specified group.  */
 178 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 179                                      struct reggroup *group);
 180
 181 /* Initialize a basic ELF architecture variant.  */
 182 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 183
 184 /* Initialize a SVR4 architecture variant.  */
 185 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 186 \f
 187
 188 /* Functions and variables exported from i386bsd-tdep.c.  */
 189
 190 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 191 extern CORE_ADDR i386fbsd_sigtramp_start;
 192 extern CORE_ADDR i386fbsd_sigtramp_end;
 193 extern CORE_ADDR i386obsd_sigtramp_start;
 194 extern CORE_ADDR i386obsd_sigtramp_end;
 195 extern int i386fbsd4_sc_reg_offset[];
 196 extern int i386fbsd_sc_reg_offset[];
 197 extern int i386nbsd_sc_reg_offset[];
 198 extern int i386obsd_sc_reg_offset[];
 199 extern int i386bsd_sc_reg_offset[];
 200
 201 #endif /* i386-tdep.h */