1 /* Intel 387 floating point stuff.
3 Copyright (C) 1988-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
29 #include "i386-tdep.h"
30 #include "i387-tdep.h"
31 #include "x86-xstate.h"
33 /* Print the floating point number specified by RAW. */
36 print_i387_value (struct gdbarch
*gdbarch
,
37 const gdb_byte
*raw
, struct ui_file
*file
)
41 /* Using extract_typed_floating here might affect the representation
42 of certain numbers such as NaNs, even if GDB is running natively.
43 This is fine since our caller already detects such special
44 numbers and we print the hexadecimal representation anyway. */
45 value
= extract_typed_floating (raw
, i387_ext_type (gdbarch
));
47 /* We try to print 19 digits. The last digit may or may not contain
48 garbage, but we'd better print one too many. We need enough room
49 to print the value, 1 position for the sign, 1 for the decimal
50 point, 19 for the digits and 6 for the exponent adds up to 27. */
51 #ifdef PRINTF_HAS_LONG_DOUBLE
52 fprintf_filtered (file
, " %-+27.19Lg", (long double) value
);
54 fprintf_filtered (file
, " %-+27.19g", (double) value
);
58 /* Print the classification for the register contents RAW. */
61 print_i387_ext (struct gdbarch
*gdbarch
,
62 const gdb_byte
*raw
, struct ui_file
*file
)
66 unsigned int exponent
;
67 unsigned long fraction
[2];
70 integer
= raw
[7] & 0x80;
71 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
72 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
73 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
74 | (raw
[5] << 8) | raw
[4]);
76 if (exponent
== 0x7fff && integer
)
78 if (fraction
[0] == 0x00000000 && fraction
[1] == 0x00000000)
80 fprintf_filtered (file
, " %cInf", (sign
? '-' : '+'));
81 else if (sign
&& fraction
[0] == 0x00000000 && fraction
[1] == 0x40000000)
82 /* Real Indefinite (QNaN). */
83 fputs_unfiltered (" Real Indefinite (QNaN)", file
);
84 else if (fraction
[1] & 0x40000000)
86 fputs_filtered (" QNaN", file
);
89 fputs_filtered (" SNaN", file
);
91 else if (exponent
< 0x7fff && exponent
> 0x0000 && integer
)
93 print_i387_value (gdbarch
, raw
, file
);
94 else if (exponent
== 0x0000)
96 /* Denormal or zero. */
97 print_i387_value (gdbarch
, raw
, file
);
100 /* Pseudo-denormal. */
101 fputs_filtered (" Pseudo-denormal", file
);
102 else if (fraction
[0] || fraction
[1])
104 fputs_filtered (" Denormal", file
);
108 fputs_filtered (" Unsupported", file
);
111 /* Print the status word STATUS. If STATUS_P is false, then STATUS
115 print_i387_status_word (int status_p
,
116 unsigned int status
, struct ui_file
*file
)
118 fprintf_filtered (file
, "Status Word: ");
121 fprintf_filtered (file
, "%s\n", _("<unavailable>"));
125 fprintf_filtered (file
, "%s", hex_string_custom (status
, 4));
126 fputs_filtered (" ", file
);
127 fprintf_filtered (file
, " %s", (status
& 0x0001) ? "IE" : " ");
128 fprintf_filtered (file
, " %s", (status
& 0x0002) ? "DE" : " ");
129 fprintf_filtered (file
, " %s", (status
& 0x0004) ? "ZE" : " ");
130 fprintf_filtered (file
, " %s", (status
& 0x0008) ? "OE" : " ");
131 fprintf_filtered (file
, " %s", (status
& 0x0010) ? "UE" : " ");
132 fprintf_filtered (file
, " %s", (status
& 0x0020) ? "PE" : " ");
133 fputs_filtered (" ", file
);
134 fprintf_filtered (file
, " %s", (status
& 0x0080) ? "ES" : " ");
135 fputs_filtered (" ", file
);
136 fprintf_filtered (file
, " %s", (status
& 0x0040) ? "SF" : " ");
137 fputs_filtered (" ", file
);
138 fprintf_filtered (file
, " %s", (status
& 0x0100) ? "C0" : " ");
139 fprintf_filtered (file
, " %s", (status
& 0x0200) ? "C1" : " ");
140 fprintf_filtered (file
, " %s", (status
& 0x0400) ? "C2" : " ");
141 fprintf_filtered (file
, " %s", (status
& 0x4000) ? "C3" : " ");
143 fputs_filtered ("\n", file
);
145 fprintf_filtered (file
,
146 " TOP: %d\n", ((status
>> 11) & 7));
149 /* Print the control word CONTROL. If CONTROL_P is false, then
150 CONTROL was unavailable. */
153 print_i387_control_word (int control_p
,
154 unsigned int control
, struct ui_file
*file
)
156 fprintf_filtered (file
, "Control Word: ");
159 fprintf_filtered (file
, "%s\n", _("<unavailable>"));
163 fprintf_filtered (file
, "%s", hex_string_custom (control
, 4));
164 fputs_filtered (" ", file
);
165 fprintf_filtered (file
, " %s", (control
& 0x0001) ? "IM" : " ");
166 fprintf_filtered (file
, " %s", (control
& 0x0002) ? "DM" : " ");
167 fprintf_filtered (file
, " %s", (control
& 0x0004) ? "ZM" : " ");
168 fprintf_filtered (file
, " %s", (control
& 0x0008) ? "OM" : " ");
169 fprintf_filtered (file
, " %s", (control
& 0x0010) ? "UM" : " ");
170 fprintf_filtered (file
, " %s", (control
& 0x0020) ? "PM" : " ");
172 fputs_filtered ("\n", file
);
174 fputs_filtered (" PC: ", file
);
175 switch ((control
>> 8) & 3)
178 fputs_filtered ("Single Precision (24-bits)\n", file
);
181 fputs_filtered ("Reserved\n", file
);
184 fputs_filtered ("Double Precision (53-bits)\n", file
);
187 fputs_filtered ("Extended Precision (64-bits)\n", file
);
191 fputs_filtered (" RC: ", file
);
192 switch ((control
>> 10) & 3)
195 fputs_filtered ("Round to nearest\n", file
);
198 fputs_filtered ("Round down\n", file
);
201 fputs_filtered ("Round up\n", file
);
204 fputs_filtered ("Round toward zero\n", file
);
209 /* Print out the i387 floating point state. Note that we ignore FRAME
210 in the code below. That's OK since floating-point registers are
211 never saved on the stack. */
214 i387_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
215 struct frame_info
*frame
, const char *args
)
217 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
237 gdb_assert (gdbarch
== get_frame_arch (frame
));
239 fctrl_p
= read_frame_register_unsigned (frame
,
240 I387_FCTRL_REGNUM (tdep
), &fctrl
);
241 fstat_p
= read_frame_register_unsigned (frame
,
242 I387_FSTAT_REGNUM (tdep
), &fstat
);
243 ftag_p
= read_frame_register_unsigned (frame
,
244 I387_FTAG_REGNUM (tdep
), &ftag
);
245 fiseg_p
= read_frame_register_unsigned (frame
,
246 I387_FISEG_REGNUM (tdep
), &fiseg
);
247 fioff_p
= read_frame_register_unsigned (frame
,
248 I387_FIOFF_REGNUM (tdep
), &fioff
);
249 foseg_p
= read_frame_register_unsigned (frame
,
250 I387_FOSEG_REGNUM (tdep
), &foseg
);
251 fooff_p
= read_frame_register_unsigned (frame
,
252 I387_FOOFF_REGNUM (tdep
), &fooff
);
253 fop_p
= read_frame_register_unsigned (frame
,
254 I387_FOP_REGNUM (tdep
), &fop
);
258 top
= ((fstat
>> 11) & 7);
260 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
262 struct value
*regval
;
267 fprintf_filtered (file
, "%sR%d: ", fpreg
== top
? "=>" : " ", fpreg
);
271 tag
= (ftag
>> (fpreg
* 2)) & 3;
276 fputs_filtered ("Valid ", file
);
279 fputs_filtered ("Zero ", file
);
282 fputs_filtered ("Special ", file
);
285 fputs_filtered ("Empty ", file
);
290 fputs_filtered ("Unknown ", file
);
292 regnum
= (fpreg
+ 8 - top
) % 8 + I387_ST0_REGNUM (tdep
);
293 regval
= get_frame_register_value (frame
, regnum
);
295 if (value_entirely_available (regval
))
297 const gdb_byte
*raw
= value_contents (regval
);
299 fputs_filtered ("0x", file
);
300 for (i
= 9; i
>= 0; i
--)
301 fprintf_filtered (file
, "%02x", raw
[i
]);
303 if (tag
!= -1 && tag
!= 3)
304 print_i387_ext (gdbarch
, raw
, file
);
307 fprintf_filtered (file
, "%s", _("<unavailable>"));
309 fputs_filtered ("\n", file
);
313 fputs_filtered ("\n", file
);
314 print_i387_status_word (fstat_p
, fstat
, file
);
315 print_i387_control_word (fctrl_p
, fctrl
, file
);
316 fprintf_filtered (file
, "Tag Word: %s\n",
317 ftag_p
? hex_string_custom (ftag
, 4) : _("<unavailable>"));
318 fprintf_filtered (file
, "Instruction Pointer: %s:",
319 fiseg_p
? hex_string_custom (fiseg
, 2) : _("<unavailable>"));
320 fprintf_filtered (file
, "%s\n",
321 fioff_p
? hex_string_custom (fioff
, 8) : _("<unavailable>"));
322 fprintf_filtered (file
, "Operand Pointer: %s:",
323 foseg_p
? hex_string_custom (foseg
, 2) : _("<unavailable>"));
324 fprintf_filtered (file
, "%s\n",
325 fooff_p
? hex_string_custom (fooff
, 8) : _("<unavailable>"));
326 fprintf_filtered (file
, "Opcode: %s\n",
328 ? (hex_string_custom (fop
? (fop
| 0xd800) : 0, 4))
329 : _("<unavailable>"));
333 /* Return nonzero if a value of type TYPE stored in register REGNUM
334 needs any special handling. */
337 i387_convert_register_p (struct gdbarch
*gdbarch
, int regnum
,
340 if (i386_fp_regnum_p (gdbarch
, regnum
))
342 /* Floating point registers must be converted unless we are
343 accessing them in their hardware type or TYPE is not float. */
344 if (type
== i387_ext_type (gdbarch
)
345 || TYPE_CODE (type
) != TYPE_CODE_FLT
)
354 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
355 return its contents in TO. */
358 i387_register_to_value (struct frame_info
*frame
, int regnum
,
359 struct type
*type
, gdb_byte
*to
,
360 int *optimizedp
, int *unavailablep
)
362 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
363 gdb_byte from
[I386_MAX_REGISTER_SIZE
];
365 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
367 /* We only support floating-point values. */
368 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
370 warning (_("Cannot convert floating-point register value "
371 "to non-floating-point type."));
372 *optimizedp
= *unavailablep
= 0;
376 /* Convert to TYPE. */
377 if (!get_frame_register_bytes (frame
, regnum
, 0,
378 register_size (gdbarch
, regnum
),
379 from
, optimizedp
, unavailablep
))
382 convert_typed_floating (from
, i387_ext_type (gdbarch
), to
, type
);
383 *optimizedp
= *unavailablep
= 0;
387 /* Write the contents FROM of a value of type TYPE into register
388 REGNUM in frame FRAME. */
391 i387_value_to_register (struct frame_info
*frame
, int regnum
,
392 struct type
*type
, const gdb_byte
*from
)
394 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
395 gdb_byte to
[I386_MAX_REGISTER_SIZE
];
397 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
399 /* We only support floating-point values. */
400 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
402 warning (_("Cannot convert non-floating-point type "
403 "to floating-point register value."));
407 /* Convert from TYPE. */
408 convert_typed_floating (from
, type
, to
, i387_ext_type (gdbarch
));
409 put_frame_register (frame
, regnum
, to
);
413 /* Handle FSAVE and FXSAVE formats. */
415 /* At fsave_offset[REGNUM] you'll find the offset to the location in
416 the data structure used by the "fsave" instruction where GDB
417 register REGNUM is stored. */
419 static int fsave_offset
[] =
421 28 + 0 * 10, /* %st(0) ... */
428 28 + 7 * 10, /* ... %st(7). */
429 0, /* `fctrl' (16 bits). */
430 4, /* `fstat' (16 bits). */
431 8, /* `ftag' (16 bits). */
432 16, /* `fiseg' (16 bits). */
434 24, /* `foseg' (16 bits). */
436 18 /* `fop' (bottom 11 bits). */
439 #define FSAVE_ADDR(tdep, fsave, regnum) \
440 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
443 /* Fill register REGNUM in REGCACHE with the appropriate value from
444 *FSAVE. This function masks off any of the reserved bits in
448 i387_supply_fsave (struct regcache
*regcache
, int regnum
, const void *fsave
)
450 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
451 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
452 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
453 const gdb_byte
*regs
= (const gdb_byte
*) fsave
;
456 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
458 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
459 if (regnum
== -1 || regnum
== i
)
463 regcache_raw_supply (regcache
, i
, NULL
);
467 /* Most of the FPU control registers occupy only 16 bits in the
468 fsave area. Give those a special treatment. */
469 if (i
>= I387_FCTRL_REGNUM (tdep
)
470 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
474 memcpy (val
, FSAVE_ADDR (tdep
, regs
, i
), 2);
476 if (i
== I387_FOP_REGNUM (tdep
))
477 val
[1] &= ((1 << 3) - 1);
478 regcache_raw_supply (regcache
, i
, val
);
481 regcache_raw_supply (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
484 /* Provide dummy values for the SSE registers. */
485 for (i
= I387_XMM0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
486 if (regnum
== -1 || regnum
== i
)
487 regcache_raw_supply (regcache
, i
, NULL
);
488 if (regnum
== -1 || regnum
== I387_MXCSR_REGNUM (tdep
))
492 store_unsigned_integer (buf
, 4, byte_order
, 0x1f80);
493 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), buf
);
497 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE
498 with the value from REGCACHE. If REGNUM is -1, do this for all
499 registers. This function doesn't touch any of the reserved bits in
503 i387_collect_fsave (const struct regcache
*regcache
, int regnum
, void *fsave
)
505 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
506 gdb_byte
*regs
= (gdb_byte
*) fsave
;
509 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
511 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
512 if (regnum
== -1 || regnum
== i
)
514 /* Most of the FPU control registers occupy only 16 bits in
515 the fsave area. Give those a special treatment. */
516 if (i
>= I387_FCTRL_REGNUM (tdep
)
517 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
521 regcache_raw_collect (regcache
, i
, buf
);
523 if (i
== I387_FOP_REGNUM (tdep
))
525 /* The opcode occupies only 11 bits. Make sure we
526 don't touch the other bits. */
527 buf
[1] &= ((1 << 3) - 1);
528 buf
[1] |= ((FSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
530 memcpy (FSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
533 regcache_raw_collect (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
538 /* At fxsave_offset[REGNUM] you'll find the offset to the location in
539 the data structure used by the "fxsave" instruction where GDB
540 register REGNUM is stored. */
542 static int fxsave_offset
[] =
544 32, /* %st(0) through ... */
551 144, /* ... %st(7) (80 bits each). */
552 0, /* `fctrl' (16 bits). */
553 2, /* `fstat' (16 bits). */
554 4, /* `ftag' (16 bits). */
555 12, /* `fiseg' (16 bits). */
557 20, /* `foseg' (16 bits). */
559 6, /* `fop' (bottom 11 bits). */
560 160 + 0 * 16, /* %xmm0 through ... */
575 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
578 #define FXSAVE_ADDR(tdep, fxsave, regnum) \
579 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
581 /* We made an unfortunate choice in putting %mxcsr after the SSE
582 registers %xmm0-%xmm7 instead of before, since it makes supporting
583 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
584 don't include the offset for %mxcsr here above. */
586 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
588 static int i387_tag (const gdb_byte
*raw
);
591 /* Fill register REGNUM in REGCACHE with the appropriate
592 floating-point or SSE register value from *FXSAVE. This function
593 masks off any of the reserved bits in *FXSAVE. */
596 i387_supply_fxsave (struct regcache
*regcache
, int regnum
, const void *fxsave
)
598 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
599 const gdb_byte
*regs
= (const gdb_byte
*) fxsave
;
602 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
603 gdb_assert (tdep
->num_xmm_regs
> 0);
605 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
606 if (regnum
== -1 || regnum
== i
)
610 regcache_raw_supply (regcache
, i
, NULL
);
614 /* Most of the FPU control registers occupy only 16 bits in
615 the fxsave area. Give those a special treatment. */
616 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
617 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
621 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
623 if (i
== I387_FOP_REGNUM (tdep
))
624 val
[1] &= ((1 << 3) - 1);
625 else if (i
== I387_FTAG_REGNUM (tdep
))
627 /* The fxsave area contains a simplified version of
628 the tag word. We have to look at the actual 80-bit
629 FP data to recreate the traditional i387 tag word. */
631 unsigned long ftag
= 0;
635 top
= ((FXSAVE_ADDR (tdep
, regs
,
636 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
639 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
643 if (val
[0] & (1 << fpreg
))
645 int thisreg
= (fpreg
+ 8 - top
) % 8
646 + I387_ST0_REGNUM (tdep
);
647 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
652 ftag
|= tag
<< (2 * fpreg
);
654 val
[0] = ftag
& 0xff;
655 val
[1] = (ftag
>> 8) & 0xff;
657 regcache_raw_supply (regcache
, i
, val
);
660 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
663 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
666 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), NULL
);
668 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
669 FXSAVE_MXCSR_ADDR (regs
));
673 /* Fill register REGNUM (if it is a floating-point or SSE register) in
674 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
675 all registers. This function doesn't touch any of the reserved
679 i387_collect_fxsave (const struct regcache
*regcache
, int regnum
, void *fxsave
)
681 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
682 gdb_byte
*regs
= (gdb_byte
*) fxsave
;
685 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
686 gdb_assert (tdep
->num_xmm_regs
> 0);
688 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
689 if (regnum
== -1 || regnum
== i
)
691 /* Most of the FPU control registers occupy only 16 bits in
692 the fxsave area. Give those a special treatment. */
693 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
694 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
698 regcache_raw_collect (regcache
, i
, buf
);
700 if (i
== I387_FOP_REGNUM (tdep
))
702 /* The opcode occupies only 11 bits. Make sure we
703 don't touch the other bits. */
704 buf
[1] &= ((1 << 3) - 1);
705 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
707 else if (i
== I387_FTAG_REGNUM (tdep
))
709 /* Converting back is much easier. */
714 ftag
= (buf
[1] << 8) | buf
[0];
718 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
720 int tag
= (ftag
>> (fpreg
* 2)) & 3;
723 buf
[0] |= (1 << fpreg
);
726 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
729 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
732 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
733 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
734 FXSAVE_MXCSR_ADDR (regs
));
737 /* `xstate_bv' is at byte offset 512. */
738 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
740 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
741 the upper 128bit of AVX register data structure used by the "xsave"
742 instruction where GDB register REGNUM is stored. */
744 static int xsave_avxh_offset
[] =
746 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
761 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
764 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
765 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
767 /* At xsave_ymm_avx512_offset[REGNUM] you'll find the offset to the location in
768 the upper 128bit of ZMM register data structure used by the "xsave"
769 instruction where GDB register REGNUM is stored. */
771 static int xsave_ymm_avx512_offset
[] =
773 /* HI16_ZMM_area + 16 bytes + regnum* 64 bytes. */
774 1664 + 16 + 0 * 64, /* %ymm16 through... */
789 1664 + 16 + 15 * 64 /* ... %ymm31 (128 bits each). */
792 #define XSAVE_YMM_AVX512_ADDR(tdep, xsave, regnum) \
793 (xsave + xsave_ymm_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)])
795 static int xsave_xmm_avx512_offset
[] =
797 1664 + 0 * 64, /* %ymm16 through... */
812 1664 + 15 * 64 /* ... %ymm31 (128 bits each). */
815 #define XSAVE_XMM_AVX512_ADDR(tdep, xsave, regnum) \
816 (xsave + xsave_xmm_avx512_offset[regnum - I387_XMM16_REGNUM (tdep)])
818 static int xsave_mpx_offset
[] = {
819 960 + 0 * 16, /* bnd0r...bnd3r registers. */
823 1024 + 0 * 8, /* bndcfg ... bndstatus. */
827 #define XSAVE_MPX_ADDR(tdep, xsave, regnum) \
828 (xsave + xsave_mpx_offset[regnum - I387_BND0R_REGNUM (tdep)])
830 /* At xsave_avx512__h_offset[REGNUM] you find the offset to the location
831 of the AVX512 opmask register data structure used by the "xsave"
832 instruction where GDB register REGNUM is stored. */
834 static int xsave_avx512_k_offset
[] =
836 1088 + 0 * 8, /* %k0 through... */
843 1088 + 7 * 8 /* %k7 (64 bits each). */
846 #define XSAVE_AVX512_K_ADDR(tdep, xsave, regnum) \
847 (xsave + xsave_avx512_k_offset[regnum - I387_K0_REGNUM (tdep)])
849 /* At xsave_avx512_zmm_h_offset[REGNUM] you find the offset to the location in
850 the upper 256bit of AVX512 ZMMH register data structure used by the "xsave"
851 instruction where GDB register REGNUM is stored. */
853 static int xsave_avx512_zmm_h_offset
[] =
856 1152 + 1 * 32, /* Upper 256bit of %zmmh0 through... */
870 1152 + 15 * 32, /* Upper 256bit of... %zmmh15 (256 bits each). */
871 1664 + 32 + 0 * 64, /* Upper 256bit of... %zmmh16 (256 bits each). */
886 1664 + 32 + 15 * 64 /* Upper 256bit of... %zmmh31 (256 bits each). */
889 #define XSAVE_AVX512_ZMM_H_ADDR(tdep, xsave, regnum) \
890 (xsave + xsave_avx512_zmm_h_offset[regnum - I387_ZMM0H_REGNUM (tdep)])
892 /* At xsave_pkeys_offset[REGNUM] you find the offset to the location
893 of the PKRU register data structure used by the "xsave"
894 instruction where GDB register REGNUM is stored. */
896 static int xsave_pkeys_offset
[] =
898 2688 + 0 * 8 /* %pkru (64 bits in XSTATE, 32-bit actually used by
899 instructions and applications). */
902 #define XSAVE_PKEYS_ADDR(tdep, xsave, regnum) \
903 (xsave + xsave_pkeys_offset[regnum - I387_PKRU_REGNUM (tdep)])
905 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */
908 i387_supply_xsave (struct regcache
*regcache
, int regnum
,
911 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
912 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
913 const gdb_byte
*regs
= (const gdb_byte
*) xsave
;
916 static const gdb_byte zero
[I386_MAX_REGISTER_SIZE
] = { 0 };
926 avx512_ymmh_avx512
= 0x40,
927 avx512_xmm_avx512
= 0x80,
929 all
= x87
| sse
| avxh
| mpx
| avx512_k
| avx512_zmm_h
930 | avx512_ymmh_avx512
| avx512_xmm_avx512
| pkeys
933 gdb_assert (regs
!= NULL
);
934 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
935 gdb_assert (tdep
->num_xmm_regs
> 0);
939 else if (regnum
>= I387_PKRU_REGNUM (tdep
)
940 && regnum
< I387_PKEYSEND_REGNUM (tdep
))
942 else if (regnum
>= I387_ZMM0H_REGNUM (tdep
)
943 && regnum
< I387_ZMMENDH_REGNUM (tdep
))
944 regclass
= avx512_zmm_h
;
945 else if (regnum
>= I387_K0_REGNUM (tdep
)
946 && regnum
< I387_KEND_REGNUM (tdep
))
948 else if (regnum
>= I387_YMM16H_REGNUM (tdep
)
949 && regnum
< I387_YMMH_AVX512_END_REGNUM (tdep
))
950 regclass
= avx512_ymmh_avx512
;
951 else if (regnum
>= I387_XMM16_REGNUM (tdep
)
952 && regnum
< I387_XMM_AVX512_END_REGNUM (tdep
))
953 regclass
= avx512_xmm_avx512
;
954 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
955 && regnum
< I387_YMMENDH_REGNUM (tdep
))
957 else if (regnum
>= I387_BND0R_REGNUM (tdep
)
958 && regnum
< I387_MPXEND_REGNUM (tdep
))
960 else if (regnum
>= I387_XMM0_REGNUM (tdep
)
961 && regnum
< I387_MXCSR_REGNUM (tdep
))
963 else if (regnum
>= I387_ST0_REGNUM (tdep
)
964 && regnum
< I387_FCTRL_REGNUM (tdep
))
969 if (regclass
!= none
)
971 /* Get `xstat_bv'. The supported bits in `xstat_bv' are 8 bytes. */
972 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
973 ULONGEST xstate_bv
= 0;
975 xstate_bv
= extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs
),
978 /* Clear part in vector registers if its bit in xstat_bv is zero. */
979 clear_bv
= (~(xstate_bv
)) & tdep
->xcr0
;
982 clear_bv
= X86_XSTATE_ALL_MASK
;
984 /* With the delayed xsave mechanism, in between the program
985 starting, and the program accessing the vector registers for the
986 first time, the register's values are invalid. The kernel
987 initializes register states to zero when they are set the first
988 time in a program. This means that from the user-space programs'
989 perspective, it's the same as if the registers have always been
990 zero from the start of the program. Therefore, the debugger
991 should provide the same illusion to the user. */
999 if ((clear_bv
& X86_XSTATE_PKRU
))
1000 regcache_raw_supply (regcache
, regnum
, zero
);
1002 regcache_raw_supply (regcache
, regnum
,
1003 XSAVE_PKEYS_ADDR (tdep
, regs
, regnum
));
1007 if ((clear_bv
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1008 regcache_raw_supply (regcache
, regnum
, zero
);
1010 regcache_raw_supply (regcache
, regnum
,
1011 XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, regnum
));
1015 if ((clear_bv
& X86_XSTATE_K
))
1016 regcache_raw_supply (regcache
, regnum
, zero
);
1018 regcache_raw_supply (regcache
, regnum
,
1019 XSAVE_AVX512_K_ADDR (tdep
, regs
, regnum
));
1022 case avx512_ymmh_avx512
:
1023 if ((clear_bv
& X86_XSTATE_ZMM
))
1024 regcache_raw_supply (regcache
, regnum
, zero
);
1026 regcache_raw_supply (regcache
, regnum
,
1027 XSAVE_YMM_AVX512_ADDR (tdep
, regs
, regnum
));
1030 case avx512_xmm_avx512
:
1031 if ((clear_bv
& X86_XSTATE_ZMM
))
1032 regcache_raw_supply (regcache
, regnum
, zero
);
1034 regcache_raw_supply (regcache
, regnum
,
1035 XSAVE_XMM_AVX512_ADDR (tdep
, regs
, regnum
));
1039 if ((clear_bv
& X86_XSTATE_AVX
))
1040 regcache_raw_supply (regcache
, regnum
, zero
);
1042 regcache_raw_supply (regcache
, regnum
,
1043 XSAVE_AVXH_ADDR (tdep
, regs
, regnum
));
1047 if ((clear_bv
& X86_XSTATE_BNDREGS
))
1048 regcache_raw_supply (regcache
, regnum
, zero
);
1050 regcache_raw_supply (regcache
, regnum
,
1051 XSAVE_MPX_ADDR (tdep
, regs
, regnum
));
1055 if ((clear_bv
& X86_XSTATE_SSE
))
1056 regcache_raw_supply (regcache
, regnum
, zero
);
1058 regcache_raw_supply (regcache
, regnum
,
1059 FXSAVE_ADDR (tdep
, regs
, regnum
));
1063 if ((clear_bv
& X86_XSTATE_X87
))
1064 regcache_raw_supply (regcache
, regnum
, zero
);
1066 regcache_raw_supply (regcache
, regnum
,
1067 FXSAVE_ADDR (tdep
, regs
, regnum
));
1071 /* Handle PKEYS registers. */
1072 if ((tdep
->xcr0
& X86_XSTATE_PKRU
))
1074 if ((clear_bv
& X86_XSTATE_PKRU
))
1076 for (i
= I387_PKRU_REGNUM (tdep
);
1077 i
< I387_PKEYSEND_REGNUM (tdep
);
1079 regcache_raw_supply (regcache
, i
, zero
);
1083 for (i
= I387_PKRU_REGNUM (tdep
);
1084 i
< I387_PKEYSEND_REGNUM (tdep
);
1086 regcache_raw_supply (regcache
, i
,
1087 XSAVE_PKEYS_ADDR (tdep
, regs
, i
));
1091 /* Handle the upper ZMM registers. */
1092 if ((tdep
->xcr0
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1094 if ((clear_bv
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1096 for (i
= I387_ZMM0H_REGNUM (tdep
);
1097 i
< I387_ZMMENDH_REGNUM (tdep
);
1099 regcache_raw_supply (regcache
, i
, zero
);
1103 for (i
= I387_ZMM0H_REGNUM (tdep
);
1104 i
< I387_ZMMENDH_REGNUM (tdep
);
1106 regcache_raw_supply (regcache
, i
,
1107 XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, i
));
1111 /* Handle AVX512 OpMask registers. */
1112 if ((tdep
->xcr0
& X86_XSTATE_K
))
1114 if ((clear_bv
& X86_XSTATE_K
))
1116 for (i
= I387_K0_REGNUM (tdep
);
1117 i
< I387_KEND_REGNUM (tdep
);
1119 regcache_raw_supply (regcache
, i
, zero
);
1123 for (i
= I387_K0_REGNUM (tdep
);
1124 i
< I387_KEND_REGNUM (tdep
);
1126 regcache_raw_supply (regcache
, i
,
1127 XSAVE_AVX512_K_ADDR (tdep
, regs
, i
));
1131 /* Handle the YMM_AVX512 registers. */
1132 if ((tdep
->xcr0
& X86_XSTATE_ZMM
))
1134 if ((clear_bv
& X86_XSTATE_ZMM
))
1136 for (i
= I387_YMM16H_REGNUM (tdep
);
1137 i
< I387_YMMH_AVX512_END_REGNUM (tdep
);
1139 regcache_raw_supply (regcache
, i
, zero
);
1140 for (i
= I387_XMM16_REGNUM (tdep
);
1141 i
< I387_XMM_AVX512_END_REGNUM (tdep
);
1143 regcache_raw_supply (regcache
, i
, zero
);
1147 for (i
= I387_YMM16H_REGNUM (tdep
);
1148 i
< I387_YMMH_AVX512_END_REGNUM (tdep
);
1150 regcache_raw_supply (regcache
, i
,
1151 XSAVE_YMM_AVX512_ADDR (tdep
, regs
, i
));
1152 for (i
= I387_XMM16_REGNUM (tdep
);
1153 i
< I387_XMM_AVX512_END_REGNUM (tdep
);
1155 regcache_raw_supply (regcache
, i
,
1156 XSAVE_XMM_AVX512_ADDR (tdep
, regs
, i
));
1159 /* Handle the upper YMM registers. */
1160 if ((tdep
->xcr0
& X86_XSTATE_AVX
))
1162 if ((clear_bv
& X86_XSTATE_AVX
))
1164 for (i
= I387_YMM0H_REGNUM (tdep
);
1165 i
< I387_YMMENDH_REGNUM (tdep
);
1167 regcache_raw_supply (regcache
, i
, zero
);
1171 for (i
= I387_YMM0H_REGNUM (tdep
);
1172 i
< I387_YMMENDH_REGNUM (tdep
);
1174 regcache_raw_supply (regcache
, i
,
1175 XSAVE_AVXH_ADDR (tdep
, regs
, i
));
1179 /* Handle the MPX registers. */
1180 if ((tdep
->xcr0
& X86_XSTATE_BNDREGS
))
1182 if (clear_bv
& X86_XSTATE_BNDREGS
)
1184 for (i
= I387_BND0R_REGNUM (tdep
);
1185 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1186 regcache_raw_supply (regcache
, i
, zero
);
1190 for (i
= I387_BND0R_REGNUM (tdep
);
1191 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1192 regcache_raw_supply (regcache
, i
,
1193 XSAVE_MPX_ADDR (tdep
, regs
, i
));
1197 /* Handle the MPX registers. */
1198 if ((tdep
->xcr0
& X86_XSTATE_BNDCFG
))
1200 if (clear_bv
& X86_XSTATE_BNDCFG
)
1202 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1203 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1204 regcache_raw_supply (regcache
, i
, zero
);
1208 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1209 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1210 regcache_raw_supply (regcache
, i
,
1211 XSAVE_MPX_ADDR (tdep
, regs
, i
));
1215 /* Handle the XMM registers. */
1216 if ((tdep
->xcr0
& X86_XSTATE_SSE
))
1218 if ((clear_bv
& X86_XSTATE_SSE
))
1220 for (i
= I387_XMM0_REGNUM (tdep
);
1221 i
< I387_MXCSR_REGNUM (tdep
);
1223 regcache_raw_supply (regcache
, i
, zero
);
1227 for (i
= I387_XMM0_REGNUM (tdep
);
1228 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1229 regcache_raw_supply (regcache
, i
,
1230 FXSAVE_ADDR (tdep
, regs
, i
));
1234 /* Handle the x87 registers. */
1235 if ((tdep
->xcr0
& X86_XSTATE_X87
))
1237 if ((clear_bv
& X86_XSTATE_X87
))
1239 for (i
= I387_ST0_REGNUM (tdep
);
1240 i
< I387_FCTRL_REGNUM (tdep
);
1242 regcache_raw_supply (regcache
, i
, zero
);
1246 for (i
= I387_ST0_REGNUM (tdep
);
1247 i
< I387_FCTRL_REGNUM (tdep
);
1249 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1255 /* Only handle x87 control registers. */
1256 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
1257 if (regnum
== -1 || regnum
== i
)
1259 /* Most of the FPU control registers occupy only 16 bits in
1260 the xsave extended state. Give those a special treatment. */
1261 if (i
!= I387_FIOFF_REGNUM (tdep
)
1262 && i
!= I387_FOOFF_REGNUM (tdep
))
1266 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
1267 val
[2] = val
[3] = 0;
1268 if (i
== I387_FOP_REGNUM (tdep
))
1269 val
[1] &= ((1 << 3) - 1);
1270 else if (i
== I387_FTAG_REGNUM (tdep
))
1272 /* The fxsave area contains a simplified version of
1273 the tag word. We have to look at the actual 80-bit
1274 FP data to recreate the traditional i387 tag word. */
1276 unsigned long ftag
= 0;
1280 top
= ((FXSAVE_ADDR (tdep
, regs
,
1281 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
1284 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
1288 if (val
[0] & (1 << fpreg
))
1290 int thisreg
= (fpreg
+ 8 - top
) % 8
1291 + I387_ST0_REGNUM (tdep
);
1292 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
1295 tag
= 3; /* Empty */
1297 ftag
|= tag
<< (2 * fpreg
);
1299 val
[0] = ftag
& 0xff;
1300 val
[1] = (ftag
>> 8) & 0xff;
1302 regcache_raw_supply (regcache
, i
, val
);
1305 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1308 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
1309 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
1310 FXSAVE_MXCSR_ADDR (regs
));
1313 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */
1316 i387_collect_xsave (const struct regcache
*regcache
, int regnum
,
1317 void *xsave
, int gcore
)
1319 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1320 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1321 gdb_byte
*regs
= (gdb_byte
*) xsave
;
1331 avx512_k
= 0x20 | check
,
1332 avx512_zmm_h
= 0x40 | check
,
1333 avx512_ymmh_avx512
= 0x80 | check
,
1334 avx512_xmm_avx512
= 0x100 | check
,
1335 pkeys
= 0x200 | check
,
1336 all
= x87
| sse
| avxh
| mpx
| avx512_k
| avx512_zmm_h
1337 | avx512_ymmh_avx512
| avx512_xmm_avx512
| pkeys
1340 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
1341 gdb_assert (tdep
->num_xmm_regs
> 0);
1345 else if (regnum
>= I387_PKRU_REGNUM (tdep
)
1346 && regnum
< I387_PKEYSEND_REGNUM (tdep
))
1348 else if (regnum
>= I387_ZMM0H_REGNUM (tdep
)
1349 && regnum
< I387_ZMMENDH_REGNUM (tdep
))
1350 regclass
= avx512_zmm_h
;
1351 else if (regnum
>= I387_K0_REGNUM (tdep
)
1352 && regnum
< I387_KEND_REGNUM (tdep
))
1353 regclass
= avx512_k
;
1354 else if (regnum
>= I387_YMM16H_REGNUM (tdep
)
1355 && regnum
< I387_YMMH_AVX512_END_REGNUM (tdep
))
1356 regclass
= avx512_ymmh_avx512
;
1357 else if (regnum
>= I387_XMM16_REGNUM (tdep
)
1358 && regnum
< I387_XMM_AVX512_END_REGNUM (tdep
))
1359 regclass
= avx512_xmm_avx512
;
1360 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
1361 && regnum
< I387_YMMENDH_REGNUM (tdep
))
1363 else if (regnum
>= I387_BND0R_REGNUM (tdep
)
1364 && regnum
< I387_MPXEND_REGNUM (tdep
))
1366 else if (regnum
>= I387_XMM0_REGNUM (tdep
)
1367 && regnum
< I387_MXCSR_REGNUM (tdep
))
1369 else if (regnum
>= I387_ST0_REGNUM (tdep
)
1370 && regnum
< I387_FCTRL_REGNUM (tdep
))
1377 /* Clear XSAVE extended state. */
1378 memset (regs
, 0, X86_XSTATE_SIZE (tdep
->xcr0
));
1380 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
1381 if (tdep
->xsave_xcr0_offset
!= -1)
1382 memcpy (regs
+ tdep
->xsave_xcr0_offset
, &tdep
->xcr0
, 8);
1383 memcpy (XSAVE_XSTATE_BV_ADDR (regs
), &tdep
->xcr0
, 8);
1386 if ((regclass
& check
))
1388 gdb_byte raw
[I386_MAX_REGISTER_SIZE
];
1389 ULONGEST initial_xstate_bv
, clear_bv
, xstate_bv
= 0;
1391 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1393 /* The supported bits in `xstat_bv' are 8 bytes. */
1394 initial_xstate_bv
= extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs
),
1396 clear_bv
= (~(initial_xstate_bv
)) & tdep
->xcr0
;
1398 /* Clear register set if its bit in xstat_bv is zero. */
1401 if ((clear_bv
& X86_XSTATE_PKRU
))
1402 for (i
= I387_PKRU_REGNUM (tdep
);
1403 i
< I387_PKEYSEND_REGNUM (tdep
); i
++)
1404 memset (XSAVE_PKEYS_ADDR (tdep
, regs
, i
), 0, 4);
1406 if ((clear_bv
& X86_XSTATE_BNDREGS
))
1407 for (i
= I387_BND0R_REGNUM (tdep
);
1408 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1409 memset (XSAVE_MPX_ADDR (tdep
, regs
, i
), 0, 16);
1411 if ((clear_bv
& X86_XSTATE_BNDCFG
))
1412 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1413 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1414 memset (XSAVE_MPX_ADDR (tdep
, regs
, i
), 0, 8);
1416 if ((clear_bv
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1417 for (i
= I387_ZMM0H_REGNUM (tdep
);
1418 i
< I387_ZMMENDH_REGNUM (tdep
); i
++)
1419 memset (XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, i
), 0, 32);
1421 if ((clear_bv
& X86_XSTATE_K
))
1422 for (i
= I387_K0_REGNUM (tdep
);
1423 i
< I387_KEND_REGNUM (tdep
); i
++)
1424 memset (XSAVE_AVX512_K_ADDR (tdep
, regs
, i
), 0, 8);
1426 if ((clear_bv
& X86_XSTATE_ZMM
))
1428 for (i
= I387_YMM16H_REGNUM (tdep
);
1429 i
< I387_YMMH_AVX512_END_REGNUM (tdep
); i
++)
1430 memset (XSAVE_YMM_AVX512_ADDR (tdep
, regs
, i
), 0, 16);
1431 for (i
= I387_XMM16_REGNUM (tdep
);
1432 i
< I387_XMM_AVX512_END_REGNUM (tdep
); i
++)
1433 memset (XSAVE_XMM_AVX512_ADDR (tdep
, regs
, i
), 0, 16);
1436 if ((clear_bv
& X86_XSTATE_AVX
))
1437 for (i
= I387_YMM0H_REGNUM (tdep
);
1438 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
1439 memset (XSAVE_AVXH_ADDR (tdep
, regs
, i
), 0, 16);
1441 if ((clear_bv
& X86_XSTATE_SSE
))
1442 for (i
= I387_XMM0_REGNUM (tdep
);
1443 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1444 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 16);
1446 if ((clear_bv
& X86_XSTATE_X87
))
1447 for (i
= I387_ST0_REGNUM (tdep
);
1448 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1449 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 10);
1452 if (regclass
== all
)
1454 /* Check if any PKEYS registers are changed. */
1455 if ((tdep
->xcr0
& X86_XSTATE_PKRU
))
1456 for (i
= I387_PKRU_REGNUM (tdep
);
1457 i
< I387_PKEYSEND_REGNUM (tdep
); i
++)
1459 regcache_raw_collect (regcache
, i
, raw
);
1460 p
= XSAVE_PKEYS_ADDR (tdep
, regs
, i
);
1461 if (memcmp (raw
, p
, 4) != 0)
1463 xstate_bv
|= X86_XSTATE_PKRU
;
1468 /* Check if any ZMMH registers are changed. */
1469 if ((tdep
->xcr0
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1470 for (i
= I387_ZMM0H_REGNUM (tdep
);
1471 i
< I387_ZMMENDH_REGNUM (tdep
); i
++)
1473 regcache_raw_collect (regcache
, i
, raw
);
1474 p
= XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, i
);
1475 if (memcmp (raw
, p
, 32) != 0)
1477 xstate_bv
|= (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
);
1478 memcpy (p
, raw
, 32);
1482 /* Check if any K registers are changed. */
1483 if ((tdep
->xcr0
& X86_XSTATE_K
))
1484 for (i
= I387_K0_REGNUM (tdep
);
1485 i
< I387_KEND_REGNUM (tdep
); i
++)
1487 regcache_raw_collect (regcache
, i
, raw
);
1488 p
= XSAVE_AVX512_K_ADDR (tdep
, regs
, i
);
1489 if (memcmp (raw
, p
, 8) != 0)
1491 xstate_bv
|= X86_XSTATE_K
;
1496 /* Check if any XMM or upper YMM registers are changed. */
1497 if ((tdep
->xcr0
& X86_XSTATE_ZMM
))
1499 for (i
= I387_YMM16H_REGNUM (tdep
);
1500 i
< I387_YMMH_AVX512_END_REGNUM (tdep
); i
++)
1502 regcache_raw_collect (regcache
, i
, raw
);
1503 p
= XSAVE_YMM_AVX512_ADDR (tdep
, regs
, i
);
1504 if (memcmp (raw
, p
, 16) != 0)
1506 xstate_bv
|= X86_XSTATE_ZMM
;
1507 memcpy (p
, raw
, 16);
1510 for (i
= I387_XMM16_REGNUM (tdep
);
1511 i
< I387_XMM_AVX512_END_REGNUM (tdep
); i
++)
1513 regcache_raw_collect (regcache
, i
, raw
);
1514 p
= XSAVE_XMM_AVX512_ADDR (tdep
, regs
, i
);
1515 if (memcmp (raw
, p
, 16) != 0)
1517 xstate_bv
|= X86_XSTATE_ZMM
;
1518 memcpy (p
, raw
, 16);
1523 /* Check if any upper YMM registers are changed. */
1524 if ((tdep
->xcr0
& X86_XSTATE_AVX
))
1525 for (i
= I387_YMM0H_REGNUM (tdep
);
1526 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
1528 regcache_raw_collect (regcache
, i
, raw
);
1529 p
= XSAVE_AVXH_ADDR (tdep
, regs
, i
);
1530 if (memcmp (raw
, p
, 16))
1532 xstate_bv
|= X86_XSTATE_AVX
;
1533 memcpy (p
, raw
, 16);
1536 /* Check if any upper MPX registers are changed. */
1537 if ((tdep
->xcr0
& X86_XSTATE_BNDREGS
))
1538 for (i
= I387_BND0R_REGNUM (tdep
);
1539 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1541 regcache_raw_collect (regcache
, i
, raw
);
1542 p
= XSAVE_MPX_ADDR (tdep
, regs
, i
);
1543 if (memcmp (raw
, p
, 16))
1545 xstate_bv
|= X86_XSTATE_BNDREGS
;
1546 memcpy (p
, raw
, 16);
1550 /* Check if any upper MPX registers are changed. */
1551 if ((tdep
->xcr0
& X86_XSTATE_BNDCFG
))
1552 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1553 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1555 regcache_raw_collect (regcache
, i
, raw
);
1556 p
= XSAVE_MPX_ADDR (tdep
, regs
, i
);
1557 if (memcmp (raw
, p
, 8))
1559 xstate_bv
|= X86_XSTATE_BNDCFG
;
1564 /* Check if any SSE registers are changed. */
1565 if ((tdep
->xcr0
& X86_XSTATE_SSE
))
1566 for (i
= I387_XMM0_REGNUM (tdep
);
1567 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1569 regcache_raw_collect (regcache
, i
, raw
);
1570 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1571 if (memcmp (raw
, p
, 16))
1573 xstate_bv
|= X86_XSTATE_SSE
;
1574 memcpy (p
, raw
, 16);
1578 /* Check if any X87 registers are changed. */
1579 if ((tdep
->xcr0
& X86_XSTATE_X87
))
1580 for (i
= I387_ST0_REGNUM (tdep
);
1581 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1583 regcache_raw_collect (regcache
, i
, raw
);
1584 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1585 if (memcmp (raw
, p
, 10))
1587 xstate_bv
|= X86_XSTATE_X87
;
1588 memcpy (p
, raw
, 10);
1594 /* Check if REGNUM is changed. */
1595 regcache_raw_collect (regcache
, regnum
, raw
);
1600 internal_error (__FILE__
, __LINE__
,
1601 _("invalid i387 regclass"));
1604 /* This is a PKEYS register. */
1605 p
= XSAVE_PKEYS_ADDR (tdep
, regs
, regnum
);
1606 if (memcmp (raw
, p
, 4) != 0)
1608 xstate_bv
|= X86_XSTATE_PKRU
;
1614 /* This is a ZMM register. */
1615 p
= XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, regnum
);
1616 if (memcmp (raw
, p
, 32) != 0)
1618 xstate_bv
|= (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
);
1619 memcpy (p
, raw
, 32);
1623 /* This is a AVX512 mask register. */
1624 p
= XSAVE_AVX512_K_ADDR (tdep
, regs
, regnum
);
1625 if (memcmp (raw
, p
, 8) != 0)
1627 xstate_bv
|= X86_XSTATE_K
;
1632 case avx512_ymmh_avx512
:
1633 /* This is an upper YMM16-31 register. */
1634 p
= XSAVE_YMM_AVX512_ADDR (tdep
, regs
, regnum
);
1635 if (memcmp (raw
, p
, 16) != 0)
1637 xstate_bv
|= X86_XSTATE_ZMM
;
1638 memcpy (p
, raw
, 16);
1642 case avx512_xmm_avx512
:
1643 /* This is an upper XMM16-31 register. */
1644 p
= XSAVE_XMM_AVX512_ADDR (tdep
, regs
, regnum
);
1645 if (memcmp (raw
, p
, 16) != 0)
1647 xstate_bv
|= X86_XSTATE_ZMM
;
1648 memcpy (p
, raw
, 16);
1653 /* This is an upper YMM register. */
1654 p
= XSAVE_AVXH_ADDR (tdep
, regs
, regnum
);
1655 if (memcmp (raw
, p
, 16))
1657 xstate_bv
|= X86_XSTATE_AVX
;
1658 memcpy (p
, raw
, 16);
1663 if (regnum
< I387_BNDCFGU_REGNUM (tdep
))
1665 regcache_raw_collect (regcache
, regnum
, raw
);
1666 p
= XSAVE_MPX_ADDR (tdep
, regs
, regnum
);
1667 if (memcmp (raw
, p
, 16))
1669 xstate_bv
|= X86_XSTATE_BNDREGS
;
1670 memcpy (p
, raw
, 16);
1675 p
= XSAVE_MPX_ADDR (tdep
, regs
, regnum
);
1676 xstate_bv
|= X86_XSTATE_BNDCFG
;
1682 /* This is an SSE register. */
1683 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1684 if (memcmp (raw
, p
, 16))
1686 xstate_bv
|= X86_XSTATE_SSE
;
1687 memcpy (p
, raw
, 16);
1692 /* This is an x87 register. */
1693 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1694 if (memcmp (raw
, p
, 10))
1696 xstate_bv
|= X86_XSTATE_X87
;
1697 memcpy (p
, raw
, 10);
1703 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1704 registers are changed. */
1707 /* The supported bits in `xstat_bv' are 8 bytes. */
1708 initial_xstate_bv
|= xstate_bv
;
1709 store_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs
),
1716 internal_error (__FILE__
, __LINE__
,
1717 _("invalid i387 regclass"));
1728 case avx512_ymmh_avx512
:
1729 case avx512_xmm_avx512
:
1731 /* Register REGNUM has been updated. Return. */
1737 /* Return if REGNUM isn't changed. */
1738 if (regclass
!= all
)
1743 /* Only handle x87 control registers. */
1744 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
1745 if (regnum
== -1 || regnum
== i
)
1747 /* Most of the FPU control registers occupy only 16 bits in
1748 the xsave extended state. Give those a special treatment. */
1749 if (i
!= I387_FIOFF_REGNUM (tdep
)
1750 && i
!= I387_FOOFF_REGNUM (tdep
))
1754 regcache_raw_collect (regcache
, i
, buf
);
1756 if (i
== I387_FOP_REGNUM (tdep
))
1758 /* The opcode occupies only 11 bits. Make sure we
1759 don't touch the other bits. */
1760 buf
[1] &= ((1 << 3) - 1);
1761 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
1763 else if (i
== I387_FTAG_REGNUM (tdep
))
1765 /* Converting back is much easier. */
1767 unsigned short ftag
;
1770 ftag
= (buf
[1] << 8) | buf
[0];
1774 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
1776 int tag
= (ftag
>> (fpreg
* 2)) & 3;
1779 buf
[0] |= (1 << fpreg
);
1782 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
1785 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1788 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
1789 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
1790 FXSAVE_MXCSR_ADDR (regs
));
1793 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1797 i387_tag (const gdb_byte
*raw
)
1800 unsigned int exponent
;
1801 unsigned long fraction
[2];
1803 integer
= raw
[7] & 0x80;
1804 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
1805 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
1806 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
1807 | (raw
[5] << 8) | raw
[4]);
1809 if (exponent
== 0x7fff)
1814 else if (exponent
== 0x0000)
1816 if (fraction
[0] == 0x0000 && fraction
[1] == 0x0000 && !integer
)
1842 /* Prepare the FPU stack in REGCACHE for a function return. */
1845 i387_return_value (struct gdbarch
*gdbarch
, struct regcache
*regcache
)
1847 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1850 /* Set the top of the floating-point register stack to 7. The
1851 actual value doesn't really matter, but 7 is what a normal
1852 function return would end up with if the program started out with
1853 a freshly initialized FPU. */
1854 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1856 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1858 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1859 floating-point register stack to 7, the appropriate value for the
1860 tag word is 0x3fff. */
1861 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
1865 /* See i387-tdep.h. */
1868 i387_reset_bnd_regs (struct gdbarch
*gdbarch
, struct regcache
*regcache
)
1870 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1872 if (I387_BND0R_REGNUM (tdep
) > 0)
1874 gdb_byte bnd_buf
[16];
1876 memset (bnd_buf
, 0, 16);
1877 for (int i
= 0; i
< I387_NUM_BND_REGS
; i
++)
1878 regcache_raw_write (regcache
, I387_BND0R_REGNUM (tdep
) + i
, bnd_buf
);