1 /* Intel 387 floating point stuff.
3 Copyright (C) 1988-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "floatformat.h"
30 #include "i386-tdep.h"
31 #include "i387-tdep.h"
32 #include "x86-xstate.h"
34 /* Print the floating point number specified by RAW. */
37 print_i387_value (struct gdbarch
*gdbarch
,
38 const gdb_byte
*raw
, struct ui_file
*file
)
42 /* Using extract_typed_floating here might affect the representation
43 of certain numbers such as NaNs, even if GDB is running natively.
44 This is fine since our caller already detects such special
45 numbers and we print the hexadecimal representation anyway. */
46 value
= extract_typed_floating (raw
, i387_ext_type (gdbarch
));
48 /* We try to print 19 digits. The last digit may or may not contain
49 garbage, but we'd better print one too many. We need enough room
50 to print the value, 1 position for the sign, 1 for the decimal
51 point, 19 for the digits and 6 for the exponent adds up to 27. */
52 #ifdef PRINTF_HAS_LONG_DOUBLE
53 fprintf_filtered (file
, " %-+27.19Lg", (long double) value
);
55 fprintf_filtered (file
, " %-+27.19g", (double) value
);
59 /* Print the classification for the register contents RAW. */
62 print_i387_ext (struct gdbarch
*gdbarch
,
63 const gdb_byte
*raw
, struct ui_file
*file
)
67 unsigned int exponent
;
68 unsigned long fraction
[2];
71 integer
= raw
[7] & 0x80;
72 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
73 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
74 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
75 | (raw
[5] << 8) | raw
[4]);
77 if (exponent
== 0x7fff && integer
)
79 if (fraction
[0] == 0x00000000 && fraction
[1] == 0x00000000)
81 fprintf_filtered (file
, " %cInf", (sign
? '-' : '+'));
82 else if (sign
&& fraction
[0] == 0x00000000 && fraction
[1] == 0x40000000)
83 /* Real Indefinite (QNaN). */
84 fputs_unfiltered (" Real Indefinite (QNaN)", file
);
85 else if (fraction
[1] & 0x40000000)
87 fputs_filtered (" QNaN", file
);
90 fputs_filtered (" SNaN", file
);
92 else if (exponent
< 0x7fff && exponent
> 0x0000 && integer
)
94 print_i387_value (gdbarch
, raw
, file
);
95 else if (exponent
== 0x0000)
97 /* Denormal or zero. */
98 print_i387_value (gdbarch
, raw
, file
);
101 /* Pseudo-denormal. */
102 fputs_filtered (" Pseudo-denormal", file
);
103 else if (fraction
[0] || fraction
[1])
105 fputs_filtered (" Denormal", file
);
109 fputs_filtered (" Unsupported", file
);
112 /* Print the status word STATUS. If STATUS_P is false, then STATUS
116 print_i387_status_word (int status_p
,
117 unsigned int status
, struct ui_file
*file
)
119 fprintf_filtered (file
, "Status Word: ");
122 fprintf_filtered (file
, "%s\n", _("<unavailable>"));
126 fprintf_filtered (file
, "%s", hex_string_custom (status
, 4));
127 fputs_filtered (" ", file
);
128 fprintf_filtered (file
, " %s", (status
& 0x0001) ? "IE" : " ");
129 fprintf_filtered (file
, " %s", (status
& 0x0002) ? "DE" : " ");
130 fprintf_filtered (file
, " %s", (status
& 0x0004) ? "ZE" : " ");
131 fprintf_filtered (file
, " %s", (status
& 0x0008) ? "OE" : " ");
132 fprintf_filtered (file
, " %s", (status
& 0x0010) ? "UE" : " ");
133 fprintf_filtered (file
, " %s", (status
& 0x0020) ? "PE" : " ");
134 fputs_filtered (" ", file
);
135 fprintf_filtered (file
, " %s", (status
& 0x0080) ? "ES" : " ");
136 fputs_filtered (" ", file
);
137 fprintf_filtered (file
, " %s", (status
& 0x0040) ? "SF" : " ");
138 fputs_filtered (" ", file
);
139 fprintf_filtered (file
, " %s", (status
& 0x0100) ? "C0" : " ");
140 fprintf_filtered (file
, " %s", (status
& 0x0200) ? "C1" : " ");
141 fprintf_filtered (file
, " %s", (status
& 0x0400) ? "C2" : " ");
142 fprintf_filtered (file
, " %s", (status
& 0x4000) ? "C3" : " ");
144 fputs_filtered ("\n", file
);
146 fprintf_filtered (file
,
147 " TOP: %d\n", ((status
>> 11) & 7));
150 /* Print the control word CONTROL. If CONTROL_P is false, then
151 CONTROL was unavailable. */
154 print_i387_control_word (int control_p
,
155 unsigned int control
, struct ui_file
*file
)
157 fprintf_filtered (file
, "Control Word: ");
160 fprintf_filtered (file
, "%s\n", _("<unavailable>"));
164 fprintf_filtered (file
, "%s", hex_string_custom (control
, 4));
165 fputs_filtered (" ", file
);
166 fprintf_filtered (file
, " %s", (control
& 0x0001) ? "IM" : " ");
167 fprintf_filtered (file
, " %s", (control
& 0x0002) ? "DM" : " ");
168 fprintf_filtered (file
, " %s", (control
& 0x0004) ? "ZM" : " ");
169 fprintf_filtered (file
, " %s", (control
& 0x0008) ? "OM" : " ");
170 fprintf_filtered (file
, " %s", (control
& 0x0010) ? "UM" : " ");
171 fprintf_filtered (file
, " %s", (control
& 0x0020) ? "PM" : " ");
173 fputs_filtered ("\n", file
);
175 fputs_filtered (" PC: ", file
);
176 switch ((control
>> 8) & 3)
179 fputs_filtered ("Single Precision (24-bits)\n", file
);
182 fputs_filtered ("Reserved\n", file
);
185 fputs_filtered ("Double Precision (53-bits)\n", file
);
188 fputs_filtered ("Extended Precision (64-bits)\n", file
);
192 fputs_filtered (" RC: ", file
);
193 switch ((control
>> 10) & 3)
196 fputs_filtered ("Round to nearest\n", file
);
199 fputs_filtered ("Round down\n", file
);
202 fputs_filtered ("Round up\n", file
);
205 fputs_filtered ("Round toward zero\n", file
);
210 /* Print out the i387 floating point state. Note that we ignore FRAME
211 in the code below. That's OK since floating-point registers are
212 never saved on the stack. */
215 i387_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
216 struct frame_info
*frame
, const char *args
)
218 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
238 gdb_assert (gdbarch
== get_frame_arch (frame
));
240 fctrl_p
= read_frame_register_unsigned (frame
,
241 I387_FCTRL_REGNUM (tdep
), &fctrl
);
242 fstat_p
= read_frame_register_unsigned (frame
,
243 I387_FSTAT_REGNUM (tdep
), &fstat
);
244 ftag_p
= read_frame_register_unsigned (frame
,
245 I387_FTAG_REGNUM (tdep
), &ftag
);
246 fiseg_p
= read_frame_register_unsigned (frame
,
247 I387_FISEG_REGNUM (tdep
), &fiseg
);
248 fioff_p
= read_frame_register_unsigned (frame
,
249 I387_FIOFF_REGNUM (tdep
), &fioff
);
250 foseg_p
= read_frame_register_unsigned (frame
,
251 I387_FOSEG_REGNUM (tdep
), &foseg
);
252 fooff_p
= read_frame_register_unsigned (frame
,
253 I387_FOOFF_REGNUM (tdep
), &fooff
);
254 fop_p
= read_frame_register_unsigned (frame
,
255 I387_FOP_REGNUM (tdep
), &fop
);
259 top
= ((fstat
>> 11) & 7);
261 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
263 struct value
*regval
;
268 fprintf_filtered (file
, "%sR%d: ", fpreg
== top
? "=>" : " ", fpreg
);
272 tag
= (ftag
>> (fpreg
* 2)) & 3;
277 fputs_filtered ("Valid ", file
);
280 fputs_filtered ("Zero ", file
);
283 fputs_filtered ("Special ", file
);
286 fputs_filtered ("Empty ", file
);
291 fputs_filtered ("Unknown ", file
);
293 regnum
= (fpreg
+ 8 - top
) % 8 + I387_ST0_REGNUM (tdep
);
294 regval
= get_frame_register_value (frame
, regnum
);
296 if (value_entirely_available (regval
))
298 const gdb_byte
*raw
= value_contents (regval
);
300 fputs_filtered ("0x", file
);
301 for (i
= 9; i
>= 0; i
--)
302 fprintf_filtered (file
, "%02x", raw
[i
]);
304 if (tag
!= -1 && tag
!= 3)
305 print_i387_ext (gdbarch
, raw
, file
);
308 fprintf_filtered (file
, "%s", _("<unavailable>"));
310 fputs_filtered ("\n", file
);
314 fputs_filtered ("\n", file
);
315 print_i387_status_word (fstat_p
, fstat
, file
);
316 print_i387_control_word (fctrl_p
, fctrl
, file
);
317 fprintf_filtered (file
, "Tag Word: %s\n",
318 ftag_p
? hex_string_custom (ftag
, 4) : _("<unavailable>"));
319 fprintf_filtered (file
, "Instruction Pointer: %s:",
320 fiseg_p
? hex_string_custom (fiseg
, 2) : _("<unavailable>"));
321 fprintf_filtered (file
, "%s\n",
322 fioff_p
? hex_string_custom (fioff
, 8) : _("<unavailable>"));
323 fprintf_filtered (file
, "Operand Pointer: %s:",
324 foseg_p
? hex_string_custom (foseg
, 2) : _("<unavailable>"));
325 fprintf_filtered (file
, "%s\n",
326 fooff_p
? hex_string_custom (fooff
, 8) : _("<unavailable>"));
327 fprintf_filtered (file
, "Opcode: %s\n",
329 ? (hex_string_custom (fop
? (fop
| 0xd800) : 0, 4))
330 : _("<unavailable>"));
334 /* Return nonzero if a value of type TYPE stored in register REGNUM
335 needs any special handling. */
338 i387_convert_register_p (struct gdbarch
*gdbarch
, int regnum
,
341 if (i386_fp_regnum_p (gdbarch
, regnum
))
343 /* Floating point registers must be converted unless we are
344 accessing them in their hardware type or TYPE is not float. */
345 if (type
== i387_ext_type (gdbarch
)
346 || TYPE_CODE (type
) != TYPE_CODE_FLT
)
355 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
356 return its contents in TO. */
359 i387_register_to_value (struct frame_info
*frame
, int regnum
,
360 struct type
*type
, gdb_byte
*to
,
361 int *optimizedp
, int *unavailablep
)
363 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
364 gdb_byte from
[I386_MAX_REGISTER_SIZE
];
366 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
368 /* We only support floating-point values. */
369 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
371 warning (_("Cannot convert floating-point register value "
372 "to non-floating-point type."));
373 *optimizedp
= *unavailablep
= 0;
377 /* Convert to TYPE. */
378 if (!get_frame_register_bytes (frame
, regnum
, 0,
379 register_size (gdbarch
, regnum
),
380 from
, optimizedp
, unavailablep
))
383 convert_typed_floating (from
, i387_ext_type (gdbarch
), to
, type
);
384 *optimizedp
= *unavailablep
= 0;
388 /* Write the contents FROM of a value of type TYPE into register
389 REGNUM in frame FRAME. */
392 i387_value_to_register (struct frame_info
*frame
, int regnum
,
393 struct type
*type
, const gdb_byte
*from
)
395 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
396 gdb_byte to
[I386_MAX_REGISTER_SIZE
];
398 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
400 /* We only support floating-point values. */
401 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
403 warning (_("Cannot convert non-floating-point type "
404 "to floating-point register value."));
408 /* Convert from TYPE. */
409 convert_typed_floating (from
, type
, to
, i387_ext_type (gdbarch
));
410 put_frame_register (frame
, regnum
, to
);
414 /* Handle FSAVE and FXSAVE formats. */
416 /* At fsave_offset[REGNUM] you'll find the offset to the location in
417 the data structure used by the "fsave" instruction where GDB
418 register REGNUM is stored. */
420 static int fsave_offset
[] =
422 28 + 0 * 10, /* %st(0) ... */
429 28 + 7 * 10, /* ... %st(7). */
430 0, /* `fctrl' (16 bits). */
431 4, /* `fstat' (16 bits). */
432 8, /* `ftag' (16 bits). */
433 16, /* `fiseg' (16 bits). */
435 24, /* `foseg' (16 bits). */
437 18 /* `fop' (bottom 11 bits). */
440 #define FSAVE_ADDR(tdep, fsave, regnum) \
441 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
444 /* Fill register REGNUM in REGCACHE with the appropriate value from
445 *FSAVE. This function masks off any of the reserved bits in
449 i387_supply_fsave (struct regcache
*regcache
, int regnum
, const void *fsave
)
451 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
452 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
453 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
454 const gdb_byte
*regs
= (const gdb_byte
*) fsave
;
457 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
459 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
460 if (regnum
== -1 || regnum
== i
)
464 regcache_raw_supply (regcache
, i
, NULL
);
468 /* Most of the FPU control registers occupy only 16 bits in the
469 fsave area. Give those a special treatment. */
470 if (i
>= I387_FCTRL_REGNUM (tdep
)
471 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
475 memcpy (val
, FSAVE_ADDR (tdep
, regs
, i
), 2);
477 if (i
== I387_FOP_REGNUM (tdep
))
478 val
[1] &= ((1 << 3) - 1);
479 regcache_raw_supply (regcache
, i
, val
);
482 regcache_raw_supply (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
485 /* Provide dummy values for the SSE registers. */
486 for (i
= I387_XMM0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
487 if (regnum
== -1 || regnum
== i
)
488 regcache_raw_supply (regcache
, i
, NULL
);
489 if (regnum
== -1 || regnum
== I387_MXCSR_REGNUM (tdep
))
493 store_unsigned_integer (buf
, 4, byte_order
, 0x1f80);
494 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), buf
);
498 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE
499 with the value from REGCACHE. If REGNUM is -1, do this for all
500 registers. This function doesn't touch any of the reserved bits in
504 i387_collect_fsave (const struct regcache
*regcache
, int regnum
, void *fsave
)
506 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
507 gdb_byte
*regs
= (gdb_byte
*) fsave
;
510 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
512 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
513 if (regnum
== -1 || regnum
== i
)
515 /* Most of the FPU control registers occupy only 16 bits in
516 the fsave area. Give those a special treatment. */
517 if (i
>= I387_FCTRL_REGNUM (tdep
)
518 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
522 regcache_raw_collect (regcache
, i
, buf
);
524 if (i
== I387_FOP_REGNUM (tdep
))
526 /* The opcode occupies only 11 bits. Make sure we
527 don't touch the other bits. */
528 buf
[1] &= ((1 << 3) - 1);
529 buf
[1] |= ((FSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
531 memcpy (FSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
534 regcache_raw_collect (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
539 /* At fxsave_offset[REGNUM] you'll find the offset to the location in
540 the data structure used by the "fxsave" instruction where GDB
541 register REGNUM is stored. */
543 static int fxsave_offset
[] =
545 32, /* %st(0) through ... */
552 144, /* ... %st(7) (80 bits each). */
553 0, /* `fctrl' (16 bits). */
554 2, /* `fstat' (16 bits). */
555 4, /* `ftag' (16 bits). */
556 12, /* `fiseg' (16 bits). */
558 20, /* `foseg' (16 bits). */
560 6, /* `fop' (bottom 11 bits). */
561 160 + 0 * 16, /* %xmm0 through ... */
576 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
579 #define FXSAVE_ADDR(tdep, fxsave, regnum) \
580 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
582 /* We made an unfortunate choice in putting %mxcsr after the SSE
583 registers %xmm0-%xmm7 instead of before, since it makes supporting
584 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
585 don't include the offset for %mxcsr here above. */
587 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
589 static int i387_tag (const gdb_byte
*raw
);
592 /* Fill register REGNUM in REGCACHE with the appropriate
593 floating-point or SSE register value from *FXSAVE. This function
594 masks off any of the reserved bits in *FXSAVE. */
597 i387_supply_fxsave (struct regcache
*regcache
, int regnum
, const void *fxsave
)
599 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
600 const gdb_byte
*regs
= (const gdb_byte
*) fxsave
;
603 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
604 gdb_assert (tdep
->num_xmm_regs
> 0);
606 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
607 if (regnum
== -1 || regnum
== i
)
611 regcache_raw_supply (regcache
, i
, NULL
);
615 /* Most of the FPU control registers occupy only 16 bits in
616 the fxsave area. Give those a special treatment. */
617 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
618 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
622 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
624 if (i
== I387_FOP_REGNUM (tdep
))
625 val
[1] &= ((1 << 3) - 1);
626 else if (i
== I387_FTAG_REGNUM (tdep
))
628 /* The fxsave area contains a simplified version of
629 the tag word. We have to look at the actual 80-bit
630 FP data to recreate the traditional i387 tag word. */
632 unsigned long ftag
= 0;
636 top
= ((FXSAVE_ADDR (tdep
, regs
,
637 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
640 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
644 if (val
[0] & (1 << fpreg
))
646 int thisreg
= (fpreg
+ 8 - top
) % 8
647 + I387_ST0_REGNUM (tdep
);
648 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
653 ftag
|= tag
<< (2 * fpreg
);
655 val
[0] = ftag
& 0xff;
656 val
[1] = (ftag
>> 8) & 0xff;
658 regcache_raw_supply (regcache
, i
, val
);
661 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
664 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
667 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), NULL
);
669 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
670 FXSAVE_MXCSR_ADDR (regs
));
674 /* Fill register REGNUM (if it is a floating-point or SSE register) in
675 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
676 all registers. This function doesn't touch any of the reserved
680 i387_collect_fxsave (const struct regcache
*regcache
, int regnum
, void *fxsave
)
682 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
683 gdb_byte
*regs
= (gdb_byte
*) fxsave
;
686 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
687 gdb_assert (tdep
->num_xmm_regs
> 0);
689 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
690 if (regnum
== -1 || regnum
== i
)
692 /* Most of the FPU control registers occupy only 16 bits in
693 the fxsave area. Give those a special treatment. */
694 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
695 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
699 regcache_raw_collect (regcache
, i
, buf
);
701 if (i
== I387_FOP_REGNUM (tdep
))
703 /* The opcode occupies only 11 bits. Make sure we
704 don't touch the other bits. */
705 buf
[1] &= ((1 << 3) - 1);
706 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
708 else if (i
== I387_FTAG_REGNUM (tdep
))
710 /* Converting back is much easier. */
715 ftag
= (buf
[1] << 8) | buf
[0];
719 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
721 int tag
= (ftag
>> (fpreg
* 2)) & 3;
724 buf
[0] |= (1 << fpreg
);
727 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
730 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
733 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
734 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
735 FXSAVE_MXCSR_ADDR (regs
));
738 /* `xstate_bv' is at byte offset 512. */
739 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
741 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
742 the upper 128bit of AVX register data structure used by the "xsave"
743 instruction where GDB register REGNUM is stored. */
745 static int xsave_avxh_offset
[] =
747 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
762 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
765 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
766 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
768 /* At xsave_ymm_avx512_offset[REGNUM] you'll find the offset to the location in
769 the upper 128bit of ZMM register data structure used by the "xsave"
770 instruction where GDB register REGNUM is stored. */
772 static int xsave_ymm_avx512_offset
[] =
774 /* HI16_ZMM_area + 16 bytes + regnum* 64 bytes. */
775 1664 + 16 + 0 * 64, /* %ymm16 through... */
790 1664 + 16 + 15 * 64 /* ... %ymm31 (128 bits each). */
793 #define XSAVE_YMM_AVX512_ADDR(tdep, xsave, regnum) \
794 (xsave + xsave_ymm_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)])
796 static int xsave_xmm_avx512_offset
[] =
798 1664 + 0 * 64, /* %ymm16 through... */
813 1664 + 15 * 64 /* ... %ymm31 (128 bits each). */
816 #define XSAVE_XMM_AVX512_ADDR(tdep, xsave, regnum) \
817 (xsave + xsave_xmm_avx512_offset[regnum - I387_XMM16_REGNUM (tdep)])
819 static int xsave_mpx_offset
[] = {
820 960 + 0 * 16, /* bnd0r...bnd3r registers. */
824 1024 + 0 * 8, /* bndcfg ... bndstatus. */
828 #define XSAVE_MPX_ADDR(tdep, xsave, regnum) \
829 (xsave + xsave_mpx_offset[regnum - I387_BND0R_REGNUM (tdep)])
831 /* At xsave_avx512__h_offset[REGNUM] you find the offset to the location
832 of the AVX512 opmask register data structure used by the "xsave"
833 instruction where GDB register REGNUM is stored. */
835 static int xsave_avx512_k_offset
[] =
837 1088 + 0 * 8, /* %k0 through... */
844 1088 + 7 * 8 /* %k7 (64 bits each). */
847 #define XSAVE_AVX512_K_ADDR(tdep, xsave, regnum) \
848 (xsave + xsave_avx512_k_offset[regnum - I387_K0_REGNUM (tdep)])
850 /* At xsave_avx512_zmm_h_offset[REGNUM] you find the offset to the location in
851 the upper 256bit of AVX512 ZMMH register data structure used by the "xsave"
852 instruction where GDB register REGNUM is stored. */
854 static int xsave_avx512_zmm_h_offset
[] =
857 1152 + 1 * 32, /* Upper 256bit of %zmmh0 through... */
871 1152 + 15 * 32, /* Upper 256bit of... %zmmh15 (256 bits each). */
872 1664 + 32 + 0 * 64, /* Upper 256bit of... %zmmh16 (256 bits each). */
887 1664 + 32 + 15 * 64 /* Upper 256bit of... %zmmh31 (256 bits each). */
890 #define XSAVE_AVX512_ZMM_H_ADDR(tdep, xsave, regnum) \
891 (xsave + xsave_avx512_zmm_h_offset[regnum - I387_ZMM0H_REGNUM (tdep)])
893 /* At xsave_pkeys_offset[REGNUM] you find the offset to the location
894 of the PKRU register data structure used by the "xsave"
895 instruction where GDB register REGNUM is stored. */
897 static int xsave_pkeys_offset
[] =
899 2688 + 0 * 8 /* %pkru (64 bits in XSTATE, 32-bit actually used by
900 instructions and applications). */
903 #define XSAVE_PKEYS_ADDR(tdep, xsave, regnum) \
904 (xsave + xsave_pkeys_offset[regnum - I387_PKRU_REGNUM (tdep)])
906 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */
909 i387_supply_xsave (struct regcache
*regcache
, int regnum
,
912 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
913 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
914 const gdb_byte
*regs
= (const gdb_byte
*) xsave
;
917 static const gdb_byte zero
[I386_MAX_REGISTER_SIZE
] = { 0 };
927 avx512_ymmh_avx512
= 0x40,
928 avx512_xmm_avx512
= 0x80,
930 all
= x87
| sse
| avxh
| mpx
| avx512_k
| avx512_zmm_h
931 | avx512_ymmh_avx512
| avx512_xmm_avx512
| pkeys
934 gdb_assert (regs
!= NULL
);
935 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
936 gdb_assert (tdep
->num_xmm_regs
> 0);
940 else if (regnum
>= I387_PKRU_REGNUM (tdep
)
941 && regnum
< I387_PKEYSEND_REGNUM (tdep
))
943 else if (regnum
>= I387_ZMM0H_REGNUM (tdep
)
944 && regnum
< I387_ZMMENDH_REGNUM (tdep
))
945 regclass
= avx512_zmm_h
;
946 else if (regnum
>= I387_K0_REGNUM (tdep
)
947 && regnum
< I387_KEND_REGNUM (tdep
))
949 else if (regnum
>= I387_YMM16H_REGNUM (tdep
)
950 && regnum
< I387_YMMH_AVX512_END_REGNUM (tdep
))
951 regclass
= avx512_ymmh_avx512
;
952 else if (regnum
>= I387_XMM16_REGNUM (tdep
)
953 && regnum
< I387_XMM_AVX512_END_REGNUM (tdep
))
954 regclass
= avx512_xmm_avx512
;
955 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
956 && regnum
< I387_YMMENDH_REGNUM (tdep
))
958 else if (regnum
>= I387_BND0R_REGNUM (tdep
)
959 && regnum
< I387_MPXEND_REGNUM (tdep
))
961 else if (regnum
>= I387_XMM0_REGNUM (tdep
)
962 && regnum
< I387_MXCSR_REGNUM (tdep
))
964 else if (regnum
>= I387_ST0_REGNUM (tdep
)
965 && regnum
< I387_FCTRL_REGNUM (tdep
))
970 if (regclass
!= none
)
972 /* Get `xstat_bv'. The supported bits in `xstat_bv' are 8 bytes. */
973 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
974 ULONGEST xstate_bv
= 0;
976 xstate_bv
= extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs
),
979 /* Clear part in vector registers if its bit in xstat_bv is zero. */
980 clear_bv
= (~(xstate_bv
)) & tdep
->xcr0
;
983 clear_bv
= X86_XSTATE_ALL_MASK
;
985 /* With the delayed xsave mechanism, in between the program
986 starting, and the program accessing the vector registers for the
987 first time, the register's values are invalid. The kernel
988 initializes register states to zero when they are set the first
989 time in a program. This means that from the user-space programs'
990 perspective, it's the same as if the registers have always been
991 zero from the start of the program. Therefore, the debugger
992 should provide the same illusion to the user. */
1000 if ((clear_bv
& X86_XSTATE_PKRU
))
1001 regcache_raw_supply (regcache
, regnum
, zero
);
1003 regcache_raw_supply (regcache
, regnum
,
1004 XSAVE_PKEYS_ADDR (tdep
, regs
, regnum
));
1008 if ((clear_bv
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1009 regcache_raw_supply (regcache
, regnum
, zero
);
1011 regcache_raw_supply (regcache
, regnum
,
1012 XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, regnum
));
1016 if ((clear_bv
& X86_XSTATE_K
))
1017 regcache_raw_supply (regcache
, regnum
, zero
);
1019 regcache_raw_supply (regcache
, regnum
,
1020 XSAVE_AVX512_K_ADDR (tdep
, regs
, regnum
));
1023 case avx512_ymmh_avx512
:
1024 if ((clear_bv
& X86_XSTATE_ZMM
))
1025 regcache_raw_supply (regcache
, regnum
, zero
);
1027 regcache_raw_supply (regcache
, regnum
,
1028 XSAVE_YMM_AVX512_ADDR (tdep
, regs
, regnum
));
1031 case avx512_xmm_avx512
:
1032 if ((clear_bv
& X86_XSTATE_ZMM
))
1033 regcache_raw_supply (regcache
, regnum
, zero
);
1035 regcache_raw_supply (regcache
, regnum
,
1036 XSAVE_XMM_AVX512_ADDR (tdep
, regs
, regnum
));
1040 if ((clear_bv
& X86_XSTATE_AVX
))
1041 regcache_raw_supply (regcache
, regnum
, zero
);
1043 regcache_raw_supply (regcache
, regnum
,
1044 XSAVE_AVXH_ADDR (tdep
, regs
, regnum
));
1048 if ((clear_bv
& X86_XSTATE_BNDREGS
))
1049 regcache_raw_supply (regcache
, regnum
, zero
);
1051 regcache_raw_supply (regcache
, regnum
,
1052 XSAVE_MPX_ADDR (tdep
, regs
, regnum
));
1056 if ((clear_bv
& X86_XSTATE_SSE
))
1057 regcache_raw_supply (regcache
, regnum
, zero
);
1059 regcache_raw_supply (regcache
, regnum
,
1060 FXSAVE_ADDR (tdep
, regs
, regnum
));
1064 if ((clear_bv
& X86_XSTATE_X87
))
1065 regcache_raw_supply (regcache
, regnum
, zero
);
1067 regcache_raw_supply (regcache
, regnum
,
1068 FXSAVE_ADDR (tdep
, regs
, regnum
));
1072 /* Handle PKEYS registers. */
1073 if ((tdep
->xcr0
& X86_XSTATE_PKRU
))
1075 if ((clear_bv
& X86_XSTATE_PKRU
))
1077 for (i
= I387_PKRU_REGNUM (tdep
);
1078 i
< I387_PKEYSEND_REGNUM (tdep
);
1080 regcache_raw_supply (regcache
, i
, zero
);
1084 for (i
= I387_PKRU_REGNUM (tdep
);
1085 i
< I387_PKEYSEND_REGNUM (tdep
);
1087 regcache_raw_supply (regcache
, i
,
1088 XSAVE_PKEYS_ADDR (tdep
, regs
, i
));
1092 /* Handle the upper ZMM registers. */
1093 if ((tdep
->xcr0
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1095 if ((clear_bv
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1097 for (i
= I387_ZMM0H_REGNUM (tdep
);
1098 i
< I387_ZMMENDH_REGNUM (tdep
);
1100 regcache_raw_supply (regcache
, i
, zero
);
1104 for (i
= I387_ZMM0H_REGNUM (tdep
);
1105 i
< I387_ZMMENDH_REGNUM (tdep
);
1107 regcache_raw_supply (regcache
, i
,
1108 XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, i
));
1112 /* Handle AVX512 OpMask registers. */
1113 if ((tdep
->xcr0
& X86_XSTATE_K
))
1115 if ((clear_bv
& X86_XSTATE_K
))
1117 for (i
= I387_K0_REGNUM (tdep
);
1118 i
< I387_KEND_REGNUM (tdep
);
1120 regcache_raw_supply (regcache
, i
, zero
);
1124 for (i
= I387_K0_REGNUM (tdep
);
1125 i
< I387_KEND_REGNUM (tdep
);
1127 regcache_raw_supply (regcache
, i
,
1128 XSAVE_AVX512_K_ADDR (tdep
, regs
, i
));
1132 /* Handle the YMM_AVX512 registers. */
1133 if ((tdep
->xcr0
& X86_XSTATE_ZMM
))
1135 if ((clear_bv
& X86_XSTATE_ZMM
))
1137 for (i
= I387_YMM16H_REGNUM (tdep
);
1138 i
< I387_YMMH_AVX512_END_REGNUM (tdep
);
1140 regcache_raw_supply (regcache
, i
, zero
);
1141 for (i
= I387_XMM16_REGNUM (tdep
);
1142 i
< I387_XMM_AVX512_END_REGNUM (tdep
);
1144 regcache_raw_supply (regcache
, i
, zero
);
1148 for (i
= I387_YMM16H_REGNUM (tdep
);
1149 i
< I387_YMMH_AVX512_END_REGNUM (tdep
);
1151 regcache_raw_supply (regcache
, i
,
1152 XSAVE_YMM_AVX512_ADDR (tdep
, regs
, i
));
1153 for (i
= I387_XMM16_REGNUM (tdep
);
1154 i
< I387_XMM_AVX512_END_REGNUM (tdep
);
1156 regcache_raw_supply (regcache
, i
,
1157 XSAVE_XMM_AVX512_ADDR (tdep
, regs
, i
));
1160 /* Handle the upper YMM registers. */
1161 if ((tdep
->xcr0
& X86_XSTATE_AVX
))
1163 if ((clear_bv
& X86_XSTATE_AVX
))
1165 for (i
= I387_YMM0H_REGNUM (tdep
);
1166 i
< I387_YMMENDH_REGNUM (tdep
);
1168 regcache_raw_supply (regcache
, i
, zero
);
1172 for (i
= I387_YMM0H_REGNUM (tdep
);
1173 i
< I387_YMMENDH_REGNUM (tdep
);
1175 regcache_raw_supply (regcache
, i
,
1176 XSAVE_AVXH_ADDR (tdep
, regs
, i
));
1180 /* Handle the MPX registers. */
1181 if ((tdep
->xcr0
& X86_XSTATE_BNDREGS
))
1183 if (clear_bv
& X86_XSTATE_BNDREGS
)
1185 for (i
= I387_BND0R_REGNUM (tdep
);
1186 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1187 regcache_raw_supply (regcache
, i
, zero
);
1191 for (i
= I387_BND0R_REGNUM (tdep
);
1192 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1193 regcache_raw_supply (regcache
, i
,
1194 XSAVE_MPX_ADDR (tdep
, regs
, i
));
1198 /* Handle the MPX registers. */
1199 if ((tdep
->xcr0
& X86_XSTATE_BNDCFG
))
1201 if (clear_bv
& X86_XSTATE_BNDCFG
)
1203 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1204 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1205 regcache_raw_supply (regcache
, i
, zero
);
1209 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1210 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1211 regcache_raw_supply (regcache
, i
,
1212 XSAVE_MPX_ADDR (tdep
, regs
, i
));
1216 /* Handle the XMM registers. */
1217 if ((tdep
->xcr0
& X86_XSTATE_SSE
))
1219 if ((clear_bv
& X86_XSTATE_SSE
))
1221 for (i
= I387_XMM0_REGNUM (tdep
);
1222 i
< I387_MXCSR_REGNUM (tdep
);
1224 regcache_raw_supply (regcache
, i
, zero
);
1228 for (i
= I387_XMM0_REGNUM (tdep
);
1229 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1230 regcache_raw_supply (regcache
, i
,
1231 FXSAVE_ADDR (tdep
, regs
, i
));
1235 /* Handle the x87 registers. */
1236 if ((tdep
->xcr0
& X86_XSTATE_X87
))
1238 if ((clear_bv
& X86_XSTATE_X87
))
1240 for (i
= I387_ST0_REGNUM (tdep
);
1241 i
< I387_FCTRL_REGNUM (tdep
);
1243 regcache_raw_supply (regcache
, i
, zero
);
1247 for (i
= I387_ST0_REGNUM (tdep
);
1248 i
< I387_FCTRL_REGNUM (tdep
);
1250 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1256 /* Only handle x87 control registers. */
1257 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
1258 if (regnum
== -1 || regnum
== i
)
1260 /* Most of the FPU control registers occupy only 16 bits in
1261 the xsave extended state. Give those a special treatment. */
1262 if (i
!= I387_FIOFF_REGNUM (tdep
)
1263 && i
!= I387_FOOFF_REGNUM (tdep
))
1267 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
1268 val
[2] = val
[3] = 0;
1269 if (i
== I387_FOP_REGNUM (tdep
))
1270 val
[1] &= ((1 << 3) - 1);
1271 else if (i
== I387_FTAG_REGNUM (tdep
))
1273 /* The fxsave area contains a simplified version of
1274 the tag word. We have to look at the actual 80-bit
1275 FP data to recreate the traditional i387 tag word. */
1277 unsigned long ftag
= 0;
1281 top
= ((FXSAVE_ADDR (tdep
, regs
,
1282 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
1285 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
1289 if (val
[0] & (1 << fpreg
))
1291 int thisreg
= (fpreg
+ 8 - top
) % 8
1292 + I387_ST0_REGNUM (tdep
);
1293 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
1296 tag
= 3; /* Empty */
1298 ftag
|= tag
<< (2 * fpreg
);
1300 val
[0] = ftag
& 0xff;
1301 val
[1] = (ftag
>> 8) & 0xff;
1303 regcache_raw_supply (regcache
, i
, val
);
1306 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1309 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
1310 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
1311 FXSAVE_MXCSR_ADDR (regs
));
1314 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */
1317 i387_collect_xsave (const struct regcache
*regcache
, int regnum
,
1318 void *xsave
, int gcore
)
1320 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1321 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1322 gdb_byte
*regs
= (gdb_byte
*) xsave
;
1332 avx512_k
= 0x20 | check
,
1333 avx512_zmm_h
= 0x40 | check
,
1334 avx512_ymmh_avx512
= 0x80 | check
,
1335 avx512_xmm_avx512
= 0x100 | check
,
1336 pkeys
= 0x200 | check
,
1337 all
= x87
| sse
| avxh
| mpx
| avx512_k
| avx512_zmm_h
1338 | avx512_ymmh_avx512
| avx512_xmm_avx512
| pkeys
1341 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
1342 gdb_assert (tdep
->num_xmm_regs
> 0);
1346 else if (regnum
>= I387_PKRU_REGNUM (tdep
)
1347 && regnum
< I387_PKEYSEND_REGNUM (tdep
))
1349 else if (regnum
>= I387_ZMM0H_REGNUM (tdep
)
1350 && regnum
< I387_ZMMENDH_REGNUM (tdep
))
1351 regclass
= avx512_zmm_h
;
1352 else if (regnum
>= I387_K0_REGNUM (tdep
)
1353 && regnum
< I387_KEND_REGNUM (tdep
))
1354 regclass
= avx512_k
;
1355 else if (regnum
>= I387_YMM16H_REGNUM (tdep
)
1356 && regnum
< I387_YMMH_AVX512_END_REGNUM (tdep
))
1357 regclass
= avx512_ymmh_avx512
;
1358 else if (regnum
>= I387_XMM16_REGNUM (tdep
)
1359 && regnum
< I387_XMM_AVX512_END_REGNUM (tdep
))
1360 regclass
= avx512_xmm_avx512
;
1361 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
1362 && regnum
< I387_YMMENDH_REGNUM (tdep
))
1364 else if (regnum
>= I387_BND0R_REGNUM (tdep
)
1365 && regnum
< I387_MPXEND_REGNUM (tdep
))
1367 else if (regnum
>= I387_XMM0_REGNUM (tdep
)
1368 && regnum
< I387_MXCSR_REGNUM (tdep
))
1370 else if (regnum
>= I387_ST0_REGNUM (tdep
)
1371 && regnum
< I387_FCTRL_REGNUM (tdep
))
1378 /* Clear XSAVE extended state. */
1379 memset (regs
, 0, X86_XSTATE_SIZE (tdep
->xcr0
));
1381 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
1382 if (tdep
->xsave_xcr0_offset
!= -1)
1383 memcpy (regs
+ tdep
->xsave_xcr0_offset
, &tdep
->xcr0
, 8);
1384 memcpy (XSAVE_XSTATE_BV_ADDR (regs
), &tdep
->xcr0
, 8);
1387 if ((regclass
& check
))
1389 gdb_byte raw
[I386_MAX_REGISTER_SIZE
];
1390 ULONGEST initial_xstate_bv
, clear_bv
, xstate_bv
= 0;
1392 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1394 /* The supported bits in `xstat_bv' are 8 bytes. */
1395 initial_xstate_bv
= extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs
),
1397 clear_bv
= (~(initial_xstate_bv
)) & tdep
->xcr0
;
1399 /* Clear register set if its bit in xstat_bv is zero. */
1402 if ((clear_bv
& X86_XSTATE_PKRU
))
1403 for (i
= I387_PKRU_REGNUM (tdep
);
1404 i
< I387_PKEYSEND_REGNUM (tdep
); i
++)
1405 memset (XSAVE_PKEYS_ADDR (tdep
, regs
, i
), 0, 4);
1407 if ((clear_bv
& X86_XSTATE_BNDREGS
))
1408 for (i
= I387_BND0R_REGNUM (tdep
);
1409 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1410 memset (XSAVE_MPX_ADDR (tdep
, regs
, i
), 0, 16);
1412 if ((clear_bv
& X86_XSTATE_BNDCFG
))
1413 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1414 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1415 memset (XSAVE_MPX_ADDR (tdep
, regs
, i
), 0, 8);
1417 if ((clear_bv
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1418 for (i
= I387_ZMM0H_REGNUM (tdep
);
1419 i
< I387_ZMMENDH_REGNUM (tdep
); i
++)
1420 memset (XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, i
), 0, 32);
1422 if ((clear_bv
& X86_XSTATE_K
))
1423 for (i
= I387_K0_REGNUM (tdep
);
1424 i
< I387_KEND_REGNUM (tdep
); i
++)
1425 memset (XSAVE_AVX512_K_ADDR (tdep
, regs
, i
), 0, 8);
1427 if ((clear_bv
& X86_XSTATE_ZMM
))
1429 for (i
= I387_YMM16H_REGNUM (tdep
);
1430 i
< I387_YMMH_AVX512_END_REGNUM (tdep
); i
++)
1431 memset (XSAVE_YMM_AVX512_ADDR (tdep
, regs
, i
), 0, 16);
1432 for (i
= I387_XMM16_REGNUM (tdep
);
1433 i
< I387_XMM_AVX512_END_REGNUM (tdep
); i
++)
1434 memset (XSAVE_XMM_AVX512_ADDR (tdep
, regs
, i
), 0, 16);
1437 if ((clear_bv
& X86_XSTATE_AVX
))
1438 for (i
= I387_YMM0H_REGNUM (tdep
);
1439 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
1440 memset (XSAVE_AVXH_ADDR (tdep
, regs
, i
), 0, 16);
1442 if ((clear_bv
& X86_XSTATE_SSE
))
1443 for (i
= I387_XMM0_REGNUM (tdep
);
1444 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1445 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 16);
1447 if ((clear_bv
& X86_XSTATE_X87
))
1448 for (i
= I387_ST0_REGNUM (tdep
);
1449 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1450 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 10);
1453 if (regclass
== all
)
1455 /* Check if any PKEYS registers are changed. */
1456 if ((tdep
->xcr0
& X86_XSTATE_PKRU
))
1457 for (i
= I387_PKRU_REGNUM (tdep
);
1458 i
< I387_PKEYSEND_REGNUM (tdep
); i
++)
1460 regcache_raw_collect (regcache
, i
, raw
);
1461 p
= XSAVE_PKEYS_ADDR (tdep
, regs
, i
);
1462 if (memcmp (raw
, p
, 4) != 0)
1464 xstate_bv
|= X86_XSTATE_PKRU
;
1469 /* Check if any ZMMH registers are changed. */
1470 if ((tdep
->xcr0
& (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
)))
1471 for (i
= I387_ZMM0H_REGNUM (tdep
);
1472 i
< I387_ZMMENDH_REGNUM (tdep
); i
++)
1474 regcache_raw_collect (regcache
, i
, raw
);
1475 p
= XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, i
);
1476 if (memcmp (raw
, p
, 32) != 0)
1478 xstate_bv
|= (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
);
1479 memcpy (p
, raw
, 32);
1483 /* Check if any K registers are changed. */
1484 if ((tdep
->xcr0
& X86_XSTATE_K
))
1485 for (i
= I387_K0_REGNUM (tdep
);
1486 i
< I387_KEND_REGNUM (tdep
); i
++)
1488 regcache_raw_collect (regcache
, i
, raw
);
1489 p
= XSAVE_AVX512_K_ADDR (tdep
, regs
, i
);
1490 if (memcmp (raw
, p
, 8) != 0)
1492 xstate_bv
|= X86_XSTATE_K
;
1497 /* Check if any XMM or upper YMM registers are changed. */
1498 if ((tdep
->xcr0
& X86_XSTATE_ZMM
))
1500 for (i
= I387_YMM16H_REGNUM (tdep
);
1501 i
< I387_YMMH_AVX512_END_REGNUM (tdep
); i
++)
1503 regcache_raw_collect (regcache
, i
, raw
);
1504 p
= XSAVE_YMM_AVX512_ADDR (tdep
, regs
, i
);
1505 if (memcmp (raw
, p
, 16) != 0)
1507 xstate_bv
|= X86_XSTATE_ZMM
;
1508 memcpy (p
, raw
, 16);
1511 for (i
= I387_XMM16_REGNUM (tdep
);
1512 i
< I387_XMM_AVX512_END_REGNUM (tdep
); i
++)
1514 regcache_raw_collect (regcache
, i
, raw
);
1515 p
= XSAVE_XMM_AVX512_ADDR (tdep
, regs
, i
);
1516 if (memcmp (raw
, p
, 16) != 0)
1518 xstate_bv
|= X86_XSTATE_ZMM
;
1519 memcpy (p
, raw
, 16);
1524 /* Check if any upper YMM registers are changed. */
1525 if ((tdep
->xcr0
& X86_XSTATE_AVX
))
1526 for (i
= I387_YMM0H_REGNUM (tdep
);
1527 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
1529 regcache_raw_collect (regcache
, i
, raw
);
1530 p
= XSAVE_AVXH_ADDR (tdep
, regs
, i
);
1531 if (memcmp (raw
, p
, 16))
1533 xstate_bv
|= X86_XSTATE_AVX
;
1534 memcpy (p
, raw
, 16);
1537 /* Check if any upper MPX registers are changed. */
1538 if ((tdep
->xcr0
& X86_XSTATE_BNDREGS
))
1539 for (i
= I387_BND0R_REGNUM (tdep
);
1540 i
< I387_BNDCFGU_REGNUM (tdep
); i
++)
1542 regcache_raw_collect (regcache
, i
, raw
);
1543 p
= XSAVE_MPX_ADDR (tdep
, regs
, i
);
1544 if (memcmp (raw
, p
, 16))
1546 xstate_bv
|= X86_XSTATE_BNDREGS
;
1547 memcpy (p
, raw
, 16);
1551 /* Check if any upper MPX registers are changed. */
1552 if ((tdep
->xcr0
& X86_XSTATE_BNDCFG
))
1553 for (i
= I387_BNDCFGU_REGNUM (tdep
);
1554 i
< I387_MPXEND_REGNUM (tdep
); i
++)
1556 regcache_raw_collect (regcache
, i
, raw
);
1557 p
= XSAVE_MPX_ADDR (tdep
, regs
, i
);
1558 if (memcmp (raw
, p
, 8))
1560 xstate_bv
|= X86_XSTATE_BNDCFG
;
1565 /* Check if any SSE registers are changed. */
1566 if ((tdep
->xcr0
& X86_XSTATE_SSE
))
1567 for (i
= I387_XMM0_REGNUM (tdep
);
1568 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1570 regcache_raw_collect (regcache
, i
, raw
);
1571 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1572 if (memcmp (raw
, p
, 16))
1574 xstate_bv
|= X86_XSTATE_SSE
;
1575 memcpy (p
, raw
, 16);
1579 /* Check if any X87 registers are changed. */
1580 if ((tdep
->xcr0
& X86_XSTATE_X87
))
1581 for (i
= I387_ST0_REGNUM (tdep
);
1582 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1584 regcache_raw_collect (regcache
, i
, raw
);
1585 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1586 if (memcmp (raw
, p
, 10))
1588 xstate_bv
|= X86_XSTATE_X87
;
1589 memcpy (p
, raw
, 10);
1595 /* Check if REGNUM is changed. */
1596 regcache_raw_collect (regcache
, regnum
, raw
);
1601 internal_error (__FILE__
, __LINE__
,
1602 _("invalid i387 regclass"));
1605 /* This is a PKEYS register. */
1606 p
= XSAVE_PKEYS_ADDR (tdep
, regs
, regnum
);
1607 if (memcmp (raw
, p
, 4) != 0)
1609 xstate_bv
|= X86_XSTATE_PKRU
;
1615 /* This is a ZMM register. */
1616 p
= XSAVE_AVX512_ZMM_H_ADDR (tdep
, regs
, regnum
);
1617 if (memcmp (raw
, p
, 32) != 0)
1619 xstate_bv
|= (X86_XSTATE_ZMM_H
| X86_XSTATE_ZMM
);
1620 memcpy (p
, raw
, 32);
1624 /* This is a AVX512 mask register. */
1625 p
= XSAVE_AVX512_K_ADDR (tdep
, regs
, regnum
);
1626 if (memcmp (raw
, p
, 8) != 0)
1628 xstate_bv
|= X86_XSTATE_K
;
1633 case avx512_ymmh_avx512
:
1634 /* This is an upper YMM16-31 register. */
1635 p
= XSAVE_YMM_AVX512_ADDR (tdep
, regs
, regnum
);
1636 if (memcmp (raw
, p
, 16) != 0)
1638 xstate_bv
|= X86_XSTATE_ZMM
;
1639 memcpy (p
, raw
, 16);
1643 case avx512_xmm_avx512
:
1644 /* This is an upper XMM16-31 register. */
1645 p
= XSAVE_XMM_AVX512_ADDR (tdep
, regs
, regnum
);
1646 if (memcmp (raw
, p
, 16) != 0)
1648 xstate_bv
|= X86_XSTATE_ZMM
;
1649 memcpy (p
, raw
, 16);
1654 /* This is an upper YMM register. */
1655 p
= XSAVE_AVXH_ADDR (tdep
, regs
, regnum
);
1656 if (memcmp (raw
, p
, 16))
1658 xstate_bv
|= X86_XSTATE_AVX
;
1659 memcpy (p
, raw
, 16);
1664 if (regnum
< I387_BNDCFGU_REGNUM (tdep
))
1666 regcache_raw_collect (regcache
, regnum
, raw
);
1667 p
= XSAVE_MPX_ADDR (tdep
, regs
, regnum
);
1668 if (memcmp (raw
, p
, 16))
1670 xstate_bv
|= X86_XSTATE_BNDREGS
;
1671 memcpy (p
, raw
, 16);
1676 p
= XSAVE_MPX_ADDR (tdep
, regs
, regnum
);
1677 xstate_bv
|= X86_XSTATE_BNDCFG
;
1683 /* This is an SSE register. */
1684 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1685 if (memcmp (raw
, p
, 16))
1687 xstate_bv
|= X86_XSTATE_SSE
;
1688 memcpy (p
, raw
, 16);
1693 /* This is an x87 register. */
1694 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1695 if (memcmp (raw
, p
, 10))
1697 xstate_bv
|= X86_XSTATE_X87
;
1698 memcpy (p
, raw
, 10);
1704 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1705 registers are changed. */
1708 /* The supported bits in `xstat_bv' are 8 bytes. */
1709 initial_xstate_bv
|= xstate_bv
;
1710 store_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs
),
1717 internal_error (__FILE__
, __LINE__
,
1718 _("invalid i387 regclass"));
1729 case avx512_ymmh_avx512
:
1730 case avx512_xmm_avx512
:
1732 /* Register REGNUM has been updated. Return. */
1738 /* Return if REGNUM isn't changed. */
1739 if (regclass
!= all
)
1744 /* Only handle x87 control registers. */
1745 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
1746 if (regnum
== -1 || regnum
== i
)
1748 /* Most of the FPU control registers occupy only 16 bits in
1749 the xsave extended state. Give those a special treatment. */
1750 if (i
!= I387_FIOFF_REGNUM (tdep
)
1751 && i
!= I387_FOOFF_REGNUM (tdep
))
1755 regcache_raw_collect (regcache
, i
, buf
);
1757 if (i
== I387_FOP_REGNUM (tdep
))
1759 /* The opcode occupies only 11 bits. Make sure we
1760 don't touch the other bits. */
1761 buf
[1] &= ((1 << 3) - 1);
1762 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
1764 else if (i
== I387_FTAG_REGNUM (tdep
))
1766 /* Converting back is much easier. */
1768 unsigned short ftag
;
1771 ftag
= (buf
[1] << 8) | buf
[0];
1775 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
1777 int tag
= (ftag
>> (fpreg
* 2)) & 3;
1780 buf
[0] |= (1 << fpreg
);
1783 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
1786 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1789 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
1790 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
1791 FXSAVE_MXCSR_ADDR (regs
));
1794 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1798 i387_tag (const gdb_byte
*raw
)
1801 unsigned int exponent
;
1802 unsigned long fraction
[2];
1804 integer
= raw
[7] & 0x80;
1805 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
1806 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
1807 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
1808 | (raw
[5] << 8) | raw
[4]);
1810 if (exponent
== 0x7fff)
1815 else if (exponent
== 0x0000)
1817 if (fraction
[0] == 0x0000 && fraction
[1] == 0x0000 && !integer
)
1843 /* Prepare the FPU stack in REGCACHE for a function return. */
1846 i387_return_value (struct gdbarch
*gdbarch
, struct regcache
*regcache
)
1848 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1851 /* Set the top of the floating-point register stack to 7. The
1852 actual value doesn't really matter, but 7 is what a normal
1853 function return would end up with if the program started out with
1854 a freshly initialized FPU. */
1855 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1857 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1859 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1860 floating-point register stack to 7, the appropriate value for the
1861 tag word is 0x3fff. */
1862 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
1866 /* See i387-tdep.h. */
1869 i387_reset_bnd_regs (struct gdbarch
*gdbarch
, struct regcache
*regcache
)
1871 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1873 if (I387_BND0R_REGNUM (tdep
) > 0)
1875 gdb_byte bnd_buf
[16];
1877 memset (bnd_buf
, 0, 16);
1878 for (int i
= 0; i
< I387_NUM_BND_REGS
; i
++)
1879 regcache_raw_write (regcache
, I387_BND0R_REGNUM (tdep
) + i
, bnd_buf
);