1 /* Intel 387 floating point stuff.
3 Copyright (C) 1988-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "floatformat.h"
30 #include "gdb_assert.h"
31 #include "gdb_string.h"
33 #include "i386-tdep.h"
34 #include "i387-tdep.h"
35 #include "i386-xstate.h"
37 /* Print the floating point number specified by RAW. */
40 print_i387_value (struct gdbarch
*gdbarch
,
41 const gdb_byte
*raw
, struct ui_file
*file
)
45 /* Using extract_typed_floating here might affect the representation
46 of certain numbers such as NaNs, even if GDB is running natively.
47 This is fine since our caller already detects such special
48 numbers and we print the hexadecimal representation anyway. */
49 value
= extract_typed_floating (raw
, i387_ext_type (gdbarch
));
51 /* We try to print 19 digits. The last digit may or may not contain
52 garbage, but we'd better print one too many. We need enough room
53 to print the value, 1 position for the sign, 1 for the decimal
54 point, 19 for the digits and 6 for the exponent adds up to 27. */
55 #ifdef PRINTF_HAS_LONG_DOUBLE
56 fprintf_filtered (file
, " %-+27.19Lg", (long double) value
);
58 fprintf_filtered (file
, " %-+27.19g", (double) value
);
62 /* Print the classification for the register contents RAW. */
65 print_i387_ext (struct gdbarch
*gdbarch
,
66 const gdb_byte
*raw
, struct ui_file
*file
)
70 unsigned int exponent
;
71 unsigned long fraction
[2];
74 integer
= raw
[7] & 0x80;
75 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
76 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
77 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
78 | (raw
[5] << 8) | raw
[4]);
80 if (exponent
== 0x7fff && integer
)
82 if (fraction
[0] == 0x00000000 && fraction
[1] == 0x00000000)
84 fprintf_filtered (file
, " %cInf", (sign
? '-' : '+'));
85 else if (sign
&& fraction
[0] == 0x00000000 && fraction
[1] == 0x40000000)
86 /* Real Indefinite (QNaN). */
87 fputs_unfiltered (" Real Indefinite (QNaN)", file
);
88 else if (fraction
[1] & 0x40000000)
90 fputs_filtered (" QNaN", file
);
93 fputs_filtered (" SNaN", file
);
95 else if (exponent
< 0x7fff && exponent
> 0x0000 && integer
)
97 print_i387_value (gdbarch
, raw
, file
);
98 else if (exponent
== 0x0000)
100 /* Denormal or zero. */
101 print_i387_value (gdbarch
, raw
, file
);
104 /* Pseudo-denormal. */
105 fputs_filtered (" Pseudo-denormal", file
);
106 else if (fraction
[0] || fraction
[1])
108 fputs_filtered (" Denormal", file
);
112 fputs_filtered (" Unsupported", file
);
115 /* Print the status word STATUS. If STATUS_P is false, then STATUS
119 print_i387_status_word (int status_p
,
120 unsigned int status
, struct ui_file
*file
)
122 fprintf_filtered (file
, "Status Word: ");
125 fprintf_filtered (file
, "%s\n", _("<unavailable>"));
129 fprintf_filtered (file
, "%s", hex_string_custom (status
, 4));
130 fputs_filtered (" ", file
);
131 fprintf_filtered (file
, " %s", (status
& 0x0001) ? "IE" : " ");
132 fprintf_filtered (file
, " %s", (status
& 0x0002) ? "DE" : " ");
133 fprintf_filtered (file
, " %s", (status
& 0x0004) ? "ZE" : " ");
134 fprintf_filtered (file
, " %s", (status
& 0x0008) ? "OE" : " ");
135 fprintf_filtered (file
, " %s", (status
& 0x0010) ? "UE" : " ");
136 fprintf_filtered (file
, " %s", (status
& 0x0020) ? "PE" : " ");
137 fputs_filtered (" ", file
);
138 fprintf_filtered (file
, " %s", (status
& 0x0080) ? "ES" : " ");
139 fputs_filtered (" ", file
);
140 fprintf_filtered (file
, " %s", (status
& 0x0040) ? "SF" : " ");
141 fputs_filtered (" ", file
);
142 fprintf_filtered (file
, " %s", (status
& 0x0100) ? "C0" : " ");
143 fprintf_filtered (file
, " %s", (status
& 0x0200) ? "C1" : " ");
144 fprintf_filtered (file
, " %s", (status
& 0x0400) ? "C2" : " ");
145 fprintf_filtered (file
, " %s", (status
& 0x4000) ? "C3" : " ");
147 fputs_filtered ("\n", file
);
149 fprintf_filtered (file
,
150 " TOP: %d\n", ((status
>> 11) & 7));
153 /* Print the control word CONTROL. If CONTROL_P is false, then
154 CONTROL was unavailable. */
157 print_i387_control_word (int control_p
,
158 unsigned int control
, struct ui_file
*file
)
160 fprintf_filtered (file
, "Control Word: ");
163 fprintf_filtered (file
, "%s\n", _("<unavailable>"));
167 fprintf_filtered (file
, "%s", hex_string_custom (control
, 4));
168 fputs_filtered (" ", file
);
169 fprintf_filtered (file
, " %s", (control
& 0x0001) ? "IM" : " ");
170 fprintf_filtered (file
, " %s", (control
& 0x0002) ? "DM" : " ");
171 fprintf_filtered (file
, " %s", (control
& 0x0004) ? "ZM" : " ");
172 fprintf_filtered (file
, " %s", (control
& 0x0008) ? "OM" : " ");
173 fprintf_filtered (file
, " %s", (control
& 0x0010) ? "UM" : " ");
174 fprintf_filtered (file
, " %s", (control
& 0x0020) ? "PM" : " ");
176 fputs_filtered ("\n", file
);
178 fputs_filtered (" PC: ", file
);
179 switch ((control
>> 8) & 3)
182 fputs_filtered ("Single Precision (24-bits)\n", file
);
185 fputs_filtered ("Reserved\n", file
);
188 fputs_filtered ("Double Precision (53-bits)\n", file
);
191 fputs_filtered ("Extended Precision (64-bits)\n", file
);
195 fputs_filtered (" RC: ", file
);
196 switch ((control
>> 10) & 3)
199 fputs_filtered ("Round to nearest\n", file
);
202 fputs_filtered ("Round down\n", file
);
205 fputs_filtered ("Round up\n", file
);
208 fputs_filtered ("Round toward zero\n", file
);
213 /* Print out the i387 floating point state. Note that we ignore FRAME
214 in the code below. That's OK since floating-point registers are
215 never saved on the stack. */
218 i387_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
219 struct frame_info
*frame
, const char *args
)
221 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
241 gdb_assert (gdbarch
== get_frame_arch (frame
));
243 fctrl_p
= read_frame_register_unsigned (frame
,
244 I387_FCTRL_REGNUM (tdep
), &fctrl
);
245 fstat_p
= read_frame_register_unsigned (frame
,
246 I387_FSTAT_REGNUM (tdep
), &fstat
);
247 ftag_p
= read_frame_register_unsigned (frame
,
248 I387_FTAG_REGNUM (tdep
), &ftag
);
249 fiseg_p
= read_frame_register_unsigned (frame
,
250 I387_FISEG_REGNUM (tdep
), &fiseg
);
251 fioff_p
= read_frame_register_unsigned (frame
,
252 I387_FIOFF_REGNUM (tdep
), &fioff
);
253 foseg_p
= read_frame_register_unsigned (frame
,
254 I387_FOSEG_REGNUM (tdep
), &foseg
);
255 fooff_p
= read_frame_register_unsigned (frame
,
256 I387_FOOFF_REGNUM (tdep
), &fooff
);
257 fop_p
= read_frame_register_unsigned (frame
,
258 I387_FOP_REGNUM (tdep
), &fop
);
262 top
= ((fstat
>> 11) & 7);
264 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
266 struct value
*regval
;
271 fprintf_filtered (file
, "%sR%d: ", fpreg
== top
? "=>" : " ", fpreg
);
275 tag
= (ftag
>> (fpreg
* 2)) & 3;
280 fputs_filtered ("Valid ", file
);
283 fputs_filtered ("Zero ", file
);
286 fputs_filtered ("Special ", file
);
289 fputs_filtered ("Empty ", file
);
294 fputs_filtered ("Unknown ", file
);
296 regnum
= (fpreg
+ 8 - top
) % 8 + I387_ST0_REGNUM (tdep
);
297 regval
= get_frame_register_value (frame
, regnum
);
299 if (value_entirely_available (regval
))
301 const char *raw
= value_contents (regval
);
303 fputs_filtered ("0x", file
);
304 for (i
= 9; i
>= 0; i
--)
305 fprintf_filtered (file
, "%02x", raw
[i
]);
307 if (tag
!= -1 && tag
!= 3)
308 print_i387_ext (gdbarch
, raw
, file
);
311 fprintf_filtered (file
, "%s", _("<unavailable>"));
313 fputs_filtered ("\n", file
);
317 fputs_filtered ("\n", file
);
318 print_i387_status_word (fstat_p
, fstat
, file
);
319 print_i387_control_word (fctrl_p
, fctrl
, file
);
320 fprintf_filtered (file
, "Tag Word: %s\n",
321 ftag_p
? hex_string_custom (ftag
, 4) : _("<unavailable>"));
322 fprintf_filtered (file
, "Instruction Pointer: %s:",
323 fiseg_p
? hex_string_custom (fiseg
, 2) : _("<unavailable>"));
324 fprintf_filtered (file
, "%s\n",
325 fioff_p
? hex_string_custom (fioff
, 8) : _("<unavailable>"));
326 fprintf_filtered (file
, "Operand Pointer: %s:",
327 foseg_p
? hex_string_custom (foseg
, 2) : _("<unavailable>"));
328 fprintf_filtered (file
, "%s\n",
329 fooff_p
? hex_string_custom (fooff
, 8) : _("<unavailable>"));
330 fprintf_filtered (file
, "Opcode: %s\n",
332 ? (hex_string_custom (fop
? (fop
| 0xd800) : 0, 4))
333 : _("<unavailable>"));
337 /* Return nonzero if a value of type TYPE stored in register REGNUM
338 needs any special handling. */
341 i387_convert_register_p (struct gdbarch
*gdbarch
, int regnum
,
344 if (i386_fp_regnum_p (gdbarch
, regnum
))
346 /* Floating point registers must be converted unless we are
347 accessing them in their hardware type. */
348 if (type
== i387_ext_type (gdbarch
))
357 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
358 return its contents in TO. */
361 i387_register_to_value (struct frame_info
*frame
, int regnum
,
362 struct type
*type
, gdb_byte
*to
,
363 int *optimizedp
, int *unavailablep
)
365 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
366 gdb_byte from
[I386_MAX_REGISTER_SIZE
];
368 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
370 /* We only support floating-point values. */
371 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
373 warning (_("Cannot convert floating-point register value "
374 "to non-floating-point type."));
375 *optimizedp
= *unavailablep
= 0;
379 /* Convert to TYPE. */
380 if (!get_frame_register_bytes (frame
, regnum
, 0, TYPE_LENGTH (type
),
381 from
, optimizedp
, unavailablep
))
384 convert_typed_floating (from
, i387_ext_type (gdbarch
), to
, type
);
385 *optimizedp
= *unavailablep
= 0;
389 /* Write the contents FROM of a value of type TYPE into register
390 REGNUM in frame FRAME. */
393 i387_value_to_register (struct frame_info
*frame
, int regnum
,
394 struct type
*type
, const gdb_byte
*from
)
396 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
397 gdb_byte to
[I386_MAX_REGISTER_SIZE
];
399 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
401 /* We only support floating-point values. */
402 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
404 warning (_("Cannot convert non-floating-point type "
405 "to floating-point register value."));
409 /* Convert from TYPE. */
410 convert_typed_floating (from
, type
, to
, i387_ext_type (gdbarch
));
411 put_frame_register (frame
, regnum
, to
);
415 /* Handle FSAVE and FXSAVE formats. */
417 /* At fsave_offset[REGNUM] you'll find the offset to the location in
418 the data structure used by the "fsave" instruction where GDB
419 register REGNUM is stored. */
421 static int fsave_offset
[] =
423 28 + 0 * 10, /* %st(0) ... */
430 28 + 7 * 10, /* ... %st(7). */
431 0, /* `fctrl' (16 bits). */
432 4, /* `fstat' (16 bits). */
433 8, /* `ftag' (16 bits). */
434 16, /* `fiseg' (16 bits). */
436 24, /* `foseg' (16 bits). */
438 18 /* `fop' (bottom 11 bits). */
441 #define FSAVE_ADDR(tdep, fsave, regnum) \
442 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
445 /* Fill register REGNUM in REGCACHE with the appropriate value from
446 *FSAVE. This function masks off any of the reserved bits in
450 i387_supply_fsave (struct regcache
*regcache
, int regnum
, const void *fsave
)
452 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
453 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
454 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
455 const gdb_byte
*regs
= fsave
;
458 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
460 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
461 if (regnum
== -1 || regnum
== i
)
465 regcache_raw_supply (regcache
, i
, NULL
);
469 /* Most of the FPU control registers occupy only 16 bits in the
470 fsave area. Give those a special treatment. */
471 if (i
>= I387_FCTRL_REGNUM (tdep
)
472 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
476 memcpy (val
, FSAVE_ADDR (tdep
, regs
, i
), 2);
478 if (i
== I387_FOP_REGNUM (tdep
))
479 val
[1] &= ((1 << 3) - 1);
480 regcache_raw_supply (regcache
, i
, val
);
483 regcache_raw_supply (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
486 /* Provide dummy values for the SSE registers. */
487 for (i
= I387_XMM0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
488 if (regnum
== -1 || regnum
== i
)
489 regcache_raw_supply (regcache
, i
, NULL
);
490 if (regnum
== -1 || regnum
== I387_MXCSR_REGNUM (tdep
))
494 store_unsigned_integer (buf
, 4, byte_order
, 0x1f80);
495 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), buf
);
499 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE
500 with the value from REGCACHE. If REGNUM is -1, do this for all
501 registers. This function doesn't touch any of the reserved bits in
505 i387_collect_fsave (const struct regcache
*regcache
, int regnum
, void *fsave
)
507 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
508 gdb_byte
*regs
= fsave
;
511 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
513 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
514 if (regnum
== -1 || regnum
== i
)
516 /* Most of the FPU control registers occupy only 16 bits in
517 the fsave area. Give those a special treatment. */
518 if (i
>= I387_FCTRL_REGNUM (tdep
)
519 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
523 regcache_raw_collect (regcache
, i
, buf
);
525 if (i
== I387_FOP_REGNUM (tdep
))
527 /* The opcode occupies only 11 bits. Make sure we
528 don't touch the other bits. */
529 buf
[1] &= ((1 << 3) - 1);
530 buf
[1] |= ((FSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
532 memcpy (FSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
535 regcache_raw_collect (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
540 /* At fxsave_offset[REGNUM] you'll find the offset to the location in
541 the data structure used by the "fxsave" instruction where GDB
542 register REGNUM is stored. */
544 static int fxsave_offset
[] =
546 32, /* %st(0) through ... */
553 144, /* ... %st(7) (80 bits each). */
554 0, /* `fctrl' (16 bits). */
555 2, /* `fstat' (16 bits). */
556 4, /* `ftag' (16 bits). */
557 12, /* `fiseg' (16 bits). */
559 20, /* `foseg' (16 bits). */
561 6, /* `fop' (bottom 11 bits). */
562 160 + 0 * 16, /* %xmm0 through ... */
577 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
580 #define FXSAVE_ADDR(tdep, fxsave, regnum) \
581 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
583 /* We made an unfortunate choice in putting %mxcsr after the SSE
584 registers %xmm0-%xmm7 instead of before, since it makes supporting
585 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
586 don't include the offset for %mxcsr here above. */
588 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
590 static int i387_tag (const gdb_byte
*raw
);
593 /* Fill register REGNUM in REGCACHE with the appropriate
594 floating-point or SSE register value from *FXSAVE. This function
595 masks off any of the reserved bits in *FXSAVE. */
598 i387_supply_fxsave (struct regcache
*regcache
, int regnum
, const void *fxsave
)
600 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
601 const gdb_byte
*regs
= fxsave
;
604 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
605 gdb_assert (tdep
->num_xmm_regs
> 0);
607 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
608 if (regnum
== -1 || regnum
== i
)
612 regcache_raw_supply (regcache
, i
, NULL
);
616 /* Most of the FPU control registers occupy only 16 bits in
617 the fxsave area. Give those a special treatment. */
618 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
619 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
623 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
625 if (i
== I387_FOP_REGNUM (tdep
))
626 val
[1] &= ((1 << 3) - 1);
627 else if (i
== I387_FTAG_REGNUM (tdep
))
629 /* The fxsave area contains a simplified version of
630 the tag word. We have to look at the actual 80-bit
631 FP data to recreate the traditional i387 tag word. */
633 unsigned long ftag
= 0;
637 top
= ((FXSAVE_ADDR (tdep
, regs
,
638 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
641 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
645 if (val
[0] & (1 << fpreg
))
647 int thisreg
= (fpreg
+ 8 - top
) % 8
648 + I387_ST0_REGNUM (tdep
);
649 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
654 ftag
|= tag
<< (2 * fpreg
);
656 val
[0] = ftag
& 0xff;
657 val
[1] = (ftag
>> 8) & 0xff;
659 regcache_raw_supply (regcache
, i
, val
);
662 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
665 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
668 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), NULL
);
670 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
671 FXSAVE_MXCSR_ADDR (regs
));
675 /* Fill register REGNUM (if it is a floating-point or SSE register) in
676 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
677 all registers. This function doesn't touch any of the reserved
681 i387_collect_fxsave (const struct regcache
*regcache
, int regnum
, void *fxsave
)
683 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
684 gdb_byte
*regs
= fxsave
;
687 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
688 gdb_assert (tdep
->num_xmm_regs
> 0);
690 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
691 if (regnum
== -1 || regnum
== i
)
693 /* Most of the FPU control registers occupy only 16 bits in
694 the fxsave area. Give those a special treatment. */
695 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
696 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
700 regcache_raw_collect (regcache
, i
, buf
);
702 if (i
== I387_FOP_REGNUM (tdep
))
704 /* The opcode occupies only 11 bits. Make sure we
705 don't touch the other bits. */
706 buf
[1] &= ((1 << 3) - 1);
707 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
709 else if (i
== I387_FTAG_REGNUM (tdep
))
711 /* Converting back is much easier. */
716 ftag
= (buf
[1] << 8) | buf
[0];
720 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
722 int tag
= (ftag
>> (fpreg
* 2)) & 3;
725 buf
[0] |= (1 << fpreg
);
728 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
731 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
734 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
735 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
736 FXSAVE_MXCSR_ADDR (regs
));
739 /* `xstate_bv' is at byte offset 512. */
740 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
742 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
743 the upper 128bit of AVX register data structure used by the "xsave"
744 instruction where GDB register REGNUM is stored. */
746 static int xsave_avxh_offset
[] =
748 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
763 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
766 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
767 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
769 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */
772 i387_supply_xsave (struct regcache
*regcache
, int regnum
,
775 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
776 const gdb_byte
*regs
= xsave
;
778 unsigned int clear_bv
;
779 static const gdb_byte zero
[MAX_REGISTER_SIZE
] = { 0 };
786 all
= x87
| sse
| avxh
789 gdb_assert (regs
!= NULL
);
790 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
791 gdb_assert (tdep
->num_xmm_regs
> 0);
795 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
796 && regnum
< I387_YMMENDH_REGNUM (tdep
))
798 else if (regnum
>= I387_XMM0_REGNUM(tdep
)
799 && regnum
< I387_MXCSR_REGNUM (tdep
))
801 else if (regnum
>= I387_ST0_REGNUM (tdep
)
802 && regnum
< I387_FCTRL_REGNUM (tdep
))
807 if (regclass
!= none
)
809 /* Get `xstat_bv'. */
810 const gdb_byte
*xstate_bv_p
= XSAVE_XSTATE_BV_ADDR (regs
);
812 /* The supported bits in `xstat_bv' are 1 byte. Clear part in
813 vector registers if its bit in xstat_bv is zero. */
814 clear_bv
= (~(*xstate_bv_p
)) & tdep
->xcr0
;
817 clear_bv
= I386_XSTATE_AVX_MASK
;
819 /* With the delayed xsave mechanism, in between the program
820 starting, and the program accessing the vector registers for the
821 first time, the register's values are invalid. The kernel
822 initializes register states to zero when they are set the first
823 time in a program. This means that from the user-space programs'
824 perspective, it's the same as if the registers have always been
825 zero from the start of the program. Therefore, the debugger
826 should provide the same illusion to the user. */
834 if ((clear_bv
& I386_XSTATE_AVX
))
835 regcache_raw_supply (regcache
, regnum
, zero
);
837 regcache_raw_supply (regcache
, regnum
,
838 XSAVE_AVXH_ADDR (tdep
, regs
, regnum
));
842 if ((clear_bv
& I386_XSTATE_SSE
))
843 regcache_raw_supply (regcache
, regnum
, zero
);
845 regcache_raw_supply (regcache
, regnum
,
846 FXSAVE_ADDR (tdep
, regs
, regnum
));
850 if ((clear_bv
& I386_XSTATE_X87
))
851 regcache_raw_supply (regcache
, regnum
, zero
);
853 regcache_raw_supply (regcache
, regnum
,
854 FXSAVE_ADDR (tdep
, regs
, regnum
));
858 /* Handle the upper YMM registers. */
859 if ((tdep
->xcr0
& I386_XSTATE_AVX
))
861 if ((clear_bv
& I386_XSTATE_AVX
))
863 for (i
= I387_YMM0H_REGNUM (tdep
);
864 i
< I387_YMMENDH_REGNUM (tdep
);
866 regcache_raw_supply (regcache
, i
, zero
);
870 for (i
= I387_YMM0H_REGNUM (tdep
);
871 i
< I387_YMMENDH_REGNUM (tdep
);
873 regcache_raw_supply (regcache
, i
,
874 XSAVE_AVXH_ADDR (tdep
, regs
, i
));
878 /* Handle the XMM registers. */
879 if ((tdep
->xcr0
& I386_XSTATE_SSE
))
881 if ((clear_bv
& I386_XSTATE_SSE
))
883 for (i
= I387_XMM0_REGNUM (tdep
);
884 i
< I387_MXCSR_REGNUM (tdep
);
886 regcache_raw_supply (regcache
, i
, zero
);
890 for (i
= I387_XMM0_REGNUM (tdep
);
891 i
< I387_MXCSR_REGNUM (tdep
); i
++)
892 regcache_raw_supply (regcache
, i
,
893 FXSAVE_ADDR (tdep
, regs
, i
));
897 /* Handle the x87 registers. */
898 if ((tdep
->xcr0
& I386_XSTATE_X87
))
900 if ((clear_bv
& I386_XSTATE_X87
))
902 for (i
= I387_ST0_REGNUM (tdep
);
903 i
< I387_FCTRL_REGNUM (tdep
);
905 regcache_raw_supply (regcache
, i
, zero
);
909 for (i
= I387_ST0_REGNUM (tdep
);
910 i
< I387_FCTRL_REGNUM (tdep
);
912 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
918 /* Only handle x87 control registers. */
919 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
920 if (regnum
== -1 || regnum
== i
)
922 /* Most of the FPU control registers occupy only 16 bits in
923 the xsave extended state. Give those a special treatment. */
924 if (i
!= I387_FIOFF_REGNUM (tdep
)
925 && i
!= I387_FOOFF_REGNUM (tdep
))
929 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
931 if (i
== I387_FOP_REGNUM (tdep
))
932 val
[1] &= ((1 << 3) - 1);
933 else if (i
== I387_FTAG_REGNUM (tdep
))
935 /* The fxsave area contains a simplified version of
936 the tag word. We have to look at the actual 80-bit
937 FP data to recreate the traditional i387 tag word. */
939 unsigned long ftag
= 0;
943 top
= ((FXSAVE_ADDR (tdep
, regs
,
944 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
947 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
951 if (val
[0] & (1 << fpreg
))
953 int thisreg
= (fpreg
+ 8 - top
) % 8
954 + I387_ST0_REGNUM (tdep
);
955 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
960 ftag
|= tag
<< (2 * fpreg
);
962 val
[0] = ftag
& 0xff;
963 val
[1] = (ftag
>> 8) & 0xff;
965 regcache_raw_supply (regcache
, i
, val
);
968 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
971 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
972 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
973 FXSAVE_MXCSR_ADDR (regs
));
976 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */
979 i387_collect_xsave (const struct regcache
*regcache
, int regnum
,
980 void *xsave
, int gcore
)
982 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
983 gdb_byte
*regs
= xsave
;
992 all
= x87
| sse
| avxh
995 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
996 gdb_assert (tdep
->num_xmm_regs
> 0);
1000 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
1001 && regnum
< I387_YMMENDH_REGNUM (tdep
))
1003 else if (regnum
>= I387_XMM0_REGNUM(tdep
)
1004 && regnum
< I387_MXCSR_REGNUM (tdep
))
1006 else if (regnum
>= I387_ST0_REGNUM (tdep
)
1007 && regnum
< I387_FCTRL_REGNUM (tdep
))
1014 /* Clear XSAVE extended state. */
1015 memset (regs
, 0, I386_XSTATE_SIZE (tdep
->xcr0
));
1017 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
1018 if (tdep
->xsave_xcr0_offset
!= -1)
1019 memcpy (regs
+ tdep
->xsave_xcr0_offset
, &tdep
->xcr0
, 8);
1020 memcpy (XSAVE_XSTATE_BV_ADDR (regs
), &tdep
->xcr0
, 8);
1023 if ((regclass
& check
))
1025 gdb_byte raw
[I386_MAX_REGISTER_SIZE
];
1026 gdb_byte
*xstate_bv_p
= XSAVE_XSTATE_BV_ADDR (regs
);
1027 unsigned int xstate_bv
= 0;
1028 /* The supported bits in `xstat_bv' are 1 byte. */
1029 unsigned int clear_bv
= (~(*xstate_bv_p
)) & tdep
->xcr0
;
1032 /* Clear register set if its bit in xstat_bv is zero. */
1035 if ((clear_bv
& I386_XSTATE_AVX
))
1036 for (i
= I387_YMM0H_REGNUM (tdep
);
1037 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
1038 memset (XSAVE_AVXH_ADDR (tdep
, regs
, i
), 0, 16);
1040 if ((clear_bv
& I386_XSTATE_SSE
))
1041 for (i
= I387_XMM0_REGNUM (tdep
);
1042 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1043 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 16);
1045 if ((clear_bv
& I386_XSTATE_X87
))
1046 for (i
= I387_ST0_REGNUM (tdep
);
1047 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1048 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 10);
1051 if (regclass
== all
)
1053 /* Check if any upper YMM registers are changed. */
1054 if ((tdep
->xcr0
& I386_XSTATE_AVX
))
1055 for (i
= I387_YMM0H_REGNUM (tdep
);
1056 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
1058 regcache_raw_collect (regcache
, i
, raw
);
1059 p
= XSAVE_AVXH_ADDR (tdep
, regs
, i
);
1060 if (memcmp (raw
, p
, 16))
1062 xstate_bv
|= I386_XSTATE_AVX
;
1063 memcpy (p
, raw
, 16);
1067 /* Check if any SSE registers are changed. */
1068 if ((tdep
->xcr0
& I386_XSTATE_SSE
))
1069 for (i
= I387_XMM0_REGNUM (tdep
);
1070 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1072 regcache_raw_collect (regcache
, i
, raw
);
1073 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1074 if (memcmp (raw
, p
, 16))
1076 xstate_bv
|= I386_XSTATE_SSE
;
1077 memcpy (p
, raw
, 16);
1081 /* Check if any X87 registers are changed. */
1082 if ((tdep
->xcr0
& I386_XSTATE_X87
))
1083 for (i
= I387_ST0_REGNUM (tdep
);
1084 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1086 regcache_raw_collect (regcache
, i
, raw
);
1087 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1088 if (memcmp (raw
, p
, 10))
1090 xstate_bv
|= I386_XSTATE_X87
;
1091 memcpy (p
, raw
, 10);
1097 /* Check if REGNUM is changed. */
1098 regcache_raw_collect (regcache
, regnum
, raw
);
1103 internal_error (__FILE__
, __LINE__
,
1104 _("invalid i387 regclass"));
1107 /* This is an upper YMM register. */
1108 p
= XSAVE_AVXH_ADDR (tdep
, regs
, regnum
);
1109 if (memcmp (raw
, p
, 16))
1111 xstate_bv
|= I386_XSTATE_AVX
;
1112 memcpy (p
, raw
, 16);
1117 /* This is an SSE register. */
1118 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1119 if (memcmp (raw
, p
, 16))
1121 xstate_bv
|= I386_XSTATE_SSE
;
1122 memcpy (p
, raw
, 16);
1127 /* This is an x87 register. */
1128 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1129 if (memcmp (raw
, p
, 10))
1131 xstate_bv
|= I386_XSTATE_X87
;
1132 memcpy (p
, raw
, 10);
1138 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1139 registers are changed. */
1142 /* The supported bits in `xstat_bv' are 1 byte. */
1143 *xstate_bv_p
|= (gdb_byte
) xstate_bv
;
1148 internal_error (__FILE__
, __LINE__
,
1149 _("invalid i387 regclass"));
1157 /* Register REGNUM has been updated. Return. */
1163 /* Return if REGNUM isn't changed. */
1164 if (regclass
!= all
)
1169 /* Only handle x87 control registers. */
1170 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
1171 if (regnum
== -1 || regnum
== i
)
1173 /* Most of the FPU control registers occupy only 16 bits in
1174 the xsave extended state. Give those a special treatment. */
1175 if (i
!= I387_FIOFF_REGNUM (tdep
)
1176 && i
!= I387_FOOFF_REGNUM (tdep
))
1180 regcache_raw_collect (regcache
, i
, buf
);
1182 if (i
== I387_FOP_REGNUM (tdep
))
1184 /* The opcode occupies only 11 bits. Make sure we
1185 don't touch the other bits. */
1186 buf
[1] &= ((1 << 3) - 1);
1187 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
1189 else if (i
== I387_FTAG_REGNUM (tdep
))
1191 /* Converting back is much easier. */
1193 unsigned short ftag
;
1196 ftag
= (buf
[1] << 8) | buf
[0];
1200 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
1202 int tag
= (ftag
>> (fpreg
* 2)) & 3;
1205 buf
[0] |= (1 << fpreg
);
1208 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
1211 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1214 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
1215 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
1216 FXSAVE_MXCSR_ADDR (regs
));
1219 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1223 i387_tag (const gdb_byte
*raw
)
1226 unsigned int exponent
;
1227 unsigned long fraction
[2];
1229 integer
= raw
[7] & 0x80;
1230 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
1231 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
1232 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
1233 | (raw
[5] << 8) | raw
[4]);
1235 if (exponent
== 0x7fff)
1240 else if (exponent
== 0x0000)
1242 if (fraction
[0] == 0x0000 && fraction
[1] == 0x0000 && !integer
)
1268 /* Prepare the FPU stack in REGCACHE for a function return. */
1271 i387_return_value (struct gdbarch
*gdbarch
, struct regcache
*regcache
)
1273 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1276 /* Set the top of the floating-point register stack to 7. The
1277 actual value doesn't really matter, but 7 is what a normal
1278 function return would end up with if the program started out with
1279 a freshly initialized FPU. */
1280 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1282 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1284 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1285 floating-point register stack to 7, the appropriate value for the
1286 tag word is 0x3fff. */
1287 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
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