1 /* Intel 387 floating point stuff.
3 Copyright (C) 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001,
4 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "floatformat.h"
32 #include "gdb_assert.h"
33 #include "gdb_string.h"
35 #include "i386-tdep.h"
36 #include "i387-tdep.h"
37 #include "i386-xstate.h"
39 /* Print the floating point number specified by RAW. */
42 print_i387_value (struct gdbarch
*gdbarch
,
43 const gdb_byte
*raw
, struct ui_file
*file
)
47 /* Using extract_typed_floating here might affect the representation
48 of certain numbers such as NaNs, even if GDB is running natively.
49 This is fine since our caller already detects such special
50 numbers and we print the hexadecimal representation anyway. */
51 value
= extract_typed_floating (raw
, i387_ext_type (gdbarch
));
53 /* We try to print 19 digits. The last digit may or may not contain
54 garbage, but we'd better print one too many. We need enough room
55 to print the value, 1 position for the sign, 1 for the decimal
56 point, 19 for the digits and 6 for the exponent adds up to 27. */
57 #ifdef PRINTF_HAS_LONG_DOUBLE
58 fprintf_filtered (file
, " %-+27.19Lg", (long double) value
);
60 fprintf_filtered (file
, " %-+27.19g", (double) value
);
64 /* Print the classification for the register contents RAW. */
67 print_i387_ext (struct gdbarch
*gdbarch
,
68 const gdb_byte
*raw
, struct ui_file
*file
)
72 unsigned int exponent
;
73 unsigned long fraction
[2];
76 integer
= raw
[7] & 0x80;
77 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
78 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
79 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
80 | (raw
[5] << 8) | raw
[4]);
82 if (exponent
== 0x7fff && integer
)
84 if (fraction
[0] == 0x00000000 && fraction
[1] == 0x00000000)
86 fprintf_filtered (file
, " %cInf", (sign
? '-' : '+'));
87 else if (sign
&& fraction
[0] == 0x00000000 && fraction
[1] == 0x40000000)
88 /* Real Indefinite (QNaN). */
89 fputs_unfiltered (" Real Indefinite (QNaN)", file
);
90 else if (fraction
[1] & 0x40000000)
92 fputs_filtered (" QNaN", file
);
95 fputs_filtered (" SNaN", file
);
97 else if (exponent
< 0x7fff && exponent
> 0x0000 && integer
)
99 print_i387_value (gdbarch
, raw
, file
);
100 else if (exponent
== 0x0000)
102 /* Denormal or zero. */
103 print_i387_value (gdbarch
, raw
, file
);
106 /* Pseudo-denormal. */
107 fputs_filtered (" Pseudo-denormal", file
);
108 else if (fraction
[0] || fraction
[1])
110 fputs_filtered (" Denormal", file
);
114 fputs_filtered (" Unsupported", file
);
117 /* Print the status word STATUS. */
120 print_i387_status_word (unsigned int status
, struct ui_file
*file
)
122 fprintf_filtered (file
, "Status Word: %s",
123 hex_string_custom (status
, 4));
124 fputs_filtered (" ", file
);
125 fprintf_filtered (file
, " %s", (status
& 0x0001) ? "IE" : " ");
126 fprintf_filtered (file
, " %s", (status
& 0x0002) ? "DE" : " ");
127 fprintf_filtered (file
, " %s", (status
& 0x0004) ? "ZE" : " ");
128 fprintf_filtered (file
, " %s", (status
& 0x0008) ? "OE" : " ");
129 fprintf_filtered (file
, " %s", (status
& 0x0010) ? "UE" : " ");
130 fprintf_filtered (file
, " %s", (status
& 0x0020) ? "PE" : " ");
131 fputs_filtered (" ", file
);
132 fprintf_filtered (file
, " %s", (status
& 0x0080) ? "ES" : " ");
133 fputs_filtered (" ", file
);
134 fprintf_filtered (file
, " %s", (status
& 0x0040) ? "SF" : " ");
135 fputs_filtered (" ", file
);
136 fprintf_filtered (file
, " %s", (status
& 0x0100) ? "C0" : " ");
137 fprintf_filtered (file
, " %s", (status
& 0x0200) ? "C1" : " ");
138 fprintf_filtered (file
, " %s", (status
& 0x0400) ? "C2" : " ");
139 fprintf_filtered (file
, " %s", (status
& 0x4000) ? "C3" : " ");
141 fputs_filtered ("\n", file
);
143 fprintf_filtered (file
,
144 " TOP: %d\n", ((status
>> 11) & 7));
147 /* Print the control word CONTROL. */
150 print_i387_control_word (unsigned int control
, struct ui_file
*file
)
152 fprintf_filtered (file
, "Control Word: %s",
153 hex_string_custom (control
, 4));
154 fputs_filtered (" ", file
);
155 fprintf_filtered (file
, " %s", (control
& 0x0001) ? "IM" : " ");
156 fprintf_filtered (file
, " %s", (control
& 0x0002) ? "DM" : " ");
157 fprintf_filtered (file
, " %s", (control
& 0x0004) ? "ZM" : " ");
158 fprintf_filtered (file
, " %s", (control
& 0x0008) ? "OM" : " ");
159 fprintf_filtered (file
, " %s", (control
& 0x0010) ? "UM" : " ");
160 fprintf_filtered (file
, " %s", (control
& 0x0020) ? "PM" : " ");
162 fputs_filtered ("\n", file
);
164 fputs_filtered (" PC: ", file
);
165 switch ((control
>> 8) & 3)
168 fputs_filtered ("Single Precision (24-bits)\n", file
);
171 fputs_filtered ("Reserved\n", file
);
174 fputs_filtered ("Double Precision (53-bits)\n", file
);
177 fputs_filtered ("Extended Precision (64-bits)\n", file
);
181 fputs_filtered (" RC: ", file
);
182 switch ((control
>> 10) & 3)
185 fputs_filtered ("Round to nearest\n", file
);
188 fputs_filtered ("Round down\n", file
);
191 fputs_filtered ("Round up\n", file
);
194 fputs_filtered ("Round toward zero\n", file
);
199 /* Print out the i387 floating point state. Note that we ignore FRAME
200 in the code below. That's OK since floating-point registers are
201 never saved on the stack. */
204 i387_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
205 struct frame_info
*frame
, const char *args
)
207 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
219 gdb_assert (gdbarch
== get_frame_arch (frame
));
221 fctrl
= get_frame_register_unsigned (frame
, I387_FCTRL_REGNUM (tdep
));
222 fstat
= get_frame_register_unsigned (frame
, I387_FSTAT_REGNUM (tdep
));
223 ftag
= get_frame_register_unsigned (frame
, I387_FTAG_REGNUM (tdep
));
224 fiseg
= get_frame_register_unsigned (frame
, I387_FISEG_REGNUM (tdep
));
225 fioff
= get_frame_register_unsigned (frame
, I387_FIOFF_REGNUM (tdep
));
226 foseg
= get_frame_register_unsigned (frame
, I387_FOSEG_REGNUM (tdep
));
227 fooff
= get_frame_register_unsigned (frame
, I387_FOOFF_REGNUM (tdep
));
228 fop
= get_frame_register_unsigned (frame
, I387_FOP_REGNUM (tdep
));
230 top
= ((fstat
>> 11) & 7);
232 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
234 gdb_byte raw
[I386_MAX_REGISTER_SIZE
];
235 int tag
= (ftag
>> (fpreg
* 2)) & 3;
238 fprintf_filtered (file
, "%sR%d: ", fpreg
== top
? "=>" : " ", fpreg
);
243 fputs_filtered ("Valid ", file
);
246 fputs_filtered ("Zero ", file
);
249 fputs_filtered ("Special ", file
);
252 fputs_filtered ("Empty ", file
);
256 get_frame_register (frame
,
257 (fpreg
+ 8 - top
) % 8 + I387_ST0_REGNUM (tdep
),
260 fputs_filtered ("0x", file
);
261 for (i
= 9; i
>= 0; i
--)
262 fprintf_filtered (file
, "%02x", raw
[i
]);
265 print_i387_ext (gdbarch
, raw
, file
);
267 fputs_filtered ("\n", file
);
270 fputs_filtered ("\n", file
);
272 print_i387_status_word (fstat
, file
);
273 print_i387_control_word (fctrl
, file
);
274 fprintf_filtered (file
, "Tag Word: %s\n",
275 hex_string_custom (ftag
, 4));
276 fprintf_filtered (file
, "Instruction Pointer: %s:",
277 hex_string_custom (fiseg
, 2));
278 fprintf_filtered (file
, "%s\n", hex_string_custom (fioff
, 8));
279 fprintf_filtered (file
, "Operand Pointer: %s:",
280 hex_string_custom (foseg
, 2));
281 fprintf_filtered (file
, "%s\n", hex_string_custom (fooff
, 8));
282 fprintf_filtered (file
, "Opcode: %s\n",
283 hex_string_custom (fop
? (fop
| 0xd800) : 0, 4));
287 /* Return nonzero if a value of type TYPE stored in register REGNUM
288 needs any special handling. */
291 i387_convert_register_p (struct gdbarch
*gdbarch
, int regnum
,
294 if (i386_fp_regnum_p (gdbarch
, regnum
))
296 /* Floating point registers must be converted unless we are
297 accessing them in their hardware type. */
298 if (type
== i387_ext_type (gdbarch
))
307 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
308 return its contents in TO. */
311 i387_register_to_value (struct frame_info
*frame
, int regnum
,
312 struct type
*type
, gdb_byte
*to
,
313 int *optimizedp
, int *unavailablep
)
315 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
316 gdb_byte from
[I386_MAX_REGISTER_SIZE
];
318 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
320 /* We only support floating-point values. */
321 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
323 warning (_("Cannot convert floating-point register value "
324 "to non-floating-point type."));
325 *optimizedp
= *unavailablep
= 0;
329 /* Convert to TYPE. */
330 if (!get_frame_register_bytes (frame
, regnum
, 0, TYPE_LENGTH (type
),
331 from
, optimizedp
, unavailablep
))
334 convert_typed_floating (from
, i387_ext_type (gdbarch
), to
, type
);
335 *optimizedp
= *unavailablep
= 0;
339 /* Write the contents FROM of a value of type TYPE into register
340 REGNUM in frame FRAME. */
343 i387_value_to_register (struct frame_info
*frame
, int regnum
,
344 struct type
*type
, const gdb_byte
*from
)
346 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
347 gdb_byte to
[I386_MAX_REGISTER_SIZE
];
349 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
351 /* We only support floating-point values. */
352 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
354 warning (_("Cannot convert non-floating-point type "
355 "to floating-point register value."));
359 /* Convert from TYPE. */
360 convert_typed_floating (from
, type
, to
, i387_ext_type (gdbarch
));
361 put_frame_register (frame
, regnum
, to
);
365 /* Handle FSAVE and FXSAVE formats. */
367 /* At fsave_offset[REGNUM] you'll find the offset to the location in
368 the data structure used by the "fsave" instruction where GDB
369 register REGNUM is stored. */
371 static int fsave_offset
[] =
373 28 + 0 * 10, /* %st(0) ... */
380 28 + 7 * 10, /* ... %st(7). */
381 0, /* `fctrl' (16 bits). */
382 4, /* `fstat' (16 bits). */
383 8, /* `ftag' (16 bits). */
384 16, /* `fiseg' (16 bits). */
386 24, /* `foseg' (16 bits). */
388 18 /* `fop' (bottom 11 bits). */
391 #define FSAVE_ADDR(tdep, fsave, regnum) \
392 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
395 /* Fill register REGNUM in REGCACHE with the appropriate value from
396 *FSAVE. This function masks off any of the reserved bits in
400 i387_supply_fsave (struct regcache
*regcache
, int regnum
, const void *fsave
)
402 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
403 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
404 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
405 const gdb_byte
*regs
= fsave
;
408 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
410 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
411 if (regnum
== -1 || regnum
== i
)
415 regcache_raw_supply (regcache
, i
, NULL
);
419 /* Most of the FPU control registers occupy only 16 bits in the
420 fsave area. Give those a special treatment. */
421 if (i
>= I387_FCTRL_REGNUM (tdep
)
422 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
426 memcpy (val
, FSAVE_ADDR (tdep
, regs
, i
), 2);
428 if (i
== I387_FOP_REGNUM (tdep
))
429 val
[1] &= ((1 << 3) - 1);
430 regcache_raw_supply (regcache
, i
, val
);
433 regcache_raw_supply (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
436 /* Provide dummy values for the SSE registers. */
437 for (i
= I387_XMM0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
438 if (regnum
== -1 || regnum
== i
)
439 regcache_raw_supply (regcache
, i
, NULL
);
440 if (regnum
== -1 || regnum
== I387_MXCSR_REGNUM (tdep
))
444 store_unsigned_integer (buf
, 4, byte_order
, 0x1f80);
445 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), buf
);
449 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE
450 with the value from REGCACHE. If REGNUM is -1, do this for all
451 registers. This function doesn't touch any of the reserved bits in
455 i387_collect_fsave (const struct regcache
*regcache
, int regnum
, void *fsave
)
457 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
458 gdb_byte
*regs
= fsave
;
461 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
463 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
464 if (regnum
== -1 || regnum
== i
)
466 /* Most of the FPU control registers occupy only 16 bits in
467 the fsave area. Give those a special treatment. */
468 if (i
>= I387_FCTRL_REGNUM (tdep
)
469 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
473 regcache_raw_collect (regcache
, i
, buf
);
475 if (i
== I387_FOP_REGNUM (tdep
))
477 /* The opcode occupies only 11 bits. Make sure we
478 don't touch the other bits. */
479 buf
[1] &= ((1 << 3) - 1);
480 buf
[1] |= ((FSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
482 memcpy (FSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
485 regcache_raw_collect (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
490 /* At fxsave_offset[REGNUM] you'll find the offset to the location in
491 the data structure used by the "fxsave" instruction where GDB
492 register REGNUM is stored. */
494 static int fxsave_offset
[] =
496 32, /* %st(0) through ... */
503 144, /* ... %st(7) (80 bits each). */
504 0, /* `fctrl' (16 bits). */
505 2, /* `fstat' (16 bits). */
506 4, /* `ftag' (16 bits). */
507 12, /* `fiseg' (16 bits). */
509 20, /* `foseg' (16 bits). */
511 6, /* `fop' (bottom 11 bits). */
512 160 + 0 * 16, /* %xmm0 through ... */
527 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
530 #define FXSAVE_ADDR(tdep, fxsave, regnum) \
531 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
533 /* We made an unfortunate choice in putting %mxcsr after the SSE
534 registers %xmm0-%xmm7 instead of before, since it makes supporting
535 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
536 don't include the offset for %mxcsr here above. */
538 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
540 static int i387_tag (const gdb_byte
*raw
);
543 /* Fill register REGNUM in REGCACHE with the appropriate
544 floating-point or SSE register value from *FXSAVE. This function
545 masks off any of the reserved bits in *FXSAVE. */
548 i387_supply_fxsave (struct regcache
*regcache
, int regnum
, const void *fxsave
)
550 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
551 const gdb_byte
*regs
= fxsave
;
554 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
555 gdb_assert (tdep
->num_xmm_regs
> 0);
557 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
558 if (regnum
== -1 || regnum
== i
)
562 regcache_raw_supply (regcache
, i
, NULL
);
566 /* Most of the FPU control registers occupy only 16 bits in
567 the fxsave area. Give those a special treatment. */
568 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
569 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
573 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
575 if (i
== I387_FOP_REGNUM (tdep
))
576 val
[1] &= ((1 << 3) - 1);
577 else if (i
== I387_FTAG_REGNUM (tdep
))
579 /* The fxsave area contains a simplified version of
580 the tag word. We have to look at the actual 80-bit
581 FP data to recreate the traditional i387 tag word. */
583 unsigned long ftag
= 0;
587 top
= ((FXSAVE_ADDR (tdep
, regs
,
588 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
591 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
595 if (val
[0] & (1 << fpreg
))
597 int thisreg
= (fpreg
+ 8 - top
) % 8
598 + I387_ST0_REGNUM (tdep
);
599 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
604 ftag
|= tag
<< (2 * fpreg
);
606 val
[0] = ftag
& 0xff;
607 val
[1] = (ftag
>> 8) & 0xff;
609 regcache_raw_supply (regcache
, i
, val
);
612 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
615 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
618 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), NULL
);
620 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
621 FXSAVE_MXCSR_ADDR (regs
));
625 /* Fill register REGNUM (if it is a floating-point or SSE register) in
626 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
627 all registers. This function doesn't touch any of the reserved
631 i387_collect_fxsave (const struct regcache
*regcache
, int regnum
, void *fxsave
)
633 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
634 gdb_byte
*regs
= fxsave
;
637 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
638 gdb_assert (tdep
->num_xmm_regs
> 0);
640 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
641 if (regnum
== -1 || regnum
== i
)
643 /* Most of the FPU control registers occupy only 16 bits in
644 the fxsave area. Give those a special treatment. */
645 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
646 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
650 regcache_raw_collect (regcache
, i
, buf
);
652 if (i
== I387_FOP_REGNUM (tdep
))
654 /* The opcode occupies only 11 bits. Make sure we
655 don't touch the other bits. */
656 buf
[1] &= ((1 << 3) - 1);
657 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
659 else if (i
== I387_FTAG_REGNUM (tdep
))
661 /* Converting back is much easier. */
666 ftag
= (buf
[1] << 8) | buf
[0];
670 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
672 int tag
= (ftag
>> (fpreg
* 2)) & 3;
675 buf
[0] |= (1 << fpreg
);
678 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
681 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
684 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
685 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
686 FXSAVE_MXCSR_ADDR (regs
));
689 /* `xstate_bv' is at byte offset 512. */
690 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
692 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
693 the upper 128bit of AVX register data structure used by the "xsave"
694 instruction where GDB register REGNUM is stored. */
696 static int xsave_avxh_offset
[] =
698 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
713 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
716 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
717 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
719 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */
722 i387_supply_xsave (struct regcache
*regcache
, int regnum
,
725 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
726 const gdb_byte
*regs
= xsave
;
728 unsigned int clear_bv
;
736 all
= x87
| sse
| avxh
739 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
740 gdb_assert (tdep
->num_xmm_regs
> 0);
744 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
745 && regnum
< I387_YMMENDH_REGNUM (tdep
))
747 else if (regnum
>= I387_XMM0_REGNUM(tdep
)
748 && regnum
< I387_MXCSR_REGNUM (tdep
))
750 else if (regnum
>= I387_ST0_REGNUM (tdep
)
751 && regnum
< I387_FCTRL_REGNUM (tdep
))
756 if (regs
!= NULL
&& regclass
!= none
)
758 /* Get `xstat_bv'. */
759 const gdb_byte
*xstate_bv_p
= XSAVE_XSTATE_BV_ADDR (regs
);
761 /* The supported bits in `xstat_bv' are 1 byte. Clear part in
762 vector registers if its bit in xstat_bv is zero. */
763 clear_bv
= (~(*xstate_bv_p
)) & tdep
->xcr0
;
766 clear_bv
= I386_XSTATE_AVX_MASK
;
774 if ((clear_bv
& I386_XSTATE_AVX
))
777 p
= XSAVE_AVXH_ADDR (tdep
, regs
, regnum
);
778 regcache_raw_supply (regcache
, regnum
, p
);
782 if ((clear_bv
& I386_XSTATE_SSE
))
785 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
786 regcache_raw_supply (regcache
, regnum
, p
);
790 if ((clear_bv
& I386_XSTATE_X87
))
793 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
794 regcache_raw_supply (regcache
, regnum
, p
);
798 /* Hanle the upper YMM registers. */
799 if ((tdep
->xcr0
& I386_XSTATE_AVX
))
801 if ((clear_bv
& I386_XSTATE_AVX
))
806 for (i
= I387_YMM0H_REGNUM (tdep
);
807 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
810 p
= XSAVE_AVXH_ADDR (tdep
, regs
, i
);
811 regcache_raw_supply (regcache
, i
, p
);
815 /* Handle the XMM registers. */
816 if ((tdep
->xcr0
& I386_XSTATE_SSE
))
818 if ((clear_bv
& I386_XSTATE_SSE
))
823 for (i
= I387_XMM0_REGNUM (tdep
);
824 i
< I387_MXCSR_REGNUM (tdep
); i
++)
827 p
= FXSAVE_ADDR (tdep
, regs
, i
);
828 regcache_raw_supply (regcache
, i
, p
);
832 /* Handle the x87 registers. */
833 if ((tdep
->xcr0
& I386_XSTATE_X87
))
835 if ((clear_bv
& I386_XSTATE_X87
))
840 for (i
= I387_ST0_REGNUM (tdep
);
841 i
< I387_FCTRL_REGNUM (tdep
); i
++)
844 p
= FXSAVE_ADDR (tdep
, regs
, i
);
845 regcache_raw_supply (regcache
, i
, p
);
851 /* Only handle x87 control registers. */
852 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
853 if (regnum
== -1 || regnum
== i
)
857 regcache_raw_supply (regcache
, i
, NULL
);
861 /* Most of the FPU control registers occupy only 16 bits in
862 the xsave extended state. Give those a special treatment. */
863 if (i
!= I387_FIOFF_REGNUM (tdep
)
864 && i
!= I387_FOOFF_REGNUM (tdep
))
868 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
870 if (i
== I387_FOP_REGNUM (tdep
))
871 val
[1] &= ((1 << 3) - 1);
872 else if (i
== I387_FTAG_REGNUM (tdep
))
874 /* The fxsave area contains a simplified version of
875 the tag word. We have to look at the actual 80-bit
876 FP data to recreate the traditional i387 tag word. */
878 unsigned long ftag
= 0;
882 top
= ((FXSAVE_ADDR (tdep
, regs
,
883 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
886 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
890 if (val
[0] & (1 << fpreg
))
892 int thisreg
= (fpreg
+ 8 - top
) % 8
893 + I387_ST0_REGNUM (tdep
);
894 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, thisreg
));
899 ftag
|= tag
<< (2 * fpreg
);
901 val
[0] = ftag
& 0xff;
902 val
[1] = (ftag
>> 8) & 0xff;
904 regcache_raw_supply (regcache
, i
, val
);
907 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
910 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
912 p
= regs
== NULL
? NULL
: FXSAVE_MXCSR_ADDR (regs
);
913 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), p
);
917 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */
920 i387_collect_xsave (const struct regcache
*regcache
, int regnum
,
921 void *xsave
, int gcore
)
923 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
924 gdb_byte
*regs
= xsave
;
933 all
= x87
| sse
| avxh
936 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
937 gdb_assert (tdep
->num_xmm_regs
> 0);
941 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
942 && regnum
< I387_YMMENDH_REGNUM (tdep
))
944 else if (regnum
>= I387_XMM0_REGNUM(tdep
)
945 && regnum
< I387_MXCSR_REGNUM (tdep
))
947 else if (regnum
>= I387_ST0_REGNUM (tdep
)
948 && regnum
< I387_FCTRL_REGNUM (tdep
))
955 /* Clear XSAVE extended state. */
956 memset (regs
, 0, I386_XSTATE_SIZE (tdep
->xcr0
));
958 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
959 if (tdep
->xsave_xcr0_offset
!= -1)
960 memcpy (regs
+ tdep
->xsave_xcr0_offset
, &tdep
->xcr0
, 8);
961 memcpy (XSAVE_XSTATE_BV_ADDR (regs
), &tdep
->xcr0
, 8);
964 if ((regclass
& check
))
966 gdb_byte raw
[I386_MAX_REGISTER_SIZE
];
967 gdb_byte
*xstate_bv_p
= XSAVE_XSTATE_BV_ADDR (regs
);
968 unsigned int xstate_bv
= 0;
969 /* The supported bits in `xstat_bv' are 1 byte. */
970 unsigned int clear_bv
= (~(*xstate_bv_p
)) & tdep
->xcr0
;
973 /* Clear register set if its bit in xstat_bv is zero. */
976 if ((clear_bv
& I386_XSTATE_AVX
))
977 for (i
= I387_YMM0H_REGNUM (tdep
);
978 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
979 memset (XSAVE_AVXH_ADDR (tdep
, regs
, i
), 0, 16);
981 if ((clear_bv
& I386_XSTATE_SSE
))
982 for (i
= I387_XMM0_REGNUM (tdep
);
983 i
< I387_MXCSR_REGNUM (tdep
); i
++)
984 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 16);
986 if ((clear_bv
& I386_XSTATE_X87
))
987 for (i
= I387_ST0_REGNUM (tdep
);
988 i
< I387_FCTRL_REGNUM (tdep
); i
++)
989 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 10);
994 /* Check if any upper YMM registers are changed. */
995 if ((tdep
->xcr0
& I386_XSTATE_AVX
))
996 for (i
= I387_YMM0H_REGNUM (tdep
);
997 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
999 regcache_raw_collect (regcache
, i
, raw
);
1000 p
= XSAVE_AVXH_ADDR (tdep
, regs
, i
);
1001 if (memcmp (raw
, p
, 16))
1003 xstate_bv
|= I386_XSTATE_AVX
;
1004 memcpy (p
, raw
, 16);
1008 /* Check if any SSE registers are changed. */
1009 if ((tdep
->xcr0
& I386_XSTATE_SSE
))
1010 for (i
= I387_XMM0_REGNUM (tdep
);
1011 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1013 regcache_raw_collect (regcache
, i
, raw
);
1014 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1015 if (memcmp (raw
, p
, 16))
1017 xstate_bv
|= I386_XSTATE_SSE
;
1018 memcpy (p
, raw
, 16);
1022 /* Check if any X87 registers are changed. */
1023 if ((tdep
->xcr0
& I386_XSTATE_X87
))
1024 for (i
= I387_ST0_REGNUM (tdep
);
1025 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1027 regcache_raw_collect (regcache
, i
, raw
);
1028 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1029 if (memcmp (raw
, p
, 10))
1031 xstate_bv
|= I386_XSTATE_X87
;
1032 memcpy (p
, raw
, 10);
1038 /* Check if REGNUM is changed. */
1039 regcache_raw_collect (regcache
, regnum
, raw
);
1044 internal_error (__FILE__
, __LINE__
,
1045 _("invalid i387 regclass"));
1048 /* This is an upper YMM register. */
1049 p
= XSAVE_AVXH_ADDR (tdep
, regs
, regnum
);
1050 if (memcmp (raw
, p
, 16))
1052 xstate_bv
|= I386_XSTATE_AVX
;
1053 memcpy (p
, raw
, 16);
1058 /* This is an SSE register. */
1059 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1060 if (memcmp (raw
, p
, 16))
1062 xstate_bv
|= I386_XSTATE_SSE
;
1063 memcpy (p
, raw
, 16);
1068 /* This is an x87 register. */
1069 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1070 if (memcmp (raw
, p
, 10))
1072 xstate_bv
|= I386_XSTATE_X87
;
1073 memcpy (p
, raw
, 10);
1079 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1080 registers are changed. */
1083 /* The supported bits in `xstat_bv' are 1 byte. */
1084 *xstate_bv_p
|= (gdb_byte
) xstate_bv
;
1089 internal_error (__FILE__
, __LINE__
,
1090 _("invalid i387 regclass"));
1098 /* Register REGNUM has been updated. Return. */
1104 /* Return if REGNUM isn't changed. */
1105 if (regclass
!= all
)
1110 /* Only handle x87 control registers. */
1111 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
1112 if (regnum
== -1 || regnum
== i
)
1114 /* Most of the FPU control registers occupy only 16 bits in
1115 the xsave extended state. Give those a special treatment. */
1116 if (i
!= I387_FIOFF_REGNUM (tdep
)
1117 && i
!= I387_FOOFF_REGNUM (tdep
))
1121 regcache_raw_collect (regcache
, i
, buf
);
1123 if (i
== I387_FOP_REGNUM (tdep
))
1125 /* The opcode occupies only 11 bits. Make sure we
1126 don't touch the other bits. */
1127 buf
[1] &= ((1 << 3) - 1);
1128 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
1130 else if (i
== I387_FTAG_REGNUM (tdep
))
1132 /* Converting back is much easier. */
1134 unsigned short ftag
;
1137 ftag
= (buf
[1] << 8) | buf
[0];
1141 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
1143 int tag
= (ftag
>> (fpreg
* 2)) & 3;
1146 buf
[0] |= (1 << fpreg
);
1149 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
1152 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1155 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
1156 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
1157 FXSAVE_MXCSR_ADDR (regs
));
1160 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1164 i387_tag (const gdb_byte
*raw
)
1167 unsigned int exponent
;
1168 unsigned long fraction
[2];
1170 integer
= raw
[7] & 0x80;
1171 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
1172 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
1173 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
1174 | (raw
[5] << 8) | raw
[4]);
1176 if (exponent
== 0x7fff)
1181 else if (exponent
== 0x0000)
1183 if (fraction
[0] == 0x0000 && fraction
[1] == 0x0000 && !integer
)
1209 /* Prepare the FPU stack in REGCACHE for a function return. */
1212 i387_return_value (struct gdbarch
*gdbarch
, struct regcache
*regcache
)
1214 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1217 /* Set the top of the floating-point register stack to 7. The
1218 actual value doesn't really matter, but 7 is what a normal
1219 function return would end up with if the program started out with
1220 a freshly initialized FPU. */
1221 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1223 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1225 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1226 floating-point register stack to 7, the appropriate value for the
1227 tag word is 0x3fff. */
1228 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
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