1 /* Machine-dependent code which would otherwise be in inflow.c and core.c,
2 for GDB, the GNU debugger.
3 Copyright (C) 1992 Free Software Foundation, Inc.
4 This code is for the i860 cpu.
5 Contributed by Peggy Fieland (pfieland@stratus.com)
7 GDB is distributed in the hope that it will be useful, but WITHOUT ANY
8 WARRANTY. No author or distributor accepts responsibility to anyone
9 for the consequences of using it or for whether it serves any
10 particular purpose or works at all, unless he says so in writing.
11 Refer to the GDB General Public License for full details.
13 Everyone is granted permission to copy, modify and redistribute GDB,
14 but only under the conditions described in the GDB General Public
15 License. A copy of this license is supposed to have been given to you
16 along with GDB so you can know your rights and responsibilities. It
17 should be in a file named COPYING. Among other things, the copyright
18 notice and this notice must be preserved on all copies.
20 In other words, go ahead and share GDB, but don't try to stop
21 anyone else from sharing it farther. Help stamp out software hoarding!
33 #include "i860-opcode.h"
40 #include <sys/types.h>
41 #include <sys/param.h>
47 #include <sys/ioctl.h>
50 /* #include <sys/reg.h> */
61 #include <sys/elftypes.h>
62 #include <sys/elf_860.h>
66 int btdebug
= 0; /* change value to 1 to enable debugging code */
68 #define BTDEBUG if (btdebug) btdebug_message
75 btdebug_message(char *format
, ...)
78 va_start( arglist
, format
);
81 vfprintf (stderr
, format
, arglist
);
86 extern int attach_flag
;
89 /* This is used when GDB is exiting. It gives less chance of error.*/
92 /* Simulate single-step ptrace call for sun4. Code written by Gary
93 Beihl (beihl@mcc.com). */
94 /* Modified for i860 by Jim Hanko (hanko@orc.olivetti.com) */
97 static struct breakpoint brk
;
98 typedef char binsn_quantum
[sizeof break_insn
];
99 static binsn_quantum break_mem
[2];
101 /* Non-zero if we just simulated a single-step ptrace call. This is
102 needed because we cannot remove the breakpoints in the inferior
103 process until after the `wait' in `wait_for_inferior'. Used for
112 branch_type
place_brk();
114 pc
= read_register (PC_REGNUM
);
119 place_brk (pc
, SINGLE_STEP_MODE
, &brk
);
120 brk
.shadow_contents
[0] = brk
.shadow_contents
[1] = 0;
121 brk
.shadow_contents
[2] = brk
.shadow_contents
[3] = 0;
128 printf(" %x : ", brk
.act_addr
[3]);
129 print_insn( brk
.act_addr
[3], stdout
);
131 printf(" %x : ", brk
.act_addr
[2]);
132 print_insn( brk
.act_addr
[2], stdout
);
136 adj_read_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2], 4);
137 adj_write_memory (brk
.act_addr
[2], break_insn
, 4);
138 adj_read_memory (brk
.act_addr
[3], &brk
.shadow_contents
[3], 4);
139 /* adj_write_memory (brk.act_addr[3], float_insn, 4); */
147 printf(" %x : ", brk
.act_addr
[1]);
148 print_insn( brk
.act_addr
[1], stdout
);
150 printf(" %x : ", brk
.act_addr
[0]);
151 print_insn( brk
.act_addr
[0], stdout
);
155 adj_read_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0], 4);
156 adj_write_memory (brk
.act_addr
[0], break_insn
, 4);
157 adj_read_memory (brk
.act_addr
[1], &brk
.shadow_contents
[1], 4);
158 /* adj_write_memory (brk.act_addr[1], float_insn, 4); */
167 printf(" %x : ", brk
.act_addr
[2]);
168 print_insn( brk
.act_addr
[2], stdout
);
172 adj_read_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2], 4);
173 adj_write_memory (brk
.act_addr
[2], break_insn
, 4);
182 printf(" %x : ", brk
.act_addr
[0]);
183 print_insn( brk
.act_addr
[0], stdout
);
187 adj_read_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0], 4);
188 adj_write_memory (brk
.act_addr
[0], break_insn
, 4);
197 /* Remove breakpoints */
200 adj_write_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0], 4);
201 adj_write_memory (brk
.act_addr
[1], &brk
.shadow_contents
[1], 4);
203 adj_write_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0], 4);
210 adj_write_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2], 4);
211 adj_write_memory (brk
.act_addr
[3], &brk
.shadow_contents
[3], 4);
213 adj_write_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2], 4);
223 /* return nonzero if the routine containing pc has been
224 * compiled with -g. We assume -g if the first instruction is
225 * an addu|adds -X,sp and the second is st.l fp,XX(sp)
227 * based on skip_prologue();
237 top_pc
= get_pc_function_start(pc
);
240 instr
= adj_read_memory_integer (top_pc
);
241 /* Recognize "addu|adds -X,sp,sp" insn. */
243 if ((instr
& 0xEFFF0000) == 0x84420000)
246 instr
= adj_read_memory_integer (top_pc
);
248 if( (instr
& 0xFFE0F801) == 0x1C401801 ) /* st.l fp,X(sp) */
256 /* Written for i860 by Jim Hanko (hanko@orc.olivetti.com) */
257 /* This code was based on SPARC code written by Gary Beihl (beihl@mcc.com),
258 by Michael Tiemann (tiemann@corto.inria.fr). */
260 struct command_line
*get_breakpoint_commands ();
269 instr
= adj_read_memory_integer (pc
);
271 /* Recognize "addu|adds -X,sp,sp" insn. */
272 if ((instr
& 0xEFFF0000) == 0x84420000)
275 instr
= adj_read_memory_integer (pc
);
278 return(pc
); /* No frame! */
280 /* Recognize store of return addr and frame pointer into frame */
283 if ((instr
& 0xFFE0F801) == 0x1C400801 || /* st.l r1,X(sp) */
284 (instr
& 0xFFE0F801) == 0x1C401801) /* st.l fp,X(sp) */
287 instr
= adj_read_memory_integer (pc
);
293 /* Recognize "addu|adds X,sp,fp" insn. */
294 if ((instr
& 0xEFFF0000) == 0x84430000)
297 instr
= adj_read_memory_integer (pc
);
300 /* Now recognize stores into the frame from the registers. */
304 if ((instr
& 0xFFA00003) == 0x1C200001 || /* st.l rn,X(fp|sp) */
305 (instr
& 0xFFA00001) == 0x4C200000) /* fst.y fn,X(fp|sp) */
307 regno
= (instr
>> 11) & 0x1f;
308 if (regno
== 0) /* source reg == 0? quit */
311 instr
= adj_read_memory_integer (pc
);
321 /* Set *nextpc to branch target if we find a branch. If it is not a branch,
322 set it to the next instruction (addr + 4) */
326 isabranch (addr
, nextpc
)
327 CORE_ADDR addr
, *nextpc
;
330 branch_type val
= not_branch
;
331 long offset
; /* Must be signed for sign-extend */
333 printf(" isabranch\n");
335 instr
= adj_read_memory_integer (addr
);
337 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
338 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
340 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
342 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
344 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
347 offset
= (instr
& 0x03ffffff);
348 if (offset
& 0x02000000) /* sign extend? */
349 offset
|= 0xFC000000;
350 *nextpc
= addr
+ 4 + (offset
<< 2);
352 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
353 (instr
& 0xFC000000) == 0x40000000) /* bri */
356 offset
= ((instr
& 0x0000F800) >> 11);
357 *nextpc
= (read_register(offset
) & 0xFFFFFFFC);
359 else if ((instr
& 0xF0000000) == 0x50000000) /* bte or btne */
363 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
364 *nextpc
= addr
+ 4 + (offset
<< 2);
366 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
370 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
371 *nextpc
= addr
+ 4 + (offset
<< 2);
374 printf(" Final addr - %x\n", *nextpc
);
375 /*printf("isabranch ret: %d\n",val); */
379 /* set in call_function() [valops.c] to the address of the "call dummy" code
380 so dummy frames can be easily recognized; also used in wait_for_inferior()
381 [infrun.c]. When not used, it points into the ABI's 'reserved area' */
383 CORE_ADDR call_dummy_set
= 0; /* true if dummy call being done */
384 CORE_ADDR call_dummy_start
; /* address of call dummy code */
386 frame_find_saved_regs(frame_info
, frame_saved_regs
)
387 struct frame_info
*frame_info
;
388 struct frame_saved_regs
*frame_saved_regs
;
390 register CORE_ADDR pc
;
391 long instr
, spdelta
= 0, offset
;
393 int r1_off
= -1, fp_off
= -1;
396 bzero (frame_saved_regs
, sizeof(*frame_saved_regs
));
398 if (call_dummy_set
&& frame_info
->pc
>= call_dummy_start
&&
399 frame_info
->pc
<= call_dummy_start
+ CALL_DUMMY_LENGTH
)
401 /* DUMMY frame - all registers stored in order at fp; old sp is
402 at fp + NUM_REGS*4 */
404 for (i
= 1; i
< NUM_REGS
; i
++) /* skip reg 0 */
405 if (i
!= SP_REGNUM
&& i
!= FP0_REGNUM
&& i
!= FP0_REGNUM
+ 1)
406 frame_saved_regs
->regs
[i
] = frame_info
->frame
+ i
*4;
408 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+ NUM_REGS
*4;
414 pc
= get_pc_function_start (frame_info
->pc
);
417 instr
= adj_read_memory_integer (pc
);
418 /* Recognize "addu|adds -X,sp,sp" insn. */
419 if ((instr
& 0xEFFF0000) == 0x84420000)
421 framesize
= -SIGN_EXT16(instr
& 0x0000FFFF);
423 instr
= adj_read_memory_integer (pc
);
427 goto punt
; /* No frame! */
429 /* Recognize store of return addr and frame pointer into frame */
432 if ((instr
& 0xFFE0F801) == 0x1C400801) /* st.l r1,X(sp) */
434 r1_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
436 instr
= adj_read_memory_integer (pc
);
438 else if ((instr
& 0xFFE0F801) == 0x1C401801) /* st.l fp,X(sp) */
440 fp_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
442 instr
= adj_read_memory_integer (pc
);
448 /* Recognize "addu|adds X,sp,fp" insn. */
449 if ((instr
& 0xEFFF0000) == 0x84430000)
451 spdelta
= SIGN_EXT16(instr
& 0x0000FFFF);
453 instr
= adj_read_memory_integer (pc
);
456 /* Now recognize stores into the frame from the registers. */
460 if ((instr
& 0xFFC00003) == 0x1C400001) /* st.l rn,X(fp|sp) */
462 offset
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
463 reg
= (instr
>> 11) & 0x1F;
466 if ((instr
& 0x00200000) == 0) /* was this using sp? */
467 if (spdelta
) /* and we know sp-fp delta */
468 offset
-= spdelta
; /* if so, adjust the offset */
470 break; /* if not, give up */
473 /* Handle the case where the return address is stored after the fp
477 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
+ offset
;
479 frame_saved_regs
->regs
[reg
] = frame_info
->frame
+ offset
;
482 instr
= adj_read_memory_integer (pc
);
484 else if ((instr
& 0xFFC00001) == 0x2C400000) /* fst.y fn,X(fp|sp) */
487 * The number of words in a floating store based on 3 LSB of instr
489 static int fst_sizes
[] = {2, 0, 1, 0, 4, 0, 1, 0};
491 size
= fst_sizes
[instr
& 7];
492 reg
= ((instr
>> 16) & 0x1F) + FP0_REGNUM
;
496 if (size
> 1) /* align the offset */
497 offset
= SIGN_EXT16(instr
& 0x0000FFF8); /* drop 3 bits */
499 offset
= SIGN_EXT16(instr
& 0x0000FFFC); /* drop 2 bits */
501 if ((instr
& 0x00200000) == 0) /* was this using sp? */
502 if (spdelta
) /* and we know sp-fp delta */
503 offset
-= spdelta
; /* if so, adjust the offset */
505 break; /* if not, give up */
507 for (i
= 0; i
< size
; i
++)
509 frame_saved_regs
->regs
[reg
] = frame_info
->frame
+ offset
;
516 instr
= adj_read_memory_integer (pc
);
523 if (framesize
!= 0 && spdelta
!= 0)
524 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+(framesize
-spdelta
);
526 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+ 8;
528 if (spdelta
&& fp_off
!= -1)
529 frame_saved_regs
->regs
[FP_REGNUM
] = frame_info
->frame
- spdelta
+ fp_off
;
531 frame_saved_regs
->regs
[FP_REGNUM
] = frame_info
->frame
;
533 if (spdelta
&& r1_off
!= -1)
534 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
- spdelta
+ r1_off
;
536 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
+ 4;
539 /* return the stack offset where the fp register is stored */
545 /* look for the instruction and examine the offset */
547 for(i
=4; i
<16; i
+=4){
548 instr
= adj_read_memory_integer(pc
+i
);
549 if( (instr
& 0xFFE0F801) == 0x1C401801) { /* st.l fp,X(sp) */
551 fp_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) |
559 /* return the stack offset where r1 (return linkage ) register is stored */
566 /* look for the instruction and examine the offset */
568 for(i
=4; i
<16; i
+=4){
570 instr
= adj_read_memory_integer(pc
+i
);
571 if ((instr
& 0xFFE0F801) == 0x1C400801) { /* st.l r1,X(sp) */
573 r1_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) |
582 /* dose routine starting at pc build a stack frame of any kind?? */
585 if( skip_prologue(pc
) != pc
)return(1);
589 /* get the frame pointer of the caller.
590 * note that only routines that have been compiled with
591 * -g have full (XX)fp style stack frames
592 * if we are not returning to a non -g caller then we
593 * return the sp at entry to us as it is the caller's
597 frame_chain(thisframe
)
600 unsigned long fp
, sp
, pc
;
601 unsigned long func_start
;
604 unsigned long thisfp
= thisframe
->frame
;
606 /* get the frame pointer actually sp for a non -g
607 * for the routine that called us routine
610 BTDEBUG("FRAME_CHAIN(%x)\n",thisframe
);
612 if ( !read_memory_integer (thisframe
->frame
,4))
617 if( ! g_routine(thisframe
->pc
) ){
618 BTDEBUG( "non g at %x\n",thisframe
->pc
);
619 caller_pc(thisframe
->pc
,thisframe
->sp
,&pc
,&fp
);
620 BTDEBUG("caller_pc returned %x %x \n",pc
,fp
);
623 }/* else a -g routine */
626 fp
= read_memory_integer (thisfp
, 4);
628 if (fp
< thisfp
|| fp
> STACK_END_ADDR
)
630 /* handle the Metaware-type pseudo-frame */
632 func_start
= get_pc_function_start(thisframe
->pc
);
637 instr
= adj_read_memory_integer (func_start
);
638 /* Recognize "addu|adds -X,sp,sp" insn. */
639 if ((instr
& 0xEFFF0000) == 0x84420000)
640 offset
= SIGN_EXT16(instr
& 0x0000FFFF);
646 fp
= thisfp
- offset
;
648 BTDEBUG("frame_chain returned %d\n",fp
);
652 /* get the pc and frame pointer (or sp )
653 * for the routine that called us
654 * when we (this_pc) is not within a -g routine
655 * if caller is non g we return sp for fp
658 /* note this is written for Metaware version R2.1d compiler */
660 caller_pc(this_pc
,this_sp
,to_pc
,to_fp
)
662 unsigned long this_pc
,this_sp
;
664 unsigned long func_start
;
665 int sp_offset
,offset
;
666 unsigned long sp
,pc
,fp
,instr
;
668 BTDEBUG("caller_pc %x sp = %x\n",this_pc
,this_sp
);
670 func_start
= get_pc_function_start(this_pc
);
672 BTDEBUG("caller_pc func_start %x\n", func_start
);
676 if( has_a_frame(func_start
) ){
678 BTDEBUG("has_a_frame\n");
680 /* if our caller has a preamble and
681 * declares space for a stack frame
682 * then we must work to find our return address
684 instr
= adj_read_memory_integer (func_start
);
685 /* Recognize "addu|adds -X,sp,sp" insn. */
687 if ((instr
& 0xEFFF0000) == 0x84420000)
688 sp_offset
=SIGN_EXT16(instr
&0x0000FFFF);
690 else { printf("error frame_chain\n");return(0); }
692 BTDEBUG("sp_offset = %d %x\n",sp_offset
,sp_offset
);
694 offset
= find_r1_offset(func_start
);
697 printf("cant find return address for routine at %x\n",
701 pc
= read_memory_integer(this_sp
+offset
,4);
702 sp
= this_sp
- sp_offset
;
704 BTDEBUG("callers pc = %x sp = %x\n",pc
,sp
);
706 /* our caller a -g routine ?
707 * if he is we have to find his real fp
708 * else provide the sp as his fp
713 BTDEBUG("caller_a_g\n");
715 if( ! (offset
= find_fp_offset(func_start
)) ) {
716 printf("error fp_offset\n");
719 BTDEBUG("offset = %x %d\n",offset
,offset
);
721 fp
= read_memory_integer(this_sp
+offset
,4);
722 *to_pc
= CLEAN_PC(pc
);
726 *to_pc
= CLEAN_PC(pc
);
730 /* pc = read_register(RP_REGNUM); */
732 BTDEBUG("read_register pc %x\n",pc
);
735 *to_pc
= CLEAN_PC(pc
);
736 *to_fp
= read_register(FP_REGNUM
);
739 *to_pc
= CLEAN_PC(pc
);
746 int outside_startup_file();
748 /* get the PC of the caller */
749 frame_saved_pc(frame_struct
)
761 frame
= frame_struct
->frame
;
762 pc
= frame_struct
->pc
;
763 BTDEBUG("frame_saved_pc input: frame %x, pc %x, sp %x ",
766 /* First see if this is the current frame. If it is, return the value in r1,
767 as it may not have been stored */
769 fp
= read_register(FP_REGNUM
);
771 /* check to see if we are in an entry sequence, where the return pointer has not yet been stored */
772 if (fp
== frame
&& no_stored_rp(pc
))
774 pc
= read_register(RP_REGNUM
);
775 frame_struct
->rp
= pc
;
777 else if( ! g_routine(pc
) )
779 caller_pc(pc
,sp
,&pc
,&frame
);
784 pc
= read_memory_integer (frame
+ 4, 4);
786 if (!outside_startup_file(pc
))
789 BTDEBUG("pc %x outside startup file \n",pc
);
791 pc1
= read_memory_integer (frame
, 4);
793 if (outside_startup_file(pc1
))
799 BTDEBUG(" returning pc %x\n", CLEAN_PC(pc
));
800 return(CLEAN_PC(pc
));
804 /* Pass arguments to a function in the inferior process - ABI compliant
807 pass_function_arguments(args
, nargs
, struct_return
)
812 int ireg
= (struct_return
) ? 17 : 16;
813 int freg
= FP0_REGNUM
+ 8;
818 value
value_arg_coerce();
821 for (i
= 0; i
< nargs
; i
++)
823 arg
= value_arg_coerce(args
[i
]);
824 type
= VALUE_TYPE(arg
);
825 if (type
== builtin_type_double
)
827 write_register_bytes(REGISTER_BYTE(freg
), VALUE_CONTENTS(arg
), 8);
832 bcopy(VALUE_CONTENTS(arg
), &tmp
, 4);
833 write_register(ireg
, tmp
);
837 if (ireg
>= 28 || freg
>= FP0_REGNUM
+ 16)
838 error("Too many arguments to function");
849 "fsr", "db", "dirbase", "fir", "psr", "epsr",
853 "scp", "cbsp", "pt_cs", "intmsk", "intack",
864 read_relative_register_raw_bytes (regno
, raw_buffer
);
865 REGISTER_CONVERT_TO_VIRTUAL (addr
, raw_buffer
, &virtual_buffer
);
866 return(virtual_buffer
);
871 ** Figure out address to place next breakpoint. Avoid tricky spots,
872 ** ie. delayed instruction slots etc.
873 ** Need to upgrade this later to allow delayed instruction breakpoints
874 ** with fix-up work done AFTER breakpoint.
875 ** Note that this routine DOES deal with dual instruction mode
880 place_brk (addr
, mode
, brk
)
883 struct breakpoint
*brk
;
885 long nextadr
, prevadr
, instr
;
886 int val
= not_branch
;
887 long offset
; /* Must be signed for sign-extend */
888 extern char registers
[];
889 prevadr
= nextadr
= 0;
893 if (mode
== SINGLE_STEP_MODE
)
897 nextadr
= brk
->address
= (addr
+ 8);
898 instr
= adj_read_memory_integer ((addr
+ 4));
903 nextadr
= brk
->address
= (addr
+ 4);
904 instr
= adj_read_memory_integer (addr
);
913 ** For br/call one more sequential instruction gets executed and then we
914 ** continue at the current addr + offset. We are definitely going to
915 ** the dest. We are NOT allowed to place a breakpoint in the "delay"
916 ** slot - (the next sequential instruction) so we only place 1 breakpoint
917 ** at the destination.
918 ** For the bc/bnc the next instruction executed is EITHER the next sequential
919 ** or the destination of the branch, we therefore place 2 breakpoints one
921 ** For the bc.t/bnc.t either 1 more sequential instruction is performed
922 ** followed by a branch (like br/call) OR we skip the sequential
923 ** instruction and keep going. We therefore place a breakpoint at the
924 ** destination of the branch AND the second sequential instruction after
925 ** the branch. Again a breakpoint is NOT allowed in the "delay slot"
927 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
928 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
930 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
932 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t/bnc.t */
934 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
936 offset
= (instr
& 0x03ffffff);
937 if (offset
& 0x02000000) /*?sign extend*/
938 offset
|= 0xFC000000;
939 if (val
== uncond_d
) /* br/call*/
941 else if (val
== cond_d
) /* bc.t/bnc.t */
943 if ((INDIM
) && !(ENDIM
))
944 prevadr
= nextadr
+ 8;
946 prevadr
= nextadr
+ 4;
947 } else { /* bc /bnc */
948 if ((INDIM
) && !(ENDIM
))
953 nextadr
+= (offset
<< 2);
956 ** We treat the bri/calli the same way as the br/call case.
958 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
959 (instr
& 0xFC000000) == 0x40000000) /* bri */
962 offset
= ((instr
& 0x0000F800) >> 11);
963 nextadr
= (read_register(offset
+ R0
) & 0xFFFFFFFC);
967 ** We treat the bte/btne the same way as the bc/bnc case.
969 else if ((instr
& 0xF0000000) == 0x50000000) /* bte/btne */
972 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) |
973 (instr
& 0x000007FF));
974 if ((INDIM
) && !(ENDIM
))
979 nextadr
+= (offset
<< 2);
982 ** We treat the bte/btne the same way as the bc/bnc case.
983 ** With the caveat that the 2 breakpoints may turn out to be at the same
984 ** address in which case we ignore one of them.
986 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
989 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) |
990 (instr
& 0x000007FF));
991 if ((INDIM
) && !(ENDIM
))
993 prevadr
= nextadr
+ 8;
995 prevadr
= nextadr
+ 4;
997 nextadr
+= (offset
<< 2);
998 if (prevadr
== nextadr
) prevadr
= 0;
1005 if (ISDIM(FOPADR(addr
)))
1007 if (ISDIM(FOPADR(nextadr
-8)))
1009 instr
= adj_read_memory_integer(CORADR(addr
-8));
1012 instr
= adj_read_memory_integer(addr
-4);
1018 instr
= adj_read_memory_integer(addr
-4);
1021 instr
= adj_read_memory_integer (addr
-4);
1026 /* examine the PREVIOUS instruction to determine if we are in a branch delay
1027 slot. If we are, dont set a break here -- set it on the previous instruction.
1028 This code also accounts for dual instruction mode */
1029 if ((instr
& 0xE0000000) == 0x60000000 &&
1030 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
1036 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
1037 printf(" Breakpoint adjusted to avoid br/call delay slot and multiple breakpoints\n");
1039 if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
1040 printf(" Breakpoint adjusted to avoid bc.t/bnc.t delay slot and multiple breakpoints\n");
1041 /* it IS really OK to set a break on the instruction AFTER the conditional branch
1042 -- it DOESN't have a delay slot */
1043 if ((instr
& 0xF4000000) == 0x70000000) /* bc / bnc */
1044 /* printf(" Breakpoint adjusted to avoid bc/bnc delay slot and multiple breakpoints\n"); */
1047 ((instr
& 0xFC00003F) == 0x4C000002 || /* bri/ calli */
1048 (instr
& 0xFC000000) == 0x40000000)
1051 printf(" Breakpoint adjusted to avoid calli/bri delay slot and multiple breakpoints\n");
1053 ((instr
& 0xF0000000) == 0x50000000) /* bte - btne */
1055 /* it's OK to set a break here -- we are NOT in aa branch delay slot */
1058 printf(" Breakpoint adjusted to avoid bte/btne multiple breakpoints\n");
1062 ((instr
& 0xFC000000) == 0xB4000000)
1065 printf(" Breakpoint adjusted to avoid bla delay slot and multiple breakpoints\n");
1069 if (brk
->mode
== DIM
)
1072 nextadr
= CORADR(nextadr
);
1080 if (brk
->mode
== RIM
)
1082 if (brk
->mode
== BIM
)
1087 if (brk
->mode
== DIM
)
1089 brk
->act_addr
[0] = CORADR(nextadr
);
1090 brk
->act_addr
[1] = FOPADR(nextadr
);
1092 brk
->act_addr
[0] = nextadr
;
1093 brk
->act_addr
[1] = 0;
1099 brk
->address1
= prevadr
;
1100 if (brk
->mode
== DIM
)
1102 brk
->act_addr
[2] = CORADR(prevadr
);
1103 brk
->act_addr
[3] = FOPADR(prevadr
);
1105 brk
->act_addr
[2] = prevadr
;
1106 brk
->act_addr
[3] = 0;
1109 brk
->act_addr
[2] = brk
->act_addr
[3] = 0;
1115 ** Figure out whether we are in a delayed slot and if so then take necessary
1116 ** action to resume properly - remember trap pre-empts instruction
1119 wasabranch (addr
, nextpc
, ss
)
1120 CORE_ADDR addr
, *nextpc
;
1123 long nextadr
, instr
;
1124 int val
= not_branch
;
1125 long offset
; /* Must be signed for sign-extend */
1131 nextadr
= CORADR((int)(addr
+ 8));
1132 instr
= adj_read_memory_integer (CORADR(addr
));
1137 instr
= adj_read_memory_integer (addr
);
1142 nextadr
= CORADR(addr
);
1143 instr
= adj_read_memory_integer (nextadr
);
1148 instr
= adj_read_memory_integer (addr
);
1153 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
1154 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
1156 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
1158 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
1160 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
1163 offset
= (instr
& 0x03ffffff);
1164 if (offset
& 0x02000000) /* sign extend? */
1165 offset
|= 0xFC000000;
1166 nextadr
+= (offset
<< 2);
1168 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
1169 (instr
& 0xFC000000) == 0x40000000) /* bri */
1174 offset
= ((instr
& 0x0000F800) >> 11);
1175 nextadr
= (read_register(offset
) & 0xFFFFFFFC);
1180 else if ((instr
& 0xF0000000) == 0x50000000) /* bte or btne */
1184 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
1185 nextadr
+= (offset
<< 2);
1187 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
1191 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
1192 nextadr
+= (offset
<< 2);
1199 extern char registers
[];
1201 i860_do_registers_info(regnum
,fpregs
)
1211 "Register Contents (relative to selected stack frame)\n\n");
1213 if (regnum
!= -1) /* print one register */
1215 if ((regnum
>=F0
) && (regnum
<= F31
))
1216 bcopy (®isters
[ADJ_FREG(regnum
)<<2], &val
, sizeof (long));
1218 bcopy (®isters
[regnum
<<2], &val
, sizeof (long));
1219 printf("%-4s 0x%08x\t", reg_names
[regnum
], val
);
1220 printf("\n\t"); fflush(stdout
);
1222 else /* print all registers */
1225 printf("\n Control/Status Registers :- \n\t");
1226 for (j
=0; j
<=DB
; j
++)
1228 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1229 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1231 printf("\n\t"); fflush(stdout
);
1234 bcopy (®isters
[EPSR
<<2], &val
, sizeof (long));
1235 printf("%-4s 0x%08x\t", reg_names
[EPSR
], val
);
1238 bcopy (®isters
[FSR
<<2], &val
, sizeof (long));
1239 printf("%-4s 0x%08x\t", reg_names
[FSR
], val
);
1242 bcopy (®isters
[CCR
<<2], &val
, sizeof (long));
1243 printf("%-4s 0x%08x\t", reg_names
[CCR
], val
);
1245 bcopy (®isters
[BEAR
<<2], &val
, sizeof (long));
1246 printf("%-4s 0x%08x\t", reg_names
[BEAR
], val
);
1250 for (j
=P0
; j
<=P3
; j
++)
1252 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1253 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1257 printf("\n Integer Registers :- \n\t");
1258 for (j
=R0
; j
<=R31
; j
++)
1260 if (j
!= IREGS
&& (j
% 4 == 0))
1262 printf("\n\t"); fflush(stdout
);
1264 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1265 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1268 printf("\n Floating Registers :- \n\t");
1269 for (j
=F0
; j
<=F31
; j
++)
1271 if (j
!= FREGS
&& (j
% 4 == 0))
1273 printf("\n\t"); fflush(stdout
);
1275 bcopy (®isters
[ADJ_FREG(j
)<<2], &val
, sizeof (long));
1276 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1279 printf("\n Special Registers :- \n\t");
1280 for (j
=SPC_KI
; j
<=SPC_MERGE
; j
+=2)
1285 printf("\n\t"); fflush(stdout
);
1287 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1288 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1289 printf("%-6s 0x%08x %08x\t", reg_names
[j
], val
,valh
);
1292 printf("\n Graphics Pipeline :- \n");
1294 unsigned int valh
, val2
,val3
;
1296 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1297 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1298 printf("\t\t\t%-8s 0x%08x %08x \n", reg_names
[j
], val
,valh
);
1301 printf(" Memory Load Pipeline :- \n");
1302 for (j
=PSV_L1
; j
<=PSV_L3
; j
+=4)
1304 unsigned int valh
, val2
,val3
;
1305 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1306 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1307 bcopy (®isters
[(j
+2)<<2], &val2
, sizeof (long));
1308 bcopy (®isters
[(j
+3)<<2], &val3
, sizeof (long));
1309 printf("\t\t%-8s 0x%08x %08x %08x %08x\n", reg_names
[j
],
1310 val
,valh
,val2
,val3
);
1313 printf("\n Adder Pipeline :-\t\tMultiplier Pipeline :-\t\tFSR results :-\n");
1314 for (i
=PSV_FSR1
,j
=PSV_A1
,k
=PSV_M1
; j
<=PSV_A3
; i
++,j
+=2,k
+=2)
1316 unsigned int valh
,val2
,val3
,val4
;
1317 bcopy (®isters
[i
<<2], &val4
, sizeof (long));
1318 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1319 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1320 bcopy (®isters
[k
<<2], &val2
, sizeof (long));
1321 bcopy (®isters
[(k
+1)<<2], &val3
, sizeof (long));
1322 printf(" %-4s 0x%08x %08x\t", reg_names
[j
], val
,valh
);
1323 printf("%-4s 0x%08x %08x\t", reg_names
[k
], val2
,val3
);
1324 printf("%-4s 0x%08x\n", reg_names
[i
], val4
);
1332 int has_stored_r1(CORE_ADDR prologue_start
, CORE_ADDR prologue_end
)
1337 BTDEBUG("has_stored_r1, prologue_start %x, prologue_end %x\n",
1338 prologue_start
, prologue_end
);
1340 for (addr
= prologue_start
; addr
<= prologue_end
; addr
+= 4)
1343 instr
= adj_read_memory_integer (addr
);
1344 if ((instr
& 0xFFE0F801) == 0x1C400801 /* st.l r1,X(sp) */
1345 || (instr
& 0xFFE0F801) == 0x1C600801) /* st.l r1,X(fp) */
1351 /* This function returns 1 if there is no stored r1, 0 otherwise.
1352 The function returns 1 if the pc is in a function prologue,
1353 or the function prologue didn't save the return pointer in
1354 the stack frame, 0 otherwise */
1356 int no_stored_rp(CORE_ADDR pc
)
1358 CORE_ADDR func_start
, prologue_end
;
1360 func_start
= get_pc_function_start(pc
);
1363 prologue_end
= func_start
;
1364 SKIP_PROLOGUE(prologue_end
);
1365 if ( (pc
>= func_start
) && (pc
<= prologue_end
))
1367 BTDEBUG("no_stored_rp: pc %x is in prologue \n",pc
);
1370 /* otherwise, see if the entry sequence stored the return pointer.
1371 If it didn't, return 1 */
1372 /* Some procedures , at least, store the return pointer AFTER the prologue sequence! */
1373 if (!has_stored_r1(func_start
, pc
))
1375 BTDEBUG("no_stored_rp, for pc %x, prologue didn't store r1\n",pc
);
1379 BTDEBUG("no_stored_rp for pc %x return pointer was stored \n", pc
);
1384 /* The following set of routines was adapted from existing code previously
1385 in an i860-specific version of breakpoint.c by Peggy Fieland
1386 (Margaret_Fieland@vos.stratus.com) */
1387 unsigned int dbrkval
, dbrkmod
;
1388 void i860_dbrk_breakpoint()
1390 BTDEBUG("i860_dbrk_breakpoint was called , dbrkval %x\n", dbrkval
);
1394 *(int *)®isters
[DB
<<2] = dbrkval
;
1398 *(int *)®isters
[DB
<<2] = 0;
1401 *(int *)®isters
[PSR
<<2] &= ~3;
1402 *(int *)®isters
[PSR
<<2] |= dbrkmod
;
1404 store_inferior_registers(DB
);
1405 store_inferior_registers(PSR
);
1410 d_ro_break_command(arg
)
1413 dbrkval
= strtoul(arg
, NULL
, 0);
1415 printf(" ro_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1419 d_wo_break_command(arg
)
1422 dbrkval
= strtoul(arg
, NULL
, 0);
1424 printf(" wo_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1428 d_rw_break_command(arg
)
1431 dbrkval
= strtoul(arg
, NULL
, 0);
1433 printf(" rw_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1444 i860_init_breakpoints()
1446 dbrkval
= dbrkmod
= 0;
1447 add_com ("dbro", class_breakpoint
, d_ro_break_command
,
1448 "Set a data breakpoint READ ONLY, 32-bit data element.");
1449 add_com ("dbwo", class_breakpoint
, d_wo_break_command
,
1450 "Set a data breakpoint WRITE ONLY, 32-bit data element.");
1451 add_com ("dbrw", class_breakpoint
, d_rw_break_command
,
1452 "Set a data breakpoint READ/WRITE, 32-bit data element.");
1453 add_com ("dclear", class_breakpoint
, clear_dbreak
,
1454 "clear the current data breakpoint.");
1455 add_com_alias ("dc", "dclear", class_breakpoint
, 1);
1459 int i860_insert_breakpoint(b
)
1460 struct breakpoint
*b
;
1464 place_brk( b
->address
, BREAK_MODE
, b
);
1468 adj_read_memory (b
->act_addr
[0], &b
->shadow_contents
[0], 4);
1469 val
= adj_write_memory (b
->act_addr
[0], break_insn
, 4);
1470 if (val
) return val
;
1471 adj_read_memory (b
->act_addr
[1], &b
->shadow_contents
[1], 4);
1472 /* val = adj_write_memory (b->act_addr[1], float_insn, 4); */
1473 if (val
) return val
;
1477 adj_read_memory (b
->act_addr
[0], &b
->shadow_contents
[0], 4);
1478 val
= adj_write_memory (b
->act_addr
[0], break_insn
, 4);
1485 adj_read_memory (b
->act_addr
[2], &b
->shadow_contents
[2], 4);
1486 val
= adj_write_memory (b
->act_addr
[2], break_insn
, 4);
1487 if (val
) return val
;
1488 adj_read_memory (b
->act_addr
[3], &b
->shadow_contents
[3], 4);
1489 /* val = adj_write_memory (b->act_addr[3], float_insn, 4); */
1490 if (val
) return val
;
1494 adj_read_memory (b
->act_addr
[2], &b
->shadow_contents
[0], 4);
1495 val
= adj_write_memory (b
->act_addr
[2], break_insn
, 4);
1500 BTDEBUG("Inserted breakpoint at 0x%x, shadow 0x%x, 0x%x.\n",
1501 b
->address
, b
->shadow_contents
[0], b
->shadow_contents
[1]);
1506 int i860_remove_breakpoint(b
)
1507 struct breakpoint
*b
;
1515 val
=adj_write_memory (b
->act_addr
[0], &(b
->shadow_contents
[0]), 4);
1516 val
=adj_write_memory (b
->act_addr
[1], &(b
->shadow_contents
[1]), 4);
1519 val
=adj_write_memory (b
->act_addr
[2], &(b
->shadow_contents
[2]), 4);
1520 val
=adj_write_memory (b
->act_addr
[3], &(b
->shadow_contents
[3]), 4);
1525 val
=adj_write_memory (b
->act_addr
[0], b
->shadow_contents
, 4);
1528 val
=adj_write_memory (b
->act_addr
[2], b
->shadow_contents
, 4);
1534 BTDEBUG( "Removed breakpoint at 0x%x, shadow 0x%x, 0x%x.\n",
1535 b
->address
, b
->shadow_contents
[0], b
->shadow_contents
[1]);
1544 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1546 #include <sys/procfs.h>
1548 /* The following routines were added by Peggy Fieland (Margaret_Fieland@vos.stratus.com)
1549 They were adapted from the m-68k versions of the routines .*/
1551 /* Given a pointer to a floating point register set in /proc format
1552 (fpregset_t *), unpack the register contents and supply them as gdb's
1553 idea of the current floating point register values. */
1556 supply_fpregset (fpregsetp
)
1557 fpregset_t
*fpregsetp
;
1561 BTDEBUG("supply_fregset called \n");
1563 for (regno
= F0
; regno
<= F31
; regno
++)
1565 supply_register (regno
, (char *) &(fpregsetp
-> fpu
.r_freg
[regno
-F0
]));
1569 /* Given a pointer to a floating point register set in /proc format
1570 (fpregset_t *), update the register specified by REGNO from gdb's idea
1571 of the current floating point register set. If REGNO is -1, update
1575 fill_fpregset (fpregsetp
, regno
)
1576 fpregset_t
*fpregsetp
;
1582 extern char registers
[];
1583 BTDEBUG("fill_fregset regno %d\n",regno
);
1585 for (regi
= F0
; regi
<= F31
; regi
++)
1587 if ((regno
== -1) || (regno
== regi
))
1589 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
1590 to
= (char *) &(fpregsetp
-> fpu
.r_freg
[regi
-F0
]);
1591 bcopy (from
, to
, REGISTER_RAW_SIZE (regno
));
1597 /* Given a pointer to a general register set in /proc format (gregset_t *),
1598 unpack the register contents and supply them as gdb's idea of the current
1602 supply_gregset (gregsetp
)
1603 gregset_t
*gregsetp
;
1606 register greg_t
*regp
= (greg_t
*) gregsetp
;
1608 BTDEBUG("supply_gregset called \n");
1610 for (regno
= 0 ; regno
<= R31
; regno
++)
1612 supply_register (regno
, (char *) (regp
+ regno
));
1617 fill_gregset (gregsetp
, regno
)
1618 gregset_t
*gregsetp
;
1622 extern char registers
[];
1623 register greg_t
*regp
= (greg_t
*) gregsetp
;
1624 BTDEBUG("fill_gregset regno %d \n",regno
);
1626 for (regi
= 0 ; regi
<= R31
; regi
++)
1628 if ((regno
== -1) || (regno
== regi
))
1630 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];