1 /* Target-dependent code for the i860 for GDB, the GNU debugger.
2 Copyright is unclear on this module!!!
3 Copyright (C) 1992 Free Software Foundation, Inc.
4 SVR4 and ELF/DWARF changes Contributed by Peggy Fieland (pfieland@stratus.com)
6 GDB is distributed in the hope that it will be useful, but WITHOUT ANY
7 WARRANTY. No author or distributor accepts responsibility to anyone
8 for the consequences of using it or for whether it serves any
9 particular purpose or works at all, unless he says so in writing.
10 Refer to the GDB General Public License for full details.
12 Everyone is granted permission to copy, modify and redistribute GDB,
13 but only under the conditions described in the GDB General Public
14 License. A copy of this license is supposed to have been given to you
15 along with GDB so you can know your rights and responsibilities. It
16 should be in a file named COPYING. Among other things, the copyright
17 notice and this notice must be preserved on all copies.
19 In other words, go ahead and share GDB, but don't try to stop
20 anyone else from sharing it farther. Help stamp out software hoarding!
35 #include "i860-opcode.h"
41 #include <sys/types.h>
42 #include <sys/param.h>
47 #include <sys/ioctl.h>
50 /* #include <sys/reg.h> */
59 #include <sys/elftypes.h>
60 #include <sys/elf_860.h>
64 extern int read_memory();
65 extern int write_memory();
66 extern int read_memory_integer();
67 extern int print_insn();
70 extern int store_inferior_registers(int);
71 extern int outside_startup_file();
73 int btdebug
= 0; /* change value to 1 to enable debugging code */
75 #define BTDEBUG if (btdebug) btdebug_message
78 extern int attach_flag
;
80 #define INSTRUCTION_LENGTH 4
81 #define REGISTER_LENGTH 4
83 /* routine to print debugging messages */
84 void btdebug_message(char *format
, ...)
87 va_start( arglist
, format
);
90 vfprintf (stderr
, format
, arglist
);
96 /* return nonzero if the routine containing pc has been
97 * compiled with -g. We assume -g if the first instruction is
98 * an addu|adds -X,sp and the second is st.l fp,XX(sp)
100 * based on skip_prologue();
103 static int g_routine(pc
)
109 top_pc
= get_pc_function_start(pc
);
112 instr
= (unsigned)( adj_read_memory_integer (top_pc
));
113 /* Recognize "addu|adds -X,sp,sp" insn. */
115 if ((instr
& 0xEFFF0000) == 0x84420000)
117 top_pc
+= INSTRUCTION_LENGTH
;
118 instr
= (unsigned)(adj_read_memory_integer (top_pc
));
120 if( (instr
& 0xFFE0F801) == 0x1C401801 ) /* st.l fp,X(sp) */
128 /* return the stack offset where the fp register is stored */
129 static int find_fp_offset(pc
)
135 /* look for the instruction and examine the offset */
137 for (i
=INSTRUCTION_LENGTH
*1; i
< INSTRUCTION_LENGTH
*4; i
+=INSTRUCTION_LENGTH
){
138 instr
= (unsigned)(adj_read_memory_integer(pc
+i
));
139 if( (instr
& 0xFFE0F801) == 0x1C401801) { /* st.l fp,X(sp) */
141 fp_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) |
149 /* return the stack offset where r1 (return linkage ) register is stored */
150 static int find_r1_offset(pc
)
156 /* look for the instruction and examine the offset */
158 for (i
=INSTRUCTION_LENGTH
*1; i
< INSTRUCTION_LENGTH
*4; i
+=INSTRUCTION_LENGTH
){
159 instr
= (unsigned)( adj_read_memory_integer(pc
+i
));
160 if ((instr
& 0xFFE0F801) == 0x1C400801) { /* st.l r1,X(sp) */
162 r1_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) |
170 CORE_ADDR
skip_prologue(CORE_ADDR
);
172 /* does routine starting at pc build a stack frame of any kind?? */
173 static int has_a_frame(pc
)
176 if( skip_prologue(pc
) != pc
)return(1);
181 /* written by Peggy Fieland Margaret_Fieland@vos.stratus.com
182 Routine to validate the return register and the frame pointer
183 This routine is called when the routine we are in doesn't have a frame
184 In that case, we assume that the return address and frame pointer have
185 not been touched. In the following routine, we try to range check them
186 to see if they are valid. */
188 static int valid_regs (rp
, fp
)
191 if ( ( (rp
% 4) != 0) | ( (fp
% 16) != 0) )
199 /* get the pc and frame pointer (or sp )
200 * for the routine that called us
201 * when we (this_pc) is not within a -g routine
202 * if caller is non g we return sp for fp
205 /* note this is written for Metaware version R2.1d compiler */
206 /* Modified by Peggy Fieland Margaret_Fieland@vos.stratus.com */
207 static int caller_pc(this_pc
,this_sp
,to_pc
,to_fp
)
208 CORE_ADDR this_pc
,this_sp
;
209 CORE_ADDR
*to_pc
, *to_fp
;
211 CORE_ADDR func_start
;
212 int sp_offset
,offset
;
213 CORE_ADDR sp
,pc
,fp
,instr
;
215 BTDEBUG("caller_pc %x sp = %x\n",this_pc
,this_sp
);
217 func_start
= get_pc_function_start(this_pc
);
219 BTDEBUG("caller_pc func_start %x\n", func_start
);
221 if (func_start
!= NULL
)
223 if( has_a_frame(func_start
) ){
225 BTDEBUG("has_a_frame\n");
227 /* if our caller has a preamble and
228 * declares space for a stack frame
229 * then we must work to find our return address
231 instr
= (unsigned)( adj_read_memory_integer (func_start
));
232 /* Recognize "addu|adds -X,sp,sp" insn. */
234 if ((instr
& 0xEFFF0000) == 0x84420000)
235 sp_offset
=SIGN_EXT16(instr
&0x0000FFFF);
239 /* if we get here, procedure doesn't have a frame. If we didn't
240 do anything weird, the frame pointer and return register have
241 the values we want. Check them to see if they are valid. */
243 CORE_ADDR temp_rp
, temp_fp
;
245 temp_rp
= read_register(RP_REGNUM
);
246 temp_fp
= read_register(FP_REGNUM
);
248 if (!valid_regs(temp_rp
, temp_fp
))
250 printf("error frame_chain\n");
253 BTDEBUG("caller_pc no frame, using r1 %x and fp %x\n",
260 BTDEBUG("sp_offset = %d %x\n",sp_offset
,sp_offset
);
262 offset
= find_r1_offset(func_start
);
265 printf("cant find return address for routine at %x\n",
269 pc
= read_memory_integer(this_sp
+offset
,sizeof(long));
270 sp
= this_sp
- sp_offset
;
272 BTDEBUG("callers pc = %x sp = %x\n",pc
,sp
);
274 /* our caller a -g routine ?
275 * if he is we have to find his real fp
276 * else provide the sp as his fp
281 BTDEBUG("caller_a_g\n");
283 if( ! (offset
= find_fp_offset(func_start
)) ) {
284 printf("error fp_offset\n");
287 BTDEBUG("offset = %x %d\n",offset
,offset
);
289 fp
= read_memory_integer(this_sp
+offset
,sizeof(long));
290 *to_pc
= CLEAN_PC(pc
);
294 *to_pc
= CLEAN_PC(pc
);
298 /* pc = read_register(RP_REGNUM); */
300 /* if we get here, procedure doesn't have a frame. If we didn't
301 do anything weird, the frame pointer and return register have
302 the values we want. Check them to see if they are valid. */
304 CORE_ADDR temp_rp
, temp_fp
;
306 temp_rp
= read_register(RP_REGNUM
);
307 temp_fp
= read_register(FP_REGNUM
);
309 if (!valid_regs(temp_rp
, temp_fp
))
311 printf("error frame_chain\n");
314 BTDEBUG("caller_pc no frame, using r1 %x and fp %x\n",
323 ** Figure out address to place next breakpoint. Avoid tricky spots,
324 ** ie. delayed instruction slots etc.
325 ** Need to upgrade this later to allow delayed instruction breakpoints
326 ** with fix-up work done AFTER breakpoint.
327 ** Note that this routine DOES deal with dual instruction mode
332 place_brk (addr
, mode
, brk
)
335 struct breakpoint
*brk
;
338 CORE_ADDR nextadr
, prevadr
;
339 int val
= not_branch
;
340 long offset
; /* Must be signed for sign-extend */
341 extern char registers
[];
342 prevadr
= nextadr
= 0;
346 if (mode
== SINGLE_STEP_MODE
)
350 nextadr
= brk
->address
= (addr
+ INSTRUCTION_LENGTH
*2);
351 instr
= (unsigned)(adj_read_memory_integer ((addr
+ INSTRUCTION_LENGTH
)));
356 nextadr
= brk
->address
= (addr
+ INSTRUCTION_LENGTH
);
357 instr
= (unsigned)(adj_read_memory_integer (addr
));
366 ** For br/call one more sequential instruction gets executed and then we
367 ** continue at the current addr + offset. We are definitely going to
368 ** the dest. We are NOT allowed to place a breakpoint in the "delay"
369 ** slot - (the next sequential instruction) so we only place 1 breakpoint
370 ** at the destination.
371 ** For the bc/bnc the next instruction executed is EITHER the next sequential
372 ** or the destination of the branch, we therefore place 2 breakpoints one
374 ** For the bc.t/bnc.t either 1 more sequential instruction is performed
375 ** followed by a branch (like br/call) OR we skip the sequential
376 ** instruction and keep going. We therefore place a breakpoint at the
377 ** destination of the branch AND the second sequential instruction after
378 ** the branch. Again a breakpoint is NOT allowed in the "delay slot"
380 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
381 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
383 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
385 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t/bnc.t */
387 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
389 offset
= (instr
& 0x03ffffff);
390 if (offset
& 0x02000000) /*?sign extend*/
391 offset
|= 0xFC000000;
392 if (val
== uncond_d
) /* br/call*/
394 else if (val
== cond_d
) /* bc.t/bnc.t */
396 if ((INDIM
) && !(ENDIM
))
397 prevadr
= nextadr
+ (2*INSTRUCTION_LENGTH
);
399 prevadr
= nextadr
+ INSTRUCTION_LENGTH
;
400 } else { /* bc /bnc */
401 if ((INDIM
) && !(ENDIM
))
406 nextadr
+= (offset
<< 2);
409 ** We treat the bri/calli the same way as the br/call case.
411 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
412 (instr
& 0xFC000000) == 0x40000000) /* bri */
415 offset
= ((instr
& 0x0000F800) >> 11);
416 nextadr
= (read_register(offset
+ R0
) & 0xFFFFFFFC);
420 ** We treat the bte/btne the same way as the bc/bnc case.
422 else if ((instr
& 0xF0000000) == 0x50000000) /* bte/btne */
425 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) |
426 (instr
& 0x000007FF));
427 if ((INDIM
) && !(ENDIM
))
432 nextadr
+= (offset
<< 2);
435 ** We treat the bte/btne the same way as the bc/bnc case.
436 ** With the caveat that the 2 breakpoints may turn out to be at the same
437 ** address in which case we ignore one of them.
439 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
442 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) |
443 (instr
& 0x000007FF));
444 if ((INDIM
) && !(ENDIM
))
446 prevadr
= nextadr
+ 2*INSTRUCTION_LENGTH
;
448 prevadr
= nextadr
+ INSTRUCTION_LENGTH
;
450 nextadr
+= (offset
<< 2);
451 if (prevadr
== nextadr
) prevadr
= 0;
458 if (ISDIM(FOPADR(addr
)))
460 if (ISDIM(FOPADR(nextadr
- INSTRUCTION_LENGTH
*2)))
462 instr
= (unsigned)(adj_read_memory_integer(CORADR(addr
463 -(INSTRUCTION_LENGTH
*2))));
466 instr
= (unsigned)(adj_read_memory_integer(addr
-INSTRUCTION_LENGTH
));
470 if (ISDIM(addr
-INSTRUCTION_LENGTH
))
472 instr
= (unsigned)(adj_read_memory_integer(addr
-INSTRUCTION_LENGTH
));
475 instr
= (unsigned)(adj_read_memory_integer (addr
-INSTRUCTION_LENGTH
));
480 /* examine the PREVIOUS instruction to determine if we are in a branch delay
481 slot. If we are, dont set a break here -- set it on the previous instruction.
482 This code also accounts for dual instruction mode */
483 if ((instr
& 0xE0000000) == 0x60000000 &&
484 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
490 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
491 printf(" Breakpoint adjusted to avoid br/call delay slot and multiple breakpoints\n");
493 if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
494 printf(" Breakpoint adjusted to avoid bc.t/bnc.t delay slot and multiple breakpoints\n");
495 /* it IS really OK to set a break on the instruction AFTER the conditional branch
496 -- it DOESN't have a delay slot */
497 if ((instr
& 0xF4000000) == 0x70000000) /* bc / bnc */
498 /* printf(" Breakpoint adjusted to avoid bc/bnc delay slot and multiple breakpoints\n"); */
501 ((instr
& 0xFC00003F) == 0x4C000002 || /* bri/ calli */
502 (instr
& 0xFC000000) == 0x40000000)
505 printf(" Breakpoint adjusted to avoid calli/bri delay slot and multiple breakpoints\n");
507 ((instr
& 0xF0000000) == 0x50000000) /* bte - btne */
509 /* it's OK to set a break here -- we are NOT in aa branch delay slot */
512 printf(" Breakpoint adjusted to avoid bte/btne multiple breakpoints\n");
516 ((instr
& 0xFC000000) == 0xB4000000)
519 printf(" Breakpoint adjusted to avoid bla delay slot and multiple breakpoints\n");
523 if (brk
->mode
== DIM
)
525 nextadr
-= INSTRUCTION_LENGTH
*2;
526 nextadr
= CORADR(nextadr
);
529 nextadr
-= INSTRUCTION_LENGTH
;
534 if (brk
->mode
== RIM
)
536 if (brk
->mode
== BIM
)
541 if (brk
->mode
== DIM
)
543 brk
->act_addr
[0] = CORADR(nextadr
);
544 brk
->act_addr
[1] = FOPADR(nextadr
);
546 brk
->act_addr
[0] = nextadr
;
547 brk
->act_addr
[1] = 0;
553 brk
->address1
= prevadr
;
554 if (brk
->mode
== DIM
)
556 brk
->act_addr
[2] = CORADR(prevadr
);
557 brk
->act_addr
[3] = FOPADR(prevadr
);
559 brk
->act_addr
[2] = prevadr
;
560 brk
->act_addr
[3] = 0;
563 brk
->act_addr
[2] = brk
->act_addr
[3] = 0;
568 /* This routine checks to see if r1 has been stored into the frame between
569 the addresses prologue_start and prologue_end. Recognize stores of r1
570 relative to both the sp and fp registers. */
571 static int has_stored_r1(CORE_ADDR prologue_start
, CORE_ADDR prologue_end
)
576 BTDEBUG("has_stored_r1, prologue_start %x, prologue_end %x\n",
577 prologue_start
, prologue_end
);
579 for (addr
= prologue_start
; addr
<= prologue_end
; addr
+= INSTRUCTION_LENGTH
)
582 instr
= (unsigned)(adj_read_memory_integer (addr
));
583 if ((instr
& 0xFFE0F801) == 0x1C400801 /* st.l r1,X(sp) */
584 || (instr
& 0xFFE0F801) == 0x1C600801) /* st.l r1,X(fp) */
589 /* This is used when GDB is exiting. It gives less chance of error.*/
592 /* Simulate single-step ptrace call for sun4. Code written by Gary
593 Beihl (beihl@mcc.com). */
594 /* Modified for i860 by Jim Hanko (hanko@orc.olivetti.com) */
597 static struct breakpoint brk
;
598 typedef char binsn_quantum
[sizeof break_insn
];
600 /* Non-zero if we just simulated a single-step ptrace call. This is
601 needed because we cannot remove the breakpoints in the inferior
602 process until after the `wait' in `wait_for_inferior'. Used for
607 /* single_step() is called just before we want to resume the inferior,
608 if we want to single-step it but there is no hardware or kernel single-step
609 support. We find all the possible targets of the coming instruction and
612 single_step is also called just after the inferior stops. If we had
613 set up a simulated single-step, we undo our damage. */
614 /* Note that we don't need the parameter, but it's dictated as part of the interface. */
620 branch_type
place_brk();
622 pc
= read_register (PC_REGNUM
);
627 place_brk (pc
, SINGLE_STEP_MODE
, &brk
);
628 brk
.shadow_contents
[0] = brk
.shadow_contents
[1] = 0;
629 brk
.shadow_contents
[2] = brk
.shadow_contents
[3] = 0;
635 btdebug_message(" DIM1 -> %x : ", brk
.act_addr
[3]);
636 print_insn( brk
.act_addr
[3], stderr
);
637 btdebug_message("\t -|- %x : ", brk
.act_addr
[2]);
638 print_insn( brk
.act_addr
[2], stderr
);
639 btdebug_message("\n");
641 if (( brk
.address1
!= NULL
))
643 adj_read_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2],
645 adj_write_memory (brk
.act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
646 adj_read_memory (brk
.act_addr
[3], &brk
.shadow_contents
[3],
648 /* adj_write_memory (brk.act_addr[3], float_insn,
649 INSTRUCTION_LENGTH); */
654 if ( brk
.address1
!= 0)
655 btdebug_message(" DIM2 ->");
657 btdebug_message(" DIM1 ->");
659 btdebug_message(" %x : ", brk
.act_addr
[1]);
660 print_insn( brk
.act_addr
[1], stderr
);
661 btdebug_message("\t -|- %x : ", brk
.act_addr
[0]);
662 print_insn( brk
.act_addr
[0], stderr
);
663 btdebug_message("\n");
666 adj_read_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0],
668 adj_write_memory (brk
.act_addr
[0], break_insn
,
670 adj_read_memory (brk
.act_addr
[1], &brk
.shadow_contents
[1],
672 /* adj_write_memory (brk.act_addr[1], float_insn,
673 INSTRUCTION_LENGTH); */
677 if (brk
.address1
!= NULL
)
681 btdebug_message(" SIM1 ->");
682 btdebug_message(" %x : ", brk
.act_addr
[2]);
683 print_insn( brk
.act_addr
[2], stderr
);
684 btdebug_message("\n");
686 adj_read_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2],
688 adj_write_memory (brk
.act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
692 if ( brk
.address1
!= NULL
)
693 btdebug_message(" SIM2 ->");
695 btdebug_message(" SIM1 ->");
697 btdebug_message(" %x : ", brk
.act_addr
[0]);
698 print_insn( brk
.act_addr
[0], stderr
);
699 btdebug_message("\n");
701 adj_read_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0],
703 adj_write_memory (brk
.act_addr
[0], break_insn
,INSTRUCTION_LENGTH
);
712 /* Remove breakpoints */
715 adj_write_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0],
717 adj_write_memory (brk
.act_addr
[1], &brk
.shadow_contents
[1],
720 adj_write_memory (brk
.act_addr
[0], &brk
.shadow_contents
[0],
724 if (brk
.address1
!= NULL
)
728 adj_write_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2],
730 adj_write_memory (brk
.act_addr
[3], &brk
.shadow_contents
[3],
733 adj_write_memory (brk
.act_addr
[2], &brk
.shadow_contents
[2],
743 /* Written for i860 by Jim Hanko (hanko@orc.olivetti.com) */
744 /* This code was based on SPARC code written by Gary Beihl (beihl@mcc.com),
745 by Michael Tiemann (tiemann@corto.inria.fr). */
746 /* This routine returns the first memory address following the prologue code,
747 if there is a prologue. */
749 struct command_line
*get_breakpoint_commands ();
758 instr
= (unsigned)(adj_read_memory_integer (pc
));
760 /* Recognize "addu|adds -X,sp,sp" insn. */
761 if ((instr
& 0xEFFF0000) == 0x84420000)
763 pc
+= INSTRUCTION_LENGTH
;
764 instr
= (unsigned)(adj_read_memory_integer (pc
));
767 return(pc
); /* No frame! */
769 /* Recognize store of return addr and frame pointer into frame */
772 if ((instr
& 0xFFE0F801) == 0x1C400801 || /* st.l r1,X(sp) */
773 (instr
& 0xFFE0F801) == 0x1C401801) /* st.l fp,X(sp) */
775 pc
+= INSTRUCTION_LENGTH
;
776 instr
= (unsigned)(adj_read_memory_integer (pc
));
782 /* Recognize "addu|adds X,sp,fp" insn. */
783 if ((instr
& 0xEFFF0000) == 0x84430000)
785 pc
+= INSTRUCTION_LENGTH
;
786 instr
= (unsigned)(adj_read_memory_integer (pc
));
789 /* Now recognize stores into the frame from the registers. */
793 if ((instr
& 0xFFA00003) == 0x1C200001 || /* st.l rn,X(fp|sp) */
794 (instr
& 0xFFA00001) == 0x4C200000) /* fst.y fn,X(fp|sp) */
796 regno
= (instr
>> 11) & 0x1f;
797 if (regno
== 0) /* source reg == 0? quit */
799 pc
+= INSTRUCTION_LENGTH
;
800 instr
= (unsigned)(adj_read_memory_integer (pc
));
810 /* This routine is uncalled. Remove it sometime. */
811 /* Set *nextpc to branch target if we find a branch. If it is not a branch,
812 set it to the next instruction (addr + 4) */
816 isabranch (addr
, nextpc
)
817 CORE_ADDR addr
, *nextpc
;
820 branch_type val
= not_branch
;
821 long offset
; /* Must be signed for sign-extend */
823 BTDEBUG(" isabranch\n");
825 instr
= (unsigned)(adj_read_memory_integer (addr
));
827 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
828 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
830 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
832 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
834 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
837 offset
= (instr
& 0x03ffffff);
838 if (offset
& 0x02000000) /* sign extend? */
839 offset
|= 0xFC000000;
840 *nextpc
= addr
+ 4 + (offset
<< 2);
842 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
843 (instr
& 0xFC000000) == 0x40000000) /* bri */
846 offset
= ((instr
& 0x0000F800) >> 11);
847 *nextpc
= (read_register(offset
) & 0xFFFFFFFC);
849 else if ((instr
& 0xF0000000) == 0x50000000) /* bte or btne */
853 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
854 *nextpc
= addr
+ 4 + (offset
<< 2);
856 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
860 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
861 *nextpc
= addr
+ 4 + (offset
<< 2);
864 BTDEBUG(" Final addr - %x\n", *nextpc
);
865 /*BTDEBUG("isabranch ret: %d\n",val); */
870 /* set in call_function() [valops.c] to the address of the "call dummy" code
871 so dummy frames can be easily recognized; also used in wait_for_inferior()
872 [infrun.c]. When not used, it points into the ABI's 'reserved area' */
874 CORE_ADDR call_dummy_set
= 0; /* true if dummy call being done */
875 CORE_ADDR call_dummy_start
; /* address of call dummy code */
877 /* this routine routine gets the values of the registers stored in the frame
878 and stores their values into the frame_saved_regs structure. */
881 frame_find_saved_regs(frame_info
, frame_saved_regs
)
882 struct frame_info
*frame_info
;
883 struct frame_saved_regs
*frame_saved_regs
;
885 register CORE_ADDR pc
;
887 long offset
, spdelta
= 0;
889 int r1_off
= -1, fp_off
= -1;
892 bzero (frame_saved_regs
, sizeof(*frame_saved_regs
));
894 if (call_dummy_set
&& frame_info
->pc
>= call_dummy_start
&&
895 frame_info
->pc
<= call_dummy_start
+ CALL_DUMMY_LENGTH
)
897 /* DUMMY frame - all registers stored in order at fp; old sp is
898 at fp + NUM_REGS*4 */
900 for (i
= 1; i
< NUM_REGS
; i
++) /* skip reg 0 */
901 if (i
!= SP_REGNUM
&& i
!= FP0_REGNUM
&& i
!= FP0_REGNUM
+ 1)
902 /* the register numbers used in the instruction and the ones used to index
903 the regs array are not the same -- compensate */
904 frame_saved_regs
->regs
[i
+R0
] = frame_info
->frame
+ i
*REGISTER_LENGTH
;
906 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+ NUM_REGS
*REGISTER_LENGTH
;
912 pc
= get_pc_function_start (frame_info
->pc
);
915 instr
= (unsigned)(adj_read_memory_integer (pc
));
916 /* Recognize "addu|adds -X,sp,sp" insn. */
917 if ((instr
& 0xEFFF0000) == 0x84420000)
919 framesize
= -SIGN_EXT16(instr
& 0x0000FFFF);
920 pc
+= INSTRUCTION_LENGTH
;
921 instr
= (unsigned)(adj_read_memory_integer (pc
));
925 goto punt
; /* No frame! */
927 /* Recognize store of return addr and frame pointer into frame */
930 if ((instr
& 0xFFE0F801) == 0x1C400801) /* st.l r1,X(sp) */
932 r1_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
933 pc
+= INSTRUCTION_LENGTH
;
934 instr
= (unsigned)(adj_read_memory_integer (pc
));
936 else if ((instr
& 0xFFE0F801) == 0x1C401801) /* st.l fp,X(sp) */
938 fp_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
939 pc
+= INSTRUCTION_LENGTH
;
940 instr
= (unsigned)(adj_read_memory_integer (pc
));
946 /* Recognize "addu|adds X,sp,fp" insn. */
947 if ((instr
& 0xEFFF0000) == 0x84430000)
949 spdelta
= SIGN_EXT16(instr
& 0x0000FFFF);
950 pc
+= INSTRUCTION_LENGTH
;
951 instr
= (unsigned)(adj_read_memory_integer (pc
));
954 /* Now recognize stores into the frame from the registers. */
958 if ((instr
& 0xFFC00003) == 0x1C400001) /* st.l rn,X(fp|sp) */
960 offset
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
961 reg
= (instr
>> 11) & 0x1F;
964 if ((instr
& 0x00200000) == 0) /* was this using sp? */
965 if (spdelta
!= 0) /* and we know sp-fp delta */
966 offset
-= spdelta
; /* if so, adjust the offset */
968 break; /* if not, give up */
971 /* Handle the case where the return address is stored after the fp
975 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
+ offset
;
977 frame_saved_regs
->regs
[reg
+R0
] = frame_info
->frame
+ offset
;
979 pc
+= INSTRUCTION_LENGTH
;
980 instr
= (unsigned)(adj_read_memory_integer (pc
));
982 else if ((instr
& 0xFFC00001) == 0x2C400000) /* fst.y fn,X(fp|sp) */
985 * The number of words in a floating store based on 3 LSB of instr
987 static int fst_sizes
[] = {2, 0, 1, 0, 4, 0, 1, 0};
989 size
= fst_sizes
[instr
& 7];
990 reg
= ((instr
>> 16) & 0x1F) + FP0_REGNUM
;
994 if (size
> 1) /* align the offset */
995 offset
= SIGN_EXT16(instr
& 0x0000FFF8); /* drop 3 bits */
997 offset
= SIGN_EXT16(instr
& 0x0000FFFC); /* drop 2 bits */
999 if ((instr
& 0x00200000) == 0) /* was this using sp? */
1000 if (spdelta
!= 0) /* and we know sp-fp delta */
1001 offset
-= spdelta
; /* if so, adjust the offset */
1003 break; /* if not, give up */
1005 for (i
= 0; i
< size
; i
++)
1007 frame_saved_regs
->regs
[reg
] = frame_info
->frame
+ offset
;
1009 offset
+= REGISTER_LENGTH
;
1013 pc
+= INSTRUCTION_LENGTH
;
1014 instr
= (unsigned)(adj_read_memory_integer (pc
));
1021 if (framesize
!= 0 && spdelta
!= 0)
1022 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+(framesize
-spdelta
);
1024 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+ 8;
1026 if ((spdelta
!= 0) && fp_off
!= -1)
1027 frame_saved_regs
->regs
[FP_REGNUM
] = frame_info
->frame
- spdelta
+ fp_off
;
1029 frame_saved_regs
->regs
[FP_REGNUM
] = frame_info
->frame
;
1031 if ((spdelta
!= 0) && r1_off
!= -1)
1032 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
- spdelta
+ r1_off
;
1034 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
+ 4;
1038 /* get the frame pointer of the caller.
1039 * note that only routines that have been compiled with
1040 * -g have full (XX)fp style stack frames
1041 * if we are not returning to a non -g caller then we
1042 * return the sp at entry to us as it is the caller's
1046 frame_chain(thisframe
)
1050 CORE_ADDR func_start
;
1053 CORE_ADDR thisfp
= thisframe
->frame
;
1055 /* get the frame pointer actually sp for a non -g
1056 * for the routine that called us routine
1059 BTDEBUG("FRAME_CHAIN(%x)\n",thisframe
);
1061 if ( !read_memory_integer (thisframe
->frame
,sizeof(long)) )
1066 if( ! g_routine(thisframe
->pc
) ){
1067 BTDEBUG( "non g at %x\n",thisframe
->pc
);
1068 caller_pc(thisframe
->pc
,thisframe
->sp
,&pc
,&fp
);
1069 BTDEBUG("caller_pc returned %x %x \n",pc
,fp
);
1072 }/* else a -g routine */
1075 fp
= read_memory_integer (thisfp
, sizeof(long));
1077 if (fp
< thisfp
|| fp
> (unsigned) STACK_END_ADDR
)
1079 /* handle the Metaware-type pseudo-frame */
1081 func_start
= get_pc_function_start(thisframe
->pc
);
1083 if (func_start
!= NULL
)
1086 instr
= (unsigned)(adj_read_memory_integer (func_start
));
1087 /* Recognize "addu|adds -X,sp,sp" insn. */
1088 if ((instr
& 0xEFFF0000) == 0x84420000)
1089 offset
= SIGN_EXT16(instr
& 0x0000FFFF);
1095 fp
= thisfp
- offset
;
1097 BTDEBUG("frame_chain returned %d\n",fp
);
1101 /* This function returns 1 if there is no stored r1, 0 otherwise.
1102 The function returns 1 if the pc is in a function prologue,
1103 or the function prologue didn't save the return pointer in
1104 the stack frame, 0 otherwise */
1106 int no_stored_rp(CORE_ADDR pc
)
1108 CORE_ADDR func_start
, prologue_end
;
1110 func_start
= get_pc_function_start(pc
);
1111 if (func_start
!= NULL
)
1113 prologue_end
= func_start
;
1114 SKIP_PROLOGUE(prologue_end
);
1115 if ( (pc
>= func_start
) && (pc
<= prologue_end
))
1117 BTDEBUG("no_stored_rp: pc %x is in prologue \n",pc
);
1120 /* otherwise, see if the entry sequence stored the return pointer.
1121 If it didn't, return 1 */
1122 /* Some procedures , at least, store the return pointer AFTER
1123 the prologue sequence, so check for stores from function start to
1124 present pc value. */
1125 if (!has_stored_r1(func_start
, pc
))
1127 BTDEBUG("no_stored_rp, for pc %x, prologue didn't store r1\n",pc
);
1131 BTDEBUG("no_stored_rp for pc %x return pointer was stored \n", pc
);
1136 /* get the PC of the caller */
1137 CORE_ADDR
frame_saved_pc(frame_struct
)
1146 frame
= frame_struct
->frame
;
1147 pc
= frame_struct
->pc
;
1148 sp
= frame_struct
->sp
;
1150 BTDEBUG("frame_saved_pc input: frame %x, pc %x",
1153 /* First see if this is the current frame. If it is, return the value in r1,
1154 as it may not have been stored */
1156 fp
= read_register(FP_REGNUM
);
1158 /* check to see if we are in an entry sequence, where the return pointer has not yet been stored */
1159 if (fp
== frame
&& no_stored_rp(pc
))
1161 pc
= read_register(RP_REGNUM
);
1162 frame_struct
->rp
= pc
;
1164 else if( ! g_routine(pc
) )
1166 caller_pc(pc
,sp
,&pc
,&frame
);
1171 pc
= read_memory_integer (frame
+ 4, sizeof(long));
1173 if (!outside_startup_file(pc
))
1176 BTDEBUG("pc %x outside startup file \n",pc
);
1178 pc1
= read_memory_integer (frame
, sizeof(long));
1180 if (outside_startup_file(pc1
))
1186 BTDEBUG(" returning pc %x\n", CLEAN_PC(pc
));
1187 return(CLEAN_PC(pc
));
1191 /* Pass arguments to a function in the inferior process - ABI compliant
1192 Note that this routine DOES NOT HANDLE memory argument lists, ie
1193 it gives up if there are too many arguments to pass in registers.*/
1196 pass_function_arguments(args
, nargs
, struct_return
)
1201 int ireg
= (struct_return
) ? 17 : 16;
1202 int freg
= FP0_REGNUM
+ 8;
1207 value
value_arg_coerce();
1210 for (i
= 0; i
< nargs
; i
++)
1212 arg
= value_arg_coerce(args
[i
]);
1213 type
= VALUE_TYPE(arg
);
1214 if (type
== builtin_type_double
)
1216 write_register_bytes(REGISTER_BYTE(freg
), VALUE_CONTENTS(arg
), sizeof(double));
1221 bcopy(VALUE_CONTENTS(arg
), &tmp
, sizeof(long));
1222 write_register(ireg
, tmp
);
1226 if (ireg
>= 28 || freg
>= FP0_REGNUM
+ 16)
1227 error("Too many arguments to function");
1232 #define P_SPACES " "
1235 int screen_lines
=24;
1237 char *spec_reg
[] = {
1238 "fsr", "db", "dirbase", "fir", "psr", "epsr",
1241 char *doro_reg
[] = {
1242 "scp", "cbsp", "pt_cs", "intmsk", "intack",
1247 /* This routine is uncalled -- remove this routine sometime */
1250 char raw_buffer
[32];
1254 read_relative_register_raw_bytes (regno
, raw_buffer
);
1255 REGISTER_CONVERT_TO_VIRTUAL (addr
, raw_buffer
, &virtual_buffer
);
1256 return(virtual_buffer
);
1262 /* This routine is uncalled. Remove it sometime. */
1265 ** Figure out whether we are in a delayed slot and if so then take necessary
1266 ** action to resume properly - remember trap pre-empts instruction
1269 wasabranch (addr
, nextpc
, ss
)
1270 CORE_ADDR addr
, *nextpc
;
1273 CORE_ADDR nextadr
, instr
;
1274 int val
= not_branch
;
1275 long offset
; /* Must be signed for sign-extend */
1281 nextadr
= CORADR((int)(addr
+ INSTRUCTION_LENGTH
*2));
1282 instr
= (unsigned)(adj_read_memory_integer (CORADR(addr
)));
1286 nextadr
= addr
+ INSTRUCTION_LENGTH
;
1287 instr
= (unsigned)(adj_read_memory_integer (addr
));
1292 nextadr
= CORADR(addr
);
1293 instr
= (unsigned)(adj_read_memory_integer (nextadr
));
1298 instr
= (unsigned)(adj_read_memory_integer (addr
));
1303 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
1304 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
1306 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
1308 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
1310 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
1313 offset
= (instr
& 0x03ffffff);
1314 if (offset
& 0x02000000) /* sign extend? */
1315 offset
|= 0xFC000000;
1316 nextadr
+= (offset
<< 2);
1318 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
1319 (instr
& 0xFC000000) == 0x40000000) /* bri */
1324 offset
= ((instr
& 0x0000F800) >> 11);
1325 nextadr
= (read_register(offset
) & 0xFFFFFFFC);
1330 else if ((instr
& 0xF0000000) == 0x50000000) /* bte or btne */
1334 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
1335 nextadr
+= (offset
<< 2);
1337 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
1341 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
1342 nextadr
+= (offset
<< 2);
1350 extern char registers
[];
1352 /* i860-specific routine to print the register set. Note that we ALWAYS print information
1353 on the floating point registers, so we ignore the parameter fpregs */
1354 void i860_do_registers_info(regnum
,fpregs
)
1365 "Register Contents (relative to selected stack frame)\n\n");
1367 if (regnum
!= -1) /* print one register */
1369 if ((regnum
>=F0
) && (regnum
<= F31
))
1370 bcopy (®isters
[ADJ_FREG(regnum
)<<2], &val
, sizeof (long));
1372 bcopy (®isters
[regnum
<<2], &val
, sizeof (long));
1373 printf("%-4s 0x%08x\t", reg_names
[regnum
], val
);
1374 printf("\n\t"); fflush(stdout
);
1376 else /* print all registers */
1379 printf("\n Control/Status Registers :- \n\t");
1380 for (j
=0; j
<=DB
; j
++)
1382 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1383 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1385 printf("\n\t"); fflush(stdout
);
1388 bcopy (®isters
[EPSR
<<2], &val
, sizeof (long));
1389 printf("%-4s 0x%08x\t", reg_names
[EPSR
], val
);
1392 bcopy (®isters
[FSR
<<2], &val
, sizeof (long));
1393 printf("%-4s 0x%08x\t", reg_names
[FSR
], val
);
1396 bcopy (®isters
[CCR
<<2], &val
, sizeof (long));
1397 printf("%-4s 0x%08x\t", reg_names
[CCR
], val
);
1399 bcopy (®isters
[BEAR
<<2], &val
, sizeof (long));
1400 printf("%-4s 0x%08x\t", reg_names
[BEAR
], val
);
1404 for (j
=P0
; j
<=P3
; j
++)
1406 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1407 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1411 printf("\n Integer Registers :- \n\t");
1412 for (j
=R0
; j
<=R31
; j
++)
1414 if (j
!= IREGS
&& (j
% REGISTER_LENGTH
== 0))
1416 printf("\n\t"); fflush(stdout
);
1418 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1419 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1422 printf("\n Floating Registers :- \n\t");
1423 for (j
=F0
; j
<=F31
; j
++)
1425 if (j
!= FREGS
&& (j
% REGISTER_LENGTH
== 0))
1427 printf("\n\t"); fflush(stdout
);
1429 bcopy (®isters
[ADJ_FREG(j
)<<2], &val
, sizeof (long));
1430 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1433 printf("\n Special Registers :- \n\t");
1434 for (j
=SPC_KI
; j
<=SPC_MERGE
; j
+=2)
1439 printf("\n\t"); fflush(stdout
);
1441 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1442 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1443 printf("%-6s 0x%08x %08x\t", reg_names
[j
], val
,valh
);
1446 printf("\n Graphics Pipeline :- \n");
1450 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1451 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1452 printf("\t\t\t%-8s 0x%08x %08x \n", reg_names
[j
], val
,valh
);
1455 printf(" Memory Load Pipeline :- \n");
1456 for (j
=PSV_L1
; j
<=PSV_L3
; j
+=REGISTER_LENGTH
)
1458 unsigned int valh
, val2
,val3
;
1459 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1460 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1461 bcopy (®isters
[(j
+2)<<2], &val2
, sizeof (long));
1462 bcopy (®isters
[(j
+3)<<2], &val3
, sizeof (long));
1463 printf("\t\t%-8s 0x%08x %08x %08x %08x\n", reg_names
[j
],
1464 val
,valh
,val2
,val3
);
1467 printf("\n Adder Pipeline :-\t\tMultiplier Pipeline :-\t\tFSR results :-\n");
1468 for (i
=PSV_FSR1
,j
=PSV_A1
,k
=PSV_M1
; j
<=PSV_A3
; i
++,j
+=2,k
+=2)
1470 unsigned int valh
,val2
,val3
,val4
;
1471 bcopy (®isters
[i
<<2], &val4
, sizeof (long));
1472 bcopy (®isters
[j
<<2], &val
, sizeof (long));
1473 bcopy (®isters
[(j
+1)<<2], &valh
, sizeof (long));
1474 bcopy (®isters
[k
<<2], &val2
, sizeof (long));
1475 bcopy (®isters
[(k
+1)<<2], &val3
, sizeof (long));
1476 printf(" %-4s 0x%08x %08x\t", reg_names
[j
], val
,valh
);
1477 printf("%-4s 0x%08x %08x\t", reg_names
[k
], val2
,val3
);
1478 printf("%-4s 0x%08x\n", reg_names
[i
], val4
);
1488 /* The following set of routines was adapted from existing code previously
1489 in an i860-specific version of breakpoint.c by Peggy Fieland
1490 (Margaret_Fieland@vos.stratus.com) */
1491 /* routines to set a data breakpoint by setting the value in the DB register.
1492 Note that "hitting" the breakpoint will generate a data access trap. We
1493 do not have a special trap handler. */
1494 unsigned int dbrkval
, dbrkmod
;
1495 void i860_dbrk_breakpoint()
1497 BTDEBUG("i860_dbrk_breakpoint was called , dbrkval %x\n", dbrkval
);
1501 *(int *)®isters
[DB
<<2] = dbrkval
;
1505 *(int *)®isters
[DB
<<2] = 0;
1508 *(int *)®isters
[PSR
<<2] &= ~3;
1509 *(int *)®isters
[PSR
<<2] |= dbrkmod
;
1511 store_inferior_registers(DB
);
1512 store_inferior_registers(PSR
);
1516 /* set a "read" data breakpoint. */
1518 d_ro_break_command(arg
)
1521 dbrkval
= strtoul(arg
, NULL
, 0);
1523 BTDEBUG(" ro_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1526 /* set a "write" data breakpoint. */
1528 d_wo_break_command(arg
)
1531 dbrkval
= strtoul(arg
, NULL
, 0);
1533 BTDEBUG(" wo_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1536 /* set a "read/write" data breakpoint. */
1538 d_rw_break_command(arg
)
1541 dbrkval
= strtoul(arg
, NULL
, 0);
1543 BTDEBUG(" rw_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1546 /* clear data breakpoint. */
1554 /* i860-specific breakpoint initialization. Includes adding the i860-specific
1555 data breakpoint commands. */
1557 i860_init_breakpoints()
1559 dbrkval
= dbrkmod
= 0;
1560 add_com ("dbro", class_breakpoint
, d_ro_break_command
,
1561 "Set a data breakpoint READ ONLY, 32-bit data element.");
1562 add_com ("dbwo", class_breakpoint
, d_wo_break_command
,
1563 "Set a data breakpoint WRITE ONLY, 32-bit data element.");
1564 add_com ("dbrw", class_breakpoint
, d_rw_break_command
,
1565 "Set a data breakpoint READ/WRITE, 32-bit data element.");
1566 add_com ("dclear", class_breakpoint
, clear_dbreak
,
1567 "clear the current data breakpoint.");
1568 add_com_alias ("dc", "dclear", class_breakpoint
, 1);
1572 /* i860-specific code to insert a breakpoint. */
1573 int i860_insert_breakpoint(b
)
1574 struct breakpoint
*b
;
1578 place_brk( b
->address
, BREAK_MODE
, b
);
1582 adj_read_memory (b
->act_addr
[0], &b
->shadow_contents
[0], INSTRUCTION_LENGTH
);
1583 val
= adj_write_memory (b
->act_addr
[0], break_insn
, INSTRUCTION_LENGTH
);
1584 if (val
!= 0 ) return val
;
1585 adj_read_memory (b
->act_addr
[1], &b
->shadow_contents
[1], INSTRUCTION_LENGTH
);
1586 /* val = adj_write_memory (b->act_addr[1], float_insn, INSTRUCTION_LENGTH); */
1587 if (val
!= 0) return val
;
1591 adj_read_memory (b
->act_addr
[0], &b
->shadow_contents
[0], INSTRUCTION_LENGTH
);
1592 val
= adj_write_memory (b
->act_addr
[0], break_insn
, INSTRUCTION_LENGTH
);
1594 if (b
->address1
!= 0)
1599 adj_read_memory (b
->act_addr
[2], &b
->shadow_contents
[2], INSTRUCTION_LENGTH
);
1600 val
= adj_write_memory (b
->act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
1601 if (val
) return val
;
1602 adj_read_memory (b
->act_addr
[3], &b
->shadow_contents
[3], INSTRUCTION_LENGTH
);
1603 /* val = adj_write_memory (b->act_addr[3], float_insn, INSTRUCTION_LENGTH); */
1604 if (val
!= 0) return val
;
1608 adj_read_memory (b
->act_addr
[2], &b
->shadow_contents
[0], INSTRUCTION_LENGTH
);
1609 val
= adj_write_memory (b
->act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
1614 BTDEBUG("Inserted breakpoint at 0x%x, shadow 0x%x, 0x%x.\n",
1615 b
->address
, b
->shadow_contents
[0], b
->shadow_contents
[1]);
1620 int i860_remove_breakpoint(b
)
1621 struct breakpoint
*b
;
1629 val
=adj_write_memory (b
->act_addr
[0], &(b
->shadow_contents
[0]),
1630 INSTRUCTION_LENGTH
);
1631 val
=adj_write_memory (b
->act_addr
[1], &(b
->shadow_contents
[1]),
1632 INSTRUCTION_LENGTH
);
1633 if (b
->address1
!= NULL
)
1635 val
=adj_write_memory (b
->act_addr
[2], &(b
->shadow_contents
[2]),
1636 INSTRUCTION_LENGTH
);
1637 val
=adj_write_memory (b
->act_addr
[3], &(b
->shadow_contents
[3]),
1638 INSTRUCTION_LENGTH
);
1643 val
=adj_write_memory (b
->act_addr
[0], b
->shadow_contents
,
1644 INSTRUCTION_LENGTH
);
1645 if (b
->address1
!= NULL
)
1647 val
=adj_write_memory (b
->act_addr
[2], b
->shadow_contents
,
1648 INSTRUCTION_LENGTH
);
1654 BTDEBUG( "Removed breakpoint at 0x%x, shadow 0x%x, 0x%x.\n",
1655 b
->address
, b
->shadow_contents
[0], b
->shadow_contents
[1]);
1664 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1666 #include <sys/procfs.h>
1668 /* The following routines were added by Peggy Fieland (Margaret_Fieland@vos.stratus.com)
1669 They were adapted from the m-68k versions of the routines .*/
1671 /* Given a pointer to a floating point register set in /proc format
1672 (fpregset_t *), unpack the register contents and supply them as gdb's
1673 idea of the current floating point register values. */
1676 supply_fpregset (fpregsetp
)
1677 fpregset_t
*fpregsetp
;
1681 BTDEBUG("supply_fregset called \n");
1683 for (regno
= F0
; regno
<= F31
; regno
++)
1685 supply_register (regno
, (char *) &(fpregsetp
-> fpu
.r_freg
[regno
-F0
]));
1689 /* Given a pointer to a floating point register set in /proc format
1690 (fpregset_t *), update the register specified by REGNO from gdb's idea
1691 of the current floating point register set. If REGNO is -1, update
1695 fill_fpregset (fpregsetp
, regno
)
1696 fpregset_t
*fpregsetp
;
1702 extern char registers
[];
1703 BTDEBUG("fill_fregset regno %d\n",regno
);
1705 for (regi
= F0
; regi
<= F31
; regi
++)
1707 if ((regno
== -1) || (regno
== regi
))
1709 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
1710 to
= (char *) &(fpregsetp
-> fpu
.r_freg
[regi
-F0
]);
1711 bcopy (from
, to
, REGISTER_RAW_SIZE (regno
));
1717 /* Given a pointer to a general register set in /proc format (gregset_t *),
1718 unpack the register contents and supply them as gdb's idea of the current
1722 supply_gregset (gregsetp
)
1723 gregset_t
*gregsetp
;
1726 register greg_t
*regp
= (greg_t
*) gregsetp
;
1728 BTDEBUG("supply_gregset called \n");
1730 for (regno
= 0 ; regno
<= R31
; regno
++)
1732 supply_register (regno
, (char *) (regp
+ regno
));
1736 /* Given a pointer to a general register set in /proc format (gregset_t *),
1737 update the register specified by REGNO from gdb's idea
1738 of the current general register set. If REGNO is -1, update
1742 fill_gregset (gregsetp
, regno
)
1743 gregset_t
*gregsetp
;
1747 extern char registers
[];
1748 register greg_t
*regp
= (greg_t
*) gregsetp
;
1749 BTDEBUG("fill_gregset regno %d \n",regno
);
1751 for (regi
= 0 ; regi
<= R31
; regi
++)
1753 if ((regno
== -1) || (regno
== regi
))
1755 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];