1 /* Machine-dependent code which would otherwise be in inflow.c and core.c,
2 for GDB, the GNU debugger.
3 Copyright (C) 1986, 1987 Free Software Foundation, Inc.
4 This code is for the i860 cpu.
6 GDB is distributed in the hope that it will be useful, but WITHOUT ANY
7 WARRANTY. No author or distributor accepts responsibility to anyone
8 for the consequences of using it or for whether it serves any
9 particular purpose or works at all, unless he says so in writing.
10 Refer to the GDB General Public License for full details.
12 Everyone is granted permission to copy, modify and redistribute GDB,
13 but only under the conditions described in the GDB General Public
14 License. A copy of this license is supposed to have been given to you
15 along with GDB so you can know your rights and responsibilities. It
16 should be in a file named COPYING. Among other things, the copyright
17 notice and this notice must be preserved on all copies.
19 In other words, go ahead and share GDB, but don't try to stop
20 anyone else from sharing it farther. Help stamp out software hoarding!
35 #include "i860-opcode.h"
37 #include "breakpoint.h"
38 #include "i860-break.h"
43 #include <sys/types.h>
44 #include <sys/param.h>
49 #include <sys/ioctl.h>
52 /* #include <sys/reg.h> */
61 #include <sys/elftypes.h>
62 #include <sys/elf_860.h>
66 extern int read_memory();
67 extern int write_memory();
68 extern int read_memory_integer();
69 extern int print_insn();
73 int btdebug
= 0; /* change value to 1 to enable debugging code */
76 #define BTDEBUG if (btdebug) btdebug_message
79 extern char registers
[];
80 CORE_ADDR
get_saved_basereg();
82 #define INSTRUCTION_LENGTH 4
83 #define REGISTER_LENGTH 4
84 #define ALIGN_ARG(size,len) ((size + (len-1))&(-len))
85 #define NUM_FLOAT_ARG_REGS 8
86 #define NUM_INT_ARG_REGS 12
88 /* routine to print debugging messages */
89 void btdebug_message(char *format
, ...)
92 va_start( arglist
, format
);
95 vfprintf (stderr
, format
, arglist
);
100 /* Peggy Fieland. Routine that attempts to find the start of the entry sequence
102 /* maximum number of instrutions to search back */
103 #define MAX_ROUTINE_SIZE 4096
104 CORE_ADDR
find_entry_start(pc
)
107 CORE_ADDR instr
, top_pc
;
111 for (i
= 0; i
< MAX_ROUTINE_SIZE
; ++i
)
114 instr
= (unsigned)( adj_read_memory_integer (top_pc
));
115 /* Recognize "addu|adds -X,sp,sp" insn. */
117 if ((instr
& 0xEFFF0000) == 0x84420000)
121 top_pc
-= INSTRUCTION_LENGTH
;
128 /* Written by Peggy Fieland (Margaret_Fieland@vos.stratus.com) */
129 /* get the contents of a base register. Used for dwarf OP_BASEREG */
130 /* At present, only OP_BASEREG generated is for R28. NOTE that for stuff based on R28,
131 the value we want is the VALUE AT PROCEDURE INVOKATION, and thus is the frame we
132 use to get the value is the caller's frame. */
133 CORE_ADDR
get_saved_basereg (frame
, basereg
)
138 if (basereg
== R28
) /* Unconditionally ??? */
140 frame
= get_prev_frame (frame
);
141 get_saved_register((char *) &addr
, (int *) NULL
, (CORE_ADDR
*) NULL
, frame
,
142 basereg
, (enum lval_type
*)NULL
);
146 get_saved_register((char *) &addr
, (int *) NULL
, (CORE_ADDR
*) NULL
, frame
,
147 basereg
, (enum lval_type
*)NULL
);
154 /* return nonzero if the routine containing pc has been
155 * compiled with -g. We assume -g if the first instruction is
156 * an addu|adds -X,sp and the second is st.l fp,XX(sp)
158 * based on skip_prologue();
161 static int g_routine(pc
)
168 top_pc
= get_pc_function_start(pc
);
170 top_pc
= find_entry_start (pc
);
174 instr
= (unsigned)( adj_read_memory_integer (top_pc
));
175 /* Recognize "addu|adds -X,sp,sp" insn. */
177 if ((instr
& 0xEFFF0000) == 0x84420000)
179 top_pc
+= INSTRUCTION_LENGTH
;
180 instr
= (unsigned)(adj_read_memory_integer (top_pc
));
182 if( (instr
& 0xFFE0F801) == 0x1C401801 ) /* st.l fp,X(sp) */
190 /* return the stack offset where the fp register is stored */
191 static int find_fp_offset(pc
)
197 /* look for the instruction and examine the offset */
199 for (i
=INSTRUCTION_LENGTH
*1; i
< INSTRUCTION_LENGTH
*4; i
+=INSTRUCTION_LENGTH
){
200 instr
= (unsigned)(adj_read_memory_integer(pc
+i
));
201 if( (instr
& 0xFFE0F801) == 0x1C401801) { /* st.l fp,X(sp) */
203 fp_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) |
212 /* return the stack offset where r1 (return linkage ) register is stored */
213 static CORE_ADDR
find_r1(pc
,sp
,fp
)
217 CORE_ADDR instr
, ret_pc
;
219 /* look for the instruction and examine the offset */
221 for (i
=INSTRUCTION_LENGTH
*1; i
< INSTRUCTION_LENGTH
*4; i
+=INSTRUCTION_LENGTH
)
223 instr
= (unsigned)( adj_read_memory_integer(pc
+i
));
224 if ((instr
& 0xFFE0F801) == 0x1C400801)
228 r1_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) |
230 ret_pc
= read_memory_integer(sp
+r1_off
,sizeof(long));
233 else if ((instr
& 0xFFE0F801) == 0x1C600801)
236 r1_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) |
238 ret_pc
= read_memory_integer(fp
+r1_off
,sizeof(long));
245 CORE_ADDR
skip_prologue(CORE_ADDR
);
247 /* does routine starting at pc build a stack frame of any kind?? */
248 static int has_a_frame(pc
)
251 if( skip_prologue(pc
) != pc
)return(1);
256 /* written by Peggy Fieland Margaret_Fieland@vos.stratus.com
257 Routine to validate the return register and the frame pointer
258 This routine is called when the routine we are in doesn't have a frame
259 In that case, we assume that the return address and frame pointer have
260 not been touched. In the following routine, we try to range check them
261 to see if they are valid. */
263 static int valid_regs (rp
, fp
)
266 if ( ( (rp
% 4) != 0) | ( (fp
% 16) != 0) )
271 /* get the pc and frame pointer (or sp )
272 * for the routine that called us
273 * when we (this_pc) is not within a -g routine
274 * if caller is non g we return sp for fp
277 /* note this is written for Metaware version R2.1d compiler */
278 /* Modified by Peggy Fieland Margaret_Fieland@vos.stratus.com */
279 static int caller_pc(this_pc
,this_sp
,this_fp
,to_pc
,to_fp
, called_from_frame_chain
)
280 CORE_ADDR this_pc
,this_sp
, this_fp
;
281 CORE_ADDR
*to_pc
, *to_fp
;
282 int called_from_frame_chain
;
284 CORE_ADDR func_start
;
285 int sp_offset
,offset
;
286 CORE_ADDR sp
,pc
,fp
,instr
;
288 BTDEBUG("caller_pc %x sp = %x\n",this_pc
,this_sp
);
290 func_start
= get_pc_function_start(this_pc
);
292 if (func_start
== NULL
)
293 func_start
= find_entry_start (this_pc
);
295 BTDEBUG("caller_pc func_start %x\n", func_start
);
297 if ((func_start
== NULL
))
299 /* error in traceback */
300 fprintf(stderr
, "error, unable to find start of function\n");
305 if (func_start
!= NULL
)
307 if( has_a_frame(func_start
) ){
309 BTDEBUG("has_a_frame\n");
311 /* if our caller has a preamble and
312 * declares space for a stack frame
313 * then we must work to find our return address
315 instr
= (unsigned)( adj_read_memory_integer (func_start
));
316 /* Recognize "addu|adds -X,sp,sp" insn. */
318 if ((instr
& 0xEFFF0000) == 0x84420000)
319 sp_offset
=SIGN_EXT16(instr
&0x0000FFFF);
323 /* if we get here, procedure doesn't have a frame. If we
324 do anything weird, the frame pointer and return register have
325 the values we want. Check them to see if they are valid. */
327 CORE_ADDR temp_rp
, temp_fp
;
329 /* temporary warning, since at the moment we don't have support for
330 the shared library */
332 temp_rp
= read_register(RP_REGNUM
);
333 temp_fp
= read_register(FP_REGNUM
);
335 if (!valid_regs(temp_rp
, temp_fp
))
338 "error - unable to find return address, traceback terminating\n");
341 BTDEBUG("caller_pc no frame, using r1 %x and fp %x\n",
348 BTDEBUG("sp_offset = %d %x\n",sp_offset
,sp_offset
);
350 pc
= find_r1(func_start
, this_sp
, this_fp
);
355 /* r1 wasn't stored between pc and function start */
356 pc
= read_register (RP_REGNUM
);
359 sp
= this_sp
- sp_offset
;
361 BTDEBUG("callers pc = %x sp = %x\n",pc
,sp
);
363 /* our caller a -g routine ?
364 * if he is we have to find his real fp
365 * else provide the sp as his fp
370 BTDEBUG("caller_a_g\n");
372 if( ! (offset
= find_fp_offset(func_start
)) ) {
373 fprintf(stderr
, "error - unable to find caller frame for routine at 0x%x, "
374 "traceback terminating\n", func_start
);
377 BTDEBUG("offset = %x %d\n",offset
,offset
);
379 fp
= read_memory_integer(this_sp
+offset
,sizeof(long));
380 *to_pc
= CLEAN_PC(pc
);
384 *to_pc
= CLEAN_PC(pc
);
388 /* pc = read_register(RP_REGNUM); */
390 /* if we get here, procedure doesn't have a frame. If we didn't
391 do anything weird, the frame pointer and return register have
392 the values we want. Check them to see if they are valid. */
394 CORE_ADDR temp_rp
, temp_fp
;
396 temp_rp
= read_register(RP_REGNUM
);
397 temp_fp
= read_register(FP_REGNUM
);
399 if (!valid_regs(temp_rp
, temp_fp
))
402 "error - unable to find return address, traceback terminating\n");
406 BTDEBUG("caller_pc no frame, using r1 %x and fp %x\n",
415 ** Figure out address to place next breakpoint. Avoid tricky spots,
416 ** ie. delayed instruction slots etc.
417 ** Need to upgrade this later to allow delayed instruction breakpoints
418 ** with fix-up work done AFTER breakpoint.
419 ** Note that this routine DOES deal with dual instruction mode
424 place_brk (addr
, mode
, brk
)
427 struct breakpoint
*brk
;
430 CORE_ADDR nextadr
, prevadr
;
431 int val
= not_branch
;
432 long offset
; /* Must be signed for sign-extend */
433 prevadr
= nextadr
= 0;
437 if (mode
== SINGLE_STEP_MODE
)
441 nextadr
= brk
->address
= (addr
+ INSTRUCTION_LENGTH
*2);
442 instr
= (unsigned)(adj_read_memory_integer ((addr
+ INSTRUCTION_LENGTH
)));
447 nextadr
= brk
->address
= (addr
+ INSTRUCTION_LENGTH
);
448 instr
= (unsigned)(adj_read_memory_integer (addr
));
457 ** For br/call one more sequential instruction gets executed and then we
458 ** continue at the current addr + offset. We are definitely going to
459 ** the dest. We are NOT allowed to place a breakpoint in the "delay"
460 ** slot - (the next sequential instruction) so we only place 1 breakpoint
461 ** at the destination.
462 ** For the bc/bnc the next instruction executed is EITHER the next sequential
463 ** or the destination of the branch, we therefore place 2 breakpoints one
465 ** For the bc.t/bnc.t either 1 more sequential instruction is performed
466 ** followed by a branch (like br/call) OR we skip the sequential
467 ** instruction and keep going. We therefore place a breakpoint at the
468 ** destination of the branch AND the second sequential instruction after
469 ** the branch. Again a breakpoint is NOT allowed in the "delay slot"
471 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
472 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
474 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
476 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t/bnc.t */
478 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
480 offset
= (instr
& 0x03ffffff);
481 if (offset
& 0x02000000) /*?sign extend*/
482 offset
|= 0xFC000000;
483 if (val
== uncond_d
) /* br/call*/
485 else if (val
== cond_d
) /* bc.t/bnc.t */
487 if ((INDIM
) && !(ENDIM
))
488 prevadr
= nextadr
+ (2*INSTRUCTION_LENGTH
);
490 prevadr
= nextadr
+ INSTRUCTION_LENGTH
;
491 } else { /* bc /bnc */
492 if ((INDIM
) && !(ENDIM
))
497 nextadr
+= (offset
<< 2);
500 ** We treat the bri/calli the same way as the br/call case.
502 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
503 (instr
& 0xFC000000) == 0x40000000) /* bri */
506 offset
= ((instr
& 0x0000F800) >> 11);
507 nextadr
= (read_register(offset
+ R0
) & 0xFFFFFFFC);
511 ** We treat the bte/btne the same way as the bc/bnc case.
513 else if ((instr
& 0xF0000000) == 0x50000000) /* bte/btne */
516 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) |
517 (instr
& 0x000007FF));
518 if ((INDIM
) && !(ENDIM
))
523 nextadr
+= (offset
<< 2);
526 ** We treat the bte/btne the same way as the bc/bnc case.
527 ** With the caveat that the 2 breakpoints may turn out to be at the same
528 ** address in which case we ignore one of them.
530 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
533 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) |
534 (instr
& 0x000007FF));
535 if ((INDIM
) && !(ENDIM
))
537 prevadr
= nextadr
+ 2*INSTRUCTION_LENGTH
;
539 prevadr
= nextadr
+ INSTRUCTION_LENGTH
;
541 nextadr
+= (offset
<< 2);
542 if (prevadr
== nextadr
) prevadr
= 0;
549 if (ISDIM(FOPADR(addr
)))
551 if (ISDIM(FOPADR(nextadr
- INSTRUCTION_LENGTH
*2)))
553 instr
= (unsigned)(adj_read_memory_integer(CORADR(addr
554 -(INSTRUCTION_LENGTH
*2))));
557 instr
= (unsigned)(adj_read_memory_integer(addr
-INSTRUCTION_LENGTH
));
561 if (ISDIM(addr
-INSTRUCTION_LENGTH
))
563 instr
= (unsigned)(adj_read_memory_integer(addr
-INSTRUCTION_LENGTH
));
566 instr
= (unsigned)(adj_read_memory_integer (addr
-INSTRUCTION_LENGTH
));
571 /* examine the PREVIOUS instruction to determine if we are in a branch delay
572 slot. If we are, dont set a break here -- set it on the previous instruction.
573 This code also accounts for dual instruction mode */
574 if ((instr
& 0xE0000000) == 0x60000000 &&
575 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
581 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
582 BTDEBUG(" Breakpoint adjusted to avoid br/call delay slot and multiple breakpoints\n");
584 if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
585 BTDEBUG(" Breakpoint adjusted to avoid bc.t/bnc.t delay slot and"
586 "multiple breakpoints\n");
588 /* it IS really OK to set a break on the instruction AFTER the conditional branch
589 -- it DOESN't have a delay slot */
590 if ((instr
& 0xF4000000) == 0x70000000) /* bc / bnc */
593 ((instr
& 0xFC00003F) == 0x4C000002 || /* bri/ calli */
594 (instr
& 0xFC000000) == 0x40000000)
597 BTDEBUG(" Breakpoint adjusted to avoid calli/bri delay slot and"
598 " multiple breakpoints\n");
600 ((instr
& 0xF0000000) == 0x50000000) /* bte - btne */
602 /* it's OK to set a break here -- we are NOT in aa branch delay slot */
605 printf(" Breakpoint adjusted to avoid bte/btne multiple breakpoints\n");
609 ((instr
& 0xFC000000) == 0xB4000000)
612 BTDEBUG(" Breakpoint adjusted to avoid bla delay slot and"
613 " multiple breakpoints\n");
617 if (brk
->mode
== DIM
)
619 nextadr
-= INSTRUCTION_LENGTH
*2;
620 nextadr
= CORADR(nextadr
);
623 nextadr
-= INSTRUCTION_LENGTH
;
628 if (brk
->mode
== RIM
)
630 if (brk
->mode
== BIM
)
635 if (brk
->mode
== DIM
)
637 brk
->act_addr
[0] = CORADR(nextadr
);
638 brk
->act_addr
[1] = FOPADR(nextadr
);
640 brk
->act_addr
[0] = nextadr
;
641 brk
->act_addr
[1] = 0;
647 brk
->address1
= prevadr
;
648 if (brk
->mode
== DIM
)
650 brk
->act_addr
[2] = CORADR(prevadr
);
651 brk
->act_addr
[3] = FOPADR(prevadr
);
653 brk
->act_addr
[2] = prevadr
;
654 brk
->act_addr
[3] = 0;
657 brk
->act_addr
[2] = brk
->act_addr
[3] = 0;
662 /* This routine checks to see if r1 has been stored into the frame between
663 the addresses prologue_start and prologue_end. Recognize stores of r1
664 relative to both the sp and fp registers. */
665 static int has_stored_r1(CORE_ADDR prologue_start
, CORE_ADDR prologue_end
)
670 BTDEBUG("has_stored_r1, prologue_start %x, prologue_end %x\n",
671 prologue_start
, prologue_end
);
673 for (addr
= prologue_start
; addr
<= prologue_end
; addr
+= INSTRUCTION_LENGTH
)
676 instr
= (unsigned)(adj_read_memory_integer (addr
));
677 if ((instr
& 0xFFE0F801) == 0x1C400801 /* st.l r1,X(sp) */
678 || (instr
& 0xFFE0F801) == 0x1C600801) /* st.l r1,X(fp) */
683 /* This is used when GDB is exiting. It gives less chance of error.*/
686 /* Simulate single-step ptrace call for sun4. Code written by Gary
687 Beihl (beihl@mcc.com). */
688 /* Modified for i860 by Jim Hanko (hanko@orc.olivetti.com) */
691 static struct breakpoint brk
;
692 typedef char binsn_quantum
[sizeof break_insn
];
694 /* Non-zero if we just simulated a single-step ptrace call. This is
695 needed because we cannot remove the breakpoints in the inferior
696 process until after the `wait' in `wait_for_inferior'. Used for
701 /* single_step() is called just before we want to resume the inferior,
702 if we want to single-step it but there is no hardware or kernel single-step
703 support. We find all the possible targets of the coming instruction and
706 single_step is also called just after the inferior stops. If we had
707 set up a simulated single-step, we undo our damage. */
708 /* Note that we don't need the parameter, but it's dictated as part of the interface. */
714 branch_type
place_brk();
715 int *shadow0
, *shadow1
, *shadow2
, *shadow3
;
717 shadow0
= (int *) &brk
.shadow_contents
[0];
718 shadow1
= (int *) &brk
.shadow_contents
[4];
719 shadow2
= (int *) &brk
.shadow_contents
[8];
720 shadow3
= (int *) &brk
.shadow_contents
[12];
721 pc
= read_register (PC_REGNUM
);
726 place_brk (pc
, SINGLE_STEP_MODE
, &brk
);
727 *shadow0
= *shadow1
= *shadow2
= *shadow3
= 0;
733 btdebug_message(" DIM1 -> %x : ", brk
.act_addr
[3]);
734 print_insn( brk
.act_addr
[3], stderr
);
735 btdebug_message("\t -|- %x : ", brk
.act_addr
[2]);
736 print_insn( brk
.act_addr
[2], stderr
);
737 btdebug_message("\n");
739 if (( brk
.address1
!= NULL
))
741 adj_read_memory (brk
.act_addr
[2], shadow2
,
743 adj_write_memory (brk
.act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
744 adj_read_memory (brk
.act_addr
[3], shadow3
,
746 /* adj_write_memory (brk.act_addr[3], float_insn,
747 INSTRUCTION_LENGTH); */
752 if ( brk
.address1
!= 0)
753 btdebug_message(" DIM2 ->");
755 btdebug_message(" DIM1 ->");
757 btdebug_message(" %x : ", brk
.act_addr
[1]);
758 print_insn( brk
.act_addr
[1], stderr
);
759 btdebug_message("\t -|- %x : ", brk
.act_addr
[0]);
760 print_insn( brk
.act_addr
[0], stderr
);
761 btdebug_message("\n");
764 adj_read_memory (brk
.act_addr
[0], shadow0
,
766 adj_write_memory (brk
.act_addr
[0], break_insn
,
768 adj_read_memory (brk
.act_addr
[1], shadow1
,
770 /* adj_write_memory (brk.act_addr[1], float_insn,
771 INSTRUCTION_LENGTH); */
775 if (brk
.address1
!= NULL
)
779 btdebug_message(" SIM1 ->");
780 btdebug_message(" %x : ", brk
.act_addr
[2]);
781 print_insn( brk
.act_addr
[2], stderr
);
782 btdebug_message("\n");
784 adj_read_memory (brk
.act_addr
[2], shadow2
,
786 adj_write_memory (brk
.act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
790 if ( brk
.address1
!= NULL
)
791 btdebug_message(" SIM2 ->");
793 btdebug_message(" SIM1 ->");
795 btdebug_message(" %x : ", brk
.act_addr
[0]);
796 print_insn( brk
.act_addr
[0], stderr
);
797 btdebug_message("\n");
799 adj_read_memory (brk
.act_addr
[0], shadow0
,
801 adj_write_memory (brk
.act_addr
[0], break_insn
,INSTRUCTION_LENGTH
);
810 /* Remove breakpoints */
813 adj_write_memory (brk
.act_addr
[0], shadow0
,
815 adj_write_memory (brk
.act_addr
[1], shadow1
,
818 adj_write_memory (brk
.act_addr
[0], shadow0
,
822 if (brk
.address1
!= NULL
)
826 adj_write_memory (brk
.act_addr
[2], shadow2
,
828 adj_write_memory (brk
.act_addr
[3], shadow3
,
831 adj_write_memory (brk
.act_addr
[2], shadow2
,
841 /* Written for i860 by Jim Hanko (hanko@orc.olivetti.com) */
842 /* This code was based on SPARC code written by Gary Beihl (beihl@mcc.com),
843 by Michael Tiemann (tiemann@corto.inria.fr). */
844 /* This routine returns the first memory address following the prologue code,
845 if there is a prologue. */
847 struct command_line
*get_breakpoint_commands ();
856 instr
= (unsigned)(adj_read_memory_integer (pc
));
858 /* Recognize "addu|adds -X,sp,sp" insn. */
859 if ((instr
& 0xEFFF0000) == 0x84420000)
861 pc
+= INSTRUCTION_LENGTH
;
862 instr
= (unsigned)(adj_read_memory_integer (pc
));
865 return(pc
); /* No frame! */
867 /* Recognize store of return addr and frame pointer into frame */
870 if ((instr
& 0xFFE0F801) == 0x1C400801 || /* st.l r1,X(sp) */
871 (instr
& 0xFFE0F801) == 0x1C401801) /* st.l fp,X(sp) */
873 pc
+= INSTRUCTION_LENGTH
;
874 instr
= (unsigned)(adj_read_memory_integer (pc
));
880 /* Recognize "addu|adds X,sp,fp" insn. */
881 if ((instr
& 0xEFFF0000) == 0x84430000)
883 pc
+= INSTRUCTION_LENGTH
;
884 instr
= (unsigned)(adj_read_memory_integer (pc
));
887 /* Now recognize stores into the frame from the registers. */
891 if ((instr
& 0xFFA00003) == 0x1C200001 || /* st.l rn,X(fp|sp) */
892 (instr
& 0xFFA00001) == 0x4C200000) /* fst.y fn,X(fp|sp) */
894 regno
= (instr
>> 11) & 0x1f;
895 if (regno
== 0) /* source reg == 0? quit */
897 pc
+= INSTRUCTION_LENGTH
;
898 instr
= (unsigned)(adj_read_memory_integer (pc
));
908 /* This routine is uncalled. Remove it sometime. */
909 /* Set *nextpc to branch target if we find a branch. If it is not a branch,
910 set it to the next instruction (addr + 4) */
914 isabranch (addr
, nextpc
)
915 CORE_ADDR addr
, *nextpc
;
918 branch_type val
= not_branch
;
919 long offset
; /* Must be signed for sign-extend */
921 BTDEBUG(" isabranch\n");
923 instr
= (unsigned)(adj_read_memory_integer (addr
));
925 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
926 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
928 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
930 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
932 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
935 offset
= (instr
& 0x03ffffff);
936 if (offset
& 0x02000000) /* sign extend? */
937 offset
|= 0xFC000000;
938 *nextpc
= addr
+ 4 + (offset
<< 2);
940 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
941 (instr
& 0xFC000000) == 0x40000000) /* bri */
944 offset
= ((instr
& 0x0000F800) >> 11);
945 *nextpc
= (read_register(offset
) & 0xFFFFFFFC);
947 else if ((instr
& 0xF0000000) == 0x50000000) /* bte or btne */
951 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
952 *nextpc
= addr
+ 4 + (offset
<< 2);
954 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
958 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
959 *nextpc
= addr
+ 4 + (offset
<< 2);
962 BTDEBUG(" Final addr - %x\n", *nextpc
);
963 /*BTDEBUG("isabranch ret: %d\n",val); */
968 /* set in call_function() [valops.c] to the address of the "call dummy" code
969 so dummy frames can be easily recognized; also used in wait_for_inferior()
970 [infrun.c]. When not used, it points into the ABI's 'reserved area' */
972 CORE_ADDR call_dummy_set
= 0; /* true if dummy call being done */
973 CORE_ADDR call_dummy_start
; /* address of call dummy code */
975 /* this routine routine gets the values of the registers stored in the frame
976 and stores their values into the frame_saved_regs structure. */
979 frame_find_saved_regs(frame_info
, frame_saved_regs
)
980 struct frame_info
*frame_info
;
981 struct frame_saved_regs
*frame_saved_regs
;
983 register CORE_ADDR pc
;
985 long offset
, spdelta
= 0;
987 int r1_off
= -1, fp_off
= -1;
990 bzero (frame_saved_regs
, sizeof(*frame_saved_regs
));
992 if (call_dummy_set
&& frame_info
->pc
>= call_dummy_start
&&
993 frame_info
->pc
<= call_dummy_start
+ CALL_DUMMY_LENGTH
)
995 /* DUMMY frame - all registers stored in order at fp; old sp is
996 at fp + NUM_REGS*4 */
998 for (i
= 1; i
< NUM_REGS
; i
++) /* skip reg 0 */
999 /* the register numbers used in the instruction and the ones used to index
1000 the regs array are not the same -- compensate */
1001 frame_saved_regs
->regs
[i
+R0
] = frame_info
->frame
+ i
*REGISTER_LENGTH
;
1007 pc
= get_pc_function_start (frame_info
->pc
);
1009 pc
= find_entry_start (frame_info
->pc
);
1013 instr
= (unsigned)(adj_read_memory_integer (pc
));
1014 /* Recognize "addu|adds -X,sp,sp" insn. */
1015 if ((instr
& 0xEFFF0000) == 0x84420000)
1017 framesize
= -SIGN_EXT16(instr
& 0x0000FFFF);
1018 pc
+= INSTRUCTION_LENGTH
;
1019 instr
= (unsigned)(adj_read_memory_integer (pc
));
1023 goto punt
; /* No frame! */
1025 /* Recognize store of return addr and frame pointer into frame */
1028 if ((instr
& 0xFFE0F801) == 0x1C400801) /* st.l r1,X(sp) */
1030 r1_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
1031 pc
+= INSTRUCTION_LENGTH
;
1032 instr
= (unsigned)(adj_read_memory_integer (pc
));
1034 else if ((instr
& 0xFFE0F801) == 0x1C401801) /* st.l fp,X(sp) */
1036 fp_off
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
1037 pc
+= INSTRUCTION_LENGTH
;
1038 instr
= (unsigned)(adj_read_memory_integer (pc
));
1044 /* Recognize "addu|adds X,sp,fp" insn. */
1045 if ((instr
& 0xEFFF0000) == 0x84430000)
1047 spdelta
= SIGN_EXT16(instr
& 0x0000FFFF);
1048 pc
+= INSTRUCTION_LENGTH
;
1049 instr
= (unsigned)(adj_read_memory_integer (pc
));
1052 /* Now recognize stores into the frame from the registers. */
1056 if ((instr
& 0xFFC00003) == 0x1C400001) /* st.l rn,X(fp|sp) */
1058 offset
= SIGN_EXT16(((instr
&0x001F0000) >> 5) | (instr
&0x000007FE));
1059 reg
= (instr
>> 11) & 0x1F;
1062 if ((instr
& 0x00200000) == 0) /* was this using sp? */
1063 if (spdelta
!= 0) /* and we know sp-fp delta */
1064 offset
-= spdelta
; /* if so, adjust the offset */
1066 break; /* if not, give up */
1069 /* Handle the case where the return address is stored after the fp
1073 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
+ offset
;
1075 frame_saved_regs
->regs
[reg
+R0
] = frame_info
->frame
+ offset
;
1077 pc
+= INSTRUCTION_LENGTH
;
1078 instr
= (unsigned)(adj_read_memory_integer (pc
));
1080 else if ((instr
& 0xFFC00001) == 0x2C400000) /* fst.y fn,X(fp|sp) */
1083 * The number of words in a floating store based on 3 LSB of instr
1085 static int fst_sizes
[] = {2, 0, 1, 0, 4, 0, 1, 0};
1087 size
= fst_sizes
[instr
& 7];
1088 reg
= ((instr
>> 16) & 0x1F) + FP0_REGNUM
;
1092 if (size
> 1) /* align the offset */
1093 offset
= SIGN_EXT16(instr
& 0x0000FFF8); /* drop 3 bits */
1095 offset
= SIGN_EXT16(instr
& 0x0000FFFC); /* drop 2 bits */
1097 if ((instr
& 0x00200000) == 0) /* was this using sp? */
1098 if (spdelta
!= 0) /* and we know sp-fp delta */
1099 offset
-= spdelta
; /* if so, adjust the offset */
1101 break; /* if not, give up */
1103 for (i
= 0; i
< size
; i
++)
1105 frame_saved_regs
->regs
[reg
] = frame_info
->frame
+ offset
;
1107 offset
+= REGISTER_LENGTH
;
1111 pc
+= INSTRUCTION_LENGTH
;
1112 instr
= (unsigned)(adj_read_memory_integer (pc
));
1119 if (framesize
!= 0 && spdelta
!= 0)
1120 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+(framesize
-spdelta
);
1122 frame_saved_regs
->regs
[SP_REGNUM
] = frame_info
->frame
+ 8;
1124 if ((spdelta
!= 0) && fp_off
!= -1)
1125 frame_saved_regs
->regs
[FP_REGNUM
] = frame_info
->frame
- spdelta
+ fp_off
;
1127 frame_saved_regs
->regs
[FP_REGNUM
] = frame_info
->frame
;
1129 if ((spdelta
!= 0) && r1_off
!= -1)
1130 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
- spdelta
+ r1_off
;
1132 frame_saved_regs
->regs
[PC_REGNUM
] = frame_info
->frame
+ 4;
1136 /* get the frame pointer of the caller.
1137 * note that only routines that have been compiled with
1138 * -g have full (XX)fp style stack frames
1139 * if we are not returning to a non -g caller then we
1140 * return the sp at entry to us as it is the caller's
1144 frame_chain(thisframe
)
1148 CORE_ADDR func_start
;
1151 CORE_ADDR thisfp
= thisframe
->frame
;
1152 struct frame_saved_regs fsr
;
1155 /* get the frame pointer actually sp for a non -g
1156 * for the routine that called us routine
1159 BTDEBUG("FRAME_CHAIN(%x)\n",thisframe
);
1161 if ( !read_memory_integer (thisframe
->frame
,sizeof(long)) )
1166 if( ! g_routine(thisframe
->pc
) ){
1167 thissp
= get_saved_basereg (thisframe
, SP_REGNUM
);
1169 BTDEBUG( "non g at %x\n",thisframe
->pc
);
1170 caller_pc(thisframe
->pc
, thissp
, thisfp
,&pc
,&fp
, 1);
1171 BTDEBUG("caller_pc returned %x %x \n",pc
,fp
);
1174 }/* else a -g routine */
1177 fp
= read_memory_integer (thisfp
, sizeof(long));
1179 if (fp
< thisfp
|| fp
> (unsigned) STACK_END_ADDR
)
1181 /* handle the Metaware-type pseudo-frame */
1183 func_start
= get_pc_function_start(thisframe
->pc
);
1184 if (func_start
== NULL
)
1185 func_start
= find_entry_start (thisframe
->pc
);
1187 if (func_start
!= NULL
)
1190 instr
= (unsigned)(adj_read_memory_integer (func_start
));
1191 /* Recognize "addu|adds -X,sp,sp" insn. */
1192 if ((instr
& 0xEFFF0000) == 0x84420000)
1193 offset
= SIGN_EXT16(instr
& 0x0000FFFF);
1199 fp
= thisfp
- offset
;
1201 BTDEBUG("frame_chain returned %d\n",fp
);
1205 /* This function returns 1 if there is no stored r1, 0 otherwise.
1206 The function returns 1 if the pc is in a function prologue,
1207 or the function prologue didn't save the return pointer in
1208 the stack frame, 0 otherwise */
1210 int no_stored_rp(CORE_ADDR pc
)
1212 CORE_ADDR func_start
, prologue_end
;
1214 func_start
= get_pc_function_start(pc
);
1215 if (func_start
== NULL
)
1216 func_start
= find_entry_start (pc
);
1218 if (func_start
!= NULL
)
1220 prologue_end
= func_start
;
1221 SKIP_PROLOGUE(prologue_end
);
1222 if ( (pc
>= func_start
) && (pc
<= prologue_end
))
1224 BTDEBUG("no_stored_rp: pc %x is in prologue \n",pc
);
1227 /* otherwise, see if the entry sequence stored the return pointer.
1228 If it didn't, return 1 */
1229 /* Some procedures , at least, store the return pointer AFTER
1230 the prologue sequence, so check for stores from function start to
1231 present pc value. */
1232 if (!has_stored_r1(func_start
, pc
))
1234 BTDEBUG("no_stored_rp, for pc %x, prologue didn't store r1\n",pc
);
1238 BTDEBUG("no_stored_rp for pc %x return pointer was stored \n", pc
);
1243 /* get the PC of the caller */
1244 CORE_ADDR
frame_saved_pc(frame_struct
)
1252 struct frame_saved_regs fsr
;
1254 frame
= frame_struct
->frame
;
1255 pc
= frame_struct
->pc
;
1258 BTDEBUG("frame_saved_pc input: frame %x, pc %x",
1261 /* First see if this is the current frame. If it is, return the value in r1,
1262 as it may not have been stored */
1264 fp
= read_register(FP_REGNUM
);
1266 /* check to see if we are in an entry sequence, where the return pointer has not yet been stored */
1267 if (fp
== frame
&& no_stored_rp(pc
))
1269 pc
= read_register(RP_REGNUM
);
1270 frame_struct
->rp
= pc
;
1272 else if( ! g_routine(pc
) )
1274 sp
= get_saved_basereg (frame_struct
, SP_REGNUM
);
1276 caller_pc(pc
,sp
,frame_struct
->frame
, &pc
,&frame
, 0);
1281 pc
= read_memory_integer (frame
+ 4, sizeof(long));
1283 if (inside_entry_file(pc
))
1286 BTDEBUG("pc %x outside entry file \n",pc
);
1288 pc1
= read_memory_integer (frame
, sizeof(long));
1290 if (!inside_entry_file(pc1
))
1296 BTDEBUG(" returning pc %x\n", CLEAN_PC(pc
));
1297 return(CLEAN_PC(pc
));
1301 /* Pass arguments to a function in the inferior process - ABI compliant
1302 Modified by Peggy Fieland (Margaret_Fieland@vos.stratus.com) to account
1303 for newer ABI conventions. Note that now, unfortunately, we MUST KNOW
1304 if we expect a float or a double. For now, we will assume that the
1305 caller of this routine has the types of these arguments correct....
1306 NOTE THAT THIS ROUTINE DOES NO ARGUMENT COERCION -- it's all in the
1308 Modified by Peggy Fieland to handle memory argument lists.
1311 #define IS_EVEN_REG(fl) (((fl - FP0_REGNUM)%2) == 0)
1313 pass_function_arguments(args
, nargs
, struct_return
, struct_addr
, sp
)
1317 CORE_ADDR struct_addr
;
1320 int ireg
= (struct_return
) ? R17
: R16
;
1326 unsigned long ul_tmp
;
1328 unsigned short us_tmp
;
1330 unsigned char uc_tmp
;
1336 write_register(R16
, struct_addr
);
1339 arg_ptr
= sp
; /* Space was allocated for memory argument list in i860_arg_coerce */
1341 /* Loop through the arguments, putting the values in a register or memory as appropriate. */
1343 for (i
= 0; i
< nargs
; i
++)
1346 type
= VALUE_TYPE(arg
);
1347 len
= TYPE_LENGTH(type
);
1348 if (type
== builtin_type_double
)
1350 /* see ABI . Note freg MUST BE INCREMENTED even if arg goes into the
1351 memory argument list for this code to work correctly for subsequent
1353 if (!IS_EVEN_REG(freg
))
1355 /* see if argument can be put in a register, or whether it must go
1356 into the memory argument list */
1357 if (freg
< F8
+ NUM_FLOAT_ARG_REGS
)
1359 /* It can go in a register */
1360 bcopy(VALUE_CONTENTS(arg
), &tmp
, sizeof(double));
1361 write_register_bytes(REGISTER_BYTE(freg
), (char *) &tmp
, TYPE_LENGTH(type
));
1366 /* It goes into memory argument list */
1367 arg_ptr
= ALIGN_ARG( arg_ptr
, sizeof(double));
1368 write_memory (arg_ptr
, VALUE_CONTENTS (arg
), len
);
1373 else if (type
== builtin_type_float
)
1375 if (freg
< F8
+ NUM_FLOAT_ARG_REGS
)
1377 /* It can go in a register */
1378 bcopy(VALUE_CONTENTS(arg
), &tmp
, sizeof(long));
1379 write_register_bytes (REGISTER_BYTE(freg
), (char *) &tmp
, TYPE_LENGTH(type
));
1384 /* It goes into the memory argument list */
1385 arg_ptr
= ALIGN_ARG(arg_ptr
, sizeof(float));
1386 write_memory (arg_ptr
, VALUE_CONTENTS (arg
), len
);
1392 /* All structs are passed by value, and hence they all go into the memory
1393 argument list (see ABI); otherwise, as above, see if we have run
1396 /* Cast value correctly so we can load it into a register or into the
1397 memory argument list -- see ABI */
1398 if (TYPE_LENGTH(type
) < sizeof(long))
1400 if (TYPE_FLAGS(type
) & TYPE_FLAG_UNSIGNED
)
1401 arg
= value_cast(builtin_type_unsigned_int
, arg
);
1403 arg
= value_cast (builtin_type_int
, arg
);
1404 type
= VALUE_TYPE(arg
);
1405 len
= TYPE_LENGTH(type
);
1408 if ((TYPE_CODE(type
) == TYPE_CODE_STRUCT
) || (ireg
>= R16
+ NUM_INT_ARG_REGS
))
1410 /* It goes into the memory argument list. Minimum alignment requirements
1411 are on a 4-byte boundary */
1413 if ((TYPE_CODE(type
) == TYPE_CODE_INT
) ||
1414 (TYPE_CODE(type
) == TYPE_CODE_ENUM
) ||
1415 (TYPE_CODE(type
) == TYPE_CODE_CHAR
) ||
1416 (TYPE_CODE(type
) == TYPE_CODE_BOOL
))
1417 arg_ptr
= ALIGN_ARG(arg_ptr
, len
);
1419 arg_ptr
= ALIGN_ARG (arg_ptr
, sizeof(long)); /* align on 4-byte boundary */
1420 write_memory (arg_ptr
, VALUE_CONTENTS (arg
), len
);
1426 bcopy(VALUE_CONTENTS(arg
), &tmp
, sizeof(long));
1427 write_register(ireg
, tmp
);
1441 #define P_SPACES " "
1444 int screen_lines
=24;
1446 char *spec_reg
[] = {
1447 "fsr", "db", "dirbase", "fir", "psr", "epsr",
1450 char *doro_reg
[] = {
1451 "scp", "cbsp", "pt_cs", "intmsk", "intack",
1458 char raw_buffer
[32];
1462 /* NOTE that only integer and floating point registers can be relative to a frame */
1464 if ((regno
>= R0
) && (regno
<= F31
)) /* user register */
1465 read_relative_register_raw_bytes (regno
, raw_buffer
);
1467 bcopy (®isters
[regno
<< 2], raw_buffer
, sizeof (long));
1469 REGISTER_CONVERT_TO_VIRTUAL (addr
, raw_buffer
, &virtual_buffer
);
1470 return(virtual_buffer
);
1475 /* This routine is uncalled. Remove it sometime. */
1478 ** Figure out whether we are in a delayed slot and if so then take necessary
1479 ** action to resume properly - remember trap pre-empts instruction
1482 wasabranch (addr
, nextpc
, ss
)
1483 CORE_ADDR addr
, *nextpc
;
1486 CORE_ADDR nextadr
, instr
;
1487 int val
= not_branch
;
1488 long offset
; /* Must be signed for sign-extend */
1494 nextadr
= CORADR((int)(addr
+ INSTRUCTION_LENGTH
*2));
1495 instr
= (unsigned)(adj_read_memory_integer (CORADR(addr
)));
1499 nextadr
= addr
+ INSTRUCTION_LENGTH
;
1500 instr
= (unsigned)(adj_read_memory_integer (addr
));
1505 nextadr
= CORADR(addr
);
1506 instr
= (unsigned)(adj_read_memory_integer (nextadr
));
1511 instr
= (unsigned)(adj_read_memory_integer (addr
));
1516 if ((instr
& 0xE0000000) == 0x60000000 && /* CTRL format */
1517 (instr
& 0xF8000000) != 0x60000000) /* not pfld.y */
1519 if ((instr
& 0xF8000000) == 0x68000000) /* br or call */
1521 else if ((instr
& 0xF4000000) == 0x74000000) /* bc.t or bnc.t */
1523 else if ((instr
& 0xF4000000) == 0x70000000) /* bc or bnc */
1526 offset
= (instr
& 0x03ffffff);
1527 if (offset
& 0x02000000) /* sign extend? */
1528 offset
|= 0xFC000000;
1529 nextadr
+= (offset
<< 2);
1531 else if ((instr
& 0xFC00003F) == 0x4C000002 || /* calli */
1532 (instr
& 0xFC000000) == 0x40000000) /* bri */
1537 offset
= ((instr
& 0x0000F800) >> 11);
1538 nextadr
= (read_register(offset
) & 0xFFFFFFFC);
1543 else if ((instr
& 0xF0000000) == 0x50000000) /* bte or btne */
1547 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
1548 nextadr
+= (offset
<< 2);
1550 else if ((instr
& 0xFC000000) == 0xB4000000) /* bla */
1554 offset
= SIGN_EXT16(((instr
& 0x001F0000) >> 5) | (instr
& 0x000007FF));
1555 nextadr
+= (offset
<< 2);
1564 /* i860-specific routine to print the register set. Note that we ALWAYS print information
1565 on the floating point registers, so we ignore the parameter fpregs.
1566 NOTE also that only integer and floating point registers can be relative to a frame --
1567 see subroutine get_reg (above ) */
1569 void i860_do_registers_info(regnum
,fpregs
)
1580 "Register Contents (relative to selected stack frame)\n\n");
1582 if (regnum
!= -1) /* print one register */
1584 val
= get_reg(regnum
);
1585 printf("%-4s 0x%08x\t", reg_names
[regnum
], val
);
1586 printf("\n\t"); fflush(stdout
);
1588 else /* print all registers */
1591 printf("\n Control/Status Registers :- \n\t");
1592 for (j
=0; j
<=DB
; j
++)
1595 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1597 printf("\n\t"); fflush(stdout
);
1600 val
= get_reg(EPSR
);
1601 printf("%-4s 0x%08x\t", reg_names
[EPSR
], val
);
1605 printf("%-4s 0x%08x\t", reg_names
[FSR
], val
);
1609 printf("%-4s 0x%08x\t", reg_names
[CCR
], val
);
1611 val
= get_reg(BEAR
);
1612 printf("%-4s 0x%08x\t", reg_names
[BEAR
], val
);
1616 for (j
=P0
; j
<=P3
; j
++)
1619 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1623 printf("\n Integer Registers :- \n\t");
1624 for (j
=R0
; j
<=R31
; j
++)
1626 if (j
!= IREGS
&& (j
% REGISTER_LENGTH
== 0))
1628 printf("\n\t"); fflush(stdout
);
1631 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1634 printf("\n Floating Registers :- \n\t");
1635 for (j
=F0
; j
<=F31
; j
++)
1637 if (j
!= FREGS
&& (j
% REGISTER_LENGTH
== 0))
1639 printf("\n\t"); fflush(stdout
);
1642 printf("%-4s 0x%08x\t", reg_names
[j
], val
);
1645 printf("\n Special Registers :- \n\t");
1646 for (j
=SPC_KI
; j
<=SPC_MERGE
; j
+=2)
1651 printf("\n\t"); fflush(stdout
);
1654 valh
= get_reg(j
+1);
1655 printf("%-6s 0x%08x %08x\t", reg_names
[j
], val
,valh
);
1658 printf("\n Graphics Pipeline :- \n");
1663 valh
= get_reg(j
+1);
1664 printf("\t\t\t%-8s 0x%08x %08x \n", reg_names
[j
], val
,valh
);
1667 printf(" Memory Load Pipeline :- \n");
1668 for (j
=PSV_L1
; j
<=PSV_L3
; j
+=REGISTER_LENGTH
)
1670 unsigned int valh
, val2
,val3
;
1673 valh
= get_reg(j
+1);
1674 val2
= get_reg(j
+2);
1675 val3
= get_reg(j
+3);
1677 printf("\t\t%-8s 0x%08x %08x %08x %08x\n", reg_names
[j
],
1678 val
,valh
,val2
,val3
);
1681 printf("\n Adder Pipeline :-\t\tMultiplier Pipeline :-\t\tFSR results :-\n");
1682 for (i
=PSV_FSR1
,j
=PSV_A1
,k
=PSV_M1
; j
<=PSV_A3
; i
++,j
+=2,k
+=2)
1684 unsigned int valh
,val2
,val3
,val4
;
1688 valh
= get_reg(j
+1);
1690 val3
= get_reg(k
+1);
1692 printf(" %-4s 0x%08x %08x\t", reg_names
[j
], val
,valh
);
1693 printf("%-4s 0x%08x %08x\t", reg_names
[k
], val2
,val3
);
1694 printf("%-4s 0x%08x\n", reg_names
[i
], val4
);
1704 /* The following set of routines was adapted from existing code previously
1705 in an i860-specific version of breakpoint.c by Peggy Fieland
1706 (Margaret_Fieland@vos.stratus.com) */
1707 /* routines to set a data breakpoint by setting the value in the DB register.
1708 Note that "hitting" the breakpoint will generate a data access trap. We
1709 do not have a special trap handler. */
1710 unsigned int dbrkval
, dbrkmod
;
1711 void i860_dbrk_breakpoint()
1713 BTDEBUG("i860_dbrk_breakpoint was called , dbrkval %x\n", dbrkval
);
1717 *(int *)®isters
[DB
<<2] = dbrkval
;
1721 *(int *)®isters
[DB
<<2] = 0;
1724 *(int *)®isters
[PSR
<<2] &= ~3;
1725 *(int *)®isters
[PSR
<<2] |= dbrkmod
;
1727 store_inferior_registers(DB
);
1728 store_inferior_registers(PSR
);
1732 /* set a "read" data breakpoint. */
1734 d_ro_break_command(char *arg
, int num
)
1736 dbrkval
= strtoul(arg
, NULL
, 0);
1738 BTDEBUG(" ro_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1741 /* set a "write" data breakpoint. */
1743 d_wo_break_command(char *arg
, int num
)
1745 dbrkval
= strtoul(arg
, NULL
, 0);
1747 BTDEBUG(" wo_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1750 /* set a "read/write" data breakpoint. */
1752 d_rw_break_command(char *arg
, int num
)
1754 dbrkval
= strtoul(arg
, NULL
, 0);
1756 BTDEBUG(" rw_dbreak - %x %x\n", dbrkval
, dbrkmod
);
1759 /* clear data breakpoint. */
1760 void clear_dbreak(char *arg
, int num
)
1766 /* i860-specific breakpoint initialization. Includes adding the
1767 i860-specific data breakpoint commands. */
1768 void i860_init_breakpoints()
1770 dbrkval
= dbrkmod
= 0;
1771 add_com ("dbro", class_breakpoint
, d_ro_break_command
,
1772 "Set a data breakpoint READ ONLY, 32-bit data element.");
1773 add_com ("dbwo", class_breakpoint
, d_wo_break_command
,
1774 "Set a data breakpoint WRITE ONLY, 32-bit data element.");
1775 add_com ("dbrw", class_breakpoint
, d_rw_break_command
,
1776 "Set a data breakpoint READ/WRITE, 32-bit data element.");
1777 add_com ("dclear", class_breakpoint
, clear_dbreak
,
1778 "clear the current data breakpoint.");
1779 add_com_alias ("dc", "dclear", class_breakpoint
, 1);
1783 /* i860-specific code to insert a breakpoint. */
1784 int i860_insert_breakpoint(b
)
1785 struct breakpoint
*b
;
1788 int *shadow0
, *shadow1
, *shadow2
, *shadow3
;
1790 shadow0
= (int *)&b
->shadow_contents
[0];
1791 shadow1
= (int *)&b
->shadow_contents
[4];
1792 shadow2
= (int *)&b
->shadow_contents
[8];
1793 shadow3
= (int *)&b
->shadow_contents
[12];
1795 place_brk( b
->address
, BREAK_MODE
, b
);
1800 adj_read_memory (b
->act_addr
[0], shadow0
, INSTRUCTION_LENGTH
);
1801 val
= adj_write_memory (b
->act_addr
[0], break_insn
, INSTRUCTION_LENGTH
);
1802 if (val
!= 0 ) return val
;
1803 adj_read_memory (b
->act_addr
[1], shadow1
, INSTRUCTION_LENGTH
);
1804 /* val = adj_write_memory (b->act_addr[1], float_insn, INSTRUCTION_LENGTH); */
1805 if (val
!= 0) return val
;
1809 adj_read_memory (b
->act_addr
[0], shadow0
, INSTRUCTION_LENGTH
);
1810 val
= adj_write_memory (b
->act_addr
[0], break_insn
, INSTRUCTION_LENGTH
);
1812 if (b
->address1
!= 0)
1817 adj_read_memory (b
->act_addr
[2], shadow2
, INSTRUCTION_LENGTH
);
1818 val
= adj_write_memory (b
->act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
1819 if (val
) return val
;
1820 adj_read_memory (b
->act_addr
[3], shadow3
, INSTRUCTION_LENGTH
);
1821 /* val = adj_write_memory (b->act_addr[3], float_insn, INSTRUCTION_LENGTH); */
1822 if (val
!= 0) return val
;
1826 adj_read_memory (b
->act_addr
[2], shadow0
, INSTRUCTION_LENGTH
);
1827 val
= adj_write_memory (b
->act_addr
[2], break_insn
, INSTRUCTION_LENGTH
);
1837 int i860_remove_breakpoint(b
)
1838 struct breakpoint
*b
;
1841 int *shadow0
, *shadow1
, *shadow2
, *shadow3
;
1843 shadow0
= (int *)&b
->shadow_contents
[0];
1844 shadow1
= (int *)&b
->shadow_contents
[4];
1845 shadow2
= (int *)&b
->shadow_contents
[8];
1846 shadow3
= (int *)&b
->shadow_contents
[12];
1853 val
=adj_write_memory (b
->act_addr
[0], shadow0
,
1854 INSTRUCTION_LENGTH
);
1855 val
=adj_write_memory (b
->act_addr
[1],shadow1
,
1856 INSTRUCTION_LENGTH
);
1857 if (b
->address1
!= NULL
)
1859 val
=adj_write_memory (b
->act_addr
[2],shadow2
,
1860 INSTRUCTION_LENGTH
);
1861 val
=adj_write_memory (b
->act_addr
[3], shadow3
,
1862 INSTRUCTION_LENGTH
);
1867 val
=adj_write_memory (b
->act_addr
[0], shadow0
,
1868 INSTRUCTION_LENGTH
);
1869 if (b
->address1
!= NULL
)
1871 val
=adj_write_memory (b
->act_addr
[2],shadow0
,
1872 INSTRUCTION_LENGTH
);
1886 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1888 #include <sys/procfs.h>
1890 /* The following routines were added by Peggy Fieland (Margaret_Fieland@vos.stratus.com)
1891 They were adapted from the m-68k versions of the routines .*/
1893 /* Given a pointer to a floating point register set in /proc format
1894 (fpregset_t *), unpack the register contents and supply them as gdb's
1895 idea of the current floating point register values. */
1898 supply_fpregset (fpregsetp
)
1899 fpregset_t
*fpregsetp
;
1903 BTDEBUG("supply_fregset called \n");
1905 for (regno
= F0
; regno
<= F31
; regno
++)
1907 supply_register (regno
, (char *) &(fpregsetp
-> fpu
.r_freg
[regno
-F0
]));
1911 /* Given a pointer to a floating point register set in /proc format
1912 (fpregset_t *), update the register specified by REGNO from gdb's idea
1913 of the current floating point register set. If REGNO is -1, update
1917 fill_fpregset (fpregsetp
, regno
)
1918 fpregset_t
*fpregsetp
;
1924 extern char registers
[];
1925 BTDEBUG("fill_fregset regno %d\n",regno
);
1927 for (regi
= F0
; regi
<= F31
; regi
++)
1929 if ((regno
== -1) || (regno
== regi
))
1931 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
1932 to
= (char *) &(fpregsetp
-> fpu
.r_freg
[regi
-F0
]);
1933 bcopy (from
, to
, REGISTER_RAW_SIZE (regno
));
1939 /* Given a pointer to a general register set in /proc format (gregset_t *),
1940 unpack the register contents and supply them as gdb's idea of the current
1944 supply_gregset (gregsetp
)
1945 gregset_t
*gregsetp
;
1948 register greg_t
*regp
= (greg_t
*) gregsetp
;
1950 BTDEBUG("supply_gregset called \n");
1952 for (regno
= 0 ; regno
<= R31
; regno
++)
1954 supply_register (regno
, (char *) (regp
+ regno
));
1958 /* Given a pointer to a general register set in /proc format (gregset_t *),
1959 update the register specified by REGNO from gdb's idea
1960 of the current general register set. If REGNO is -1, update
1964 fill_gregset (gregsetp
, regno
)
1965 gregset_t
*gregsetp
;
1969 extern char registers
[];
1970 register greg_t
*regp
= (greg_t
*) gregsetp
;
1971 BTDEBUG("fill_gregset regno %d \n",regno
);
1973 for (regi
= 0 ; regi
<= R31
; regi
++)
1975 if ((regno
== -1) || (regno
== regi
))
1977 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
1985 /* Push an empty stack frame, to record the current PC, etc. */
1986 /* We have this frame with fp pointing to a block where all GDB-visible
1987 registers are stored in the order GDB knows them, and sp at the next
1988 alignment point below fp. Note: fp + NUM_REGS*4 was the old sp
1990 extern CORE_ADDR text_end
;
1991 CORE_ADDR dummy_start_addr
;
1992 void i860_push_frame()
1994 register CORE_ADDR old_fp
= read_register(FP_REGNUM
);
1995 register CORE_ADDR old_sp
= read_register(SP_REGNUM
);
1996 register CORE_ADDR fp
;
1997 extern char registers
[];
1999 fp
= old_sp
- REGISTER_BYTES
;
2000 write_memory(fp
, registers
, REGISTER_BYTES
); /* write out old register values */
2001 /* reset FP and SP */
2002 write_register(FP_REGNUM
, fp
);
2003 write_register(SP_REGNUM
, (fp
&~ 15)); /* re-align */
2006 /* Discard from the stack the innermost frame,
2007 restoring all saved registers. */
2009 void i860_pop_frame()
2010 { register FRAME frame
= get_current_frame ();
2011 register CORE_ADDR fp
;
2012 struct frame_info
*fi
;
2015 fi
= get_frame_info (frame
);
2018 if (call_dummy_set
&& fi
-> pc
>= call_dummy_start
&&
2019 fi
-> pc
<= call_dummy_start
+ CALL_DUMMY_LENGTH
)
2022 read_memory(fp
, registers
, REGISTER_BYTES
);
2024 target_store_registers(-1);
2027 /* since we stomped on code that will be executed when we exit the program,
2029 extern REGISTER_TYPE call_save_code
[4];
2031 write_memory (call_dummy_start
, (char *) call_save_code
, 16);
2038 register int regnum
;
2039 struct frame_saved_regs fsr
;
2040 char raw_buffer
[12];
2042 get_frame_saved_regs (fi
, &fsr
);
2043 for (regnum
= FP0_REGNUM
+ 31; regnum
>= FP0_REGNUM
; regnum
--)
2044 if (fsr
.regs
[regnum
])
2045 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
2046 for (regnum
= R31
; regnum
>= 1; regnum
--)
2047 if (fsr
.regs
[regnum
])
2048 if (regnum
!= SP_REGNUM
)
2049 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
2051 write_register (SP_REGNUM
, fsr
.regs
[SP_REGNUM
]);
2052 if (fsr
.regs
[PS_REGNUM
])
2053 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
2054 if (fsr
.regs
[FPS_REGNUM
])
2055 write_register (FPS_REGNUM
, read_memory_integer (fsr
.regs
[FPS_REGNUM
],4));
2056 if (fsr
.regs
[PC_REGNUM
])
2057 write_register (PC_REGNUM
,CLEAN_PC( read_memory_integer (fsr
.regs
[PC_REGNUM
], 4)));
2060 flush_cached_frames ();
2062 set_current_frame (create_new_frame (read_register (FP_REGNUM
),
2067 CORE_ADDR
i860_arg_coerce(nargs
, args
, struct_return
, sp
)
2074 register int scalar
;
2075 register enum type_code code2
;
2076 register struct type
*type
;
2079 int num_int_args
= 0;
2080 int num_float_args
= 0;
2084 /* if we return a structure, it's address is in R16, and thus it uses up one of the integer
2085 argument registers. See the ABI. */
2089 /* loop to do the right thing with all the arguments and calculate the size of the memory
2090 argument list. We keep count of the number of integer and the number of float parameters,
2091 as well as the size of the memory argument list. */
2093 for (i
= 0; i
< nargs
; i
++)
2096 /* NOTE that this is all hunky dory in spite of the fact that we don't actually
2097 have the signature of the called procedure EXCEPT if we are passing in floats!
2098 This is true, since registers are 4 bytes, and the minimum alignment in the
2099 memory argument list is 4 bytes. See the ABI for more gory details. The switch
2100 "ansi-conformant" is an attempt to get around this problem. */
2102 code2
= TYPE_CODE (VALUE_TYPE(args
[i
]));
2104 /* Only coerce if we've got switch "ansi-conformant" off.
2105 Actually, it's OK ( and probably helpful) to coerce ALL integer arguments
2106 (see comment above), but never mind, we make them the right size in
2107 pass_function_arguments. */
2109 if ((!ansi_conformant
) && (code2
!= TYPE_CODE_STRUCT
))
2110 value_arg_coerce(args
[i
]);
2113 type
= VALUE_TYPE(args
[i
]);
2115 /* All structures are passed by value in the memory argument list. */
2116 if (code2
== TYPE_CODE_STRUCT
)
2118 size
= ALIGN_ARG(size
, sizeof(long));
2119 size
+= TYPE_LENGTH(type
);
2121 else if (type
== builtin_type_float
)
2123 num_float_args
+= 1;
2124 if (num_float_args
> NUM_FLOAT_ARG_REGS
)
2126 size
= ALIGN_ARG(size
, TYPE_LENGTH(type
)) ;
2127 size
+= TYPE_LENGTH(type
);
2130 else if (type
== builtin_type_double
)
2132 /* floating register alignment -- see ABI */
2133 if ((num_float_args
%2) != 0)
2134 num_float_args
+= 1;
2136 num_float_args
+= 2; /* use up two registers */
2138 if (num_float_args
> NUM_FLOAT_ARG_REGS
)
2140 size
= ALIGN_ARG(size
, TYPE_LENGTH(type
)) ;
2141 size
+= TYPE_LENGTH(type
);
2146 int len
= max (sizeof(long), TYPE_LENGTH(type
));
2150 if (num_int_args
> NUM_INT_ARG_REGS
)
2152 /* see ABI -- in-memory arguments have AT LEAST word alignment */
2153 if ((TYPE_CODE(type
) == TYPE_CODE_INT
) ||
2154 (TYPE_CODE(type
) == TYPE_CODE_ENUM
) ||
2155 (TYPE_CODE(type
) == TYPE_CODE_CHAR
) ||
2156 (TYPE_CODE(type
) == TYPE_CODE_BOOL
))
2157 size
= ALIGN_ARG(size
, len
);
2159 size
= ALIGN_ARG(size
, sizeof(long));
2167 /* recalculate the stack pointer, leaving enough space for the memory argument list and
2168 realigning the stack pointer. */
2171 arg_ptr
= sp
- size
;
2173 arg_ptr
= arg_ptr
& (-16); /* realign stack */
2174 write_register (R28
,arg_ptr
);
2181 void i860_extract_return_value(type
,regbuf
,valbuf
)
2183 char regbuf
[REGISTER_BYTES
];
2186 register int len
= TYPE_LENGTH (type
);
2190 if ((TYPE_CODE(type
) == TYPE_CODE_FLT
))
2192 if (len
== sizeof (float))
2195 NOTE that this assumes that the function declaration was ANSI_CONFORMANT --
2196 at the present time I can't think of ANY WAY to disambiguate the two following
2198 float really_does_return_a_float(float ff)
2201 float actually_returns_a_double(ff)
2205 bcopy ((char *) (regbuf
) + REGISTER_BYTE(ADJ_FREG(F8
)), (valbuf
), TYPE_LENGTH (type
)) ;
2208 bcopy ((char *) (regbuf
) + REGISTER_BYTE(F8
), (valbuf
), TYPE_LENGTH (type
)) ;
2211 bcopy ((char *) (regbuf
) + REGISTER_BYTE(R16
), (valbuf
), TYPE_LENGTH (type
));
2214 void i860_store_return_value(type
,valbuf
)
2218 register int len
= TYPE_LENGTH (type
);
2221 if ((TYPE_CODE(type
) == TYPE_CODE_FLT
) )
2223 write_register_bytes (REGISTER_BYTE (F8
), valbuf
, len
);
2226 write_register_bytes (REGISTER_BYTE (R16
), valbuf
, TYPE_LENGTH (type
));