1 /* Functions specific to running gdb native on IA-64 running
4 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "gdb_string.h"
32 #include <sys/ptrace.h>
39 #include <asm/ptrace_offsets.h>
40 #include <sys/procfs.h>
42 /* Prototypes for supply_gregset etc. */
45 /* These must match the order of the register names.
47 Some sort of lookup table is needed because the offsets associated
48 with the registers are all over the board. */
50 static int u_offsets
[] =
52 /* general registers */
53 -1, /* gr0 not available; i.e, it's always zero */
85 /* gr32 through gr127 not directly available via the ptrace interface */
86 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
87 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
88 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
89 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
90 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
91 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
92 /* Floating point registers */
93 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
220 /* predicate registers - we don't fetch these individually */
221 -1, -1, -1, -1, -1, -1, -1, -1,
222 -1, -1, -1, -1, -1, -1, -1, -1,
223 -1, -1, -1, -1, -1, -1, -1, -1,
224 -1, -1, -1, -1, -1, -1, -1, -1,
225 -1, -1, -1, -1, -1, -1, -1, -1,
226 -1, -1, -1, -1, -1, -1, -1, -1,
227 -1, -1, -1, -1, -1, -1, -1, -1,
228 -1, -1, -1, -1, -1, -1, -1, -1,
229 /* branch registers */
238 /* virtual frame pointer and virtual return address pointer */
240 /* other registers */
243 PT_CR_IPSR
, /* psr */
245 /* kernel registers not visible via ptrace interface (?) */
246 -1, -1, -1, -1, -1, -1, -1, -1,
248 -1, -1, -1, -1, -1, -1, -1, -1,
254 -1, /* Not available: FCR, IA32 floating control register */
256 -1, /* Not available: EFLAG */
257 -1, /* Not available: CSD */
258 -1, /* Not available: SSD */
259 -1, /* Not available: CFLG */
260 -1, /* Not available: FSR */
261 -1, /* Not available: FIR */
262 -1, /* Not available: FDR */
270 -1, /* Not available: ITC */
271 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
272 -1, -1, -1, -1, -1, -1, -1, -1, -1,
275 -1, /* Not available: EC, the Epilog Count register */
276 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
278 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
279 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
280 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
283 /* nat bits - not fetched directly; instead we obtain these bits from
284 either rnat or unat or from memory. */
285 -1, -1, -1, -1, -1, -1, -1, -1,
286 -1, -1, -1, -1, -1, -1, -1, -1,
287 -1, -1, -1, -1, -1, -1, -1, -1,
288 -1, -1, -1, -1, -1, -1, -1, -1,
289 -1, -1, -1, -1, -1, -1, -1, -1,
290 -1, -1, -1, -1, -1, -1, -1, -1,
291 -1, -1, -1, -1, -1, -1, -1, -1,
292 -1, -1, -1, -1, -1, -1, -1, -1,
293 -1, -1, -1, -1, -1, -1, -1, -1,
294 -1, -1, -1, -1, -1, -1, -1, -1,
295 -1, -1, -1, -1, -1, -1, -1, -1,
296 -1, -1, -1, -1, -1, -1, -1, -1,
297 -1, -1, -1, -1, -1, -1, -1, -1,
298 -1, -1, -1, -1, -1, -1, -1, -1,
299 -1, -1, -1, -1, -1, -1, -1, -1,
300 -1, -1, -1, -1, -1, -1, -1, -1,
304 register_addr (int regno
, CORE_ADDR blockend
)
308 if (regno
< 0 || regno
>= NUM_REGS
)
309 error ("Invalid register number %d.", regno
);
311 if (u_offsets
[regno
] == -1)
314 addr
= (CORE_ADDR
) u_offsets
[regno
];
319 int ia64_cannot_fetch_register (regno
)
322 return regno
< 0 || regno
>= NUM_REGS
|| u_offsets
[regno
] == -1;
325 int ia64_cannot_store_register (regno
)
328 /* Rationale behind not permitting stores to bspstore...
330 The IA-64 architecture provides bspstore and bsp which refer
331 memory locations in the RSE's backing store. bspstore is the
332 next location which will be written when the RSE needs to write
333 to memory. bsp is the address at which r32 in the current frame
334 would be found if it were written to the backing store.
336 The IA-64 architecture provides read-only access to bsp and
337 read/write access to bspstore (but only when the RSE is in
338 the enforced lazy mode). It should be noted that stores
339 to bspstore also affect the value of bsp. Changing bspstore
340 does not affect the number of dirty entries between bspstore
341 and bsp, so changing bspstore by N words will also cause bsp
342 to be changed by (roughly) N as well. (It could be N-1 or N+1
343 depending upon where the NaT collection bits fall.)
345 OTOH, the Linux kernel provides read/write access to bsp (and
346 currently read/write access to bspstore as well). But it
347 is definitely the case that if you change one, the other
348 will change at the same time. It is more useful to gdb to
349 be able to change bsp. So in order to prevent strange and
350 undesirable things from happening when a dummy stack frame
351 is popped (after calling an inferior function), we allow
352 bspstore to be read, but not written. (Note that popping
353 a (generic) dummy stack frame causes all registers that
354 were previously read from the inferior process to be written
357 return regno
< 0 || regno
>= NUM_REGS
|| u_offsets
[regno
] == -1
358 || regno
== IA64_BSPSTORE_REGNUM
;
362 supply_gregset (gregset_t
*gregsetp
)
365 greg_t
*regp
= (greg_t
*) gregsetp
;
367 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
369 supply_register (regi
, (char *) (regp
+ (regi
- IA64_GR0_REGNUM
)));
372 /* FIXME: NAT collection bits are at index 32; gotta deal with these
375 supply_register (IA64_PR_REGNUM
, (char *) (regp
+ 33));
377 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
379 supply_register (regi
, (char *) (regp
+ 34 + (regi
- IA64_BR0_REGNUM
)));
382 supply_register (IA64_IP_REGNUM
, (char *) (regp
+ 42));
383 supply_register (IA64_CFM_REGNUM
, (char *) (regp
+ 43));
384 supply_register (IA64_PSR_REGNUM
, (char *) (regp
+ 44));
385 supply_register (IA64_RSC_REGNUM
, (char *) (regp
+ 45));
386 supply_register (IA64_BSP_REGNUM
, (char *) (regp
+ 46));
387 supply_register (IA64_BSPSTORE_REGNUM
, (char *) (regp
+ 47));
388 supply_register (IA64_RNAT_REGNUM
, (char *) (regp
+ 48));
389 supply_register (IA64_CCV_REGNUM
, (char *) (regp
+ 49));
390 supply_register (IA64_UNAT_REGNUM
, (char *) (regp
+ 50));
391 supply_register (IA64_FPSR_REGNUM
, (char *) (regp
+ 51));
392 supply_register (IA64_PFS_REGNUM
, (char *) (regp
+ 52));
393 supply_register (IA64_LC_REGNUM
, (char *) (regp
+ 53));
394 supply_register (IA64_EC_REGNUM
, (char *) (regp
+ 54));
398 fill_gregset (gregset_t
*gregsetp
, int regno
)
401 greg_t
*regp
= (greg_t
*) gregsetp
;
403 #define COPY_REG(_idx_,_regi_) \
404 if ((regno == -1) || regno == _regi_) \
405 memcpy (regp + _idx_, &deprecated_registers[DEPRECATED_REGISTER_BYTE (_regi_)], \
406 DEPRECATED_REGISTER_RAW_SIZE (_regi_))
408 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
410 COPY_REG (regi
- IA64_GR0_REGNUM
, regi
);
413 /* FIXME: NAT collection bits at index 32? */
415 COPY_REG (33, IA64_PR_REGNUM
);
417 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
419 COPY_REG (34 + (regi
- IA64_BR0_REGNUM
), regi
);
422 COPY_REG (42, IA64_IP_REGNUM
);
423 COPY_REG (43, IA64_CFM_REGNUM
);
424 COPY_REG (44, IA64_PSR_REGNUM
);
425 COPY_REG (45, IA64_RSC_REGNUM
);
426 COPY_REG (46, IA64_BSP_REGNUM
);
427 COPY_REG (47, IA64_BSPSTORE_REGNUM
);
428 COPY_REG (48, IA64_RNAT_REGNUM
);
429 COPY_REG (49, IA64_CCV_REGNUM
);
430 COPY_REG (50, IA64_UNAT_REGNUM
);
431 COPY_REG (51, IA64_FPSR_REGNUM
);
432 COPY_REG (52, IA64_PFS_REGNUM
);
433 COPY_REG (53, IA64_LC_REGNUM
);
434 COPY_REG (54, IA64_EC_REGNUM
);
437 /* Given a pointer to a floating point register set in /proc format
438 (fpregset_t *), unpack the register contents and supply them as gdb's
439 idea of the current floating point register values. */
442 supply_fpregset (fpregset_t
*fpregsetp
)
447 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
449 from
= (char *) &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]);
450 supply_register (regi
, from
);
454 /* Given a pointer to a floating point register set in /proc format
455 (fpregset_t *), update the register specified by REGNO from gdb's idea
456 of the current floating point register set. If REGNO is -1, update
460 fill_fpregset (fpregset_t
*fpregsetp
, int regno
)
466 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
468 if ((regno
== -1) || (regno
== regi
))
470 from
= (char *) &deprecated_registers
[DEPRECATED_REGISTER_BYTE (regi
)];
471 to
= (char *) &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]);
472 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (regi
));
477 #define IA64_PSR_DB (1UL << 24)
478 #define IA64_PSR_DD (1UL << 39)
481 enable_watchpoints_in_psr (ptid_t ptid
)
485 psr
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
486 if (!(psr
& IA64_PSR_DB
))
488 psr
|= IA64_PSR_DB
; /* Set the db bit - this enables hardware
489 watchpoints and breakpoints. */
490 write_register_pid (IA64_PSR_REGNUM
, psr
, ptid
);
495 fetch_debug_register (ptid_t ptid
, int idx
)
504 val
= ptrace (PT_READ_U
, tid
, (PTRACE_ARG3_TYPE
) (PT_DBR
+ 8 * idx
), 0);
510 store_debug_register (ptid_t ptid
, int idx
, long val
)
518 (void) ptrace (PT_WRITE_U
, tid
, (PTRACE_ARG3_TYPE
) (PT_DBR
+ 8 * idx
), val
);
522 fetch_debug_register_pair (ptid_t ptid
, int idx
, long *dbr_addr
, long *dbr_mask
)
525 *dbr_addr
= fetch_debug_register (ptid
, 2 * idx
);
527 *dbr_mask
= fetch_debug_register (ptid
, 2 * idx
+ 1);
531 store_debug_register_pair (ptid_t ptid
, int idx
, long *dbr_addr
, long *dbr_mask
)
534 store_debug_register (ptid
, 2 * idx
, *dbr_addr
);
536 store_debug_register (ptid
, 2 * idx
+ 1, *dbr_mask
);
540 is_power_of_2 (int val
)
545 for (i
= 0; i
< 8 * sizeof (val
); i
++)
549 return onecount
<= 1;
553 ia64_linux_insert_watchpoint (ptid_t ptid
, CORE_ADDR addr
, int len
, int rw
)
556 long dbr_addr
, dbr_mask
;
557 int max_watchpoints
= 4;
559 if (len
<= 0 || !is_power_of_2 (len
))
562 for (idx
= 0; idx
< max_watchpoints
; idx
++)
564 fetch_debug_register_pair (ptid
, idx
, NULL
, &dbr_mask
);
565 if ((dbr_mask
& (0x3UL
<< 62)) == 0)
567 /* Exit loop if both r and w bits clear */
572 if (idx
== max_watchpoints
)
575 dbr_addr
= (long) addr
;
576 dbr_mask
= (~(len
- 1) & 0x00ffffffffffffffL
); /* construct mask to match */
577 dbr_mask
|= 0x0800000000000000L
; /* Only match privilege level 3 */
581 dbr_mask
|= (1L << 62); /* Set w bit */
584 dbr_mask
|= (1L << 63); /* Set r bit */
587 dbr_mask
|= (3L << 62); /* Set both r and w bits */
593 store_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
594 enable_watchpoints_in_psr (ptid
);
600 ia64_linux_remove_watchpoint (ptid_t ptid
, CORE_ADDR addr
, int len
)
603 long dbr_addr
, dbr_mask
;
604 int max_watchpoints
= 4;
606 if (len
<= 0 || !is_power_of_2 (len
))
609 for (idx
= 0; idx
< max_watchpoints
; idx
++)
611 fetch_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
612 if ((dbr_mask
& (0x3UL
<< 62)) && addr
== (CORE_ADDR
) dbr_addr
)
616 store_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
624 ia64_linux_stopped_by_watchpoint (ptid_t ptid
)
628 struct siginfo siginfo
;
635 ptrace (PTRACE_GETSIGINFO
, tid
, (PTRACE_ARG3_TYPE
) 0, &siginfo
);
637 if (errno
!= 0 || siginfo
.si_signo
!= SIGTRAP
||
638 (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
641 psr
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
642 psr
|= IA64_PSR_DD
; /* Set the dd bit - this will disable the watchpoint
643 for the next instruction */
644 write_register_pid (IA64_PSR_REGNUM
, psr
, ptid
);
646 return (CORE_ADDR
) siginfo
.si_addr
;
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