1 /* Functions specific to running gdb native on IA-64 running
4 Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "gdb_string.h"
30 #include "ia64-tdep.h"
33 #include <sys/ptrace.h>
38 #include <sys/syscall.h>
41 #include <asm/ptrace_offsets.h>
42 #include <sys/procfs.h>
44 /* Prototypes for supply_gregset etc. */
47 /* These must match the order of the register names.
49 Some sort of lookup table is needed because the offsets associated
50 with the registers are all over the board. */
52 static int u_offsets
[] =
54 /* general registers */
55 -1, /* gr0 not available; i.e, it's always zero */
87 /* gr32 through gr127 not directly available via the ptrace interface */
88 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
89 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
90 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
91 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
92 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
93 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
94 /* Floating point registers */
95 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
222 /* predicate registers - we don't fetch these individually */
223 -1, -1, -1, -1, -1, -1, -1, -1,
224 -1, -1, -1, -1, -1, -1, -1, -1,
225 -1, -1, -1, -1, -1, -1, -1, -1,
226 -1, -1, -1, -1, -1, -1, -1, -1,
227 -1, -1, -1, -1, -1, -1, -1, -1,
228 -1, -1, -1, -1, -1, -1, -1, -1,
229 -1, -1, -1, -1, -1, -1, -1, -1,
230 -1, -1, -1, -1, -1, -1, -1, -1,
231 /* branch registers */
240 /* virtual frame pointer and virtual return address pointer */
242 /* other registers */
245 PT_CR_IPSR
, /* psr */
247 /* kernel registers not visible via ptrace interface (?) */
248 -1, -1, -1, -1, -1, -1, -1, -1,
250 -1, -1, -1, -1, -1, -1, -1, -1,
256 -1, /* Not available: FCR, IA32 floating control register */
258 -1, /* Not available: EFLAG */
259 -1, /* Not available: CSD */
260 -1, /* Not available: SSD */
261 -1, /* Not available: CFLG */
262 -1, /* Not available: FSR */
263 -1, /* Not available: FIR */
264 -1, /* Not available: FDR */
272 -1, /* Not available: ITC */
273 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
274 -1, -1, -1, -1, -1, -1, -1, -1, -1,
277 -1, /* Not available: EC, the Epilog Count register */
278 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
279 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
280 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
282 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
283 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
285 /* nat bits - not fetched directly; instead we obtain these bits from
286 either rnat or unat or from memory. */
287 -1, -1, -1, -1, -1, -1, -1, -1,
288 -1, -1, -1, -1, -1, -1, -1, -1,
289 -1, -1, -1, -1, -1, -1, -1, -1,
290 -1, -1, -1, -1, -1, -1, -1, -1,
291 -1, -1, -1, -1, -1, -1, -1, -1,
292 -1, -1, -1, -1, -1, -1, -1, -1,
293 -1, -1, -1, -1, -1, -1, -1, -1,
294 -1, -1, -1, -1, -1, -1, -1, -1,
295 -1, -1, -1, -1, -1, -1, -1, -1,
296 -1, -1, -1, -1, -1, -1, -1, -1,
297 -1, -1, -1, -1, -1, -1, -1, -1,
298 -1, -1, -1, -1, -1, -1, -1, -1,
299 -1, -1, -1, -1, -1, -1, -1, -1,
300 -1, -1, -1, -1, -1, -1, -1, -1,
301 -1, -1, -1, -1, -1, -1, -1, -1,
302 -1, -1, -1, -1, -1, -1, -1, -1,
306 register_addr (int regno
, CORE_ADDR blockend
)
310 if (regno
< 0 || regno
>= NUM_REGS
)
311 error (_("Invalid register number %d."), regno
);
313 if (u_offsets
[regno
] == -1)
316 addr
= (CORE_ADDR
) u_offsets
[regno
];
321 int ia64_cannot_fetch_register (regno
)
324 return regno
< 0 || regno
>= NUM_REGS
|| u_offsets
[regno
] == -1;
327 int ia64_cannot_store_register (regno
)
330 /* Rationale behind not permitting stores to bspstore...
332 The IA-64 architecture provides bspstore and bsp which refer
333 memory locations in the RSE's backing store. bspstore is the
334 next location which will be written when the RSE needs to write
335 to memory. bsp is the address at which r32 in the current frame
336 would be found if it were written to the backing store.
338 The IA-64 architecture provides read-only access to bsp and
339 read/write access to bspstore (but only when the RSE is in
340 the enforced lazy mode). It should be noted that stores
341 to bspstore also affect the value of bsp. Changing bspstore
342 does not affect the number of dirty entries between bspstore
343 and bsp, so changing bspstore by N words will also cause bsp
344 to be changed by (roughly) N as well. (It could be N-1 or N+1
345 depending upon where the NaT collection bits fall.)
347 OTOH, the Linux kernel provides read/write access to bsp (and
348 currently read/write access to bspstore as well). But it
349 is definitely the case that if you change one, the other
350 will change at the same time. It is more useful to gdb to
351 be able to change bsp. So in order to prevent strange and
352 undesirable things from happening when a dummy stack frame
353 is popped (after calling an inferior function), we allow
354 bspstore to be read, but not written. (Note that popping
355 a (generic) dummy stack frame causes all registers that
356 were previously read from the inferior process to be written
359 return regno
< 0 || regno
>= NUM_REGS
|| u_offsets
[regno
] == -1
360 || regno
== IA64_BSPSTORE_REGNUM
;
364 supply_gregset (gregset_t
*gregsetp
)
367 greg_t
*regp
= (greg_t
*) gregsetp
;
369 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
371 regcache_raw_supply (current_regcache
, regi
,
372 (char *) (regp
+ (regi
- IA64_GR0_REGNUM
)));
375 /* FIXME: NAT collection bits are at index 32; gotta deal with these
378 regcache_raw_supply (current_regcache
, IA64_PR_REGNUM
, (char *) (regp
+ 33));
380 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
382 regcache_raw_supply (current_regcache
, regi
,
383 (char *) (regp
+ 34 + (regi
- IA64_BR0_REGNUM
)));
386 regcache_raw_supply (current_regcache
, IA64_IP_REGNUM
,
387 (char *) (regp
+ 42));
388 regcache_raw_supply (current_regcache
, IA64_CFM_REGNUM
,
389 (char *) (regp
+ 43));
390 regcache_raw_supply (current_regcache
, IA64_PSR_REGNUM
,
391 (char *) (regp
+ 44));
392 regcache_raw_supply (current_regcache
, IA64_RSC_REGNUM
,
393 (char *) (regp
+ 45));
394 regcache_raw_supply (current_regcache
, IA64_BSP_REGNUM
,
395 (char *) (regp
+ 46));
396 regcache_raw_supply (current_regcache
, IA64_BSPSTORE_REGNUM
,
397 (char *) (regp
+ 47));
398 regcache_raw_supply (current_regcache
, IA64_RNAT_REGNUM
,
399 (char *) (regp
+ 48));
400 regcache_raw_supply (current_regcache
, IA64_CCV_REGNUM
,
401 (char *) (regp
+ 49));
402 regcache_raw_supply (current_regcache
, IA64_UNAT_REGNUM
,
403 (char *) (regp
+ 50));
404 regcache_raw_supply (current_regcache
, IA64_FPSR_REGNUM
,
405 (char *) (regp
+ 51));
406 regcache_raw_supply (current_regcache
, IA64_PFS_REGNUM
,
407 (char *) (regp
+ 52));
408 regcache_raw_supply (current_regcache
, IA64_LC_REGNUM
,
409 (char *) (regp
+ 53));
410 regcache_raw_supply (current_regcache
, IA64_EC_REGNUM
,
411 (char *) (regp
+ 54));
415 fill_gregset (gregset_t
*gregsetp
, int regno
)
418 greg_t
*regp
= (greg_t
*) gregsetp
;
420 #define COPY_REG(_idx_,_regi_) \
421 if ((regno == -1) || regno == _regi_) \
422 regcache_raw_collect (current_regcache, _regi_, regp + _idx_)
424 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
426 COPY_REG (regi
- IA64_GR0_REGNUM
, regi
);
429 /* FIXME: NAT collection bits at index 32? */
431 COPY_REG (33, IA64_PR_REGNUM
);
433 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
435 COPY_REG (34 + (regi
- IA64_BR0_REGNUM
), regi
);
438 COPY_REG (42, IA64_IP_REGNUM
);
439 COPY_REG (43, IA64_CFM_REGNUM
);
440 COPY_REG (44, IA64_PSR_REGNUM
);
441 COPY_REG (45, IA64_RSC_REGNUM
);
442 COPY_REG (46, IA64_BSP_REGNUM
);
443 COPY_REG (47, IA64_BSPSTORE_REGNUM
);
444 COPY_REG (48, IA64_RNAT_REGNUM
);
445 COPY_REG (49, IA64_CCV_REGNUM
);
446 COPY_REG (50, IA64_UNAT_REGNUM
);
447 COPY_REG (51, IA64_FPSR_REGNUM
);
448 COPY_REG (52, IA64_PFS_REGNUM
);
449 COPY_REG (53, IA64_LC_REGNUM
);
450 COPY_REG (54, IA64_EC_REGNUM
);
453 /* Given a pointer to a floating point register set in /proc format
454 (fpregset_t *), unpack the register contents and supply them as gdb's
455 idea of the current floating point register values. */
458 supply_fpregset (fpregset_t
*fpregsetp
)
463 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
465 from
= (char *) &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]);
466 regcache_raw_supply (current_regcache
, regi
, from
);
470 /* Given a pointer to a floating point register set in /proc format
471 (fpregset_t *), update the register specified by REGNO from gdb's idea
472 of the current floating point register set. If REGNO is -1, update
476 fill_fpregset (fpregset_t
*fpregsetp
, int regno
)
480 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
482 if ((regno
== -1) || (regno
== regi
))
483 regcache_raw_collect (current_regcache
, regi
,
484 &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]));
488 #define IA64_PSR_DB (1UL << 24)
489 #define IA64_PSR_DD (1UL << 39)
492 enable_watchpoints_in_psr (ptid_t ptid
)
496 psr
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
497 if (!(psr
& IA64_PSR_DB
))
499 psr
|= IA64_PSR_DB
; /* Set the db bit - this enables hardware
500 watchpoints and breakpoints. */
501 write_register_pid (IA64_PSR_REGNUM
, psr
, ptid
);
506 fetch_debug_register (ptid_t ptid
, int idx
)
515 val
= ptrace (PT_READ_U
, tid
, (PTRACE_TYPE_ARG3
) (PT_DBR
+ 8 * idx
), 0);
521 store_debug_register (ptid_t ptid
, int idx
, long val
)
529 (void) ptrace (PT_WRITE_U
, tid
, (PTRACE_TYPE_ARG3
) (PT_DBR
+ 8 * idx
), val
);
533 fetch_debug_register_pair (ptid_t ptid
, int idx
, long *dbr_addr
, long *dbr_mask
)
536 *dbr_addr
= fetch_debug_register (ptid
, 2 * idx
);
538 *dbr_mask
= fetch_debug_register (ptid
, 2 * idx
+ 1);
542 store_debug_register_pair (ptid_t ptid
, int idx
, long *dbr_addr
, long *dbr_mask
)
545 store_debug_register (ptid
, 2 * idx
, *dbr_addr
);
547 store_debug_register (ptid
, 2 * idx
+ 1, *dbr_mask
);
551 is_power_of_2 (int val
)
556 for (i
= 0; i
< 8 * sizeof (val
); i
++)
560 return onecount
<= 1;
564 ia64_linux_insert_watchpoint (ptid_t ptid
, CORE_ADDR addr
, int len
, int rw
)
567 long dbr_addr
, dbr_mask
;
568 int max_watchpoints
= 4;
570 if (len
<= 0 || !is_power_of_2 (len
))
573 for (idx
= 0; idx
< max_watchpoints
; idx
++)
575 fetch_debug_register_pair (ptid
, idx
, NULL
, &dbr_mask
);
576 if ((dbr_mask
& (0x3UL
<< 62)) == 0)
578 /* Exit loop if both r and w bits clear */
583 if (idx
== max_watchpoints
)
586 dbr_addr
= (long) addr
;
587 dbr_mask
= (~(len
- 1) & 0x00ffffffffffffffL
); /* construct mask to match */
588 dbr_mask
|= 0x0800000000000000L
; /* Only match privilege level 3 */
592 dbr_mask
|= (1L << 62); /* Set w bit */
595 dbr_mask
|= (1L << 63); /* Set r bit */
598 dbr_mask
|= (3L << 62); /* Set both r and w bits */
604 store_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
605 enable_watchpoints_in_psr (ptid
);
611 ia64_linux_remove_watchpoint (ptid_t ptid
, CORE_ADDR addr
, int len
)
614 long dbr_addr
, dbr_mask
;
615 int max_watchpoints
= 4;
617 if (len
<= 0 || !is_power_of_2 (len
))
620 for (idx
= 0; idx
< max_watchpoints
; idx
++)
622 fetch_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
623 if ((dbr_mask
& (0x3UL
<< 62)) && addr
== (CORE_ADDR
) dbr_addr
)
627 store_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
635 ia64_linux_stopped_data_address (CORE_ADDR
*addr_p
)
639 struct siginfo siginfo
;
640 ptid_t ptid
= inferior_ptid
;
647 ptrace (PTRACE_GETSIGINFO
, tid
, (PTRACE_TYPE_ARG3
) 0, &siginfo
);
649 if (errno
!= 0 || siginfo
.si_signo
!= SIGTRAP
||
650 (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
653 psr
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
654 psr
|= IA64_PSR_DD
; /* Set the dd bit - this will disable the watchpoint
655 for the next instruction */
656 write_register_pid (IA64_PSR_REGNUM
, psr
, ptid
);
658 *addr_p
= (CORE_ADDR
)siginfo
.si_addr
;
663 ia64_linux_stopped_by_watchpoint (void)
666 return ia64_linux_stopped_data_address (&addr
);
670 ia64_linux_xfer_unwind_table (struct target_ops
*ops
,
671 enum target_object object
,
673 void *readbuf
, const void *writebuf
,
674 ULONGEST offset
, LONGEST len
)
676 return syscall (__NR_getunwind
, readbuf
, len
);
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