1 /* Functions specific to running gdb native on IA-64 running
4 Copyright (C) 1999-2012 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "gdb_string.h"
27 #include "ia64-tdep.h"
28 #include "linux-nat.h"
31 #include <sys/ptrace.h>
36 #include <sys/syscall.h>
39 #include <asm/ptrace_offsets.h>
40 #include <sys/procfs.h>
42 /* Prototypes for supply_gregset etc. */
45 /* These must match the order of the register names.
47 Some sort of lookup table is needed because the offsets associated
48 with the registers are all over the board. */
50 static int u_offsets
[] =
52 /* general registers */
53 -1, /* gr0 not available; i.e, it's always zero. */
85 /* gr32 through gr127 not directly available via the ptrace interface. */
86 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
87 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
88 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
89 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
90 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
91 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
92 /* Floating point registers */
93 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0). */
220 /* Predicate registers - we don't fetch these individually. */
221 -1, -1, -1, -1, -1, -1, -1, -1,
222 -1, -1, -1, -1, -1, -1, -1, -1,
223 -1, -1, -1, -1, -1, -1, -1, -1,
224 -1, -1, -1, -1, -1, -1, -1, -1,
225 -1, -1, -1, -1, -1, -1, -1, -1,
226 -1, -1, -1, -1, -1, -1, -1, -1,
227 -1, -1, -1, -1, -1, -1, -1, -1,
228 -1, -1, -1, -1, -1, -1, -1, -1,
229 /* branch registers */
238 /* Virtual frame pointer and virtual return address pointer. */
240 /* other registers */
243 PT_CR_IPSR
, /* psr */
245 /* kernel registers not visible via ptrace interface (?) */
246 -1, -1, -1, -1, -1, -1, -1, -1,
248 -1, -1, -1, -1, -1, -1, -1, -1,
254 -1, /* Not available: FCR, IA32 floating control register. */
256 -1, /* Not available: EFLAG */
257 -1, /* Not available: CSD */
258 -1, /* Not available: SSD */
259 -1, /* Not available: CFLG */
260 -1, /* Not available: FSR */
261 -1, /* Not available: FIR */
262 -1, /* Not available: FDR */
270 -1, /* Not available: ITC */
271 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
272 -1, -1, -1, -1, -1, -1, -1, -1, -1,
275 -1, /* Not available: EC, the Epilog Count register. */
276 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
278 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
279 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
280 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
283 /* nat bits - not fetched directly; instead we obtain these bits from
284 either rnat or unat or from memory. */
285 -1, -1, -1, -1, -1, -1, -1, -1,
286 -1, -1, -1, -1, -1, -1, -1, -1,
287 -1, -1, -1, -1, -1, -1, -1, -1,
288 -1, -1, -1, -1, -1, -1, -1, -1,
289 -1, -1, -1, -1, -1, -1, -1, -1,
290 -1, -1, -1, -1, -1, -1, -1, -1,
291 -1, -1, -1, -1, -1, -1, -1, -1,
292 -1, -1, -1, -1, -1, -1, -1, -1,
293 -1, -1, -1, -1, -1, -1, -1, -1,
294 -1, -1, -1, -1, -1, -1, -1, -1,
295 -1, -1, -1, -1, -1, -1, -1, -1,
296 -1, -1, -1, -1, -1, -1, -1, -1,
297 -1, -1, -1, -1, -1, -1, -1, -1,
298 -1, -1, -1, -1, -1, -1, -1, -1,
299 -1, -1, -1, -1, -1, -1, -1, -1,
300 -1, -1, -1, -1, -1, -1, -1, -1,
304 ia64_register_addr (struct gdbarch
*gdbarch
, int regno
)
308 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
309 error (_("Invalid register number %d."), regno
);
311 if (u_offsets
[regno
] == -1)
314 addr
= (CORE_ADDR
) u_offsets
[regno
];
320 ia64_cannot_fetch_register (struct gdbarch
*gdbarch
, int regno
)
323 || regno
>= gdbarch_num_regs (gdbarch
)
324 || u_offsets
[regno
] == -1;
328 ia64_cannot_store_register (struct gdbarch
*gdbarch
, int regno
)
330 /* Rationale behind not permitting stores to bspstore...
332 The IA-64 architecture provides bspstore and bsp which refer
333 memory locations in the RSE's backing store. bspstore is the
334 next location which will be written when the RSE needs to write
335 to memory. bsp is the address at which r32 in the current frame
336 would be found if it were written to the backing store.
338 The IA-64 architecture provides read-only access to bsp and
339 read/write access to bspstore (but only when the RSE is in
340 the enforced lazy mode). It should be noted that stores
341 to bspstore also affect the value of bsp. Changing bspstore
342 does not affect the number of dirty entries between bspstore
343 and bsp, so changing bspstore by N words will also cause bsp
344 to be changed by (roughly) N as well. (It could be N-1 or N+1
345 depending upon where the NaT collection bits fall.)
347 OTOH, the Linux kernel provides read/write access to bsp (and
348 currently read/write access to bspstore as well). But it
349 is definitely the case that if you change one, the other
350 will change at the same time. It is more useful to gdb to
351 be able to change bsp. So in order to prevent strange and
352 undesirable things from happening when a dummy stack frame
353 is popped (after calling an inferior function), we allow
354 bspstore to be read, but not written. (Note that popping
355 a (generic) dummy stack frame causes all registers that
356 were previously read from the inferior process to be written
360 || regno
>= gdbarch_num_regs (gdbarch
)
361 || u_offsets
[regno
] == -1
362 || regno
== IA64_BSPSTORE_REGNUM
;
366 supply_gregset (struct regcache
*regcache
, const gregset_t
*gregsetp
)
369 const greg_t
*regp
= (const greg_t
*) gregsetp
;
371 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
373 regcache_raw_supply (regcache
, regi
, regp
+ (regi
- IA64_GR0_REGNUM
));
376 /* FIXME: NAT collection bits are at index 32; gotta deal with these
379 regcache_raw_supply (regcache
, IA64_PR_REGNUM
, regp
+ 33);
381 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
383 regcache_raw_supply (regcache
, regi
,
384 regp
+ 34 + (regi
- IA64_BR0_REGNUM
));
387 regcache_raw_supply (regcache
, IA64_IP_REGNUM
, regp
+ 42);
388 regcache_raw_supply (regcache
, IA64_CFM_REGNUM
, regp
+ 43);
389 regcache_raw_supply (regcache
, IA64_PSR_REGNUM
, regp
+ 44);
390 regcache_raw_supply (regcache
, IA64_RSC_REGNUM
, regp
+ 45);
391 regcache_raw_supply (regcache
, IA64_BSP_REGNUM
, regp
+ 46);
392 regcache_raw_supply (regcache
, IA64_BSPSTORE_REGNUM
, regp
+ 47);
393 regcache_raw_supply (regcache
, IA64_RNAT_REGNUM
, regp
+ 48);
394 regcache_raw_supply (regcache
, IA64_CCV_REGNUM
, regp
+ 49);
395 regcache_raw_supply (regcache
, IA64_UNAT_REGNUM
, regp
+ 50);
396 regcache_raw_supply (regcache
, IA64_FPSR_REGNUM
, regp
+ 51);
397 regcache_raw_supply (regcache
, IA64_PFS_REGNUM
, regp
+ 52);
398 regcache_raw_supply (regcache
, IA64_LC_REGNUM
, regp
+ 53);
399 regcache_raw_supply (regcache
, IA64_EC_REGNUM
, regp
+ 54);
403 fill_gregset (const struct regcache
*regcache
, gregset_t
*gregsetp
, int regno
)
406 greg_t
*regp
= (greg_t
*) gregsetp
;
408 #define COPY_REG(_idx_,_regi_) \
409 if ((regno == -1) || regno == _regi_) \
410 regcache_raw_collect (regcache, _regi_, regp + _idx_)
412 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
414 COPY_REG (regi
- IA64_GR0_REGNUM
, regi
);
417 /* FIXME: NAT collection bits at index 32? */
419 COPY_REG (33, IA64_PR_REGNUM
);
421 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
423 COPY_REG (34 + (regi
- IA64_BR0_REGNUM
), regi
);
426 COPY_REG (42, IA64_IP_REGNUM
);
427 COPY_REG (43, IA64_CFM_REGNUM
);
428 COPY_REG (44, IA64_PSR_REGNUM
);
429 COPY_REG (45, IA64_RSC_REGNUM
);
430 COPY_REG (46, IA64_BSP_REGNUM
);
431 COPY_REG (47, IA64_BSPSTORE_REGNUM
);
432 COPY_REG (48, IA64_RNAT_REGNUM
);
433 COPY_REG (49, IA64_CCV_REGNUM
);
434 COPY_REG (50, IA64_UNAT_REGNUM
);
435 COPY_REG (51, IA64_FPSR_REGNUM
);
436 COPY_REG (52, IA64_PFS_REGNUM
);
437 COPY_REG (53, IA64_LC_REGNUM
);
438 COPY_REG (54, IA64_EC_REGNUM
);
441 /* Given a pointer to a floating point register set in /proc format
442 (fpregset_t *), unpack the register contents and supply them as gdb's
443 idea of the current floating point register values. */
446 supply_fpregset (struct regcache
*regcache
, const fpregset_t
*fpregsetp
)
451 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
453 from
= (const char *) &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]);
454 regcache_raw_supply (regcache
, regi
, from
);
458 /* Given a pointer to a floating point register set in /proc format
459 (fpregset_t *), update the register specified by REGNO from gdb's idea
460 of the current floating point register set. If REGNO is -1, update
464 fill_fpregset (const struct regcache
*regcache
,
465 fpregset_t
*fpregsetp
, int regno
)
469 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
471 if ((regno
== -1) || (regno
== regi
))
472 regcache_raw_collect (regcache
, regi
,
473 &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]));
477 #define IA64_PSR_DB (1UL << 24)
478 #define IA64_PSR_DD (1UL << 39)
481 enable_watchpoints_in_psr (ptid_t ptid
)
483 struct regcache
*regcache
= get_thread_regcache (ptid
);
486 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr
);
487 if (!(psr
& IA64_PSR_DB
))
489 psr
|= IA64_PSR_DB
; /* Set the db bit - this enables hardware
490 watchpoints and breakpoints. */
491 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr
);
495 static long debug_registers
[8];
498 store_debug_register (ptid_t ptid
, int idx
, long val
)
506 (void) ptrace (PT_WRITE_U
, tid
, (PTRACE_TYPE_ARG3
) (PT_DBR
+ 8 * idx
), val
);
510 store_debug_register_pair (ptid_t ptid
, int idx
, long *dbr_addr
,
514 store_debug_register (ptid
, 2 * idx
, *dbr_addr
);
516 store_debug_register (ptid
, 2 * idx
+ 1, *dbr_mask
);
520 is_power_of_2 (int val
)
525 for (i
= 0; i
< 8 * sizeof (val
); i
++)
529 return onecount
<= 1;
533 ia64_linux_insert_watchpoint (CORE_ADDR addr
, int len
, int rw
,
534 struct expression
*cond
)
538 long dbr_addr
, dbr_mask
;
539 int max_watchpoints
= 4;
541 if (len
<= 0 || !is_power_of_2 (len
))
544 for (idx
= 0; idx
< max_watchpoints
; idx
++)
546 dbr_mask
= debug_registers
[idx
* 2 + 1];
547 if ((dbr_mask
& (0x3UL
<< 62)) == 0)
549 /* Exit loop if both r and w bits clear. */
554 if (idx
== max_watchpoints
)
557 dbr_addr
= (long) addr
;
558 dbr_mask
= (~(len
- 1) & 0x00ffffffffffffffL
); /* construct mask to match */
559 dbr_mask
|= 0x0800000000000000L
; /* Only match privilege level 3 */
563 dbr_mask
|= (1L << 62); /* Set w bit */
566 dbr_mask
|= (1L << 63); /* Set r bit */
569 dbr_mask
|= (3L << 62); /* Set both r and w bits */
575 debug_registers
[2 * idx
] = dbr_addr
;
576 debug_registers
[2 * idx
+ 1] = dbr_mask
;
579 store_debug_register_pair (lp
->ptid
, idx
, &dbr_addr
, &dbr_mask
);
580 enable_watchpoints_in_psr (lp
->ptid
);
587 ia64_linux_remove_watchpoint (CORE_ADDR addr
, int len
, int type
,
588 struct expression
*cond
)
591 long dbr_addr
, dbr_mask
;
592 int max_watchpoints
= 4;
594 if (len
<= 0 || !is_power_of_2 (len
))
597 for (idx
= 0; idx
< max_watchpoints
; idx
++)
599 dbr_addr
= debug_registers
[2 * idx
];
600 dbr_mask
= debug_registers
[2 * idx
+ 1];
601 if ((dbr_mask
& (0x3UL
<< 62)) && addr
== (CORE_ADDR
) dbr_addr
)
605 debug_registers
[2 * idx
] = 0;
606 debug_registers
[2 * idx
+ 1] = 0;
611 store_debug_register_pair (lp
->ptid
, idx
, &dbr_addr
, &dbr_mask
);
620 ia64_linux_new_thread (struct lwp_info
*lp
)
625 for (i
= 0; i
< 8; i
++)
627 if (debug_registers
[i
] != 0)
629 store_debug_register (lp
->ptid
, i
, debug_registers
[i
]);
633 enable_watchpoints_in_psr (lp
->ptid
);
637 ia64_linux_stopped_data_address (struct target_ops
*ops
, CORE_ADDR
*addr_p
)
640 siginfo_t
*siginfo_p
;
641 struct regcache
*regcache
= get_current_regcache ();
643 siginfo_p
= linux_nat_get_siginfo (inferior_ptid
);
645 if (siginfo_p
->si_signo
!= SIGTRAP
646 || (siginfo_p
->si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
649 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr
);
650 psr
|= IA64_PSR_DD
; /* Set the dd bit - this will disable the watchpoint
651 for the next instruction. */
652 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr
);
654 *addr_p
= (CORE_ADDR
)siginfo_p
->si_addr
;
659 ia64_linux_stopped_by_watchpoint (void)
662 return ia64_linux_stopped_data_address (¤t_target
, &addr
);
666 ia64_linux_can_use_hw_breakpoint (int type
, int cnt
, int othertype
)
672 /* Fetch register REGNUM from the inferior. */
675 ia64_linux_fetch_register (struct regcache
*regcache
, int regnum
)
677 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
680 PTRACE_TYPE_RET
*buf
;
683 /* r0 cannot be fetched but is always zero. */
684 if (regnum
== IA64_GR0_REGNUM
)
686 const gdb_byte zero
[8] = { 0 };
688 gdb_assert (sizeof (zero
) == register_size (gdbarch
, regnum
));
689 regcache_raw_supply (regcache
, regnum
, zero
);
693 if (ia64_cannot_fetch_register (gdbarch
, regnum
))
695 regcache_raw_supply (regcache
, regnum
, NULL
);
699 /* Cater for systems like GNU/Linux, that implement threads as
700 separate processes. */
701 pid
= ptid_get_lwp (inferior_ptid
);
703 pid
= ptid_get_pid (inferior_ptid
);
705 /* This isn't really an address, but ptrace thinks of it as one. */
706 addr
= ia64_register_addr (gdbarch
, regnum
);
707 size
= register_size (gdbarch
, regnum
);
709 gdb_assert ((size
% sizeof (PTRACE_TYPE_RET
)) == 0);
712 /* Read the register contents from the inferior a chunk at a time. */
713 for (i
= 0; i
< size
/ sizeof (PTRACE_TYPE_RET
); i
++)
716 buf
[i
] = ptrace (PT_READ_U
, pid
, (PTRACE_TYPE_ARG3
)addr
, 0);
718 error (_("Couldn't read register %s (#%d): %s."),
719 gdbarch_register_name (gdbarch
, regnum
),
720 regnum
, safe_strerror (errno
));
722 addr
+= sizeof (PTRACE_TYPE_RET
);
724 regcache_raw_supply (regcache
, regnum
, buf
);
727 /* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
728 for all registers. */
731 ia64_linux_fetch_registers (struct target_ops
*ops
,
732 struct regcache
*regcache
, int regnum
)
736 regnum
< gdbarch_num_regs (get_regcache_arch (regcache
));
738 ia64_linux_fetch_register (regcache
, regnum
);
740 ia64_linux_fetch_register (regcache
, regnum
);
743 /* Store register REGNUM into the inferior. */
746 ia64_linux_store_register (const struct regcache
*regcache
, int regnum
)
748 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
751 PTRACE_TYPE_RET
*buf
;
754 if (ia64_cannot_store_register (gdbarch
, regnum
))
757 /* Cater for systems like GNU/Linux, that implement threads as
758 separate processes. */
759 pid
= ptid_get_lwp (inferior_ptid
);
761 pid
= ptid_get_pid (inferior_ptid
);
763 /* This isn't really an address, but ptrace thinks of it as one. */
764 addr
= ia64_register_addr (gdbarch
, regnum
);
765 size
= register_size (gdbarch
, regnum
);
767 gdb_assert ((size
% sizeof (PTRACE_TYPE_RET
)) == 0);
770 /* Write the register contents into the inferior a chunk at a time. */
771 regcache_raw_collect (regcache
, regnum
, buf
);
772 for (i
= 0; i
< size
/ sizeof (PTRACE_TYPE_RET
); i
++)
775 ptrace (PT_WRITE_U
, pid
, (PTRACE_TYPE_ARG3
)addr
, buf
[i
]);
777 error (_("Couldn't write register %s (#%d): %s."),
778 gdbarch_register_name (gdbarch
, regnum
),
779 regnum
, safe_strerror (errno
));
781 addr
+= sizeof (PTRACE_TYPE_RET
);
785 /* Store register REGNUM back into the inferior. If REGNUM is -1, do
786 this for all registers. */
789 ia64_linux_store_registers (struct target_ops
*ops
,
790 struct regcache
*regcache
, int regnum
)
794 regnum
< gdbarch_num_regs (get_regcache_arch (regcache
));
796 ia64_linux_store_register (regcache
, regnum
);
798 ia64_linux_store_register (regcache
, regnum
);
802 static LONGEST (*super_xfer_partial
) (struct target_ops
*, enum target_object
,
803 const char *, gdb_byte
*,
804 const gdb_byte
*, ULONGEST
, LONGEST
);
807 ia64_linux_xfer_partial (struct target_ops
*ops
,
808 enum target_object object
,
810 gdb_byte
*readbuf
, const gdb_byte
*writebuf
,
811 ULONGEST offset
, LONGEST len
)
813 if (object
== TARGET_OBJECT_UNWIND_TABLE
&& writebuf
== NULL
&& offset
== 0)
814 return syscall (__NR_getunwind
, readbuf
, len
);
816 return super_xfer_partial (ops
, object
, annex
, readbuf
, writebuf
,
820 /* For break.b instruction ia64 CPU forgets the immediate value and generates
821 SIGILL with ILL_ILLOPC instead of more common SIGTRAP with TRAP_BRKPT.
822 ia64 does not use gdbarch_decr_pc_after_break so we do not have to make any
823 difference for the signals here. */
826 ia64_linux_status_is_event (int status
)
828 return WIFSTOPPED (status
) && (WSTOPSIG (status
) == SIGTRAP
829 || WSTOPSIG (status
) == SIGILL
);
832 void _initialize_ia64_linux_nat (void);
835 _initialize_ia64_linux_nat (void)
837 struct target_ops
*t
;
839 /* Fill in the generic GNU/Linux methods. */
842 /* Override the default fetch/store register routines. */
843 t
->to_fetch_registers
= ia64_linux_fetch_registers
;
844 t
->to_store_registers
= ia64_linux_store_registers
;
846 /* Override the default to_xfer_partial. */
847 super_xfer_partial
= t
->to_xfer_partial
;
848 t
->to_xfer_partial
= ia64_linux_xfer_partial
;
850 /* Override watchpoint routines. */
852 /* The IA-64 architecture can step over a watch point (without triggering
853 it again) if the "dd" (data debug fault disable) bit in the processor
856 This PSR bit is set in ia64_linux_stopped_by_watchpoint when the
857 code there has determined that a hardware watchpoint has indeed
858 been hit. The CPU will then be able to execute one instruction
859 without triggering a watchpoint. */
861 t
->to_have_steppable_watchpoint
= 1;
862 t
->to_can_use_hw_breakpoint
= ia64_linux_can_use_hw_breakpoint
;
863 t
->to_stopped_by_watchpoint
= ia64_linux_stopped_by_watchpoint
;
864 t
->to_stopped_data_address
= ia64_linux_stopped_data_address
;
865 t
->to_insert_watchpoint
= ia64_linux_insert_watchpoint
;
866 t
->to_remove_watchpoint
= ia64_linux_remove_watchpoint
;
868 /* Register the target. */
869 linux_nat_add_target (t
);
870 linux_nat_set_new_thread (t
, ia64_linux_new_thread
);
871 linux_nat_set_status_is_event (t
, ia64_linux_status_is_event
);