1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
27 #include "floatformat.h"
29 #include "reggroups.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
35 #include "gdb_assert.h"
37 #include "elf/common.h" /* for DT_PLTGOT value */
39 #include "elf.h" /* for PT_IA64_UNWIND value */
42 #ifdef HAVE_LIBUNWIND_IA64_H
43 #include "libunwind-frame.h"
44 #include "libunwind-ia64.h"
47 /* Hook for determining the global pointer when calling functions in
48 the inferior under AIX. The initialization code in ia64-aix-nat.c
49 sets this hook to the address of a function which will find the
50 global pointer for a given address.
52 The generic code which uses the dynamic section in the inferior for
53 finding the global pointer is not of much use on AIX since the
54 values obtained from the inferior have not been relocated. */
56 CORE_ADDR (*native_find_global_pointer
) (CORE_ADDR
) = 0;
58 /* An enumeration of the different IA-64 instruction types. */
60 typedef enum instruction_type
62 A
, /* Integer ALU ; I-unit or M-unit */
63 I
, /* Non-ALU integer; I-unit */
64 M
, /* Memory ; M-unit */
65 F
, /* Floating-point ; F-unit */
66 B
, /* Branch ; B-unit */
67 L
, /* Extended (L+X) ; I-unit */
68 X
, /* Extended (L+X) ; I-unit */
69 undefined
/* undefined or reserved */
72 /* We represent IA-64 PC addresses as the value of the instruction
73 pointer or'd with some bit combination in the low nibble which
74 represents the slot number in the bundle addressed by the
75 instruction pointer. The problem is that the Linux kernel
76 multiplies its slot numbers (for exceptions) by one while the
77 disassembler multiplies its slot numbers by 6. In addition, I've
78 heard it said that the simulator uses 1 as the multiplier.
80 I've fixed the disassembler so that the bytes_per_line field will
81 be the slot multiplier. If bytes_per_line comes in as zero, it
82 is set to six (which is how it was set up initially). -- objdump
83 displays pretty disassembly dumps with this value. For our purposes,
84 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
85 never want to also display the raw bytes the way objdump does. */
87 #define SLOT_MULTIPLIER 1
89 /* Length in bytes of an instruction bundle */
93 /* FIXME: These extern declarations should go in ia64-tdep.h. */
94 extern CORE_ADDR
ia64_linux_sigcontext_register_address (CORE_ADDR
, int);
95 extern CORE_ADDR
ia64_aix_sigcontext_register_address (CORE_ADDR
, int);
96 extern unsigned long ia64_linux_getunwind_table (void *, size_t);
98 static gdbarch_init_ftype ia64_gdbarch_init
;
100 static gdbarch_register_name_ftype ia64_register_name
;
101 static gdbarch_register_type_ftype ia64_register_type
;
102 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
103 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
104 static gdbarch_extract_return_value_ftype ia64_extract_return_value
;
105 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention
;
106 static struct type
*is_float_or_hfa_type (struct type
*t
);
108 static struct type
*builtin_type_ia64_ext
;
110 #define NUM_IA64_RAW_REGS 462
112 static int sp_regnum
= IA64_GR12_REGNUM
;
113 static int fp_regnum
= IA64_VFP_REGNUM
;
114 static int lr_regnum
= IA64_VRAP_REGNUM
;
116 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
117 they may not be accessible via the ptrace register get/set interfaces. */
118 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
119 V127_REGNUM
= V32_REGNUM
+ 95,
120 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
122 /* Array of register names; There should be ia64_num_regs strings in
125 static char *ia64_register_names
[] =
126 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
127 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
128 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
129 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
130 "", "", "", "", "", "", "", "",
131 "", "", "", "", "", "", "", "",
132 "", "", "", "", "", "", "", "",
133 "", "", "", "", "", "", "", "",
134 "", "", "", "", "", "", "", "",
135 "", "", "", "", "", "", "", "",
136 "", "", "", "", "", "", "", "",
137 "", "", "", "", "", "", "", "",
138 "", "", "", "", "", "", "", "",
139 "", "", "", "", "", "", "", "",
140 "", "", "", "", "", "", "", "",
141 "", "", "", "", "", "", "", "",
143 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
144 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
145 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
146 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
147 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
148 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
149 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
150 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
151 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
152 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
153 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
154 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
155 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
156 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
157 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
158 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
164 "", "", "", "", "", "", "", "",
165 "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "",
169 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
173 "pr", "ip", "psr", "cfm",
175 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
176 "", "", "", "", "", "", "", "",
177 "rsc", "bsp", "bspstore", "rnat",
179 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
180 "ccv", "", "", "", "unat", "", "", "",
181 "fpsr", "", "", "", "itc",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "", "", "",
190 "", "", "", "", "", "", "", "", "", "",
192 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
193 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
194 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
195 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
196 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
197 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
198 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
199 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
200 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
201 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
202 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
203 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
204 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
205 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
206 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
207 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
211 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
212 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
213 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
214 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
215 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
216 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
217 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
218 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
219 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
220 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
221 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
222 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
224 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
225 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
226 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
227 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
228 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
229 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
230 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
231 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
234 struct ia64_frame_cache
236 CORE_ADDR base
; /* frame pointer base for frame */
237 CORE_ADDR pc
; /* function start pc for frame */
238 CORE_ADDR saved_sp
; /* stack pointer for frame */
239 CORE_ADDR bsp
; /* points at r32 for the current frame */
240 CORE_ADDR cfm
; /* cfm value for current frame */
241 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
243 int sof
; /* Size of frame (decoded from cfm value) */
244 int sol
; /* Size of locals (decoded from cfm value) */
245 int sor
; /* Number of rotating registers. (decoded from cfm value) */
246 CORE_ADDR after_prologue
;
247 /* Address of first instruction after the last
248 prologue instruction; Note that there may
249 be instructions from the function's body
250 intermingled with the prologue. */
251 int mem_stack_frame_size
;
252 /* Size of the memory stack frame (may be zero),
253 or -1 if it has not been determined yet. */
254 int fp_reg
; /* Register number (if any) used a frame pointer
255 for this frame. 0 if no register is being used
256 as the frame pointer. */
258 /* Saved registers. */
259 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
265 CORE_ADDR (*sigcontext_register_address
) (CORE_ADDR
, int);
266 /* OS specific function which, given a frame address
267 and register number, returns the offset to the
268 given register from the start of the frame. */
269 CORE_ADDR (*find_global_pointer
) (CORE_ADDR
);
272 #define SIGCONTEXT_REGISTER_ADDRESS \
273 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
274 #define FIND_GLOBAL_POINTER \
275 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
278 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
279 struct reggroup
*group
)
284 if (group
== all_reggroup
)
286 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
287 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
288 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
289 if (group
== float_reggroup
)
291 if (group
== vector_reggroup
)
293 if (group
== general_reggroup
)
294 return (!vector_p
&& !float_p
);
295 if (group
== save_reggroup
|| group
== restore_reggroup
)
301 ia64_register_name (int reg
)
303 return ia64_register_names
[reg
];
307 ia64_register_type (struct gdbarch
*arch
, int reg
)
309 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
310 return builtin_type_ia64_ext
;
312 return builtin_type_long
;
316 ia64_dwarf_reg_to_regnum (int reg
)
318 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
319 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
324 floatformat_valid (const struct floatformat
*fmt
, const char *from
)
329 const struct floatformat floatformat_ia64_ext
=
331 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
332 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
336 /* Extract ``len'' bits from an instruction bundle starting at
340 extract_bit_field (char *bundle
, int from
, int len
)
342 long long result
= 0LL;
344 int from_byte
= from
/ 8;
345 int to_byte
= to
/ 8;
346 unsigned char *b
= (unsigned char *) bundle
;
352 if (from_byte
== to_byte
)
353 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
354 result
= c
>> (from
% 8);
355 lshift
= 8 - (from
% 8);
357 for (i
= from_byte
+1; i
< to_byte
; i
++)
359 result
|= ((long long) b
[i
]) << lshift
;
363 if (from_byte
< to_byte
&& (to
% 8 != 0))
366 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
367 result
|= ((long long) c
) << lshift
;
373 /* Replace the specified bits in an instruction bundle */
376 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
379 int from_byte
= from
/ 8;
380 int to_byte
= to
/ 8;
381 unsigned char *b
= (unsigned char *) bundle
;
384 if (from_byte
== to_byte
)
386 unsigned char left
, right
;
388 left
= (c
>> (to
% 8)) << (to
% 8);
389 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
390 c
= (unsigned char) (val
& 0xff);
391 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
399 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
400 c
= c
| (val
<< (from
% 8));
402 val
>>= 8 - from
% 8;
404 for (i
= from_byte
+1; i
< to_byte
; i
++)
413 unsigned char cv
= (unsigned char) val
;
415 c
= c
>> (to
% 8) << (to
% 8);
416 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
422 /* Return the contents of slot N (for N = 0, 1, or 2) in
423 and instruction bundle */
426 slotN_contents (char *bundle
, int slotnum
)
428 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
431 /* Store an instruction in an instruction bundle */
434 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
436 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
439 static enum instruction_type template_encoding_table
[32][3] =
441 { M
, I
, I
}, /* 00 */
442 { M
, I
, I
}, /* 01 */
443 { M
, I
, I
}, /* 02 */
444 { M
, I
, I
}, /* 03 */
445 { M
, L
, X
}, /* 04 */
446 { M
, L
, X
}, /* 05 */
447 { undefined
, undefined
, undefined
}, /* 06 */
448 { undefined
, undefined
, undefined
}, /* 07 */
449 { M
, M
, I
}, /* 08 */
450 { M
, M
, I
}, /* 09 */
451 { M
, M
, I
}, /* 0A */
452 { M
, M
, I
}, /* 0B */
453 { M
, F
, I
}, /* 0C */
454 { M
, F
, I
}, /* 0D */
455 { M
, M
, F
}, /* 0E */
456 { M
, M
, F
}, /* 0F */
457 { M
, I
, B
}, /* 10 */
458 { M
, I
, B
}, /* 11 */
459 { M
, B
, B
}, /* 12 */
460 { M
, B
, B
}, /* 13 */
461 { undefined
, undefined
, undefined
}, /* 14 */
462 { undefined
, undefined
, undefined
}, /* 15 */
463 { B
, B
, B
}, /* 16 */
464 { B
, B
, B
}, /* 17 */
465 { M
, M
, B
}, /* 18 */
466 { M
, M
, B
}, /* 19 */
467 { undefined
, undefined
, undefined
}, /* 1A */
468 { undefined
, undefined
, undefined
}, /* 1B */
469 { M
, F
, B
}, /* 1C */
470 { M
, F
, B
}, /* 1D */
471 { undefined
, undefined
, undefined
}, /* 1E */
472 { undefined
, undefined
, undefined
}, /* 1F */
475 /* Fetch and (partially) decode an instruction at ADDR and return the
476 address of the next instruction to fetch. */
479 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
481 char bundle
[BUNDLE_LEN
];
482 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
486 /* Warn about slot numbers greater than 2. We used to generate
487 an error here on the assumption that the user entered an invalid
488 address. But, sometimes GDB itself requests an invalid address.
489 This can (easily) happen when execution stops in a function for
490 which there are no symbols. The prologue scanner will attempt to
491 find the beginning of the function - if the nearest symbol
492 happens to not be aligned on a bundle boundary (16 bytes), the
493 resulting starting address will cause GDB to think that the slot
496 So we warn about it and set the slot number to zero. It is
497 not necessarily a fatal condition, particularly if debugging
498 at the assembly language level. */
501 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
502 "Using slot 0 instead");
508 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
513 *instr
= slotN_contents (bundle
, slotnum
);
514 template = extract_bit_field (bundle
, 0, 5);
515 *it
= template_encoding_table
[(int)template][slotnum
];
517 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
520 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
525 /* There are 5 different break instructions (break.i, break.b,
526 break.m, break.f, and break.x), but they all have the same
527 encoding. (The five bit template in the low five bits of the
528 instruction bundle distinguishes one from another.)
530 The runtime architecture manual specifies that break instructions
531 used for debugging purposes must have the upper two bits of the 21
532 bit immediate set to a 0 and a 1 respectively. A breakpoint
533 instruction encodes the most significant bit of its 21 bit
534 immediate at bit 36 of the 41 bit instruction. The penultimate msb
535 is at bit 25 which leads to the pattern below.
537 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
538 it turns out that 0x80000 was used as the syscall break in the early
539 simulators. So I changed the pattern slightly to do "break.i 0x080001"
540 instead. But that didn't work either (I later found out that this
541 pattern was used by the simulator that I was using.) So I ended up
542 using the pattern seen below. */
545 #define IA64_BREAKPOINT 0x00002000040LL
547 #define IA64_BREAKPOINT 0x00003333300LL
550 ia64_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
552 char bundle
[BUNDLE_LEN
];
553 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
559 error("Can't insert breakpoint for slot numbers greater than 2.");
563 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
565 /* Check for L type instruction in 2nd slot, if present then
566 bump up the slot number to the 3rd slot */
567 template = extract_bit_field (bundle
, 0, 5);
568 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
573 instr
= slotN_contents (bundle
, slotnum
);
574 memcpy(contents_cache
, &instr
, sizeof(instr
));
575 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
577 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
583 ia64_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
585 char bundle
[BUNDLE_LEN
];
586 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
593 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
595 /* Check for L type instruction in 2nd slot, if present then
596 bump up the slot number to the 3rd slot */
597 template = extract_bit_field (bundle
, 0, 5);
598 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
603 memcpy (&instr
, contents_cache
, sizeof instr
);
604 replace_slotN_contents (bundle
, instr
, slotnum
);
606 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
611 /* We don't really want to use this, but remote.c needs to call it in order
612 to figure out if Z-packets are supported or not. Oh, well. */
613 const unsigned char *
614 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
616 static unsigned char breakpoint
[] =
617 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
618 *lenptr
= sizeof (breakpoint
);
626 ia64_read_pc (ptid_t ptid
)
628 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
629 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
630 int slot_num
= (psr_value
>> 41) & 3;
632 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
636 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
638 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
639 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
640 psr_value
&= ~(3LL << 41);
641 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
645 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
646 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
649 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
651 /* Returns the address of the slot that's NSLOTS slots away from
652 the address ADDR. NSLOTS may be positive or negative. */
654 rse_address_add(CORE_ADDR addr
, int nslots
)
657 int mandatory_nat_slots
= nslots
/ 63;
658 int direction
= nslots
< 0 ? -1 : 1;
660 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
662 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
663 new_addr
+= 8 * direction
;
665 if (IS_NaT_COLLECTION_ADDR(new_addr
))
666 new_addr
+= 8 * direction
;
672 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
673 int regnum
, void *buf
)
675 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
680 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
681 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
683 /* The bsp points at the end of the register frame so we
684 subtract the size of frame from it to get start of register frame. */
685 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
687 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
689 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
690 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
691 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
694 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
696 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
700 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
701 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
702 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
704 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
706 ULONGEST natN_val
= 0;
709 CORE_ADDR gr_addr
= 0;
710 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
711 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
713 /* The bsp points at the end of the register frame so we
714 subtract the size of frame from it to get start of register frame. */
715 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
717 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
718 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
722 /* Compute address of nat collection bits. */
723 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
724 CORE_ADDR nat_collection
;
726 /* If our nat collection address is bigger than bsp, we have to get
727 the nat collection from rnat. Otherwise, we fetch the nat
728 collection from the computed address. */
730 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
732 nat_collection
= read_memory_integer (nat_addr
, 8);
733 nat_bit
= (gr_addr
>> 3) & 0x3f;
734 natN_val
= (nat_collection
>> nat_bit
) & 1;
737 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
739 else if (regnum
== VBOF_REGNUM
)
741 /* A virtual register frame start is provided for user convenience.
742 It can be calculated as the bsp - sof (sizeof frame). */
746 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
747 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
749 /* The bsp points at the end of the register frame so we
750 subtract the size of frame from it to get beginning of frame. */
751 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
752 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
754 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
760 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
761 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
763 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
765 /* Fetch predicate register rename base from current frame
766 marker for this frame. */
767 int rrb_pr
= (cfm
>> 32) & 0x3f;
769 /* Adjust the register number to account for register rotation. */
771 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
773 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
774 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
777 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
781 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
782 int regnum
, const void *buf
)
784 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
789 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
790 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
792 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
794 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
796 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
797 write_memory (reg_addr
, (void *)buf
, 8);
800 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
802 ULONGEST unatN_val
, unat
, unatN_mask
;
803 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
804 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
805 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
808 else if (unatN_val
== 1)
810 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
812 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
817 CORE_ADDR gr_addr
= 0;
818 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
819 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
821 /* The bsp points at the end of the register frame so we
822 subtract the size of frame from it to get start of register frame. */
823 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
825 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
826 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
828 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
830 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
832 /* Compute address of nat collection bits. */
833 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
834 CORE_ADDR nat_collection
;
835 int natN_bit
= (gr_addr
>> 3) & 0x3f;
836 ULONGEST natN_mask
= (1LL << natN_bit
);
837 /* If our nat collection address is bigger than bsp, we have to get
838 the nat collection from rnat. Otherwise, we fetch the nat
839 collection from the computed address. */
842 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
844 nat_collection
|= natN_mask
;
846 nat_collection
&= ~natN_mask
;
847 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
852 nat_collection
= read_memory_integer (nat_addr
, 8);
854 nat_collection
|= natN_mask
;
856 nat_collection
&= ~natN_mask
;
857 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
858 write_memory (nat_addr
, nat_buf
, 8);
862 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
869 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
870 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
872 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
874 /* Fetch predicate register rename base from current frame
875 marker for this frame. */
876 int rrb_pr
= (cfm
>> 32) & 0x3f;
878 /* Adjust the register number to account for register rotation. */
880 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
882 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
883 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
886 else if (prN_val
== 1)
888 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
892 /* The ia64 needs to convert between various ieee floating-point formats
893 and the special ia64 floating point register format. */
896 ia64_convert_register_p (int regno
, struct type
*type
)
898 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
902 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
903 struct type
*valtype
, void *out
)
905 char in
[MAX_REGISTER_SIZE
];
906 frame_register_read (frame
, regnum
, in
);
907 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
911 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
912 struct type
*valtype
, const void *in
)
914 char out
[MAX_REGISTER_SIZE
];
915 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
916 put_frame_register (frame
, regnum
, out
);
920 /* Limit the number of skipped non-prologue instructions since examining
921 of the prologue is expensive. */
922 static int max_skip_non_prologue_insns
= 40;
924 /* Given PC representing the starting address of a function, and
925 LIM_PC which is the (sloppy) limit to which to scan when looking
926 for a prologue, attempt to further refine this limit by using
927 the line data in the symbol table. If successful, a better guess
928 on where the prologue ends is returned, otherwise the previous
929 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
930 which will be set to indicate whether the returned limit may be
931 used with no further scanning in the event that the function is
935 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
937 struct symtab_and_line prologue_sal
;
938 CORE_ADDR start_pc
= pc
;
940 /* Start off not trusting the limit. */
943 prologue_sal
= find_pc_line (pc
, 0);
944 if (prologue_sal
.line
!= 0)
947 CORE_ADDR addr
= prologue_sal
.end
;
949 /* Handle the case in which compiler's optimizer/scheduler
950 has moved instructions into the prologue. We scan ahead
951 in the function looking for address ranges whose corresponding
952 line number is less than or equal to the first one that we
953 found for the function. (It can be less than when the
954 scheduler puts a body instruction before the first prologue
956 for (i
= 2 * max_skip_non_prologue_insns
;
957 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
960 struct symtab_and_line sal
;
962 sal
= find_pc_line (addr
, 0);
965 if (sal
.line
<= prologue_sal
.line
966 && sal
.symtab
== prologue_sal
.symtab
)
973 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
975 lim_pc
= prologue_sal
.end
;
976 if (start_pc
== get_pc_function_start (lim_pc
))
983 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
984 || (8 <= (_regnum_) && (_regnum_) <= 11) \
985 || (14 <= (_regnum_) && (_regnum_) <= 31))
986 #define imm9(_instr_) \
987 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
988 | (((_instr_) & 0x00008000000LL) >> 20) \
989 | (((_instr_) & 0x00000001fc0LL) >> 6))
991 /* Allocate and initialize a frame cache. */
993 static struct ia64_frame_cache
*
994 ia64_alloc_frame_cache (void)
996 struct ia64_frame_cache
*cache
;
999 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1005 cache
->prev_cfm
= 0;
1011 cache
->frameless
= 1;
1013 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1014 cache
->saved_regs
[i
] = 0;
1020 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1023 CORE_ADDR last_prologue_pc
= pc
;
1024 instruction_type it
;
1029 int unat_save_reg
= 0;
1030 int pr_save_reg
= 0;
1031 int mem_stack_frame_size
= 0;
1033 CORE_ADDR spill_addr
= 0;
1036 char reg_contents
[256];
1042 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1044 memset (instores
, 0, sizeof instores
);
1045 memset (infpstores
, 0, sizeof infpstores
);
1046 memset (reg_contents
, 0, sizeof reg_contents
);
1048 if (cache
->after_prologue
!= 0
1049 && cache
->after_prologue
<= lim_pc
)
1050 return cache
->after_prologue
;
1052 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1053 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1055 /* We want to check if we have a recognizable function start before we
1056 look ahead for a prologue. */
1057 if (pc
< lim_pc
&& next_pc
1058 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1060 /* alloc - start of a regular function. */
1061 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1062 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1063 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1064 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1066 /* Verify that the current cfm matches what we think is the
1067 function start. If we have somehow jumped within a function,
1068 we do not want to interpret the prologue and calculate the
1069 addresses of various registers such as the return address.
1070 We will instead treat the frame as frameless. */
1072 (sof
== (cache
->cfm
& 0x7f) &&
1073 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1077 last_prologue_pc
= next_pc
;
1082 /* Look for a leaf routine. */
1083 if (pc
< lim_pc
&& next_pc
1084 && (it
== I
|| it
== M
)
1085 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1087 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1088 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1089 | ((instr
& 0x001f8000000LL
) >> 20)
1090 | ((instr
& 0x000000fe000LL
) >> 13));
1091 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1092 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1093 int qp
= (int) (instr
& 0x0000000003fLL
);
1094 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1096 /* mov r2, r12 - beginning of leaf routine */
1098 last_prologue_pc
= next_pc
;
1102 /* If we don't recognize a regular function or leaf routine, we are
1108 last_prologue_pc
= lim_pc
;
1112 /* Loop, looking for prologue instructions, keeping track of
1113 where preserved registers were spilled. */
1116 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1120 if (it
== B
&& ((instr
& 0x1e1f800003f) != 0x04000000000))
1122 /* Exit loop upon hitting a non-nop branch instruction. */
1127 else if (((instr
& 0x3fLL
) != 0LL) &&
1128 (frameless
|| ret_reg
!= 0))
1130 /* Exit loop upon hitting a predicated instruction if
1131 we already have the return register or if we are frameless. */
1136 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1139 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1140 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1141 int qp
= (int) (instr
& 0x0000000003f);
1143 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1146 last_prologue_pc
= next_pc
;
1149 else if ((it
== I
|| it
== M
)
1150 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1152 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1153 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1154 | ((instr
& 0x001f8000000LL
) >> 20)
1155 | ((instr
& 0x000000fe000LL
) >> 13));
1156 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1157 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1158 int qp
= (int) (instr
& 0x0000000003fLL
);
1160 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1164 last_prologue_pc
= next_pc
;
1166 else if (qp
== 0 && rN
== 12 && rM
== 12)
1168 /* adds r12, -mem_stack_frame_size, r12 */
1169 mem_stack_frame_size
-= imm
;
1170 last_prologue_pc
= next_pc
;
1172 else if (qp
== 0 && rN
== 2
1173 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1175 char buf
[MAX_REGISTER_SIZE
];
1176 CORE_ADDR saved_sp
= 0;
1177 /* adds r2, spilloffset, rFramePointer
1179 adds r2, spilloffset, r12
1181 Get ready for stf.spill or st8.spill instructions.
1182 The address to start spilling at is loaded into r2.
1183 FIXME: Why r2? That's what gcc currently uses; it
1184 could well be different for other compilers. */
1186 /* Hmm... whether or not this will work will depend on
1187 where the pc is. If it's still early in the prologue
1188 this'll be wrong. FIXME */
1191 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1192 saved_sp
= extract_unsigned_integer (buf
, 8);
1194 spill_addr
= saved_sp
1195 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1198 last_prologue_pc
= next_pc
;
1200 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1201 rN
< 256 && imm
== 0)
1203 /* mov rN, rM where rM is an input register */
1204 reg_contents
[rN
] = rM
;
1205 last_prologue_pc
= next_pc
;
1207 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1211 last_prologue_pc
= next_pc
;
1216 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1217 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1219 /* stf.spill [rN] = fM, imm9
1221 stf.spill [rN] = fM */
1223 int imm
= imm9(instr
);
1224 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1225 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1226 int qp
= (int) (instr
& 0x0000000003fLL
);
1227 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1228 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1230 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1232 if ((instr
& 0x1efc0000000) == 0x0eec0000000)
1235 spill_addr
= 0; /* last one; must be done */
1236 last_prologue_pc
= next_pc
;
1239 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1240 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1246 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1247 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1248 int qp
= (int) (instr
& 0x0000000003fLL
);
1249 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1251 /* We have something like "mov.m r3 = ar.unat". Remember the
1252 r3 (or whatever) and watch for a store of this register... */
1254 last_prologue_pc
= next_pc
;
1257 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1260 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1261 int qp
= (int) (instr
& 0x0000000003fLL
);
1262 if (qp
== 0 && isScratch (rN
))
1265 last_prologue_pc
= next_pc
;
1269 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1270 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1274 st8 [rN] = rM, imm9 */
1275 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1276 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1277 int qp
= (int) (instr
& 0x0000000003fLL
);
1278 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1279 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1280 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1282 /* We've found a spill of either the UNAT register or the PR
1283 register. (Well, not exactly; what we've actually found is
1284 a spill of the register that UNAT or PR was moved to).
1285 Record that fact and move on... */
1286 if (rM
== unat_save_reg
)
1288 /* Track UNAT register */
1289 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1294 /* Track PR register */
1295 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1298 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1299 /* st8 [rN] = rM, imm9 */
1300 spill_addr
+= imm9(instr
);
1302 spill_addr
= 0; /* must be done spilling */
1303 last_prologue_pc
= next_pc
;
1305 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1307 /* Allow up to one store of each input register. */
1308 instores
[rM
-32] = 1;
1309 last_prologue_pc
= next_pc
;
1311 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1312 !instores
[indirect
-32])
1314 /* Allow an indirect store of an input register. */
1315 instores
[indirect
-32] = 1;
1316 last_prologue_pc
= next_pc
;
1319 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1326 Note that the st8 case is handled in the clause above.
1328 Advance over stores of input registers. One store per input
1329 register is permitted. */
1330 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1331 int qp
= (int) (instr
& 0x0000000003fLL
);
1332 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1333 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1335 instores
[rM
-32] = 1;
1336 last_prologue_pc
= next_pc
;
1338 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1339 !instores
[indirect
-32])
1341 /* Allow an indirect store of an input register. */
1342 instores
[indirect
-32] = 1;
1343 last_prologue_pc
= next_pc
;
1346 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1353 Advance over stores of floating point input registers. Again
1354 one store per register is permitted */
1355 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1356 int qp
= (int) (instr
& 0x0000000003fLL
);
1357 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1359 infpstores
[fM
-8] = 1;
1360 last_prologue_pc
= next_pc
;
1364 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1365 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1367 /* st8.spill [rN] = rM
1369 st8.spill [rN] = rM, imm9 */
1370 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1371 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1372 int qp
= (int) (instr
& 0x0000000003fLL
);
1373 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1375 /* We've found a spill of one of the preserved general purpose
1376 regs. Record the spill address and advance the spill
1377 register if appropriate. */
1378 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1379 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1380 /* st8.spill [rN] = rM, imm9 */
1381 spill_addr
+= imm9(instr
);
1383 spill_addr
= 0; /* Done spilling */
1384 last_prologue_pc
= next_pc
;
1391 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1392 registers for the previous frame which will be needed later. */
1394 if (!frameless
&& next_frame
)
1396 /* Extract the size of the rotating portion of the stack
1397 frame and the register rename base from the current
1403 rrb_gr
= (cfm
>> 18) & 0x7f;
1405 /* Find the bof (beginning of frame). */
1406 bof
= rse_address_add (cache
->bsp
, -sof
);
1408 for (i
= 0, addr
= bof
;
1412 if (IS_NaT_COLLECTION_ADDR (addr
))
1416 if (i
+32 == cfm_reg
)
1417 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1418 if (i
+32 == ret_reg
)
1419 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1421 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1424 /* For the previous argument registers we require the previous bof.
1425 If we can't find the previous cfm, then we can do nothing. */
1427 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1429 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1431 else if (cfm_reg
!= 0)
1433 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1434 cfm
= extract_unsigned_integer (buf
, 8);
1436 cache
->prev_cfm
= cfm
;
1440 sor
= ((cfm
>> 14) & 0xf) * 8;
1442 sol
= (cfm
>> 7) & 0x7f;
1443 rrb_gr
= (cfm
>> 18) & 0x7f;
1445 /* The previous bof only requires subtraction of the sol (size of locals)
1446 due to the overlap between output and input of subsequent frames. */
1447 bof
= rse_address_add (bof
, -sol
);
1449 for (i
= 0, addr
= bof
;
1453 if (IS_NaT_COLLECTION_ADDR (addr
))
1458 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1461 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1467 /* Try and trust the lim_pc value whenever possible. */
1468 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1469 last_prologue_pc
= lim_pc
;
1471 cache
->frameless
= frameless
;
1472 cache
->after_prologue
= last_prologue_pc
;
1473 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1474 cache
->fp_reg
= fp_reg
;
1476 return last_prologue_pc
;
1480 ia64_skip_prologue (CORE_ADDR pc
)
1482 struct ia64_frame_cache cache
;
1484 cache
.after_prologue
= 0;
1488 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1489 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1493 /* Normal frames. */
1495 static struct ia64_frame_cache
*
1496 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1498 struct ia64_frame_cache
*cache
;
1500 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1506 cache
= ia64_alloc_frame_cache ();
1507 *this_cache
= cache
;
1509 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1510 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1512 /* We always want the bsp to point to the end of frame.
1513 This way, we can always get the beginning of frame (bof)
1514 by subtracting frame size. */
1515 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1516 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1518 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1519 psr
= extract_unsigned_integer (buf
, 8);
1521 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1522 cfm
= extract_unsigned_integer (buf
, 8);
1524 cache
->sof
= (cfm
& 0x7f);
1525 cache
->sol
= (cfm
>> 7) & 0x7f;
1526 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1530 cache
->pc
= frame_func_unwind (next_frame
);
1533 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1535 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1541 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1542 struct frame_id
*this_id
)
1544 struct ia64_frame_cache
*cache
=
1545 ia64_frame_cache (next_frame
, this_cache
);
1547 /* This marks the outermost frame. */
1548 if (cache
->base
== 0)
1551 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1552 if (gdbarch_debug
>= 1)
1553 fprintf_unfiltered (gdb_stdlog
,
1554 "regular frame id: code %lx, stack %lx, special %lx, next_frame %p\n",
1555 this_id
->code_addr
, this_id
->stack_addr
, cache
->bsp
, next_frame
);
1559 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1560 int regnum
, int *optimizedp
,
1561 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1562 int *realnump
, void *valuep
)
1564 struct ia64_frame_cache
*cache
=
1565 ia64_frame_cache (next_frame
, this_cache
);
1566 char dummy_valp
[MAX_REGISTER_SIZE
];
1569 gdb_assert (regnum
>= 0);
1571 if (!target_has_registers
)
1572 error ("No registers.");
1579 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1580 when valuep is not supplied. */
1582 valuep
= dummy_valp
;
1584 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1586 if (regnum
== SP_REGNUM
)
1588 /* Handle SP values for all frames but the topmost. */
1589 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1592 else if (regnum
== IA64_BSP_REGNUM
)
1594 char cfm_valuep
[MAX_REGISTER_SIZE
];
1597 enum lval_type cfm_lval
;
1599 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1601 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1602 This corresponds to what the hardware bsp register will be if we pop the frame
1603 back which is why we might have been called. We know the beginning of the current
1604 frame is cache->bsp - cache->sof. This value in the previous frame points to
1605 the start of the output registers. We can calculate the end of that frame by adding
1606 the size of output (sof (size of frame) - sol (size of locals)). */
1607 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1608 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1609 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1611 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1612 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1614 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1617 else if (regnum
== IA64_CFM_REGNUM
)
1619 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1623 *lvalp
= lval_memory
;
1625 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1627 else if (cache
->prev_cfm
)
1628 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1629 else if (cache
->frameless
)
1632 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1635 else if (regnum
== IA64_VFP_REGNUM
)
1637 /* If the function in question uses an automatic register (r32-r127)
1638 for the frame pointer, it'll be found by ia64_find_saved_register()
1639 above. If the function lacks one of these frame pointers, we can
1640 still provide a value since we know the size of the frame. */
1641 CORE_ADDR vfp
= cache
->base
;
1642 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1644 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1646 char pr_valuep
[MAX_REGISTER_SIZE
];
1649 enum lval_type pr_lval
;
1652 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1653 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1654 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1656 /* Fetch predicate register rename base from current frame
1657 marker for this frame. */
1658 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1660 /* Adjust the register number to account for register rotation. */
1661 regnum
= VP16_REGNUM
1662 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1664 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1665 regnum
- VP0_REGNUM
, 1);
1666 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1668 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1670 char unat_valuep
[MAX_REGISTER_SIZE
];
1673 enum lval_type unat_lval
;
1674 CORE_ADDR unat_addr
;
1676 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1677 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1678 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1679 regnum
- IA64_NAT0_REGNUM
, 1);
1680 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1683 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1686 /* Find address of general register corresponding to nat bit we're
1690 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1694 /* Compute address of nat collection bits. */
1695 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1697 CORE_ADDR nat_collection
;
1699 /* If our nat collection address is bigger than bsp, we have to get
1700 the nat collection from rnat. Otherwise, we fetch the nat
1701 collection from the computed address. */
1702 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1703 bsp
= extract_unsigned_integer (buf
, 8);
1704 if (nat_addr
>= bsp
)
1706 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1707 nat_collection
= extract_unsigned_integer (buf
, 8);
1710 nat_collection
= read_memory_integer (nat_addr
, 8);
1711 nat_bit
= (gr_addr
>> 3) & 0x3f;
1712 natval
= (nat_collection
>> nat_bit
) & 1;
1715 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1717 else if (regnum
== IA64_IP_REGNUM
)
1720 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1724 *lvalp
= lval_memory
;
1726 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1727 pc
= extract_unsigned_integer (buf
, 8);
1729 else if (cache
->frameless
)
1731 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1732 pc
= extract_unsigned_integer (buf
, 8);
1735 store_unsigned_integer (valuep
, 8, pc
);
1737 else if (regnum
== IA64_PSR_REGNUM
)
1739 /* We don't know how to get the complete previous PSR, but we need it for
1740 the slot information when we unwind the pc (pc is formed of IP register
1741 plus slot information from PSR). To get the previous slot information,
1742 we mask it off the return address. */
1743 ULONGEST slot_num
= 0;
1746 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1748 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1749 psr
= extract_unsigned_integer (buf
, 8);
1753 *lvalp
= lval_memory
;
1755 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1756 pc
= extract_unsigned_integer (buf
, 8);
1758 else if (cache
->frameless
)
1761 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1762 pc
= extract_unsigned_integer (buf
, 8);
1764 psr
&= ~(3LL << 41);
1765 slot_num
= pc
& 0x3LL
;
1766 psr
|= (CORE_ADDR
)slot_num
<< 41;
1767 store_unsigned_integer (valuep
, 8, psr
);
1769 else if (regnum
== IA64_BR0_REGNUM
)
1772 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1775 *lvalp
= lval_memory
;
1777 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1778 br0
= extract_unsigned_integer (buf
, 8);
1780 store_unsigned_integer (valuep
, 8, br0
);
1782 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1783 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1786 if (regnum
>= V32_REGNUM
)
1787 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1788 addr
= cache
->saved_regs
[regnum
];
1791 *lvalp
= lval_memory
;
1793 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1795 else if (cache
->frameless
)
1797 char r_valuep
[MAX_REGISTER_SIZE
];
1800 enum lval_type r_lval
;
1802 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1804 if (regnum
>= V32_REGNUM
)
1805 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1806 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1807 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1808 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1809 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1810 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1811 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1812 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1814 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1815 *lvalp
= lval_memory
;
1817 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1823 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1825 /* Fetch floating point register rename base from current
1826 frame marker for this frame. */
1827 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1829 /* Adjust the floating point register number to account for
1830 register rotation. */
1831 regnum
= IA64_FR32_REGNUM
1832 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1835 /* If we have stored a memory address, access the register. */
1836 addr
= cache
->saved_regs
[regnum
];
1839 *lvalp
= lval_memory
;
1841 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1843 /* Otherwise, punt and get the current value of the register. */
1845 frame_unwind_register (next_frame
, regnum
, valuep
);
1848 if (gdbarch_debug
>= 1)
1849 fprintf_unfiltered (gdb_stdlog
,
1850 "regular prev register <%d> <%s> is %lx\n", regnum
,
1851 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1852 ? ia64_register_names
[regnum
] : "r??"), extract_unsigned_integer (valuep
, 8));
1855 static const struct frame_unwind ia64_frame_unwind
=
1858 &ia64_frame_this_id
,
1859 &ia64_frame_prev_register
1862 static const struct frame_unwind
*
1863 ia64_frame_sniffer (struct frame_info
*next_frame
)
1865 return &ia64_frame_unwind
;
1868 /* Signal trampolines. */
1871 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1873 if (SIGCONTEXT_REGISTER_ADDRESS
)
1877 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1878 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1879 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1880 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1881 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1882 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1883 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1884 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1885 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1886 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1887 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1888 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1889 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1890 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1891 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1892 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1893 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1894 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1895 cache
->saved_regs
[IA64_LC_REGNUM
] =
1896 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1897 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1898 cache
->saved_regs
[regno
] =
1899 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1900 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1901 cache
->saved_regs
[regno
] =
1902 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1903 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1904 cache
->saved_regs
[regno
] =
1905 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1909 static struct ia64_frame_cache
*
1910 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1912 struct ia64_frame_cache
*cache
;
1920 cache
= ia64_alloc_frame_cache ();
1922 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1923 /* Note that frame size is hard-coded below. We cannot calculate it
1924 via prologue examination. */
1925 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1927 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1928 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1930 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1931 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1932 cache
->sof
= cache
->cfm
& 0x7f;
1934 ia64_sigtramp_frame_init_saved_regs (cache
);
1936 *this_cache
= cache
;
1941 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1942 void **this_cache
, struct frame_id
*this_id
)
1944 struct ia64_frame_cache
*cache
=
1945 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1947 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1948 if (gdbarch_debug
>= 1)
1949 fprintf_unfiltered (gdb_stdlog
,
1950 "sigtramp frame id: code %lx, stack %lx, special %lx, next_frame %p\n",
1951 this_id
->code_addr
, this_id
->stack_addr
, cache
->bsp
, next_frame
);
1955 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1957 int regnum
, int *optimizedp
,
1958 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1959 int *realnump
, void *valuep
)
1961 char dummy_valp
[MAX_REGISTER_SIZE
];
1962 char buf
[MAX_REGISTER_SIZE
];
1964 struct ia64_frame_cache
*cache
=
1965 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1967 gdb_assert (regnum
>= 0);
1969 if (!target_has_registers
)
1970 error ("No registers.");
1977 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1978 when valuep is not supplied. */
1980 valuep
= dummy_valp
;
1982 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1984 if (regnum
== IA64_IP_REGNUM
)
1987 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1991 *lvalp
= lval_memory
;
1993 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1994 pc
= extract_unsigned_integer (buf
, 8);
1997 store_unsigned_integer (valuep
, 8, pc
);
1999 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2000 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2003 if (regnum
>= V32_REGNUM
)
2004 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2005 addr
= cache
->saved_regs
[regnum
];
2008 *lvalp
= lval_memory
;
2010 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2015 /* All other registers not listed above. */
2016 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2019 *lvalp
= lval_memory
;
2021 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2025 if (gdbarch_debug
>= 1)
2026 fprintf_unfiltered (gdb_stdlog
,
2027 "sigtramp prev register <%s> is %lx\n",
2028 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2029 ? ia64_register_names
[regnum
] : "r??"), extract_unsigned_integer (valuep
, 8));
2032 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2035 ia64_sigtramp_frame_this_id
,
2036 ia64_sigtramp_frame_prev_register
2039 static const struct frame_unwind
*
2040 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2043 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2045 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2046 if (PC_IN_SIGTRAMP (pc
, name
))
2047 return &ia64_sigtramp_frame_unwind
;
2054 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2056 struct ia64_frame_cache
*cache
=
2057 ia64_frame_cache (next_frame
, this_cache
);
2062 static const struct frame_base ia64_frame_base
=
2065 ia64_frame_base_address
,
2066 ia64_frame_base_address
,
2067 ia64_frame_base_address
2070 #ifdef HAVE_LIBUNWIND_IA64_H
2072 struct ia64_unwind_table_entry
2074 unw_word_t start_offset
;
2075 unw_word_t end_offset
;
2076 unw_word_t info_offset
;
2079 static __inline__
uint64_t
2080 ia64_rse_slot_num (uint64_t addr
)
2082 return (addr
>> 3) & 0x3f;
2085 /* Skip over a designated number of registers in the backing
2086 store, remembering every 64th position is for NAT. */
2087 static __inline__
uint64_t
2088 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2090 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2094 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2097 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2098 number to a libunwind register number. */
2100 ia64_gdb2uw_regnum (int regnum
)
2102 if (regnum
== sp_regnum
)
2104 else if (regnum
== IA64_BSP_REGNUM
)
2105 return UNW_IA64_BSP
;
2106 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2107 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2108 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2109 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2110 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2111 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2112 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2114 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2115 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2116 else if (regnum
== IA64_PR_REGNUM
)
2118 else if (regnum
== IA64_IP_REGNUM
)
2120 else if (regnum
== IA64_CFM_REGNUM
)
2121 return UNW_IA64_CFM
;
2122 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2123 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2124 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2125 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2130 /* Gdb libunwind-frame callback function to convert from a libunwind register
2131 number to a ia64 gdb register number. */
2133 ia64_uw2gdb_regnum (int uw_regnum
)
2135 if (uw_regnum
== UNW_IA64_SP
)
2137 else if (uw_regnum
== UNW_IA64_BSP
)
2138 return IA64_BSP_REGNUM
;
2139 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2140 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2141 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2142 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2143 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2144 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2145 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2146 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2147 else if (uw_regnum
== UNW_IA64_PR
)
2148 return IA64_PR_REGNUM
;
2149 else if (uw_regnum
== UNW_REG_IP
)
2150 return IA64_IP_REGNUM
;
2151 else if (uw_regnum
== UNW_IA64_CFM
)
2152 return IA64_CFM_REGNUM
;
2153 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2154 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2155 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2156 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2161 /* Gdb libunwind-frame callback function to reveal if register is a float
2164 ia64_is_fpreg (int uw_regnum
)
2166 return unw_is_fpreg (uw_regnum
);
2169 /* Libunwind callback accessor function for general registers. */
2171 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2172 int write
, void *arg
)
2174 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2175 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2176 struct frame_info
*next_frame
= arg
;
2177 long new_sof
, old_sof
;
2178 char buf
[MAX_REGISTER_SIZE
];
2183 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2189 ia64_write_pc (*val
, inferior_ptid
);
2192 case UNW_IA64_AR_BSPSTORE
:
2193 write_register (IA64_BSP_REGNUM
, *val
);
2196 case UNW_IA64_AR_BSP
:
2198 /* Account for the fact that ptrace() expects bsp to point
2199 after the current register frame. */
2200 cfm
= read_register (IA64_CFM_REGNUM
);
2202 bsp
= ia64_rse_skip_regs (*val
, sof
);
2203 write_register (IA64_BSP_REGNUM
, bsp
);
2207 /* If we change CFM, we need to adjust ptrace's notion of
2208 bsp accordingly, so that the real bsp remains
2210 bsp
= read_register (IA64_BSP_REGNUM
);
2211 cfm
= read_register (IA64_CFM_REGNUM
);
2212 old_sof
= (cfm
& 0x7f);
2213 new_sof
= (*val
& 0x7f);
2214 if (old_sof
!= new_sof
)
2216 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2217 write_register (IA64_BSP_REGNUM
, bsp
);
2219 write_register (IA64_CFM_REGNUM
, *val
);
2223 write_register (regnum
, *val
);
2226 if (gdbarch_debug
>= 1)
2227 fprintf_unfiltered (gdb_stdlog
,
2228 " access_reg: to cache: %4s=%016lx\n",
2229 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2230 ? ia64_register_names
[regnum
] : "r??"), *val
);
2237 /* Libunwind expects to see the pc value which means the slot number
2238 from the psr must be merged with the ip word address. */
2239 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2240 ip
= extract_unsigned_integer (buf
, 8);
2241 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2242 psr
= extract_unsigned_integer (buf
, 8);
2243 *val
= ip
| ((psr
>> 41) & 0x3);
2246 case UNW_IA64_AR_BSP
:
2247 /* Libunwind expects to see the beginning of the current register
2248 frame so we must account for the fact that ptrace() will return a value
2249 for bsp that points *after* the current register frame. */
2250 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2251 bsp
= extract_unsigned_integer (buf
, 8);
2252 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2253 cfm
= extract_unsigned_integer (buf
, 8);
2255 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2258 case UNW_IA64_AR_BSPSTORE
:
2259 /* Libunwind wants bspstore to be after the current register frame.
2260 This is what ptrace() and gdb treats as the regular bsp value. */
2261 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2262 *val
= extract_unsigned_integer (buf
, 8);
2266 /* For all other registers, just unwind the value directly. */
2267 frame_unwind_register (next_frame
, regnum
, buf
);
2268 *val
= extract_unsigned_integer (buf
, 8);
2272 if (gdbarch_debug
>= 1)
2273 fprintf_unfiltered (gdb_stdlog
,
2274 " access_reg: from cache: %4s=%016lx\n",
2275 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2276 ? ia64_register_names
[regnum
] : "r??"), *val
);
2281 /* Libunwind callback accessor function for floating-point registers. */
2283 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2284 int write
, void *arg
)
2286 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2289 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2291 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2295 /* Libunwind callback accessor function for accessing memory. */
2297 ia64_access_mem (unw_addr_space_t as
,
2298 unw_word_t addr
, unw_word_t
*val
,
2299 int write
, void *arg
)
2301 /* XXX do we need to normalize byte-order here? */
2303 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2305 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2308 /* Call low-level function to access the kernel unwind table. */
2310 getunwind_table (void *buf
, size_t len
)
2313 x
= target_read_partial (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
, NULL
,
2319 /* Get the kernel unwind table. */
2321 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2324 struct ia64_table_entry
2326 uint64_t start_offset
;
2327 uint64_t end_offset
;
2328 uint64_t info_offset
;
2330 static struct ia64_table_entry
*ktab
= NULL
, *etab
;
2334 size
= getunwind_table (NULL
, 0);
2336 return -UNW_ENOINFO
;
2337 ktab
= xmalloc (size
);
2338 getunwind_table (ktab
, size
);
2340 /* Determine length of kernel's unwind table and relocate
2342 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2343 etab
->info_offset
+= (uint64_t) ktab
;
2346 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2347 return -UNW_ENOINFO
;
2349 di
->format
= UNW_INFO_FORMAT_TABLE
;
2351 di
->start_ip
= ktab
[0].start_offset
;
2352 di
->end_ip
= etab
[-1].end_offset
;
2353 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2354 di
->u
.ti
.segbase
= 0;
2355 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2356 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2358 if (gdbarch_debug
>= 1)
2359 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2360 "segbase=%lx, length=%lu, gp=%lx\n",
2361 (char *) di
->u
.ti
.name_ptr
, di
->u
.ti
.segbase
,
2362 di
->u
.ti
.table_len
, di
->gp
);
2366 /* Find the unwind table entry for a specified address. */
2368 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2369 unw_dyn_info_t
*dip
, void **buf
)
2371 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2372 Elf_Internal_Ehdr
*ehdr
;
2373 unw_word_t segbase
= 0;
2374 CORE_ADDR load_base
;
2378 bfd
= objfile
->obfd
;
2380 ehdr
= elf_tdata (bfd
)->elf_header
;
2381 phdr
= elf_tdata (bfd
)->phdr
;
2383 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2385 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2387 switch (phdr
[i
].p_type
)
2390 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2395 case PT_IA_64_UNWIND
:
2396 p_unwind
= phdr
+ i
;
2404 if (!p_text
|| !p_unwind
2405 /* Verify that the segment that contains the IP also contains
2406 the static unwind table. If not, we are dealing with
2407 runtime-generated code, for which we have no info here. */
2408 || (p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2409 return -UNW_ENOINFO
;
2411 segbase
= p_text
->p_vaddr
+ load_base
;
2413 dip
->start_ip
= segbase
;
2414 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2415 dip
->gp
= FIND_GLOBAL_POINTER (ip
);
2416 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2417 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2418 dip
->u
.rti
.segbase
= segbase
;
2419 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2420 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2425 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2427 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2428 int need_unwind_info
, void *arg
)
2430 struct obj_section
*sec
= find_pc_section (ip
);
2437 /* XXX This only works if the host and the target architecture are
2438 both ia64 and if the have (more or less) the same kernel
2440 if (get_kernel_table (ip
, &di
) < 0)
2441 return -UNW_ENOINFO
;
2443 if (gdbarch_debug
>= 1)
2444 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %lx -> "
2445 "(name=`%s',segbase=%lx,start=%lx,end=%lx,gp=%lx,"
2446 "length=%lu,data=%p)\n",
2447 ip
, (char *)di
.u
.ti
.name_ptr
,
2448 di
.u
.ti
.segbase
, di
.start_ip
, di
.end_ip
,
2449 di
.gp
, di
.u
.ti
.table_len
, di
.u
.ti
.table_data
);
2453 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2457 if (gdbarch_debug
>= 1)
2458 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %lx -> "
2459 "(name=`%s',segbase=%lx,start=%lx,end=%lx,gp=%lx,"
2460 "length=%lu,data=%lx)\n",
2461 ip
, (char *)di
.u
.rti
.name_ptr
,
2462 di
.u
.rti
.segbase
, di
.start_ip
, di
.end_ip
,
2463 di
.gp
, di
.u
.rti
.table_len
, di
.u
.rti
.table_data
);
2466 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2469 /* We no longer need the dyn info storage so free it. */
2475 /* Libunwind callback accessor function for cleanup. */
2477 ia64_put_unwind_info (unw_addr_space_t as
,
2478 unw_proc_info_t
*pip
, void *arg
)
2480 /* Nothing required for now. */
2483 /* Libunwind callback accessor function to get head of the dynamic
2484 unwind-info registration list. */
2486 ia64_get_dyn_info_list (unw_addr_space_t as
,
2487 unw_word_t
*dilap
, void *arg
)
2489 struct obj_section
*text_sec
;
2490 struct objfile
*objfile
;
2491 unw_word_t ip
, addr
;
2495 if (!libunwind_is_initialized ())
2496 return -UNW_ENOINFO
;
2498 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2502 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2503 ip
= text_sec
->addr
;
2504 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2507 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2508 /* We no longer need the dyn info storage so free it. */
2513 if (gdbarch_debug
>= 1)
2514 fprintf_unfiltered (gdb_stdlog
,
2515 "dynamic unwind table in objfile %s "
2516 "at %lx (gp=%lx)\n",
2517 bfd_get_filename (objfile
->obfd
),
2524 return -UNW_ENOINFO
;
2528 /* Frame interface functions for libunwind. */
2531 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2532 struct frame_id
*this_id
)
2538 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2540 /* We must add the bsp as the special address for frame comparison purposes. */
2541 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2542 bsp
= extract_unsigned_integer (buf
, 8);
2544 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2546 if (gdbarch_debug
>= 1)
2547 fprintf_unfiltered (gdb_stdlog
,
2548 "libunwind frame id: code %lx, stack %lx, special %lx, next_frame %p\n",
2549 id
.code_addr
, id
.stack_addr
, bsp
, next_frame
);
2553 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2555 int regnum
, int *optimizedp
,
2556 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2557 int *realnump
, void *valuep
)
2561 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2562 reg
= IA64_PR_REGNUM
;
2563 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2564 reg
= IA64_UNAT_REGNUM
;
2566 /* Let libunwind do most of the work. */
2567 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2568 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2570 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2574 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2578 unsigned char buf
[MAX_REGISTER_SIZE
];
2580 /* Fetch predicate register rename base from current frame
2581 marker for this frame. */
2582 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2583 cfm
= extract_unsigned_integer (buf
, 8);
2584 rrb_pr
= (cfm
>> 32) & 0x3f;
2586 /* Adjust the register number to account for register rotation. */
2587 regnum
= VP16_REGNUM
2588 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2590 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2591 regnum
- VP0_REGNUM
, 1);
2592 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2594 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2598 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2599 regnum
- IA64_NAT0_REGNUM
, 1);
2600 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2603 else if (regnum
== IA64_BSP_REGNUM
)
2605 char cfm_valuep
[MAX_REGISTER_SIZE
];
2608 enum lval_type cfm_lval
;
2610 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2612 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2613 This corresponds to what the hardware bsp register will be if we pop the frame
2614 back which is why we might have been called. We know that libunwind will pass us back
2615 the beginning of the current frame so we should just add sof to it. */
2616 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2617 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2618 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2619 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2620 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2622 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2626 if (gdbarch_debug
>= 1)
2627 fprintf_unfiltered (gdb_stdlog
,
2628 "libunwind prev register <%s> is %lx\n",
2629 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2630 ? ia64_register_names
[regnum
] : "r??"), extract_unsigned_integer (valuep
, 8));
2633 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2636 ia64_libunwind_frame_this_id
,
2637 ia64_libunwind_frame_prev_register
2640 static const struct frame_unwind
*
2641 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2643 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2644 return &ia64_libunwind_frame_unwind
;
2649 /* Set of libunwind callback acccessor functions. */
2650 static unw_accessors_t ia64_unw_accessors
=
2652 ia64_find_proc_info_x
,
2653 ia64_put_unwind_info
,
2654 ia64_get_dyn_info_list
,
2662 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2663 static struct libunwind_descr ia64_libunwind_descr
=
2668 &ia64_unw_accessors
,
2671 #endif /* HAVE_LIBUNWIND_IA64_H */
2673 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2674 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2675 is the type (which is known to be struct, union or array). */
2677 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2679 struct type
*float_elt_type
;
2681 /* HFAs are structures (or arrays) consisting entirely of floating
2682 point values of the same length. Up to 8 of these are returned
2683 in registers. Don't use the struct convention when this is the
2685 float_elt_type
= is_float_or_hfa_type (type
);
2686 if (float_elt_type
!= NULL
2687 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2690 /* Other structs of length 32 or less are returned in r8-r11.
2691 Don't use the struct convention for those either. */
2692 return TYPE_LENGTH (type
) > 32;
2696 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
, void *valbuf
)
2698 struct type
*float_elt_type
;
2700 float_elt_type
= is_float_or_hfa_type (type
);
2701 if (float_elt_type
!= NULL
)
2703 char from
[MAX_REGISTER_SIZE
];
2705 int regnum
= IA64_FR8_REGNUM
;
2706 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2710 regcache_cooked_read (regcache
, regnum
, from
);
2711 convert_typed_floating (from
, builtin_type_ia64_ext
,
2712 (char *)valbuf
+ offset
, float_elt_type
);
2713 offset
+= TYPE_LENGTH (float_elt_type
);
2721 int regnum
= IA64_GR8_REGNUM
;
2722 int reglen
= TYPE_LENGTH (ia64_register_type (NULL
, IA64_GR8_REGNUM
));
2723 int n
= TYPE_LENGTH (type
) / reglen
;
2724 int m
= TYPE_LENGTH (type
) % reglen
;
2729 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2730 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
2737 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2738 memcpy ((char *)valbuf
+ offset
, &val
, m
);
2744 ia64_extract_struct_value_address (struct regcache
*regcache
)
2746 error ("ia64_extract_struct_value_address called and cannot get struct value address");
2752 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
2754 switch (TYPE_CODE (t
))
2758 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
2765 case TYPE_CODE_ARRAY
:
2767 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
2770 case TYPE_CODE_STRUCT
:
2774 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
2775 if (!is_float_or_hfa_type_recurse
2776 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
2787 /* Determine if the given type is one of the floating point types or
2788 and HFA (which is a struct, array, or combination thereof whose
2789 bottom-most elements are all of the same floating point type). */
2791 static struct type
*
2792 is_float_or_hfa_type (struct type
*t
)
2794 struct type
*et
= 0;
2796 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
2800 /* Return 1 if the alignment of T is such that the next even slot
2801 should be used. Return 0, if the next available slot should
2802 be used. (See section 8.5.1 of the IA-64 Software Conventions
2803 and Runtime manual). */
2806 slot_alignment_is_next_even (struct type
*t
)
2808 switch (TYPE_CODE (t
))
2812 if (TYPE_LENGTH (t
) > 8)
2816 case TYPE_CODE_ARRAY
:
2818 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
2819 case TYPE_CODE_STRUCT
:
2823 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
2824 if (slot_alignment_is_next_even
2825 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
2834 /* Attempt to find (and return) the global pointer for the given
2837 This is a rather nasty bit of code searchs for the .dynamic section
2838 in the objfile corresponding to the pc of the function we're trying
2839 to call. Once it finds the addresses at which the .dynamic section
2840 lives in the child process, it scans the Elf64_Dyn entries for a
2841 DT_PLTGOT tag. If it finds one of these, the corresponding
2842 d_un.d_ptr value is the global pointer. */
2845 generic_elf_find_global_pointer (CORE_ADDR faddr
)
2847 struct obj_section
*faddr_sect
;
2849 faddr_sect
= find_pc_section (faddr
);
2850 if (faddr_sect
!= NULL
)
2852 struct obj_section
*osect
;
2854 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
2856 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
2860 if (osect
< faddr_sect
->objfile
->sections_end
)
2865 while (addr
< osect
->endaddr
)
2871 status
= target_read_memory (addr
, buf
, sizeof (buf
));
2874 tag
= extract_signed_integer (buf
, sizeof (buf
));
2876 if (tag
== DT_PLTGOT
)
2878 CORE_ADDR global_pointer
;
2880 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
2883 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
2886 return global_pointer
;
2899 /* Given a function's address, attempt to find (and return) the
2900 corresponding (canonical) function descriptor. Return 0 if
2903 find_extant_func_descr (CORE_ADDR faddr
)
2905 struct obj_section
*faddr_sect
;
2907 /* Return early if faddr is already a function descriptor. */
2908 faddr_sect
= find_pc_section (faddr
);
2909 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
2912 if (faddr_sect
!= NULL
)
2914 struct obj_section
*osect
;
2915 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
2917 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
2921 if (osect
< faddr_sect
->objfile
->sections_end
)
2926 while (addr
< osect
->endaddr
)
2932 status
= target_read_memory (addr
, buf
, sizeof (buf
));
2935 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
2937 if (faddr
== faddr2
)
2947 /* Attempt to find a function descriptor corresponding to the
2948 given address. If none is found, construct one on the
2949 stack using the address at fdaptr. */
2952 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
2956 fdesc
= find_extant_func_descr (faddr
);
2960 CORE_ADDR global_pointer
;
2966 global_pointer
= FIND_GLOBAL_POINTER (faddr
);
2968 if (global_pointer
== 0)
2969 global_pointer
= read_register (IA64_GR1_REGNUM
);
2971 store_unsigned_integer (buf
, 8, faddr
);
2972 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
2974 write_memory (fdesc
, buf
, 16);
2980 /* Use the following routine when printing out function pointers
2981 so the user can see the function address rather than just the
2982 function descriptor. */
2984 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
2985 struct target_ops
*targ
)
2987 struct obj_section
*s
;
2989 s
= find_pc_section (addr
);
2991 /* check if ADDR points to a function descriptor. */
2992 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
2993 return read_memory_unsigned_integer (addr
, 8);
2999 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3005 ia64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
3006 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3007 int nargs
, struct value
**args
, CORE_ADDR sp
,
3008 int struct_return
, CORE_ADDR struct_addr
)
3014 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3016 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3020 /* Count the number of slots needed for the arguments. */
3021 for (argno
= 0; argno
< nargs
; argno
++)
3024 type
= check_typedef (VALUE_TYPE (arg
));
3025 len
= TYPE_LENGTH (type
);
3027 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3030 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3033 nslots
+= (len
+ 7) / 8;
3036 /* Divvy up the slots between the RSE and the memory stack. */
3037 rseslots
= (nslots
> 8) ? 8 : nslots
;
3038 memslots
= nslots
- rseslots
;
3040 /* Allocate a new RSE frame. */
3041 cfm
= read_register (IA64_CFM_REGNUM
);
3043 bsp
= read_register (IA64_BSP_REGNUM
);
3044 new_bsp
= rse_address_add (bsp
, rseslots
);
3045 write_register (IA64_BSP_REGNUM
, new_bsp
);
3047 pfs
= read_register (IA64_PFS_REGNUM
);
3048 pfs
&= 0xc000000000000000LL
;
3049 pfs
|= (cfm
& 0xffffffffffffLL
);
3050 write_register (IA64_PFS_REGNUM
, pfs
);
3052 cfm
&= 0xc000000000000000LL
;
3054 write_register (IA64_CFM_REGNUM
, cfm
);
3056 /* We will attempt to find function descriptors in the .opd segment,
3057 but if we can't we'll construct them ourselves. That being the
3058 case, we'll need to reserve space on the stack for them. */
3059 funcdescaddr
= sp
- nfuncargs
* 16;
3060 funcdescaddr
&= ~0xfLL
;
3062 /* Adjust the stack pointer to it's new value. The calling conventions
3063 require us to have 16 bytes of scratch, plus whatever space is
3064 necessary for the memory slots and our function descriptors. */
3065 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3066 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3068 /* Place the arguments where they belong. The arguments will be
3069 either placed in the RSE backing store or on the memory stack.
3070 In addition, floating point arguments or HFAs are placed in
3071 floating point registers. */
3073 floatreg
= IA64_FR8_REGNUM
;
3074 for (argno
= 0; argno
< nargs
; argno
++)
3076 struct type
*float_elt_type
;
3079 type
= check_typedef (VALUE_TYPE (arg
));
3080 len
= TYPE_LENGTH (type
);
3082 /* Special handling for function parameters. */
3084 && TYPE_CODE (type
) == TYPE_CODE_PTR
3085 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3089 store_unsigned_integer (val_buf
, 8,
3090 find_func_descr (extract_unsigned_integer (VALUE_CONTENTS (arg
), 8),
3092 if (slotnum
< rseslots
)
3093 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3095 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3102 /* Skip odd slot if necessary... */
3103 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3111 memset (val_buf
, 0, 8);
3112 memcpy (val_buf
, VALUE_CONTENTS (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3114 if (slotnum
< rseslots
)
3115 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3117 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3124 /* Handle floating point types (including HFAs). */
3125 float_elt_type
= is_float_or_hfa_type (type
);
3126 if (float_elt_type
!= NULL
)
3129 len
= TYPE_LENGTH (type
);
3130 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3132 char to
[MAX_REGISTER_SIZE
];
3133 convert_typed_floating (VALUE_CONTENTS (arg
) + argoffset
, float_elt_type
,
3134 to
, builtin_type_ia64_ext
);
3135 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3137 argoffset
+= TYPE_LENGTH (float_elt_type
);
3138 len
-= TYPE_LENGTH (float_elt_type
);
3143 /* Store the struct return value in r8 if necessary. */
3146 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3149 global_pointer
= FIND_GLOBAL_POINTER (func_addr
);
3151 if (global_pointer
!= 0)
3152 write_register (IA64_GR1_REGNUM
, global_pointer
);
3154 write_register (IA64_BR0_REGNUM
, bp_addr
);
3156 write_register (sp_regnum
, sp
);
3161 static struct frame_id
3162 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3167 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3168 sp
= extract_unsigned_integer (buf
, 8);
3170 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3171 bsp
= extract_unsigned_integer (buf
, 8);
3173 if (gdbarch_debug
>= 1)
3174 fprintf_unfiltered (gdb_stdlog
,
3175 "dummy frame id: code %lx, stack %lx, special %lx\n",
3176 frame_pc_unwind (next_frame
), sp
, bsp
);
3178 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3182 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3185 CORE_ADDR ip
, psr
, pc
;
3187 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3188 ip
= extract_unsigned_integer (buf
, 8);
3189 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3190 psr
= extract_unsigned_integer (buf
, 8);
3192 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3197 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
, const void *valbuf
)
3199 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3201 char to
[MAX_REGISTER_SIZE
];
3202 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3203 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3204 target_store_registers (IA64_FR8_REGNUM
);
3207 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3211 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3212 struct regcache
*regcache
,
3213 CORE_ADDR memaddr
, int nr_bytes
,
3214 CORE_ADDR
*targ_addr
, int *targ_len
)
3216 *targ_addr
= memaddr
;
3217 *targ_len
= nr_bytes
;
3221 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3223 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3224 return print_insn_ia64 (memaddr
, info
);
3227 static struct gdbarch
*
3228 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3230 struct gdbarch
*gdbarch
;
3231 struct gdbarch_tdep
*tdep
;
3233 /* If there is already a candidate, use it. */
3234 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3236 return arches
->gdbarch
;
3238 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3239 gdbarch
= gdbarch_alloc (&info
, tdep
);
3241 /* Set the method of obtaining the sigcontext addresses at which
3242 registers are saved. The method of checking to see if
3243 native_find_global_pointer is nonzero to indicate that we're
3244 on AIX is kind of hokey, but I can't think of a better way
3246 if (info
.osabi
== GDB_OSABI_LINUX
)
3247 tdep
->sigcontext_register_address
= ia64_linux_sigcontext_register_address
;
3248 else if (native_find_global_pointer
!= 0)
3249 tdep
->sigcontext_register_address
= ia64_aix_sigcontext_register_address
;
3251 tdep
->sigcontext_register_address
= 0;
3253 /* We know that GNU/Linux won't have to resort to the
3254 native_find_global_pointer hackery. But that's the only one we
3255 know about so far, so if native_find_global_pointer is set to
3256 something non-zero, then use it. Otherwise fall back to using
3257 generic_elf_find_global_pointer. This arrangement should (in
3258 theory) allow us to cross debug GNU/Linux binaries from an AIX
3260 if (info
.osabi
== GDB_OSABI_LINUX
)
3261 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
3262 else if (native_find_global_pointer
!= 0)
3263 tdep
->find_global_pointer
= native_find_global_pointer
;
3265 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
3267 /* Define the ia64 floating-point format to gdb. */
3268 builtin_type_ia64_ext
=
3269 init_type (TYPE_CODE_FLT
, 128 / 8,
3270 0, "builtin_type_ia64_ext", NULL
);
3271 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = &floatformat_ia64_ext
;
3273 /* According to the ia64 specs, instructions that store long double
3274 floats in memory use a long-double format different than that
3275 used in the floating registers. The memory format matches the
3276 x86 extended float format which is 80 bits. An OS may choose to
3277 use this format (e.g. GNU/Linux) or choose to use a different
3278 format for storing long doubles (e.g. HPUX). In the latter case,
3279 the setting of the format may be moved/overridden in an
3280 OS-specific tdep file. */
3281 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
3283 set_gdbarch_short_bit (gdbarch
, 16);
3284 set_gdbarch_int_bit (gdbarch
, 32);
3285 set_gdbarch_long_bit (gdbarch
, 64);
3286 set_gdbarch_long_long_bit (gdbarch
, 64);
3287 set_gdbarch_float_bit (gdbarch
, 32);
3288 set_gdbarch_double_bit (gdbarch
, 64);
3289 set_gdbarch_long_double_bit (gdbarch
, 128);
3290 set_gdbarch_ptr_bit (gdbarch
, 64);
3292 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3293 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3294 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3295 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3297 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3298 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3299 gets a number of extra failures. */
3300 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3301 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3303 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3304 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3305 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3306 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3307 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3308 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3309 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3311 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3313 set_gdbarch_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3314 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3316 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3317 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3319 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3320 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3321 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3322 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3323 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3325 /* Settings for calling functions in the inferior. */
3326 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3327 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3328 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3330 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3331 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3332 #ifdef HAVE_LIBUNWIND_IA64_H
3333 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3334 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3336 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3337 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3339 /* Settings that should be unnecessary. */
3340 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3342 set_gdbarch_frame_args_skip (gdbarch
, 0);
3344 set_gdbarch_remote_translate_xfer_address (
3345 gdbarch
, ia64_remote_translate_xfer_address
);
3347 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3348 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3353 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3356 _initialize_ia64_tdep (void)
3358 register_gdbarch_init (bfd_arch_ia64
, ia64_gdbarch_init
);