1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
26 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
38 #include "elf.h" /* for PT_IA64_UNWIND value */
41 #ifdef HAVE_LIBUNWIND_IA64_H
42 #include "libunwind-frame.h"
43 #include "libunwind-ia64.h"
46 /* Hook for determining the global pointer when calling functions in
47 the inferior under AIX. The initialization code in ia64-aix-nat.c
48 sets this hook to the address of a function which will find the
49 global pointer for a given address.
51 The generic code which uses the dynamic section in the inferior for
52 finding the global pointer is not of much use on AIX since the
53 values obtained from the inferior have not been relocated. */
55 CORE_ADDR (*native_find_global_pointer
) (CORE_ADDR
) = 0;
57 /* An enumeration of the different IA-64 instruction types. */
59 typedef enum instruction_type
61 A
, /* Integer ALU ; I-unit or M-unit */
62 I
, /* Non-ALU integer; I-unit */
63 M
, /* Memory ; M-unit */
64 F
, /* Floating-point ; F-unit */
65 B
, /* Branch ; B-unit */
66 L
, /* Extended (L+X) ; I-unit */
67 X
, /* Extended (L+X) ; I-unit */
68 undefined
/* undefined or reserved */
71 /* We represent IA-64 PC addresses as the value of the instruction
72 pointer or'd with some bit combination in the low nibble which
73 represents the slot number in the bundle addressed by the
74 instruction pointer. The problem is that the Linux kernel
75 multiplies its slot numbers (for exceptions) by one while the
76 disassembler multiplies its slot numbers by 6. In addition, I've
77 heard it said that the simulator uses 1 as the multiplier.
79 I've fixed the disassembler so that the bytes_per_line field will
80 be the slot multiplier. If bytes_per_line comes in as zero, it
81 is set to six (which is how it was set up initially). -- objdump
82 displays pretty disassembly dumps with this value. For our purposes,
83 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
84 never want to also display the raw bytes the way objdump does. */
86 #define SLOT_MULTIPLIER 1
88 /* Length in bytes of an instruction bundle */
92 /* FIXME: These extern declarations should go in ia64-tdep.h. */
93 extern CORE_ADDR
ia64_linux_sigcontext_register_address (CORE_ADDR
, int);
94 extern CORE_ADDR
ia64_aix_sigcontext_register_address (CORE_ADDR
, int);
95 extern unsigned long ia64_linux_getunwind_table (void *, size_t);
97 static gdbarch_init_ftype ia64_gdbarch_init
;
99 static gdbarch_register_name_ftype ia64_register_name
;
100 static gdbarch_register_type_ftype ia64_register_type
;
101 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
102 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
103 static gdbarch_extract_return_value_ftype ia64_extract_return_value
;
104 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention
;
105 static struct type
*is_float_or_hfa_type (struct type
*t
);
107 static struct type
*builtin_type_ia64_ext
;
109 #define NUM_IA64_RAW_REGS 462
111 static int sp_regnum
= IA64_GR12_REGNUM
;
112 static int fp_regnum
= IA64_VFP_REGNUM
;
113 static int lr_regnum
= IA64_VRAP_REGNUM
;
115 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
116 they may not be accessible via the ptrace register get/set interfaces. */
117 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
118 V127_REGNUM
= V32_REGNUM
+ 95,
119 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
121 /* Array of register names; There should be ia64_num_regs strings in
124 static char *ia64_register_names
[] =
125 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
126 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
127 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
128 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
129 "", "", "", "", "", "", "", "",
130 "", "", "", "", "", "", "", "",
131 "", "", "", "", "", "", "", "",
132 "", "", "", "", "", "", "", "",
133 "", "", "", "", "", "", "", "",
134 "", "", "", "", "", "", "", "",
135 "", "", "", "", "", "", "", "",
136 "", "", "", "", "", "", "", "",
137 "", "", "", "", "", "", "", "",
138 "", "", "", "", "", "", "", "",
139 "", "", "", "", "", "", "", "",
140 "", "", "", "", "", "", "", "",
142 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
143 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
144 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
145 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
146 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
147 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
148 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
149 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
150 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
151 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
152 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
153 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
154 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
155 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
156 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
157 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
164 "", "", "", "", "", "", "", "",
165 "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "",
168 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
172 "pr", "ip", "psr", "cfm",
174 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
175 "", "", "", "", "", "", "", "",
176 "rsc", "bsp", "bspstore", "rnat",
178 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
179 "ccv", "", "", "", "unat", "", "", "",
180 "fpsr", "", "", "", "itc",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "", "", "",
191 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
192 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
193 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
194 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
195 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
196 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
197 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
198 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
199 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
200 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
201 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
202 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
203 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
204 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
205 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
206 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
210 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
211 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
212 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
213 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
214 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
215 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
216 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
217 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
218 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
219 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
220 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
221 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
223 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
224 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
225 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
226 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
227 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
228 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
229 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
230 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
233 struct ia64_frame_cache
235 CORE_ADDR base
; /* frame pointer base for frame */
236 CORE_ADDR pc
; /* function start pc for frame */
237 CORE_ADDR saved_sp
; /* stack pointer for frame */
238 CORE_ADDR bsp
; /* points at r32 for the current frame */
239 CORE_ADDR cfm
; /* cfm value for current frame */
240 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
242 int sof
; /* Size of frame (decoded from cfm value) */
243 int sol
; /* Size of locals (decoded from cfm value) */
244 int sor
; /* Number of rotating registers. (decoded from cfm value) */
245 CORE_ADDR after_prologue
;
246 /* Address of first instruction after the last
247 prologue instruction; Note that there may
248 be instructions from the function's body
249 intermingled with the prologue. */
250 int mem_stack_frame_size
;
251 /* Size of the memory stack frame (may be zero),
252 or -1 if it has not been determined yet. */
253 int fp_reg
; /* Register number (if any) used a frame pointer
254 for this frame. 0 if no register is being used
255 as the frame pointer. */
257 /* Saved registers. */
258 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
264 CORE_ADDR (*sigcontext_register_address
) (CORE_ADDR
, int);
265 /* OS specific function which, given a frame address
266 and register number, returns the offset to the
267 given register from the start of the frame. */
268 CORE_ADDR (*find_global_pointer
) (CORE_ADDR
);
271 #define SIGCONTEXT_REGISTER_ADDRESS \
272 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
273 #define FIND_GLOBAL_POINTER \
274 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
277 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
278 struct reggroup
*group
)
283 if (group
== all_reggroup
)
285 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
286 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
287 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
288 if (group
== float_reggroup
)
290 if (group
== vector_reggroup
)
292 if (group
== general_reggroup
)
293 return (!vector_p
&& !float_p
);
294 if (group
== save_reggroup
|| group
== restore_reggroup
)
300 ia64_register_name (int reg
)
302 return ia64_register_names
[reg
];
306 ia64_register_type (struct gdbarch
*arch
, int reg
)
308 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
309 return builtin_type_ia64_ext
;
311 return builtin_type_long
;
315 ia64_dwarf_reg_to_regnum (int reg
)
317 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
318 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
323 floatformat_valid (const struct floatformat
*fmt
, const char *from
)
328 const struct floatformat floatformat_ia64_ext
=
330 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
331 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
335 /* Extract ``len'' bits from an instruction bundle starting at
339 extract_bit_field (char *bundle
, int from
, int len
)
341 long long result
= 0LL;
343 int from_byte
= from
/ 8;
344 int to_byte
= to
/ 8;
345 unsigned char *b
= (unsigned char *) bundle
;
351 if (from_byte
== to_byte
)
352 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
353 result
= c
>> (from
% 8);
354 lshift
= 8 - (from
% 8);
356 for (i
= from_byte
+1; i
< to_byte
; i
++)
358 result
|= ((long long) b
[i
]) << lshift
;
362 if (from_byte
< to_byte
&& (to
% 8 != 0))
365 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
366 result
|= ((long long) c
) << lshift
;
372 /* Replace the specified bits in an instruction bundle */
375 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
378 int from_byte
= from
/ 8;
379 int to_byte
= to
/ 8;
380 unsigned char *b
= (unsigned char *) bundle
;
383 if (from_byte
== to_byte
)
385 unsigned char left
, right
;
387 left
= (c
>> (to
% 8)) << (to
% 8);
388 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
389 c
= (unsigned char) (val
& 0xff);
390 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
398 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
399 c
= c
| (val
<< (from
% 8));
401 val
>>= 8 - from
% 8;
403 for (i
= from_byte
+1; i
< to_byte
; i
++)
412 unsigned char cv
= (unsigned char) val
;
414 c
= c
>> (to
% 8) << (to
% 8);
415 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
421 /* Return the contents of slot N (for N = 0, 1, or 2) in
422 and instruction bundle */
425 slotN_contents (char *bundle
, int slotnum
)
427 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
430 /* Store an instruction in an instruction bundle */
433 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
435 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
438 static enum instruction_type template_encoding_table
[32][3] =
440 { M
, I
, I
}, /* 00 */
441 { M
, I
, I
}, /* 01 */
442 { M
, I
, I
}, /* 02 */
443 { M
, I
, I
}, /* 03 */
444 { M
, L
, X
}, /* 04 */
445 { M
, L
, X
}, /* 05 */
446 { undefined
, undefined
, undefined
}, /* 06 */
447 { undefined
, undefined
, undefined
}, /* 07 */
448 { M
, M
, I
}, /* 08 */
449 { M
, M
, I
}, /* 09 */
450 { M
, M
, I
}, /* 0A */
451 { M
, M
, I
}, /* 0B */
452 { M
, F
, I
}, /* 0C */
453 { M
, F
, I
}, /* 0D */
454 { M
, M
, F
}, /* 0E */
455 { M
, M
, F
}, /* 0F */
456 { M
, I
, B
}, /* 10 */
457 { M
, I
, B
}, /* 11 */
458 { M
, B
, B
}, /* 12 */
459 { M
, B
, B
}, /* 13 */
460 { undefined
, undefined
, undefined
}, /* 14 */
461 { undefined
, undefined
, undefined
}, /* 15 */
462 { B
, B
, B
}, /* 16 */
463 { B
, B
, B
}, /* 17 */
464 { M
, M
, B
}, /* 18 */
465 { M
, M
, B
}, /* 19 */
466 { undefined
, undefined
, undefined
}, /* 1A */
467 { undefined
, undefined
, undefined
}, /* 1B */
468 { M
, F
, B
}, /* 1C */
469 { M
, F
, B
}, /* 1D */
470 { undefined
, undefined
, undefined
}, /* 1E */
471 { undefined
, undefined
, undefined
}, /* 1F */
474 /* Fetch and (partially) decode an instruction at ADDR and return the
475 address of the next instruction to fetch. */
478 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
480 char bundle
[BUNDLE_LEN
];
481 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
485 /* Warn about slot numbers greater than 2. We used to generate
486 an error here on the assumption that the user entered an invalid
487 address. But, sometimes GDB itself requests an invalid address.
488 This can (easily) happen when execution stops in a function for
489 which there are no symbols. The prologue scanner will attempt to
490 find the beginning of the function - if the nearest symbol
491 happens to not be aligned on a bundle boundary (16 bytes), the
492 resulting starting address will cause GDB to think that the slot
495 So we warn about it and set the slot number to zero. It is
496 not necessarily a fatal condition, particularly if debugging
497 at the assembly language level. */
500 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
501 "Using slot 0 instead");
507 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
512 *instr
= slotN_contents (bundle
, slotnum
);
513 template = extract_bit_field (bundle
, 0, 5);
514 *it
= template_encoding_table
[(int)template][slotnum
];
516 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
519 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
524 /* There are 5 different break instructions (break.i, break.b,
525 break.m, break.f, and break.x), but they all have the same
526 encoding. (The five bit template in the low five bits of the
527 instruction bundle distinguishes one from another.)
529 The runtime architecture manual specifies that break instructions
530 used for debugging purposes must have the upper two bits of the 21
531 bit immediate set to a 0 and a 1 respectively. A breakpoint
532 instruction encodes the most significant bit of its 21 bit
533 immediate at bit 36 of the 41 bit instruction. The penultimate msb
534 is at bit 25 which leads to the pattern below.
536 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
537 it turns out that 0x80000 was used as the syscall break in the early
538 simulators. So I changed the pattern slightly to do "break.i 0x080001"
539 instead. But that didn't work either (I later found out that this
540 pattern was used by the simulator that I was using.) So I ended up
541 using the pattern seen below. */
544 #define IA64_BREAKPOINT 0x00002000040LL
546 #define IA64_BREAKPOINT 0x00003333300LL
549 ia64_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
551 char bundle
[BUNDLE_LEN
];
552 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
558 error("Can't insert breakpoint for slot numbers greater than 2.");
562 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
564 /* Check for L type instruction in 2nd slot, if present then
565 bump up the slot number to the 3rd slot */
566 template = extract_bit_field (bundle
, 0, 5);
567 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
572 instr
= slotN_contents (bundle
, slotnum
);
573 memcpy(contents_cache
, &instr
, sizeof(instr
));
574 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
576 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
582 ia64_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
584 char bundle
[BUNDLE_LEN
];
585 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
592 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
594 /* Check for L type instruction in 2nd slot, if present then
595 bump up the slot number to the 3rd slot */
596 template = extract_bit_field (bundle
, 0, 5);
597 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
602 memcpy (&instr
, contents_cache
, sizeof instr
);
603 replace_slotN_contents (bundle
, instr
, slotnum
);
605 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
610 /* We don't really want to use this, but remote.c needs to call it in order
611 to figure out if Z-packets are supported or not. Oh, well. */
612 const unsigned char *
613 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
615 static unsigned char breakpoint
[] =
616 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
617 *lenptr
= sizeof (breakpoint
);
625 ia64_read_pc (ptid_t ptid
)
627 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
628 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
629 int slot_num
= (psr_value
>> 41) & 3;
631 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
635 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
637 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
638 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
639 psr_value
&= ~(3LL << 41);
640 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
644 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
645 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
648 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
650 /* Returns the address of the slot that's NSLOTS slots away from
651 the address ADDR. NSLOTS may be positive or negative. */
653 rse_address_add(CORE_ADDR addr
, int nslots
)
656 int mandatory_nat_slots
= nslots
/ 63;
657 int direction
= nslots
< 0 ? -1 : 1;
659 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
661 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
662 new_addr
+= 8 * direction
;
664 if (IS_NaT_COLLECTION_ADDR(new_addr
))
665 new_addr
+= 8 * direction
;
671 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
672 int regnum
, void *buf
)
674 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
679 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
680 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
682 /* The bsp points at the end of the register frame so we
683 subtract the size of frame from it to get start of register frame. */
684 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
686 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
688 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
689 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
690 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
693 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
695 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
699 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
700 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
701 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
703 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
705 ULONGEST natN_val
= 0;
708 CORE_ADDR gr_addr
= 0;
709 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
710 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
712 /* The bsp points at the end of the register frame so we
713 subtract the size of frame from it to get start of register frame. */
714 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
716 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
717 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
721 /* Compute address of nat collection bits. */
722 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
723 CORE_ADDR nat_collection
;
725 /* If our nat collection address is bigger than bsp, we have to get
726 the nat collection from rnat. Otherwise, we fetch the nat
727 collection from the computed address. */
729 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
731 nat_collection
= read_memory_integer (nat_addr
, 8);
732 nat_bit
= (gr_addr
>> 3) & 0x3f;
733 natN_val
= (nat_collection
>> nat_bit
) & 1;
736 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
738 else if (regnum
== VBOF_REGNUM
)
740 /* A virtual register frame start is provided for user convenience.
741 It can be calculated as the bsp - sof (sizeof frame). */
745 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
746 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
748 /* The bsp points at the end of the register frame so we
749 subtract the size of frame from it to get beginning of frame. */
750 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
751 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
753 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
759 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
760 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
762 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
764 /* Fetch predicate register rename base from current frame
765 marker for this frame. */
766 int rrb_pr
= (cfm
>> 32) & 0x3f;
768 /* Adjust the register number to account for register rotation. */
770 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
772 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
773 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
776 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
780 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
781 int regnum
, const void *buf
)
783 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
788 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
789 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
791 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
793 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
795 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
796 write_memory (reg_addr
, (void *)buf
, 8);
799 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
801 ULONGEST unatN_val
, unat
, unatN_mask
;
802 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
803 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
804 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
807 else if (unatN_val
== 1)
809 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
811 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
816 CORE_ADDR gr_addr
= 0;
817 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
818 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
820 /* The bsp points at the end of the register frame so we
821 subtract the size of frame from it to get start of register frame. */
822 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
824 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
825 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
827 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
829 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
831 /* Compute address of nat collection bits. */
832 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
833 CORE_ADDR nat_collection
;
834 int natN_bit
= (gr_addr
>> 3) & 0x3f;
835 ULONGEST natN_mask
= (1LL << natN_bit
);
836 /* If our nat collection address is bigger than bsp, we have to get
837 the nat collection from rnat. Otherwise, we fetch the nat
838 collection from the computed address. */
841 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
843 nat_collection
|= natN_mask
;
845 nat_collection
&= ~natN_mask
;
846 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
851 nat_collection
= read_memory_integer (nat_addr
, 8);
853 nat_collection
|= natN_mask
;
855 nat_collection
&= ~natN_mask
;
856 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
857 write_memory (nat_addr
, nat_buf
, 8);
861 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
868 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
869 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
871 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
873 /* Fetch predicate register rename base from current frame
874 marker for this frame. */
875 int rrb_pr
= (cfm
>> 32) & 0x3f;
877 /* Adjust the register number to account for register rotation. */
879 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
881 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
882 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
885 else if (prN_val
== 1)
887 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
891 /* The ia64 needs to convert between various ieee floating-point formats
892 and the special ia64 floating point register format. */
895 ia64_convert_register_p (int regno
, struct type
*type
)
897 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
901 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
902 struct type
*valtype
, void *out
)
904 char in
[MAX_REGISTER_SIZE
];
905 frame_register_read (frame
, regnum
, in
);
906 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
910 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
911 struct type
*valtype
, const void *in
)
913 char out
[MAX_REGISTER_SIZE
];
914 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
915 put_frame_register (frame
, regnum
, out
);
919 /* Limit the number of skipped non-prologue instructions since examining
920 of the prologue is expensive. */
921 static int max_skip_non_prologue_insns
= 40;
923 /* Given PC representing the starting address of a function, and
924 LIM_PC which is the (sloppy) limit to which to scan when looking
925 for a prologue, attempt to further refine this limit by using
926 the line data in the symbol table. If successful, a better guess
927 on where the prologue ends is returned, otherwise the previous
928 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
929 which will be set to indicate whether the returned limit may be
930 used with no further scanning in the event that the function is
934 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
936 struct symtab_and_line prologue_sal
;
937 CORE_ADDR start_pc
= pc
;
939 /* Start off not trusting the limit. */
942 prologue_sal
= find_pc_line (pc
, 0);
943 if (prologue_sal
.line
!= 0)
946 CORE_ADDR addr
= prologue_sal
.end
;
948 /* Handle the case in which compiler's optimizer/scheduler
949 has moved instructions into the prologue. We scan ahead
950 in the function looking for address ranges whose corresponding
951 line number is less than or equal to the first one that we
952 found for the function. (It can be less than when the
953 scheduler puts a body instruction before the first prologue
955 for (i
= 2 * max_skip_non_prologue_insns
;
956 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
959 struct symtab_and_line sal
;
961 sal
= find_pc_line (addr
, 0);
964 if (sal
.line
<= prologue_sal
.line
965 && sal
.symtab
== prologue_sal
.symtab
)
972 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
974 lim_pc
= prologue_sal
.end
;
975 if (start_pc
== get_pc_function_start (lim_pc
))
982 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
983 || (8 <= (_regnum_) && (_regnum_) <= 11) \
984 || (14 <= (_regnum_) && (_regnum_) <= 31))
985 #define imm9(_instr_) \
986 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
987 | (((_instr_) & 0x00008000000LL) >> 20) \
988 | (((_instr_) & 0x00000001fc0LL) >> 6))
990 /* Allocate and initialize a frame cache. */
992 static struct ia64_frame_cache
*
993 ia64_alloc_frame_cache (void)
995 struct ia64_frame_cache
*cache
;
998 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1004 cache
->prev_cfm
= 0;
1010 cache
->frameless
= 1;
1012 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1013 cache
->saved_regs
[i
] = 0;
1019 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1022 CORE_ADDR last_prologue_pc
= pc
;
1023 instruction_type it
;
1028 int unat_save_reg
= 0;
1029 int pr_save_reg
= 0;
1030 int mem_stack_frame_size
= 0;
1032 CORE_ADDR spill_addr
= 0;
1035 char reg_contents
[256];
1041 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1043 memset (instores
, 0, sizeof instores
);
1044 memset (infpstores
, 0, sizeof infpstores
);
1045 memset (reg_contents
, 0, sizeof reg_contents
);
1047 if (cache
->after_prologue
!= 0
1048 && cache
->after_prologue
<= lim_pc
)
1049 return cache
->after_prologue
;
1051 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1052 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1054 /* We want to check if we have a recognizable function start before we
1055 look ahead for a prologue. */
1056 if (pc
< lim_pc
&& next_pc
1057 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1059 /* alloc - start of a regular function. */
1060 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1061 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1062 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1063 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1065 /* Verify that the current cfm matches what we think is the
1066 function start. If we have somehow jumped within a function,
1067 we do not want to interpret the prologue and calculate the
1068 addresses of various registers such as the return address.
1069 We will instead treat the frame as frameless. */
1071 (sof
== (cache
->cfm
& 0x7f) &&
1072 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1076 last_prologue_pc
= next_pc
;
1081 /* Look for a leaf routine. */
1082 if (pc
< lim_pc
&& next_pc
1083 && (it
== I
|| it
== M
)
1084 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1086 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1087 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1088 | ((instr
& 0x001f8000000LL
) >> 20)
1089 | ((instr
& 0x000000fe000LL
) >> 13));
1090 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1091 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1092 int qp
= (int) (instr
& 0x0000000003fLL
);
1093 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1095 /* mov r2, r12 - beginning of leaf routine */
1097 last_prologue_pc
= next_pc
;
1101 /* If we don't recognize a regular function or leaf routine, we are
1107 last_prologue_pc
= lim_pc
;
1111 /* Loop, looking for prologue instructions, keeping track of
1112 where preserved registers were spilled. */
1115 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1119 if (it
== B
&& ((instr
& 0x1e1f800003f) != 0x04000000000))
1121 /* Exit loop upon hitting a non-nop branch instruction. */
1126 else if (((instr
& 0x3fLL
) != 0LL) &&
1127 (frameless
|| ret_reg
!= 0))
1129 /* Exit loop upon hitting a predicated instruction if
1130 we already have the return register or if we are frameless. */
1135 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1138 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1139 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1140 int qp
= (int) (instr
& 0x0000000003f);
1142 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1145 last_prologue_pc
= next_pc
;
1148 else if ((it
== I
|| it
== M
)
1149 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1151 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1152 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1153 | ((instr
& 0x001f8000000LL
) >> 20)
1154 | ((instr
& 0x000000fe000LL
) >> 13));
1155 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1156 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1157 int qp
= (int) (instr
& 0x0000000003fLL
);
1159 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1163 last_prologue_pc
= next_pc
;
1165 else if (qp
== 0 && rN
== 12 && rM
== 12)
1167 /* adds r12, -mem_stack_frame_size, r12 */
1168 mem_stack_frame_size
-= imm
;
1169 last_prologue_pc
= next_pc
;
1171 else if (qp
== 0 && rN
== 2
1172 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1174 char buf
[MAX_REGISTER_SIZE
];
1175 CORE_ADDR saved_sp
= 0;
1176 /* adds r2, spilloffset, rFramePointer
1178 adds r2, spilloffset, r12
1180 Get ready for stf.spill or st8.spill instructions.
1181 The address to start spilling at is loaded into r2.
1182 FIXME: Why r2? That's what gcc currently uses; it
1183 could well be different for other compilers. */
1185 /* Hmm... whether or not this will work will depend on
1186 where the pc is. If it's still early in the prologue
1187 this'll be wrong. FIXME */
1190 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1191 saved_sp
= extract_unsigned_integer (buf
, 8);
1193 spill_addr
= saved_sp
1194 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1197 last_prologue_pc
= next_pc
;
1199 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1200 rN
< 256 && imm
== 0)
1202 /* mov rN, rM where rM is an input register */
1203 reg_contents
[rN
] = rM
;
1204 last_prologue_pc
= next_pc
;
1206 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1210 last_prologue_pc
= next_pc
;
1215 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1216 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1218 /* stf.spill [rN] = fM, imm9
1220 stf.spill [rN] = fM */
1222 int imm
= imm9(instr
);
1223 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1224 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1225 int qp
= (int) (instr
& 0x0000000003fLL
);
1226 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1227 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1229 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1231 if ((instr
& 0x1efc0000000) == 0x0eec0000000)
1234 spill_addr
= 0; /* last one; must be done */
1235 last_prologue_pc
= next_pc
;
1238 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1239 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1245 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1246 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1247 int qp
= (int) (instr
& 0x0000000003fLL
);
1248 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1250 /* We have something like "mov.m r3 = ar.unat". Remember the
1251 r3 (or whatever) and watch for a store of this register... */
1253 last_prologue_pc
= next_pc
;
1256 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1259 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1260 int qp
= (int) (instr
& 0x0000000003fLL
);
1261 if (qp
== 0 && isScratch (rN
))
1264 last_prologue_pc
= next_pc
;
1268 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1269 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1273 st8 [rN] = rM, imm9 */
1274 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1275 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1276 int qp
= (int) (instr
& 0x0000000003fLL
);
1277 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1278 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1279 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1281 /* We've found a spill of either the UNAT register or the PR
1282 register. (Well, not exactly; what we've actually found is
1283 a spill of the register that UNAT or PR was moved to).
1284 Record that fact and move on... */
1285 if (rM
== unat_save_reg
)
1287 /* Track UNAT register */
1288 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1293 /* Track PR register */
1294 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1297 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1298 /* st8 [rN] = rM, imm9 */
1299 spill_addr
+= imm9(instr
);
1301 spill_addr
= 0; /* must be done spilling */
1302 last_prologue_pc
= next_pc
;
1304 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1306 /* Allow up to one store of each input register. */
1307 instores
[rM
-32] = 1;
1308 last_prologue_pc
= next_pc
;
1310 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1311 !instores
[indirect
-32])
1313 /* Allow an indirect store of an input register. */
1314 instores
[indirect
-32] = 1;
1315 last_prologue_pc
= next_pc
;
1318 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1325 Note that the st8 case is handled in the clause above.
1327 Advance over stores of input registers. One store per input
1328 register is permitted. */
1329 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1330 int qp
= (int) (instr
& 0x0000000003fLL
);
1331 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1332 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1334 instores
[rM
-32] = 1;
1335 last_prologue_pc
= next_pc
;
1337 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1338 !instores
[indirect
-32])
1340 /* Allow an indirect store of an input register. */
1341 instores
[indirect
-32] = 1;
1342 last_prologue_pc
= next_pc
;
1345 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1352 Advance over stores of floating point input registers. Again
1353 one store per register is permitted */
1354 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1355 int qp
= (int) (instr
& 0x0000000003fLL
);
1356 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1358 infpstores
[fM
-8] = 1;
1359 last_prologue_pc
= next_pc
;
1363 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1364 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1366 /* st8.spill [rN] = rM
1368 st8.spill [rN] = rM, imm9 */
1369 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1370 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1371 int qp
= (int) (instr
& 0x0000000003fLL
);
1372 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1374 /* We've found a spill of one of the preserved general purpose
1375 regs. Record the spill address and advance the spill
1376 register if appropriate. */
1377 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1378 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1379 /* st8.spill [rN] = rM, imm9 */
1380 spill_addr
+= imm9(instr
);
1382 spill_addr
= 0; /* Done spilling */
1383 last_prologue_pc
= next_pc
;
1390 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1391 registers for the previous frame which will be needed later. */
1393 if (!frameless
&& next_frame
)
1395 /* Extract the size of the rotating portion of the stack
1396 frame and the register rename base from the current
1402 rrb_gr
= (cfm
>> 18) & 0x7f;
1404 /* Find the bof (beginning of frame). */
1405 bof
= rse_address_add (cache
->bsp
, -sof
);
1407 for (i
= 0, addr
= bof
;
1411 if (IS_NaT_COLLECTION_ADDR (addr
))
1415 if (i
+32 == cfm_reg
)
1416 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1417 if (i
+32 == ret_reg
)
1418 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1420 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1423 /* For the previous argument registers we require the previous bof.
1424 If we can't find the previous cfm, then we can do nothing. */
1426 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1428 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1430 else if (cfm_reg
!= 0)
1432 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1433 cfm
= extract_unsigned_integer (buf
, 8);
1435 cache
->prev_cfm
= cfm
;
1439 sor
= ((cfm
>> 14) & 0xf) * 8;
1441 sol
= (cfm
>> 7) & 0x7f;
1442 rrb_gr
= (cfm
>> 18) & 0x7f;
1444 /* The previous bof only requires subtraction of the sol (size of locals)
1445 due to the overlap between output and input of subsequent frames. */
1446 bof
= rse_address_add (bof
, -sol
);
1448 for (i
= 0, addr
= bof
;
1452 if (IS_NaT_COLLECTION_ADDR (addr
))
1457 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1460 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1466 /* Try and trust the lim_pc value whenever possible. */
1467 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1468 last_prologue_pc
= lim_pc
;
1470 cache
->frameless
= frameless
;
1471 cache
->after_prologue
= last_prologue_pc
;
1472 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1473 cache
->fp_reg
= fp_reg
;
1475 return last_prologue_pc
;
1479 ia64_skip_prologue (CORE_ADDR pc
)
1481 struct ia64_frame_cache cache
;
1483 cache
.after_prologue
= 0;
1487 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1488 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1492 /* Normal frames. */
1494 static struct ia64_frame_cache
*
1495 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1497 struct ia64_frame_cache
*cache
;
1499 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1505 cache
= ia64_alloc_frame_cache ();
1506 *this_cache
= cache
;
1508 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1509 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1511 /* We always want the bsp to point to the end of frame.
1512 This way, we can always get the beginning of frame (bof)
1513 by subtracting frame size. */
1514 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1515 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1517 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1518 psr
= extract_unsigned_integer (buf
, 8);
1520 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1521 cfm
= extract_unsigned_integer (buf
, 8);
1523 cache
->sof
= (cfm
& 0x7f);
1524 cache
->sol
= (cfm
>> 7) & 0x7f;
1525 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1529 cache
->pc
= frame_func_unwind (next_frame
);
1532 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1534 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1540 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1541 struct frame_id
*this_id
)
1543 struct ia64_frame_cache
*cache
=
1544 ia64_frame_cache (next_frame
, this_cache
);
1546 /* This marks the outermost frame. */
1547 if (cache
->base
== 0)
1550 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1551 if (gdbarch_debug
>= 1)
1552 fprintf_unfiltered (gdb_stdlog
,
1553 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1554 paddr_nz (this_id
->code_addr
),
1555 paddr_nz (this_id
->stack_addr
),
1556 paddr_nz (cache
->bsp
), next_frame
);
1560 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1561 int regnum
, int *optimizedp
,
1562 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1563 int *realnump
, void *valuep
)
1565 struct ia64_frame_cache
*cache
=
1566 ia64_frame_cache (next_frame
, this_cache
);
1567 char dummy_valp
[MAX_REGISTER_SIZE
];
1570 gdb_assert (regnum
>= 0);
1572 if (!target_has_registers
)
1573 error ("No registers.");
1580 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1581 when valuep is not supplied. */
1583 valuep
= dummy_valp
;
1585 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1587 if (regnum
== SP_REGNUM
)
1589 /* Handle SP values for all frames but the topmost. */
1590 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1593 else if (regnum
== IA64_BSP_REGNUM
)
1595 char cfm_valuep
[MAX_REGISTER_SIZE
];
1598 enum lval_type cfm_lval
;
1600 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1602 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1603 This corresponds to what the hardware bsp register will be if we pop the frame
1604 back which is why we might have been called. We know the beginning of the current
1605 frame is cache->bsp - cache->sof. This value in the previous frame points to
1606 the start of the output registers. We can calculate the end of that frame by adding
1607 the size of output (sof (size of frame) - sol (size of locals)). */
1608 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1609 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1610 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1612 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1613 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1615 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1618 else if (regnum
== IA64_CFM_REGNUM
)
1620 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1624 *lvalp
= lval_memory
;
1626 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1628 else if (cache
->prev_cfm
)
1629 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1630 else if (cache
->frameless
)
1633 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1636 else if (regnum
== IA64_VFP_REGNUM
)
1638 /* If the function in question uses an automatic register (r32-r127)
1639 for the frame pointer, it'll be found by ia64_find_saved_register()
1640 above. If the function lacks one of these frame pointers, we can
1641 still provide a value since we know the size of the frame. */
1642 CORE_ADDR vfp
= cache
->base
;
1643 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1645 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1647 char pr_valuep
[MAX_REGISTER_SIZE
];
1650 enum lval_type pr_lval
;
1653 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1654 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1655 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1657 /* Fetch predicate register rename base from current frame
1658 marker for this frame. */
1659 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1661 /* Adjust the register number to account for register rotation. */
1662 regnum
= VP16_REGNUM
1663 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1665 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1666 regnum
- VP0_REGNUM
, 1);
1667 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1669 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1671 char unat_valuep
[MAX_REGISTER_SIZE
];
1674 enum lval_type unat_lval
;
1675 CORE_ADDR unat_addr
;
1677 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1678 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1679 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1680 regnum
- IA64_NAT0_REGNUM
, 1);
1681 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1684 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1687 /* Find address of general register corresponding to nat bit we're
1691 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1695 /* Compute address of nat collection bits. */
1696 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1698 CORE_ADDR nat_collection
;
1700 /* If our nat collection address is bigger than bsp, we have to get
1701 the nat collection from rnat. Otherwise, we fetch the nat
1702 collection from the computed address. */
1703 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1704 bsp
= extract_unsigned_integer (buf
, 8);
1705 if (nat_addr
>= bsp
)
1707 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1708 nat_collection
= extract_unsigned_integer (buf
, 8);
1711 nat_collection
= read_memory_integer (nat_addr
, 8);
1712 nat_bit
= (gr_addr
>> 3) & 0x3f;
1713 natval
= (nat_collection
>> nat_bit
) & 1;
1716 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1718 else if (regnum
== IA64_IP_REGNUM
)
1721 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1725 *lvalp
= lval_memory
;
1727 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1728 pc
= extract_unsigned_integer (buf
, 8);
1730 else if (cache
->frameless
)
1732 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1733 pc
= extract_unsigned_integer (buf
, 8);
1736 store_unsigned_integer (valuep
, 8, pc
);
1738 else if (regnum
== IA64_PSR_REGNUM
)
1740 /* We don't know how to get the complete previous PSR, but we need it for
1741 the slot information when we unwind the pc (pc is formed of IP register
1742 plus slot information from PSR). To get the previous slot information,
1743 we mask it off the return address. */
1744 ULONGEST slot_num
= 0;
1747 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1749 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1750 psr
= extract_unsigned_integer (buf
, 8);
1754 *lvalp
= lval_memory
;
1756 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1757 pc
= extract_unsigned_integer (buf
, 8);
1759 else if (cache
->frameless
)
1762 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1763 pc
= extract_unsigned_integer (buf
, 8);
1765 psr
&= ~(3LL << 41);
1766 slot_num
= pc
& 0x3LL
;
1767 psr
|= (CORE_ADDR
)slot_num
<< 41;
1768 store_unsigned_integer (valuep
, 8, psr
);
1770 else if (regnum
== IA64_BR0_REGNUM
)
1773 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1776 *lvalp
= lval_memory
;
1778 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1779 br0
= extract_unsigned_integer (buf
, 8);
1781 store_unsigned_integer (valuep
, 8, br0
);
1783 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1784 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1787 if (regnum
>= V32_REGNUM
)
1788 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1789 addr
= cache
->saved_regs
[regnum
];
1792 *lvalp
= lval_memory
;
1794 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1796 else if (cache
->frameless
)
1798 char r_valuep
[MAX_REGISTER_SIZE
];
1801 enum lval_type r_lval
;
1803 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1805 if (regnum
>= V32_REGNUM
)
1806 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1807 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1808 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1809 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1810 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1811 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1812 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1813 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1815 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1816 *lvalp
= lval_memory
;
1818 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1824 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1826 /* Fetch floating point register rename base from current
1827 frame marker for this frame. */
1828 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1830 /* Adjust the floating point register number to account for
1831 register rotation. */
1832 regnum
= IA64_FR32_REGNUM
1833 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1836 /* If we have stored a memory address, access the register. */
1837 addr
= cache
->saved_regs
[regnum
];
1840 *lvalp
= lval_memory
;
1842 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1844 /* Otherwise, punt and get the current value of the register. */
1846 frame_unwind_register (next_frame
, regnum
, valuep
);
1849 if (gdbarch_debug
>= 1)
1850 fprintf_unfiltered (gdb_stdlog
,
1851 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1852 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1853 ? ia64_register_names
[regnum
] : "r??"),
1854 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1857 static const struct frame_unwind ia64_frame_unwind
=
1860 &ia64_frame_this_id
,
1861 &ia64_frame_prev_register
1864 static const struct frame_unwind
*
1865 ia64_frame_sniffer (struct frame_info
*next_frame
)
1867 return &ia64_frame_unwind
;
1870 /* Signal trampolines. */
1873 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1875 if (SIGCONTEXT_REGISTER_ADDRESS
)
1879 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1880 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1881 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1882 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1883 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1884 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1885 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1886 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1887 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1888 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1889 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1890 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1891 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1892 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1893 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1894 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1895 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1896 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1897 cache
->saved_regs
[IA64_LC_REGNUM
] =
1898 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1899 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1900 cache
->saved_regs
[regno
] =
1901 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1902 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1903 cache
->saved_regs
[regno
] =
1904 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1905 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1906 cache
->saved_regs
[regno
] =
1907 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1911 static struct ia64_frame_cache
*
1912 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1914 struct ia64_frame_cache
*cache
;
1922 cache
= ia64_alloc_frame_cache ();
1924 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1925 /* Note that frame size is hard-coded below. We cannot calculate it
1926 via prologue examination. */
1927 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1929 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1930 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1932 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1933 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1934 cache
->sof
= cache
->cfm
& 0x7f;
1936 ia64_sigtramp_frame_init_saved_regs (cache
);
1938 *this_cache
= cache
;
1943 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1944 void **this_cache
, struct frame_id
*this_id
)
1946 struct ia64_frame_cache
*cache
=
1947 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1949 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1950 if (gdbarch_debug
>= 1)
1951 fprintf_unfiltered (gdb_stdlog
,
1952 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1953 paddr_nz (this_id
->code_addr
),
1954 paddr_nz (this_id
->stack_addr
),
1955 paddr_nz (cache
->bsp
), next_frame
);
1959 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1961 int regnum
, int *optimizedp
,
1962 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1963 int *realnump
, void *valuep
)
1965 char dummy_valp
[MAX_REGISTER_SIZE
];
1966 char buf
[MAX_REGISTER_SIZE
];
1968 struct ia64_frame_cache
*cache
=
1969 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1971 gdb_assert (regnum
>= 0);
1973 if (!target_has_registers
)
1974 error ("No registers.");
1981 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1982 when valuep is not supplied. */
1984 valuep
= dummy_valp
;
1986 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1988 if (regnum
== IA64_IP_REGNUM
)
1991 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1995 *lvalp
= lval_memory
;
1997 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1998 pc
= extract_unsigned_integer (buf
, 8);
2001 store_unsigned_integer (valuep
, 8, pc
);
2003 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2004 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2007 if (regnum
>= V32_REGNUM
)
2008 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2009 addr
= cache
->saved_regs
[regnum
];
2012 *lvalp
= lval_memory
;
2014 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2019 /* All other registers not listed above. */
2020 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2023 *lvalp
= lval_memory
;
2025 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2029 if (gdbarch_debug
>= 1)
2030 fprintf_unfiltered (gdb_stdlog
,
2031 "sigtramp prev register <%s> is 0x%s\n",
2032 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2033 ? ia64_register_names
[regnum
] : "r??"),
2034 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2037 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2040 ia64_sigtramp_frame_this_id
,
2041 ia64_sigtramp_frame_prev_register
2044 static const struct frame_unwind
*
2045 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2048 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2050 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2051 if (PC_IN_SIGTRAMP (pc
, name
))
2052 return &ia64_sigtramp_frame_unwind
;
2059 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2061 struct ia64_frame_cache
*cache
=
2062 ia64_frame_cache (next_frame
, this_cache
);
2067 static const struct frame_base ia64_frame_base
=
2070 ia64_frame_base_address
,
2071 ia64_frame_base_address
,
2072 ia64_frame_base_address
2075 #ifdef HAVE_LIBUNWIND_IA64_H
2077 struct ia64_unwind_table_entry
2079 unw_word_t start_offset
;
2080 unw_word_t end_offset
;
2081 unw_word_t info_offset
;
2084 static __inline__
uint64_t
2085 ia64_rse_slot_num (uint64_t addr
)
2087 return (addr
>> 3) & 0x3f;
2090 /* Skip over a designated number of registers in the backing
2091 store, remembering every 64th position is for NAT. */
2092 static __inline__
uint64_t
2093 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2095 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2099 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2102 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2103 number to a libunwind register number. */
2105 ia64_gdb2uw_regnum (int regnum
)
2107 if (regnum
== sp_regnum
)
2109 else if (regnum
== IA64_BSP_REGNUM
)
2110 return UNW_IA64_BSP
;
2111 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2112 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2113 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2114 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2115 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2116 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2117 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2119 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2120 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2121 else if (regnum
== IA64_PR_REGNUM
)
2123 else if (regnum
== IA64_IP_REGNUM
)
2125 else if (regnum
== IA64_CFM_REGNUM
)
2126 return UNW_IA64_CFM
;
2127 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2128 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2129 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2130 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2135 /* Gdb libunwind-frame callback function to convert from a libunwind register
2136 number to a ia64 gdb register number. */
2138 ia64_uw2gdb_regnum (int uw_regnum
)
2140 if (uw_regnum
== UNW_IA64_SP
)
2142 else if (uw_regnum
== UNW_IA64_BSP
)
2143 return IA64_BSP_REGNUM
;
2144 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2145 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2146 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2147 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2148 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2149 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2150 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2151 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2152 else if (uw_regnum
== UNW_IA64_PR
)
2153 return IA64_PR_REGNUM
;
2154 else if (uw_regnum
== UNW_REG_IP
)
2155 return IA64_IP_REGNUM
;
2156 else if (uw_regnum
== UNW_IA64_CFM
)
2157 return IA64_CFM_REGNUM
;
2158 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2159 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2160 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2161 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2166 /* Gdb libunwind-frame callback function to reveal if register is a float
2169 ia64_is_fpreg (int uw_regnum
)
2171 return unw_is_fpreg (uw_regnum
);
2174 /* Libunwind callback accessor function for general registers. */
2176 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2177 int write
, void *arg
)
2179 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2180 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2181 struct frame_info
*next_frame
= arg
;
2182 long new_sof
, old_sof
;
2183 char buf
[MAX_REGISTER_SIZE
];
2188 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2194 ia64_write_pc (*val
, inferior_ptid
);
2197 case UNW_IA64_AR_BSPSTORE
:
2198 write_register (IA64_BSP_REGNUM
, *val
);
2201 case UNW_IA64_AR_BSP
:
2203 /* Account for the fact that ptrace() expects bsp to point
2204 after the current register frame. */
2205 cfm
= read_register (IA64_CFM_REGNUM
);
2207 bsp
= ia64_rse_skip_regs (*val
, sof
);
2208 write_register (IA64_BSP_REGNUM
, bsp
);
2212 /* If we change CFM, we need to adjust ptrace's notion of
2213 bsp accordingly, so that the real bsp remains
2215 bsp
= read_register (IA64_BSP_REGNUM
);
2216 cfm
= read_register (IA64_CFM_REGNUM
);
2217 old_sof
= (cfm
& 0x7f);
2218 new_sof
= (*val
& 0x7f);
2219 if (old_sof
!= new_sof
)
2221 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2222 write_register (IA64_BSP_REGNUM
, bsp
);
2224 write_register (IA64_CFM_REGNUM
, *val
);
2228 write_register (regnum
, *val
);
2231 if (gdbarch_debug
>= 1)
2232 fprintf_unfiltered (gdb_stdlog
,
2233 " access_reg: to cache: %4s=0x%s\n",
2234 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2235 ? ia64_register_names
[regnum
] : "r??"),
2243 /* Libunwind expects to see the pc value which means the slot number
2244 from the psr must be merged with the ip word address. */
2245 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2246 ip
= extract_unsigned_integer (buf
, 8);
2247 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2248 psr
= extract_unsigned_integer (buf
, 8);
2249 *val
= ip
| ((psr
>> 41) & 0x3);
2252 case UNW_IA64_AR_BSP
:
2253 /* Libunwind expects to see the beginning of the current register
2254 frame so we must account for the fact that ptrace() will return a value
2255 for bsp that points *after* the current register frame. */
2256 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2257 bsp
= extract_unsigned_integer (buf
, 8);
2258 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2259 cfm
= extract_unsigned_integer (buf
, 8);
2261 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2264 case UNW_IA64_AR_BSPSTORE
:
2265 /* Libunwind wants bspstore to be after the current register frame.
2266 This is what ptrace() and gdb treats as the regular bsp value. */
2267 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2268 *val
= extract_unsigned_integer (buf
, 8);
2272 /* For all other registers, just unwind the value directly. */
2273 frame_unwind_register (next_frame
, regnum
, buf
);
2274 *val
= extract_unsigned_integer (buf
, 8);
2278 if (gdbarch_debug
>= 1)
2279 fprintf_unfiltered (gdb_stdlog
,
2280 " access_reg: from cache: %4s=0x%s\n",
2281 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2282 ? ia64_register_names
[regnum
] : "r??"),
2288 /* Libunwind callback accessor function for floating-point registers. */
2290 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2291 int write
, void *arg
)
2293 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2296 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2298 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2302 /* Libunwind callback accessor function for accessing memory. */
2304 ia64_access_mem (unw_addr_space_t as
,
2305 unw_word_t addr
, unw_word_t
*val
,
2306 int write
, void *arg
)
2308 /* XXX do we need to normalize byte-order here? */
2310 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2312 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2315 /* Call low-level function to access the kernel unwind table. */
2317 getunwind_table (void *buf
, size_t len
)
2320 x
= target_read_partial (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
, NULL
,
2326 /* Get the kernel unwind table. */
2328 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2331 struct ia64_table_entry
2333 uint64_t start_offset
;
2334 uint64_t end_offset
;
2335 uint64_t info_offset
;
2337 static struct ia64_table_entry
*ktab
= NULL
, *etab
;
2341 size
= getunwind_table (NULL
, 0);
2343 return -UNW_ENOINFO
;
2344 ktab
= xmalloc (size
);
2345 getunwind_table (ktab
, size
);
2347 /* Determine length of kernel's unwind table and relocate
2349 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2350 etab
->info_offset
+= (uint64_t) ktab
;
2353 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2354 return -UNW_ENOINFO
;
2356 di
->format
= UNW_INFO_FORMAT_TABLE
;
2358 di
->start_ip
= ktab
[0].start_offset
;
2359 di
->end_ip
= etab
[-1].end_offset
;
2360 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2361 di
->u
.ti
.segbase
= 0;
2362 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2363 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2365 if (gdbarch_debug
>= 1)
2366 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2367 "segbase=0x%s, length=%s, gp=0x%s\n",
2368 (char *) di
->u
.ti
.name_ptr
,
2369 paddr_nz (di
->u
.ti
.segbase
),
2370 paddr_u (di
->u
.ti
.table_len
),
2375 /* Find the unwind table entry for a specified address. */
2377 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2378 unw_dyn_info_t
*dip
, void **buf
)
2380 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2381 Elf_Internal_Ehdr
*ehdr
;
2382 unw_word_t segbase
= 0;
2383 CORE_ADDR load_base
;
2387 bfd
= objfile
->obfd
;
2389 ehdr
= elf_tdata (bfd
)->elf_header
;
2390 phdr
= elf_tdata (bfd
)->phdr
;
2392 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2394 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2396 switch (phdr
[i
].p_type
)
2399 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2404 case PT_IA_64_UNWIND
:
2405 p_unwind
= phdr
+ i
;
2413 if (!p_text
|| !p_unwind
2414 /* Verify that the segment that contains the IP also contains
2415 the static unwind table. If not, we are dealing with
2416 runtime-generated code, for which we have no info here. */
2417 || (p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2418 return -UNW_ENOINFO
;
2420 segbase
= p_text
->p_vaddr
+ load_base
;
2422 dip
->start_ip
= segbase
;
2423 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2424 dip
->gp
= FIND_GLOBAL_POINTER (ip
);
2425 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2426 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2427 dip
->u
.rti
.segbase
= segbase
;
2428 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2429 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2434 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2436 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2437 int need_unwind_info
, void *arg
)
2439 struct obj_section
*sec
= find_pc_section (ip
);
2446 /* XXX This only works if the host and the target architecture are
2447 both ia64 and if the have (more or less) the same kernel
2449 if (get_kernel_table (ip
, &di
) < 0)
2450 return -UNW_ENOINFO
;
2452 if (gdbarch_debug
>= 1)
2453 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2454 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2455 "length=%s,data=0x%s)\n",
2456 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2457 paddr_nz (di
.u
.ti
.segbase
),
2458 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2460 paddr_u (di
.u
.ti
.table_len
),
2461 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2465 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2469 if (gdbarch_debug
>= 1)
2470 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2471 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2472 "length=%s,data=0x%s)\n",
2473 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2474 paddr_nz (di
.u
.rti
.segbase
),
2475 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2477 paddr_u (di
.u
.rti
.table_len
),
2478 paddr_nz (di
.u
.rti
.table_data
));
2481 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2484 /* We no longer need the dyn info storage so free it. */
2490 /* Libunwind callback accessor function for cleanup. */
2492 ia64_put_unwind_info (unw_addr_space_t as
,
2493 unw_proc_info_t
*pip
, void *arg
)
2495 /* Nothing required for now. */
2498 /* Libunwind callback accessor function to get head of the dynamic
2499 unwind-info registration list. */
2501 ia64_get_dyn_info_list (unw_addr_space_t as
,
2502 unw_word_t
*dilap
, void *arg
)
2504 struct obj_section
*text_sec
;
2505 struct objfile
*objfile
;
2506 unw_word_t ip
, addr
;
2510 if (!libunwind_is_initialized ())
2511 return -UNW_ENOINFO
;
2513 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2517 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2518 ip
= text_sec
->addr
;
2519 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2522 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2523 /* We no longer need the dyn info storage so free it. */
2528 if (gdbarch_debug
>= 1)
2529 fprintf_unfiltered (gdb_stdlog
,
2530 "dynamic unwind table in objfile %s "
2531 "at 0x%s (gp=0x%s)\n",
2532 bfd_get_filename (objfile
->obfd
),
2533 paddr_nz (addr
), paddr_nz (di
.gp
));
2539 return -UNW_ENOINFO
;
2543 /* Frame interface functions for libunwind. */
2546 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2547 struct frame_id
*this_id
)
2553 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2555 /* We must add the bsp as the special address for frame comparison purposes. */
2556 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2557 bsp
= extract_unsigned_integer (buf
, 8);
2559 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2561 if (gdbarch_debug
>= 1)
2562 fprintf_unfiltered (gdb_stdlog
,
2563 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2564 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2565 paddr_nz (bsp
), next_frame
);
2569 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2571 int regnum
, int *optimizedp
,
2572 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2573 int *realnump
, void *valuep
)
2577 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2578 reg
= IA64_PR_REGNUM
;
2579 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2580 reg
= IA64_UNAT_REGNUM
;
2582 /* Let libunwind do most of the work. */
2583 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2584 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2586 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2590 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2594 unsigned char buf
[MAX_REGISTER_SIZE
];
2596 /* Fetch predicate register rename base from current frame
2597 marker for this frame. */
2598 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2599 cfm
= extract_unsigned_integer (buf
, 8);
2600 rrb_pr
= (cfm
>> 32) & 0x3f;
2602 /* Adjust the register number to account for register rotation. */
2603 regnum
= VP16_REGNUM
2604 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2606 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2607 regnum
- VP0_REGNUM
, 1);
2608 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2610 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2614 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2615 regnum
- IA64_NAT0_REGNUM
, 1);
2616 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2619 else if (regnum
== IA64_BSP_REGNUM
)
2621 char cfm_valuep
[MAX_REGISTER_SIZE
];
2624 enum lval_type cfm_lval
;
2626 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2628 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2629 This corresponds to what the hardware bsp register will be if we pop the frame
2630 back which is why we might have been called. We know that libunwind will pass us back
2631 the beginning of the current frame so we should just add sof to it. */
2632 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2633 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2634 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2635 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2636 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2638 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2642 if (gdbarch_debug
>= 1)
2643 fprintf_unfiltered (gdb_stdlog
,
2644 "libunwind prev register <%s> is 0x%s\n",
2645 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2646 ? ia64_register_names
[regnum
] : "r??"),
2647 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2650 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2653 ia64_libunwind_frame_this_id
,
2654 ia64_libunwind_frame_prev_register
2657 static const struct frame_unwind
*
2658 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2660 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2661 return &ia64_libunwind_frame_unwind
;
2666 /* Set of libunwind callback acccessor functions. */
2667 static unw_accessors_t ia64_unw_accessors
=
2669 ia64_find_proc_info_x
,
2670 ia64_put_unwind_info
,
2671 ia64_get_dyn_info_list
,
2679 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2680 static struct libunwind_descr ia64_libunwind_descr
=
2685 &ia64_unw_accessors
,
2688 #endif /* HAVE_LIBUNWIND_IA64_H */
2690 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2691 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2692 is the type (which is known to be struct, union or array). */
2694 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2696 struct type
*float_elt_type
;
2698 /* HFAs are structures (or arrays) consisting entirely of floating
2699 point values of the same length. Up to 8 of these are returned
2700 in registers. Don't use the struct convention when this is the
2702 float_elt_type
= is_float_or_hfa_type (type
);
2703 if (float_elt_type
!= NULL
2704 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2707 /* Other structs of length 32 or less are returned in r8-r11.
2708 Don't use the struct convention for those either. */
2709 return TYPE_LENGTH (type
) > 32;
2713 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
, void *valbuf
)
2715 struct type
*float_elt_type
;
2717 float_elt_type
= is_float_or_hfa_type (type
);
2718 if (float_elt_type
!= NULL
)
2720 char from
[MAX_REGISTER_SIZE
];
2722 int regnum
= IA64_FR8_REGNUM
;
2723 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2727 regcache_cooked_read (regcache
, regnum
, from
);
2728 convert_typed_floating (from
, builtin_type_ia64_ext
,
2729 (char *)valbuf
+ offset
, float_elt_type
);
2730 offset
+= TYPE_LENGTH (float_elt_type
);
2738 int regnum
= IA64_GR8_REGNUM
;
2739 int reglen
= TYPE_LENGTH (ia64_register_type (NULL
, IA64_GR8_REGNUM
));
2740 int n
= TYPE_LENGTH (type
) / reglen
;
2741 int m
= TYPE_LENGTH (type
) % reglen
;
2746 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2747 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
2754 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2755 memcpy ((char *)valbuf
+ offset
, &val
, m
);
2761 ia64_extract_struct_value_address (struct regcache
*regcache
)
2763 error ("ia64_extract_struct_value_address called and cannot get struct value address");
2769 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
2771 switch (TYPE_CODE (t
))
2775 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
2782 case TYPE_CODE_ARRAY
:
2784 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
2787 case TYPE_CODE_STRUCT
:
2791 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
2792 if (!is_float_or_hfa_type_recurse
2793 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
2804 /* Determine if the given type is one of the floating point types or
2805 and HFA (which is a struct, array, or combination thereof whose
2806 bottom-most elements are all of the same floating point type). */
2808 static struct type
*
2809 is_float_or_hfa_type (struct type
*t
)
2811 struct type
*et
= 0;
2813 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
2817 /* Return 1 if the alignment of T is such that the next even slot
2818 should be used. Return 0, if the next available slot should
2819 be used. (See section 8.5.1 of the IA-64 Software Conventions
2820 and Runtime manual). */
2823 slot_alignment_is_next_even (struct type
*t
)
2825 switch (TYPE_CODE (t
))
2829 if (TYPE_LENGTH (t
) > 8)
2833 case TYPE_CODE_ARRAY
:
2835 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
2836 case TYPE_CODE_STRUCT
:
2840 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
2841 if (slot_alignment_is_next_even
2842 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
2851 /* Attempt to find (and return) the global pointer for the given
2854 This is a rather nasty bit of code searchs for the .dynamic section
2855 in the objfile corresponding to the pc of the function we're trying
2856 to call. Once it finds the addresses at which the .dynamic section
2857 lives in the child process, it scans the Elf64_Dyn entries for a
2858 DT_PLTGOT tag. If it finds one of these, the corresponding
2859 d_un.d_ptr value is the global pointer. */
2862 generic_elf_find_global_pointer (CORE_ADDR faddr
)
2864 struct obj_section
*faddr_sect
;
2866 faddr_sect
= find_pc_section (faddr
);
2867 if (faddr_sect
!= NULL
)
2869 struct obj_section
*osect
;
2871 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
2873 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
2877 if (osect
< faddr_sect
->objfile
->sections_end
)
2882 while (addr
< osect
->endaddr
)
2888 status
= target_read_memory (addr
, buf
, sizeof (buf
));
2891 tag
= extract_signed_integer (buf
, sizeof (buf
));
2893 if (tag
== DT_PLTGOT
)
2895 CORE_ADDR global_pointer
;
2897 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
2900 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
2903 return global_pointer
;
2916 /* Given a function's address, attempt to find (and return) the
2917 corresponding (canonical) function descriptor. Return 0 if
2920 find_extant_func_descr (CORE_ADDR faddr
)
2922 struct obj_section
*faddr_sect
;
2924 /* Return early if faddr is already a function descriptor. */
2925 faddr_sect
= find_pc_section (faddr
);
2926 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
2929 if (faddr_sect
!= NULL
)
2931 struct obj_section
*osect
;
2932 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
2934 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
2938 if (osect
< faddr_sect
->objfile
->sections_end
)
2943 while (addr
< osect
->endaddr
)
2949 status
= target_read_memory (addr
, buf
, sizeof (buf
));
2952 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
2954 if (faddr
== faddr2
)
2964 /* Attempt to find a function descriptor corresponding to the
2965 given address. If none is found, construct one on the
2966 stack using the address at fdaptr. */
2969 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
2973 fdesc
= find_extant_func_descr (faddr
);
2977 CORE_ADDR global_pointer
;
2983 global_pointer
= FIND_GLOBAL_POINTER (faddr
);
2985 if (global_pointer
== 0)
2986 global_pointer
= read_register (IA64_GR1_REGNUM
);
2988 store_unsigned_integer (buf
, 8, faddr
);
2989 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
2991 write_memory (fdesc
, buf
, 16);
2997 /* Use the following routine when printing out function pointers
2998 so the user can see the function address rather than just the
2999 function descriptor. */
3001 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3002 struct target_ops
*targ
)
3004 struct obj_section
*s
;
3006 s
= find_pc_section (addr
);
3008 /* check if ADDR points to a function descriptor. */
3009 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3010 return read_memory_unsigned_integer (addr
, 8);
3016 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3022 ia64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
3023 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3024 int nargs
, struct value
**args
, CORE_ADDR sp
,
3025 int struct_return
, CORE_ADDR struct_addr
)
3031 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3033 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3037 /* Count the number of slots needed for the arguments. */
3038 for (argno
= 0; argno
< nargs
; argno
++)
3041 type
= check_typedef (VALUE_TYPE (arg
));
3042 len
= TYPE_LENGTH (type
);
3044 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3047 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3050 nslots
+= (len
+ 7) / 8;
3053 /* Divvy up the slots between the RSE and the memory stack. */
3054 rseslots
= (nslots
> 8) ? 8 : nslots
;
3055 memslots
= nslots
- rseslots
;
3057 /* Allocate a new RSE frame. */
3058 cfm
= read_register (IA64_CFM_REGNUM
);
3060 bsp
= read_register (IA64_BSP_REGNUM
);
3061 new_bsp
= rse_address_add (bsp
, rseslots
);
3062 write_register (IA64_BSP_REGNUM
, new_bsp
);
3064 pfs
= read_register (IA64_PFS_REGNUM
);
3065 pfs
&= 0xc000000000000000LL
;
3066 pfs
|= (cfm
& 0xffffffffffffLL
);
3067 write_register (IA64_PFS_REGNUM
, pfs
);
3069 cfm
&= 0xc000000000000000LL
;
3071 write_register (IA64_CFM_REGNUM
, cfm
);
3073 /* We will attempt to find function descriptors in the .opd segment,
3074 but if we can't we'll construct them ourselves. That being the
3075 case, we'll need to reserve space on the stack for them. */
3076 funcdescaddr
= sp
- nfuncargs
* 16;
3077 funcdescaddr
&= ~0xfLL
;
3079 /* Adjust the stack pointer to it's new value. The calling conventions
3080 require us to have 16 bytes of scratch, plus whatever space is
3081 necessary for the memory slots and our function descriptors. */
3082 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3083 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3085 /* Place the arguments where they belong. The arguments will be
3086 either placed in the RSE backing store or on the memory stack.
3087 In addition, floating point arguments or HFAs are placed in
3088 floating point registers. */
3090 floatreg
= IA64_FR8_REGNUM
;
3091 for (argno
= 0; argno
< nargs
; argno
++)
3093 struct type
*float_elt_type
;
3096 type
= check_typedef (VALUE_TYPE (arg
));
3097 len
= TYPE_LENGTH (type
);
3099 /* Special handling for function parameters. */
3101 && TYPE_CODE (type
) == TYPE_CODE_PTR
3102 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3106 store_unsigned_integer (val_buf
, 8,
3107 find_func_descr (extract_unsigned_integer (VALUE_CONTENTS (arg
), 8),
3109 if (slotnum
< rseslots
)
3110 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3112 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3119 /* Skip odd slot if necessary... */
3120 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3128 memset (val_buf
, 0, 8);
3129 memcpy (val_buf
, VALUE_CONTENTS (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3131 if (slotnum
< rseslots
)
3132 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3134 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3141 /* Handle floating point types (including HFAs). */
3142 float_elt_type
= is_float_or_hfa_type (type
);
3143 if (float_elt_type
!= NULL
)
3146 len
= TYPE_LENGTH (type
);
3147 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3149 char to
[MAX_REGISTER_SIZE
];
3150 convert_typed_floating (VALUE_CONTENTS (arg
) + argoffset
, float_elt_type
,
3151 to
, builtin_type_ia64_ext
);
3152 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3154 argoffset
+= TYPE_LENGTH (float_elt_type
);
3155 len
-= TYPE_LENGTH (float_elt_type
);
3160 /* Store the struct return value in r8 if necessary. */
3163 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3166 global_pointer
= FIND_GLOBAL_POINTER (func_addr
);
3168 if (global_pointer
!= 0)
3169 write_register (IA64_GR1_REGNUM
, global_pointer
);
3171 write_register (IA64_BR0_REGNUM
, bp_addr
);
3173 write_register (sp_regnum
, sp
);
3178 static struct frame_id
3179 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3184 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3185 sp
= extract_unsigned_integer (buf
, 8);
3187 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3188 bsp
= extract_unsigned_integer (buf
, 8);
3190 if (gdbarch_debug
>= 1)
3191 fprintf_unfiltered (gdb_stdlog
,
3192 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3193 paddr_nz (frame_pc_unwind (next_frame
)),
3194 paddr_nz (sp
), paddr_nz (bsp
));
3196 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3200 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3203 CORE_ADDR ip
, psr
, pc
;
3205 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3206 ip
= extract_unsigned_integer (buf
, 8);
3207 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3208 psr
= extract_unsigned_integer (buf
, 8);
3210 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3215 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
, const void *valbuf
)
3217 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3219 char to
[MAX_REGISTER_SIZE
];
3220 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3221 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3222 target_store_registers (IA64_FR8_REGNUM
);
3225 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3229 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3230 struct regcache
*regcache
,
3231 CORE_ADDR memaddr
, int nr_bytes
,
3232 CORE_ADDR
*targ_addr
, int *targ_len
)
3234 *targ_addr
= memaddr
;
3235 *targ_len
= nr_bytes
;
3239 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3241 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3242 return print_insn_ia64 (memaddr
, info
);
3245 static struct gdbarch
*
3246 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3248 struct gdbarch
*gdbarch
;
3249 struct gdbarch_tdep
*tdep
;
3251 /* If there is already a candidate, use it. */
3252 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3254 return arches
->gdbarch
;
3256 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3257 gdbarch
= gdbarch_alloc (&info
, tdep
);
3259 /* Set the method of obtaining the sigcontext addresses at which
3260 registers are saved. The method of checking to see if
3261 native_find_global_pointer is nonzero to indicate that we're
3262 on AIX is kind of hokey, but I can't think of a better way
3264 if (info
.osabi
== GDB_OSABI_LINUX
)
3265 tdep
->sigcontext_register_address
= ia64_linux_sigcontext_register_address
;
3266 else if (native_find_global_pointer
!= 0)
3267 tdep
->sigcontext_register_address
= ia64_aix_sigcontext_register_address
;
3269 tdep
->sigcontext_register_address
= 0;
3271 /* We know that GNU/Linux won't have to resort to the
3272 native_find_global_pointer hackery. But that's the only one we
3273 know about so far, so if native_find_global_pointer is set to
3274 something non-zero, then use it. Otherwise fall back to using
3275 generic_elf_find_global_pointer. This arrangement should (in
3276 theory) allow us to cross debug GNU/Linux binaries from an AIX
3278 if (info
.osabi
== GDB_OSABI_LINUX
)
3279 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
3280 else if (native_find_global_pointer
!= 0)
3281 tdep
->find_global_pointer
= native_find_global_pointer
;
3283 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
3285 /* Define the ia64 floating-point format to gdb. */
3286 builtin_type_ia64_ext
=
3287 init_type (TYPE_CODE_FLT
, 128 / 8,
3288 0, "builtin_type_ia64_ext", NULL
);
3289 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = &floatformat_ia64_ext
;
3291 /* According to the ia64 specs, instructions that store long double
3292 floats in memory use a long-double format different than that
3293 used in the floating registers. The memory format matches the
3294 x86 extended float format which is 80 bits. An OS may choose to
3295 use this format (e.g. GNU/Linux) or choose to use a different
3296 format for storing long doubles (e.g. HPUX). In the latter case,
3297 the setting of the format may be moved/overridden in an
3298 OS-specific tdep file. */
3299 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
3301 set_gdbarch_short_bit (gdbarch
, 16);
3302 set_gdbarch_int_bit (gdbarch
, 32);
3303 set_gdbarch_long_bit (gdbarch
, 64);
3304 set_gdbarch_long_long_bit (gdbarch
, 64);
3305 set_gdbarch_float_bit (gdbarch
, 32);
3306 set_gdbarch_double_bit (gdbarch
, 64);
3307 set_gdbarch_long_double_bit (gdbarch
, 128);
3308 set_gdbarch_ptr_bit (gdbarch
, 64);
3310 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3311 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3312 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3313 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3315 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3316 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3317 gets a number of extra failures. */
3318 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3319 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3321 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3322 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3323 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3324 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3325 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3326 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3327 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3329 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3331 set_gdbarch_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3332 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3334 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3335 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3337 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3338 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3339 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3340 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3341 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3343 /* Settings for calling functions in the inferior. */
3344 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3345 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3346 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3348 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3349 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3350 #ifdef HAVE_LIBUNWIND_IA64_H
3351 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3352 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3354 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3355 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3357 /* Settings that should be unnecessary. */
3358 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3360 set_gdbarch_remote_translate_xfer_address (
3361 gdbarch
, ia64_remote_translate_xfer_address
);
3363 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3364 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3369 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3372 _initialize_ia64_tdep (void)
3374 register_gdbarch_init (bfd_arch_ia64
, ia64_gdbarch_init
);