1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999-2012 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
24 #include "floatformat.h"
27 #include "reggroups.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
33 #include "gdb_assert.h"
35 #include "elf/common.h" /* for DT_PLTGOT value */
40 #include "ia64-tdep.h"
43 #ifdef HAVE_LIBUNWIND_IA64_H
44 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
45 #include "ia64-libunwind-tdep.h"
47 /* Note: KERNEL_START is supposed to be an address which is not going
48 to ever contain any valid unwind info. For ia64 linux, the choice
49 of 0xc000000000000000 is fairly safe since that's uncached space.
51 We use KERNEL_START as follows: after obtaining the kernel's
52 unwind table via getunwind(), we project its unwind data into
53 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
54 when ia64_access_mem() sees a memory access to this
55 address-range, we redirect it to ktab instead.
57 None of this hackery is needed with a modern kernel/libcs
58 which uses the kernel virtual DSO to provide access to the
59 kernel's unwind info. In that case, ktab_size remains 0 and
60 hence the value of KERNEL_START doesn't matter. */
62 #define KERNEL_START 0xc000000000000000ULL
64 static size_t ktab_size
= 0;
65 struct ia64_table_entry
67 uint64_t start_offset
;
72 static struct ia64_table_entry
*ktab
= NULL
;
76 /* An enumeration of the different IA-64 instruction types. */
78 typedef enum instruction_type
80 A
, /* Integer ALU ; I-unit or M-unit */
81 I
, /* Non-ALU integer; I-unit */
82 M
, /* Memory ; M-unit */
83 F
, /* Floating-point ; F-unit */
84 B
, /* Branch ; B-unit */
85 L
, /* Extended (L+X) ; I-unit */
86 X
, /* Extended (L+X) ; I-unit */
87 undefined
/* undefined or reserved */
90 /* We represent IA-64 PC addresses as the value of the instruction
91 pointer or'd with some bit combination in the low nibble which
92 represents the slot number in the bundle addressed by the
93 instruction pointer. The problem is that the Linux kernel
94 multiplies its slot numbers (for exceptions) by one while the
95 disassembler multiplies its slot numbers by 6. In addition, I've
96 heard it said that the simulator uses 1 as the multiplier.
98 I've fixed the disassembler so that the bytes_per_line field will
99 be the slot multiplier. If bytes_per_line comes in as zero, it
100 is set to six (which is how it was set up initially). -- objdump
101 displays pretty disassembly dumps with this value. For our purposes,
102 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
103 never want to also display the raw bytes the way objdump does. */
105 #define SLOT_MULTIPLIER 1
107 /* Length in bytes of an instruction bundle. */
109 #define BUNDLE_LEN 16
111 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
113 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
114 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
117 static gdbarch_init_ftype ia64_gdbarch_init
;
119 static gdbarch_register_name_ftype ia64_register_name
;
120 static gdbarch_register_type_ftype ia64_register_type
;
121 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
122 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
123 static struct type
*is_float_or_hfa_type (struct type
*t
);
124 static CORE_ADDR
ia64_find_global_pointer (struct gdbarch
*gdbarch
,
127 #define NUM_IA64_RAW_REGS 462
129 static int sp_regnum
= IA64_GR12_REGNUM
;
130 static int fp_regnum
= IA64_VFP_REGNUM
;
131 static int lr_regnum
= IA64_VRAP_REGNUM
;
133 /* NOTE: we treat the register stack registers r32-r127 as
134 pseudo-registers because they may not be accessible via the ptrace
135 register get/set interfaces. */
137 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
,
138 VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
139 V127_REGNUM
= V32_REGNUM
+ 95,
140 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16,
141 VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
143 /* Array of register names; There should be ia64_num_regs strings in
146 static char *ia64_register_names
[] =
147 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
148 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
149 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
150 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
164 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
165 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
166 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
167 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
168 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
169 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
170 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
171 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
172 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
173 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
174 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
175 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
176 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
177 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
178 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
179 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "",
190 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
194 "pr", "ip", "psr", "cfm",
196 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
197 "", "", "", "", "", "", "", "",
198 "rsc", "bsp", "bspstore", "rnat",
200 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
201 "ccv", "", "", "", "unat", "", "", "",
202 "fpsr", "", "", "", "itc",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "", "",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
209 "", "", "", "", "", "", "", "", "", "",
210 "", "", "", "", "", "", "", "", "", "",
211 "", "", "", "", "", "", "", "", "", "",
213 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
214 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
215 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
216 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
217 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
218 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
219 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
220 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
221 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
222 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
223 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
224 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
225 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
226 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
227 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
228 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
232 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
233 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
234 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
235 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
236 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
237 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
238 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
239 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
240 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
241 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
242 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
243 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
245 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
246 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
247 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
248 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
249 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
250 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
251 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
252 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
255 struct ia64_frame_cache
257 CORE_ADDR base
; /* frame pointer base for frame */
258 CORE_ADDR pc
; /* function start pc for frame */
259 CORE_ADDR saved_sp
; /* stack pointer for frame */
260 CORE_ADDR bsp
; /* points at r32 for the current frame */
261 CORE_ADDR cfm
; /* cfm value for current frame */
262 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
264 int sof
; /* Size of frame (decoded from cfm value). */
265 int sol
; /* Size of locals (decoded from cfm value). */
266 int sor
; /* Number of rotating registers (decoded from
268 CORE_ADDR after_prologue
;
269 /* Address of first instruction after the last
270 prologue instruction; Note that there may
271 be instructions from the function's body
272 intermingled with the prologue. */
273 int mem_stack_frame_size
;
274 /* Size of the memory stack frame (may be zero),
275 or -1 if it has not been determined yet. */
276 int fp_reg
; /* Register number (if any) used a frame pointer
277 for this frame. 0 if no register is being used
278 as the frame pointer. */
280 /* Saved registers. */
281 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
286 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
291 static const struct floatformat floatformat_ia64_ext_little
=
293 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
294 floatformat_intbit_yes
, "floatformat_ia64_ext_little", floatformat_valid
, NULL
297 static const struct floatformat floatformat_ia64_ext_big
=
299 floatformat_big
, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
300 floatformat_intbit_yes
, "floatformat_ia64_ext_big", floatformat_valid
303 static const struct floatformat
*floatformats_ia64_ext
[2] =
305 &floatformat_ia64_ext_big
,
306 &floatformat_ia64_ext_little
310 ia64_ext_type (struct gdbarch
*gdbarch
)
312 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
314 if (!tdep
->ia64_ext_type
)
316 = arch_float_type (gdbarch
, 128, "builtin_type_ia64_ext",
317 floatformats_ia64_ext
);
319 return tdep
->ia64_ext_type
;
323 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
324 struct reggroup
*group
)
329 if (group
== all_reggroup
)
331 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
332 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
333 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
334 if (group
== float_reggroup
)
336 if (group
== vector_reggroup
)
338 if (group
== general_reggroup
)
339 return (!vector_p
&& !float_p
);
340 if (group
== save_reggroup
|| group
== restore_reggroup
)
346 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
348 return ia64_register_names
[reg
];
352 ia64_register_type (struct gdbarch
*arch
, int reg
)
354 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
355 return ia64_ext_type (arch
);
357 return builtin_type (arch
)->builtin_long
;
361 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
363 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
364 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
369 /* Extract ``len'' bits from an instruction bundle starting at
373 extract_bit_field (const char *bundle
, int from
, int len
)
375 long long result
= 0LL;
377 int from_byte
= from
/ 8;
378 int to_byte
= to
/ 8;
379 unsigned char *b
= (unsigned char *) bundle
;
385 if (from_byte
== to_byte
)
386 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
387 result
= c
>> (from
% 8);
388 lshift
= 8 - (from
% 8);
390 for (i
= from_byte
+1; i
< to_byte
; i
++)
392 result
|= ((long long) b
[i
]) << lshift
;
396 if (from_byte
< to_byte
&& (to
% 8 != 0))
399 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
400 result
|= ((long long) c
) << lshift
;
406 /* Replace the specified bits in an instruction bundle. */
409 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
412 int from_byte
= from
/ 8;
413 int to_byte
= to
/ 8;
414 unsigned char *b
= (unsigned char *) bundle
;
417 if (from_byte
== to_byte
)
419 unsigned char left
, right
;
421 left
= (c
>> (to
% 8)) << (to
% 8);
422 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
423 c
= (unsigned char) (val
& 0xff);
424 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
432 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
433 c
= c
| (val
<< (from
% 8));
435 val
>>= 8 - from
% 8;
437 for (i
= from_byte
+1; i
< to_byte
; i
++)
446 unsigned char cv
= (unsigned char) val
;
448 c
= c
>> (to
% 8) << (to
% 8);
449 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
455 /* Return the contents of slot N (for N = 0, 1, or 2) in
456 and instruction bundle. */
459 slotN_contents (char *bundle
, int slotnum
)
461 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
464 /* Store an instruction in an instruction bundle. */
467 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
469 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
472 static const enum instruction_type template_encoding_table
[32][3] =
474 { M
, I
, I
}, /* 00 */
475 { M
, I
, I
}, /* 01 */
476 { M
, I
, I
}, /* 02 */
477 { M
, I
, I
}, /* 03 */
478 { M
, L
, X
}, /* 04 */
479 { M
, L
, X
}, /* 05 */
480 { undefined
, undefined
, undefined
}, /* 06 */
481 { undefined
, undefined
, undefined
}, /* 07 */
482 { M
, M
, I
}, /* 08 */
483 { M
, M
, I
}, /* 09 */
484 { M
, M
, I
}, /* 0A */
485 { M
, M
, I
}, /* 0B */
486 { M
, F
, I
}, /* 0C */
487 { M
, F
, I
}, /* 0D */
488 { M
, M
, F
}, /* 0E */
489 { M
, M
, F
}, /* 0F */
490 { M
, I
, B
}, /* 10 */
491 { M
, I
, B
}, /* 11 */
492 { M
, B
, B
}, /* 12 */
493 { M
, B
, B
}, /* 13 */
494 { undefined
, undefined
, undefined
}, /* 14 */
495 { undefined
, undefined
, undefined
}, /* 15 */
496 { B
, B
, B
}, /* 16 */
497 { B
, B
, B
}, /* 17 */
498 { M
, M
, B
}, /* 18 */
499 { M
, M
, B
}, /* 19 */
500 { undefined
, undefined
, undefined
}, /* 1A */
501 { undefined
, undefined
, undefined
}, /* 1B */
502 { M
, F
, B
}, /* 1C */
503 { M
, F
, B
}, /* 1D */
504 { undefined
, undefined
, undefined
}, /* 1E */
505 { undefined
, undefined
, undefined
}, /* 1F */
508 /* Fetch and (partially) decode an instruction at ADDR and return the
509 address of the next instruction to fetch. */
512 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
514 char bundle
[BUNDLE_LEN
];
515 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
519 /* Warn about slot numbers greater than 2. We used to generate
520 an error here on the assumption that the user entered an invalid
521 address. But, sometimes GDB itself requests an invalid address.
522 This can (easily) happen when execution stops in a function for
523 which there are no symbols. The prologue scanner will attempt to
524 find the beginning of the function - if the nearest symbol
525 happens to not be aligned on a bundle boundary (16 bytes), the
526 resulting starting address will cause GDB to think that the slot
529 So we warn about it and set the slot number to zero. It is
530 not necessarily a fatal condition, particularly if debugging
531 at the assembly language level. */
534 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
535 "Using slot 0 instead"));
541 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
546 *instr
= slotN_contents (bundle
, slotnum
);
547 template = extract_bit_field (bundle
, 0, 5);
548 *it
= template_encoding_table
[(int)template][slotnum
];
550 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
553 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
558 /* There are 5 different break instructions (break.i, break.b,
559 break.m, break.f, and break.x), but they all have the same
560 encoding. (The five bit template in the low five bits of the
561 instruction bundle distinguishes one from another.)
563 The runtime architecture manual specifies that break instructions
564 used for debugging purposes must have the upper two bits of the 21
565 bit immediate set to a 0 and a 1 respectively. A breakpoint
566 instruction encodes the most significant bit of its 21 bit
567 immediate at bit 36 of the 41 bit instruction. The penultimate msb
568 is at bit 25 which leads to the pattern below.
570 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
571 it turns out that 0x80000 was used as the syscall break in the early
572 simulators. So I changed the pattern slightly to do "break.i 0x080001"
573 instead. But that didn't work either (I later found out that this
574 pattern was used by the simulator that I was using.) So I ended up
575 using the pattern seen below.
577 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
578 while we need bit-based addressing as the instructions length is 41 bits and
579 we must not modify/corrupt the adjacent slots in the same bundle.
580 Fortunately we may store larger memory incl. the adjacent bits with the
581 original memory content (not the possibly already stored breakpoints there).
582 We need to be careful in ia64_memory_remove_breakpoint to always restore
583 only the specific bits of this instruction ignoring any adjacent stored
586 We use the original addressing with the low nibble in the range <0..2> which
587 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
588 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
589 bytes just without these two possibly skipped bytes to not to exceed to the
592 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
593 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
594 In such case there is no other place where to store
595 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
596 SLOTNUM in ia64_memory_remove_breakpoint.
598 There is one special case where we need to be extra careful:
599 L-X instructions, which are instructions that occupy 2 slots
600 (The L part is always in slot 1, and the X part is always in
601 slot 2). We must refuse to insert breakpoints for an address
602 that points at slot 2 of a bundle where an L-X instruction is
603 present, since there is logically no instruction at that address.
604 However, to make things more interesting, the opcode of L-X
605 instructions is located in slot 2. This means that, to insert
606 a breakpoint at an address that points to slot 1, we actually
607 need to write the breakpoint in slot 2! Slot 1 is actually
608 the extended operand, so writing the breakpoint there would not
609 have the desired effect. Another side-effect of this issue
610 is that we need to make sure that the shadow contents buffer
611 does save byte 15 of our instruction bundle (this is the tail
612 end of slot 2, which wouldn't be saved if we were to insert
613 the breakpoint in slot 1).
615 ia64 16-byte bundle layout:
616 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
618 The current addressing used by the code below:
619 original PC placed_address placed_size required covered
620 == bp_tgt->shadow_len reqd \subset covered
621 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
622 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
623 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
625 L-X instructions are treated a little specially, as explained above:
626 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
628 `objdump -d' and some other tools show a bit unjustified offsets:
629 original PC byte where starts the instruction objdump offset
630 0xABCDE0 0xABCDE0 0xABCDE0
631 0xABCDE1 0xABCDE5 0xABCDE6
632 0xABCDE2 0xABCDEA 0xABCDEC
635 #define IA64_BREAKPOINT 0x00003333300LL
638 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
639 struct bp_target_info
*bp_tgt
)
641 CORE_ADDR addr
= bp_tgt
->placed_address
;
642 gdb_byte bundle
[BUNDLE_LEN
];
643 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
644 long long instr_breakpoint
;
647 struct cleanup
*cleanup
;
650 error (_("Can't insert breakpoint for slot numbers greater than 2."));
654 /* Enable the automatic memory restoration from breakpoints while
655 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
656 Otherwise, we could possibly store into the shadow parts of the adjacent
657 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
658 breakpoint instruction bits region. */
659 cleanup
= make_show_memory_breakpoints_cleanup (0);
660 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
663 do_cleanups (cleanup
);
667 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
668 for addressing the SHADOW_CONTENTS placement. */
669 shadow_slotnum
= slotnum
;
671 /* Always cover the last byte of the bundle in case we are inserting
672 a breakpoint on an L-X instruction. */
673 bp_tgt
->shadow_len
= BUNDLE_LEN
- shadow_slotnum
;
675 template = extract_bit_field (bundle
, 0, 5);
676 if (template_encoding_table
[template][slotnum
] == X
)
678 /* X unit types can only be used in slot 2, and are actually
679 part of a 2-slot L-X instruction. We cannot break at this
680 address, as this is the second half of an instruction that
681 lives in slot 1 of that bundle. */
682 gdb_assert (slotnum
== 2);
683 error (_("Can't insert breakpoint for non-existing slot X"));
685 if (template_encoding_table
[template][slotnum
] == L
)
687 /* L unit types can only be used in slot 1. But the associated
688 opcode for that instruction is in slot 2, so bump the slot number
690 gdb_assert (slotnum
== 1);
694 /* Store the whole bundle, except for the initial skipped bytes by the slot
695 number interpreted as bytes offset in PLACED_ADDRESS. */
696 memcpy (bp_tgt
->shadow_contents
, bundle
+ shadow_slotnum
,
699 /* Re-read the same bundle as above except that, this time, read it in order
700 to compute the new bundle inside which we will be inserting the
701 breakpoint. Therefore, disable the automatic memory restoration from
702 breakpoints while we read our instruction bundle. Otherwise, the general
703 restoration mechanism kicks in and we would possibly remove parts of the
704 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
705 the real breakpoint instruction bits region. */
706 make_show_memory_breakpoints_cleanup (1);
707 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
710 do_cleanups (cleanup
);
714 /* Breakpoints already present in the code will get deteacted and not get
715 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
716 location cannot induce the internal error as they are optimized into
717 a single instance by update_global_location_list. */
718 instr_breakpoint
= slotN_contents (bundle
, slotnum
);
719 if (instr_breakpoint
== IA64_BREAKPOINT
)
720 internal_error (__FILE__
, __LINE__
,
721 _("Address %s already contains a breakpoint."),
722 paddress (gdbarch
, bp_tgt
->placed_address
));
723 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
725 bp_tgt
->placed_size
= bp_tgt
->shadow_len
;
727 val
= target_write_memory (addr
+ shadow_slotnum
, bundle
+ shadow_slotnum
,
730 do_cleanups (cleanup
);
735 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
736 struct bp_target_info
*bp_tgt
)
738 CORE_ADDR addr
= bp_tgt
->placed_address
;
739 gdb_byte bundle_mem
[BUNDLE_LEN
], bundle_saved
[BUNDLE_LEN
];
740 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
741 long long instr_breakpoint
, instr_saved
;
744 struct cleanup
*cleanup
;
748 /* Disable the automatic memory restoration from breakpoints while
749 we read our instruction bundle. Otherwise, the general restoration
750 mechanism kicks in and we would possibly remove parts of the adjacent
751 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
752 breakpoint instruction bits region. */
753 cleanup
= make_show_memory_breakpoints_cleanup (1);
754 val
= target_read_memory (addr
, bundle_mem
, BUNDLE_LEN
);
757 do_cleanups (cleanup
);
761 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
762 for addressing the SHADOW_CONTENTS placement. */
763 shadow_slotnum
= slotnum
;
765 template = extract_bit_field (bundle_mem
, 0, 5);
766 if (template_encoding_table
[template][slotnum
] == X
)
768 /* X unit types can only be used in slot 2, and are actually
769 part of a 2-slot L-X instruction. We refuse to insert
770 breakpoints at this address, so there should be no reason
771 for us attempting to remove one there, except if the program's
772 code somehow got modified in memory. */
773 gdb_assert (slotnum
== 2);
774 warning (_("Cannot remove breakpoint at address %s from non-existing "
775 "X-type slot, memory has changed underneath"),
776 paddress (gdbarch
, bp_tgt
->placed_address
));
777 do_cleanups (cleanup
);
780 if (template_encoding_table
[template][slotnum
] == L
)
782 /* L unit types can only be used in slot 1. But the breakpoint
783 was actually saved using slot 2, so update the slot number
785 gdb_assert (slotnum
== 1);
789 gdb_assert (bp_tgt
->placed_size
== BUNDLE_LEN
- shadow_slotnum
);
790 gdb_assert (bp_tgt
->placed_size
== bp_tgt
->shadow_len
);
792 instr_breakpoint
= slotN_contents (bundle_mem
, slotnum
);
793 if (instr_breakpoint
!= IA64_BREAKPOINT
)
795 warning (_("Cannot remove breakpoint at address %s, "
796 "no break instruction at such address."),
797 paddress (gdbarch
, bp_tgt
->placed_address
));
798 do_cleanups (cleanup
);
802 /* Extract the original saved instruction from SLOTNUM normalizing its
803 bit-shift for INSTR_SAVED. */
804 memcpy (bundle_saved
, bundle_mem
, BUNDLE_LEN
);
805 memcpy (bundle_saved
+ shadow_slotnum
, bp_tgt
->shadow_contents
,
807 instr_saved
= slotN_contents (bundle_saved
, slotnum
);
809 /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
810 and not any of the other ones that are stored in SHADOW_CONTENTS. */
811 replace_slotN_contents (bundle_mem
, instr_saved
, slotnum
);
812 val
= target_write_raw_memory (addr
, bundle_mem
, BUNDLE_LEN
);
814 do_cleanups (cleanup
);
818 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
819 instruction slots ranges are bit-granular (41 bits) we have to provide an
820 extended range as described for ia64_memory_insert_breakpoint. We also take
821 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
822 make a match for permanent breakpoints. */
824 static const gdb_byte
*
825 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
,
826 CORE_ADDR
*pcptr
, int *lenptr
)
828 CORE_ADDR addr
= *pcptr
;
829 static gdb_byte bundle
[BUNDLE_LEN
];
830 int slotnum
= (int) (*pcptr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
831 long long instr_fetched
;
834 struct cleanup
*cleanup
;
837 error (_("Can't insert breakpoint for slot numbers greater than 2."));
841 /* Enable the automatic memory restoration from breakpoints while
842 we read our instruction bundle to match bp_loc_is_permanent. */
843 cleanup
= make_show_memory_breakpoints_cleanup (0);
844 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
845 do_cleanups (cleanup
);
847 /* The memory might be unreachable. This can happen, for instance,
848 when the user inserts a breakpoint at an invalid address. */
852 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
853 for addressing the SHADOW_CONTENTS placement. */
854 shadow_slotnum
= slotnum
;
856 /* Cover always the last byte of the bundle for the L-X slot case. */
857 *lenptr
= BUNDLE_LEN
- shadow_slotnum
;
859 /* Check for L type instruction in slot 1, if present then bump up the slot
860 number to the slot 2. */
861 template = extract_bit_field (bundle
, 0, 5);
862 if (template_encoding_table
[template][slotnum
] == X
)
864 gdb_assert (slotnum
== 2);
865 error (_("Can't insert breakpoint for non-existing slot X"));
867 if (template_encoding_table
[template][slotnum
] == L
)
869 gdb_assert (slotnum
== 1);
873 /* A break instruction has its all its opcode bits cleared except for
874 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
875 we should not touch the L slot - the upper 41 bits of the parameter. */
876 instr_fetched
= slotN_contents (bundle
, slotnum
);
877 instr_fetched
&= 0x1003ffffc0LL
;
878 replace_slotN_contents (bundle
, instr_fetched
, slotnum
);
880 return bundle
+ shadow_slotnum
;
884 ia64_read_pc (struct regcache
*regcache
)
886 ULONGEST psr_value
, pc_value
;
889 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
890 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
891 slot_num
= (psr_value
>> 41) & 3;
893 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
897 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
899 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
902 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
903 psr_value
&= ~(3LL << 41);
904 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
908 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
909 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
912 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
914 /* Returns the address of the slot that's NSLOTS slots away from
915 the address ADDR. NSLOTS may be positive or negative. */
917 rse_address_add(CORE_ADDR addr
, int nslots
)
920 int mandatory_nat_slots
= nslots
/ 63;
921 int direction
= nslots
< 0 ? -1 : 1;
923 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
925 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
926 new_addr
+= 8 * direction
;
928 if (IS_NaT_COLLECTION_ADDR(new_addr
))
929 new_addr
+= 8 * direction
;
934 static enum register_status
935 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
936 int regnum
, gdb_byte
*buf
)
938 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
939 enum register_status status
;
941 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
943 #ifdef HAVE_LIBUNWIND_IA64_H
944 /* First try and use the libunwind special reg accessor,
945 otherwise fallback to standard logic. */
946 if (!libunwind_is_initialized ()
947 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
950 /* The fallback position is to assume that r32-r127 are
951 found sequentially in memory starting at $bof. This
952 isn't always true, but without libunwind, this is the
954 enum register_status status
;
959 status
= regcache_cooked_read_unsigned (regcache
,
960 IA64_BSP_REGNUM
, &bsp
);
961 if (status
!= REG_VALID
)
964 status
= regcache_cooked_read_unsigned (regcache
,
965 IA64_CFM_REGNUM
, &cfm
);
966 if (status
!= REG_VALID
)
969 /* The bsp points at the end of the register frame so we
970 subtract the size of frame from it to get start of
972 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
974 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
976 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
977 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8, byte_order
);
978 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
982 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
986 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
990 status
= regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
991 if (status
!= REG_VALID
)
993 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
994 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
995 byte_order
, unatN_val
);
997 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
999 ULONGEST natN_val
= 0;
1002 CORE_ADDR gr_addr
= 0;
1003 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1004 if (status
!= REG_VALID
)
1006 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1007 if (status
!= REG_VALID
)
1010 /* The bsp points at the end of the register frame so we
1011 subtract the size of frame from it to get start of register frame. */
1012 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1014 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1015 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1019 /* Compute address of nat collection bits. */
1020 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1021 CORE_ADDR nat_collection
;
1023 /* If our nat collection address is bigger than bsp, we have to get
1024 the nat collection from rnat. Otherwise, we fetch the nat
1025 collection from the computed address. */
1026 if (nat_addr
>= bsp
)
1027 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
,
1030 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1031 nat_bit
= (gr_addr
>> 3) & 0x3f;
1032 natN_val
= (nat_collection
>> nat_bit
) & 1;
1035 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1036 byte_order
, natN_val
);
1038 else if (regnum
== VBOF_REGNUM
)
1040 /* A virtual register frame start is provided for user convenience.
1041 It can be calculated as the bsp - sof (sizeof frame). */
1045 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1046 if (status
!= REG_VALID
)
1048 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1049 if (status
!= REG_VALID
)
1052 /* The bsp points at the end of the register frame so we
1053 subtract the size of frame from it to get beginning of frame. */
1054 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1055 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1058 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1064 status
= regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1065 if (status
!= REG_VALID
)
1067 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1068 if (status
!= REG_VALID
)
1071 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1073 /* Fetch predicate register rename base from current frame
1074 marker for this frame. */
1075 int rrb_pr
= (cfm
>> 32) & 0x3f;
1077 /* Adjust the register number to account for register rotation. */
1078 regnum
= VP16_REGNUM
1079 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1081 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
1082 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1083 byte_order
, prN_val
);
1086 memset (buf
, 0, register_size (gdbarch
, regnum
));
1092 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1093 int regnum
, const gdb_byte
*buf
)
1095 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1097 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
1102 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1103 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1105 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1107 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1109 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1110 write_memory (reg_addr
, (void *) buf
, 8);
1113 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1115 ULONGEST unatN_val
, unat
, unatN_mask
;
1116 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
1117 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1120 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
1122 unat
&= ~unatN_mask
;
1123 else if (unatN_val
== 1)
1125 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
1127 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1132 CORE_ADDR gr_addr
= 0;
1133 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1134 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1136 /* The bsp points at the end of the register frame so we
1137 subtract the size of frame from it to get start of register frame. */
1138 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1140 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1141 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1143 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1147 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
1149 /* Compute address of nat collection bits. */
1150 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1151 CORE_ADDR nat_collection
;
1152 int natN_bit
= (gr_addr
>> 3) & 0x3f;
1153 ULONGEST natN_mask
= (1LL << natN_bit
);
1154 /* If our nat collection address is bigger than bsp, we have to get
1155 the nat collection from rnat. Otherwise, we fetch the nat
1156 collection from the computed address. */
1157 if (nat_addr
>= bsp
)
1159 regcache_cooked_read_unsigned (regcache
,
1163 nat_collection
|= natN_mask
;
1165 nat_collection
&= ~natN_mask
;
1166 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
,
1172 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1174 nat_collection
|= natN_mask
;
1176 nat_collection
&= ~natN_mask
;
1177 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
),
1178 byte_order
, nat_collection
);
1179 write_memory (nat_addr
, nat_buf
, 8);
1183 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1190 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1191 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1193 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1195 /* Fetch predicate register rename base from current frame
1196 marker for this frame. */
1197 int rrb_pr
= (cfm
>> 32) & 0x3f;
1199 /* Adjust the register number to account for register rotation. */
1200 regnum
= VP16_REGNUM
1201 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1203 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1205 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
1208 else if (prN_val
== 1)
1210 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
1214 /* The ia64 needs to convert between various ieee floating-point formats
1215 and the special ia64 floating point register format. */
1218 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
1220 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
1221 && type
!= ia64_ext_type (gdbarch
));
1225 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
1226 struct type
*valtype
, gdb_byte
*out
,
1227 int *optimizedp
, int *unavailablep
)
1229 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1230 char in
[MAX_REGISTER_SIZE
];
1232 /* Convert to TYPE. */
1233 if (!get_frame_register_bytes (frame
, regnum
, 0,
1234 register_size (gdbarch
, regnum
),
1235 in
, optimizedp
, unavailablep
))
1238 convert_typed_floating (in
, ia64_ext_type (gdbarch
), out
, valtype
);
1239 *optimizedp
= *unavailablep
= 0;
1244 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
1245 struct type
*valtype
, const gdb_byte
*in
)
1247 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1248 char out
[MAX_REGISTER_SIZE
];
1249 convert_typed_floating (in
, valtype
, out
, ia64_ext_type (gdbarch
));
1250 put_frame_register (frame
, regnum
, out
);
1254 /* Limit the number of skipped non-prologue instructions since examining
1255 of the prologue is expensive. */
1256 static int max_skip_non_prologue_insns
= 40;
1258 /* Given PC representing the starting address of a function, and
1259 LIM_PC which is the (sloppy) limit to which to scan when looking
1260 for a prologue, attempt to further refine this limit by using
1261 the line data in the symbol table. If successful, a better guess
1262 on where the prologue ends is returned, otherwise the previous
1263 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1264 which will be set to indicate whether the returned limit may be
1265 used with no further scanning in the event that the function is
1268 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1269 superseded by skip_prologue_using_sal. */
1272 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
1274 struct symtab_and_line prologue_sal
;
1275 CORE_ADDR start_pc
= pc
;
1278 /* The prologue can not possibly go past the function end itself,
1279 so we can already adjust LIM_PC accordingly. */
1280 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
1283 /* Start off not trusting the limit. */
1286 prologue_sal
= find_pc_line (pc
, 0);
1287 if (prologue_sal
.line
!= 0)
1290 CORE_ADDR addr
= prologue_sal
.end
;
1292 /* Handle the case in which compiler's optimizer/scheduler
1293 has moved instructions into the prologue. We scan ahead
1294 in the function looking for address ranges whose corresponding
1295 line number is less than or equal to the first one that we
1296 found for the function. (It can be less than when the
1297 scheduler puts a body instruction before the first prologue
1299 for (i
= 2 * max_skip_non_prologue_insns
;
1300 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1303 struct symtab_and_line sal
;
1305 sal
= find_pc_line (addr
, 0);
1308 if (sal
.line
<= prologue_sal
.line
1309 && sal
.symtab
== prologue_sal
.symtab
)
1316 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1318 lim_pc
= prologue_sal
.end
;
1319 if (start_pc
== get_pc_function_start (lim_pc
))
1326 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1327 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1328 || (14 <= (_regnum_) && (_regnum_) <= 31))
1329 #define imm9(_instr_) \
1330 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1331 | (((_instr_) & 0x00008000000LL) >> 20) \
1332 | (((_instr_) & 0x00000001fc0LL) >> 6))
1334 /* Allocate and initialize a frame cache. */
1336 static struct ia64_frame_cache
*
1337 ia64_alloc_frame_cache (void)
1339 struct ia64_frame_cache
*cache
;
1342 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1348 cache
->prev_cfm
= 0;
1354 cache
->frameless
= 1;
1356 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1357 cache
->saved_regs
[i
] = 0;
1363 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1364 struct frame_info
*this_frame
,
1365 struct ia64_frame_cache
*cache
)
1368 CORE_ADDR last_prologue_pc
= pc
;
1369 instruction_type it
;
1374 int unat_save_reg
= 0;
1375 int pr_save_reg
= 0;
1376 int mem_stack_frame_size
= 0;
1378 CORE_ADDR spill_addr
= 0;
1381 char reg_contents
[256];
1387 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1389 memset (instores
, 0, sizeof instores
);
1390 memset (infpstores
, 0, sizeof infpstores
);
1391 memset (reg_contents
, 0, sizeof reg_contents
);
1393 if (cache
->after_prologue
!= 0
1394 && cache
->after_prologue
<= lim_pc
)
1395 return cache
->after_prologue
;
1397 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1398 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1400 /* We want to check if we have a recognizable function start before we
1401 look ahead for a prologue. */
1402 if (pc
< lim_pc
&& next_pc
1403 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1405 /* alloc - start of a regular function. */
1406 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1407 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1408 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1409 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1411 /* Verify that the current cfm matches what we think is the
1412 function start. If we have somehow jumped within a function,
1413 we do not want to interpret the prologue and calculate the
1414 addresses of various registers such as the return address.
1415 We will instead treat the frame as frameless. */
1417 (sof
== (cache
->cfm
& 0x7f) &&
1418 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1422 last_prologue_pc
= next_pc
;
1427 /* Look for a leaf routine. */
1428 if (pc
< lim_pc
&& next_pc
1429 && (it
== I
|| it
== M
)
1430 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1432 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1433 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1434 | ((instr
& 0x001f8000000LL
) >> 20)
1435 | ((instr
& 0x000000fe000LL
) >> 13));
1436 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1437 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1438 int qp
= (int) (instr
& 0x0000000003fLL
);
1439 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1441 /* mov r2, r12 - beginning of leaf routine. */
1443 last_prologue_pc
= next_pc
;
1447 /* If we don't recognize a regular function or leaf routine, we are
1453 last_prologue_pc
= lim_pc
;
1457 /* Loop, looking for prologue instructions, keeping track of
1458 where preserved registers were spilled. */
1461 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1465 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1467 /* Exit loop upon hitting a non-nop branch instruction. */
1472 else if (((instr
& 0x3fLL
) != 0LL) &&
1473 (frameless
|| ret_reg
!= 0))
1475 /* Exit loop upon hitting a predicated instruction if
1476 we already have the return register or if we are frameless. */
1481 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1484 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1485 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1486 int qp
= (int) (instr
& 0x0000000003f);
1488 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1491 last_prologue_pc
= next_pc
;
1494 else if ((it
== I
|| it
== M
)
1495 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1497 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1498 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1499 | ((instr
& 0x001f8000000LL
) >> 20)
1500 | ((instr
& 0x000000fe000LL
) >> 13));
1501 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1502 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1503 int qp
= (int) (instr
& 0x0000000003fLL
);
1505 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1509 last_prologue_pc
= next_pc
;
1511 else if (qp
== 0 && rN
== 12 && rM
== 12)
1513 /* adds r12, -mem_stack_frame_size, r12 */
1514 mem_stack_frame_size
-= imm
;
1515 last_prologue_pc
= next_pc
;
1517 else if (qp
== 0 && rN
== 2
1518 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1520 char buf
[MAX_REGISTER_SIZE
];
1521 CORE_ADDR saved_sp
= 0;
1522 /* adds r2, spilloffset, rFramePointer
1524 adds r2, spilloffset, r12
1526 Get ready for stf.spill or st8.spill instructions.
1527 The address to start spilling at is loaded into r2.
1528 FIXME: Why r2? That's what gcc currently uses; it
1529 could well be different for other compilers. */
1531 /* Hmm... whether or not this will work will depend on
1532 where the pc is. If it's still early in the prologue
1533 this'll be wrong. FIXME */
1536 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1537 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1538 get_frame_register (this_frame
, sp_regnum
, buf
);
1539 saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1541 spill_addr
= saved_sp
1542 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1545 last_prologue_pc
= next_pc
;
1547 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1548 rN
< 256 && imm
== 0)
1550 /* mov rN, rM where rM is an input register. */
1551 reg_contents
[rN
] = rM
;
1552 last_prologue_pc
= next_pc
;
1554 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1558 last_prologue_pc
= next_pc
;
1563 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1564 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1566 /* stf.spill [rN] = fM, imm9
1568 stf.spill [rN] = fM */
1570 int imm
= imm9(instr
);
1571 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1572 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1573 int qp
= (int) (instr
& 0x0000000003fLL
);
1574 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1575 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1577 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1579 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1582 spill_addr
= 0; /* last one; must be done. */
1583 last_prologue_pc
= next_pc
;
1586 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1587 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1593 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1594 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1595 int qp
= (int) (instr
& 0x0000000003fLL
);
1596 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1598 /* We have something like "mov.m r3 = ar.unat". Remember the
1599 r3 (or whatever) and watch for a store of this register... */
1601 last_prologue_pc
= next_pc
;
1604 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1607 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1608 int qp
= (int) (instr
& 0x0000000003fLL
);
1609 if (qp
== 0 && isScratch (rN
))
1612 last_prologue_pc
= next_pc
;
1616 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1617 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1621 st8 [rN] = rM, imm9 */
1622 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1623 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1624 int qp
= (int) (instr
& 0x0000000003fLL
);
1625 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1626 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1627 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1629 /* We've found a spill of either the UNAT register or the PR
1630 register. (Well, not exactly; what we've actually found is
1631 a spill of the register that UNAT or PR was moved to).
1632 Record that fact and move on... */
1633 if (rM
== unat_save_reg
)
1635 /* Track UNAT register. */
1636 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1641 /* Track PR register. */
1642 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1645 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1646 /* st8 [rN] = rM, imm9 */
1647 spill_addr
+= imm9(instr
);
1649 spill_addr
= 0; /* Must be done spilling. */
1650 last_prologue_pc
= next_pc
;
1652 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1654 /* Allow up to one store of each input register. */
1655 instores
[rM
-32] = 1;
1656 last_prologue_pc
= next_pc
;
1658 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1659 !instores
[indirect
-32])
1661 /* Allow an indirect store of an input register. */
1662 instores
[indirect
-32] = 1;
1663 last_prologue_pc
= next_pc
;
1666 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1673 Note that the st8 case is handled in the clause above.
1675 Advance over stores of input registers. One store per input
1676 register is permitted. */
1677 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1678 int qp
= (int) (instr
& 0x0000000003fLL
);
1679 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1680 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1682 instores
[rM
-32] = 1;
1683 last_prologue_pc
= next_pc
;
1685 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1686 !instores
[indirect
-32])
1688 /* Allow an indirect store of an input register. */
1689 instores
[indirect
-32] = 1;
1690 last_prologue_pc
= next_pc
;
1693 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1700 Advance over stores of floating point input registers. Again
1701 one store per register is permitted. */
1702 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1703 int qp
= (int) (instr
& 0x0000000003fLL
);
1704 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1706 infpstores
[fM
-8] = 1;
1707 last_prologue_pc
= next_pc
;
1711 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1712 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1714 /* st8.spill [rN] = rM
1716 st8.spill [rN] = rM, imm9 */
1717 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1718 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1719 int qp
= (int) (instr
& 0x0000000003fLL
);
1720 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1722 /* We've found a spill of one of the preserved general purpose
1723 regs. Record the spill address and advance the spill
1724 register if appropriate. */
1725 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1726 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1727 /* st8.spill [rN] = rM, imm9 */
1728 spill_addr
+= imm9(instr
);
1730 spill_addr
= 0; /* Done spilling. */
1731 last_prologue_pc
= next_pc
;
1738 /* If not frameless and we aren't called by skip_prologue, then we need
1739 to calculate registers for the previous frame which will be needed
1742 if (!frameless
&& this_frame
)
1744 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1745 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1747 /* Extract the size of the rotating portion of the stack
1748 frame and the register rename base from the current
1754 rrb_gr
= (cfm
>> 18) & 0x7f;
1756 /* Find the bof (beginning of frame). */
1757 bof
= rse_address_add (cache
->bsp
, -sof
);
1759 for (i
= 0, addr
= bof
;
1763 if (IS_NaT_COLLECTION_ADDR (addr
))
1767 if (i
+32 == cfm_reg
)
1768 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1769 if (i
+32 == ret_reg
)
1770 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1772 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1775 /* For the previous argument registers we require the previous bof.
1776 If we can't find the previous cfm, then we can do nothing. */
1778 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1780 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
],
1783 else if (cfm_reg
!= 0)
1785 get_frame_register (this_frame
, cfm_reg
, buf
);
1786 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1788 cache
->prev_cfm
= cfm
;
1792 sor
= ((cfm
>> 14) & 0xf) * 8;
1794 sol
= (cfm
>> 7) & 0x7f;
1795 rrb_gr
= (cfm
>> 18) & 0x7f;
1797 /* The previous bof only requires subtraction of the sol (size of
1798 locals) due to the overlap between output and input of
1799 subsequent frames. */
1800 bof
= rse_address_add (bof
, -sol
);
1802 for (i
= 0, addr
= bof
;
1806 if (IS_NaT_COLLECTION_ADDR (addr
))
1811 cache
->saved_regs
[IA64_GR32_REGNUM
1812 + ((i
+ (sor
- rrb_gr
)) % sor
)]
1815 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1821 /* Try and trust the lim_pc value whenever possible. */
1822 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1823 last_prologue_pc
= lim_pc
;
1825 cache
->frameless
= frameless
;
1826 cache
->after_prologue
= last_prologue_pc
;
1827 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1828 cache
->fp_reg
= fp_reg
;
1830 return last_prologue_pc
;
1834 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1836 struct ia64_frame_cache cache
;
1838 cache
.after_prologue
= 0;
1842 /* Call examine_prologue with - as third argument since we don't
1843 have a next frame pointer to send. */
1844 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1848 /* Normal frames. */
1850 static struct ia64_frame_cache
*
1851 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1853 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1854 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1855 struct ia64_frame_cache
*cache
;
1857 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1863 cache
= ia64_alloc_frame_cache ();
1864 *this_cache
= cache
;
1866 get_frame_register (this_frame
, sp_regnum
, buf
);
1867 cache
->saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1869 /* We always want the bsp to point to the end of frame.
1870 This way, we can always get the beginning of frame (bof)
1871 by subtracting frame size. */
1872 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1873 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1875 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1876 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
1878 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1879 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1881 cache
->sof
= (cfm
& 0x7f);
1882 cache
->sol
= (cfm
>> 7) & 0x7f;
1883 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1887 cache
->pc
= get_frame_func (this_frame
);
1890 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1892 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1898 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1899 struct frame_id
*this_id
)
1901 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1902 struct ia64_frame_cache
*cache
=
1903 ia64_frame_cache (this_frame
, this_cache
);
1905 /* If outermost frame, mark with null frame id. */
1906 if (cache
->base
!= 0)
1907 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1908 if (gdbarch_debug
>= 1)
1909 fprintf_unfiltered (gdb_stdlog
,
1910 "regular frame id: code %s, stack %s, "
1911 "special %s, this_frame %s\n",
1912 paddress (gdbarch
, this_id
->code_addr
),
1913 paddress (gdbarch
, this_id
->stack_addr
),
1914 paddress (gdbarch
, cache
->bsp
),
1915 host_address_to_string (this_frame
));
1918 static struct value
*
1919 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1922 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1923 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1924 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1927 gdb_assert (regnum
>= 0);
1929 if (!target_has_registers
)
1930 error (_("No registers."));
1932 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1933 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1935 else if (regnum
== IA64_BSP_REGNUM
)
1938 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1940 /* We want to calculate the previous bsp as the end of the previous
1941 register stack frame. This corresponds to what the hardware bsp
1942 register will be if we pop the frame back which is why we might
1943 have been called. We know the beginning of the current frame is
1944 cache->bsp - cache->sof. This value in the previous frame points
1945 to the start of the output registers. We can calculate the end of
1946 that frame by adding the size of output:
1947 (sof (size of frame) - sol (size of locals)). */
1948 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1949 prev_cfm
= extract_unsigned_integer (value_contents_all (val
),
1951 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1953 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1955 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1958 else if (regnum
== IA64_CFM_REGNUM
)
1960 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1963 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1965 if (cache
->prev_cfm
)
1966 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1968 if (cache
->frameless
)
1969 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1971 return frame_unwind_got_register (this_frame
, regnum
, 0);
1974 else if (regnum
== IA64_VFP_REGNUM
)
1976 /* If the function in question uses an automatic register (r32-r127)
1977 for the frame pointer, it'll be found by ia64_find_saved_register()
1978 above. If the function lacks one of these frame pointers, we can
1979 still provide a value since we know the size of the frame. */
1980 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1983 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1985 struct value
*pr_val
;
1988 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1990 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1992 /* Fetch predicate register rename base from current frame
1993 marker for this frame. */
1994 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1996 /* Adjust the register number to account for register rotation. */
1997 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1999 prN
= extract_bit_field (value_contents_all (pr_val
),
2000 regnum
- VP0_REGNUM
, 1);
2001 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
2004 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
2006 struct value
*unat_val
;
2008 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2010 unatN
= extract_bit_field (value_contents_all (unat_val
),
2011 regnum
- IA64_NAT0_REGNUM
, 1);
2012 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
2015 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2018 /* Find address of general register corresponding to nat bit we're
2022 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
2026 /* Compute address of nat collection bits. */
2027 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
2029 CORE_ADDR nat_collection
;
2032 /* If our nat collection address is bigger than bsp, we have to get
2033 the nat collection from rnat. Otherwise, we fetch the nat
2034 collection from the computed address. */
2035 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2036 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2037 if (nat_addr
>= bsp
)
2039 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
2040 nat_collection
= extract_unsigned_integer (buf
, 8, byte_order
);
2043 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
2044 nat_bit
= (gr_addr
>> 3) & 0x3f;
2045 natval
= (nat_collection
>> nat_bit
) & 1;
2048 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
2051 else if (regnum
== IA64_IP_REGNUM
)
2054 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2058 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2059 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2061 else if (cache
->frameless
)
2063 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2064 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2067 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2070 else if (regnum
== IA64_PSR_REGNUM
)
2072 /* We don't know how to get the complete previous PSR, but we need it
2073 for the slot information when we unwind the pc (pc is formed of IP
2074 register plus slot information from PSR). To get the previous
2075 slot information, we mask it off the return address. */
2076 ULONGEST slot_num
= 0;
2079 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2081 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2082 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2086 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2087 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2089 else if (cache
->frameless
)
2091 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2092 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2094 psr
&= ~(3LL << 41);
2095 slot_num
= pc
& 0x3LL
;
2096 psr
|= (CORE_ADDR
)slot_num
<< 41;
2097 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
2100 else if (regnum
== IA64_BR0_REGNUM
)
2102 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
2105 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2107 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2110 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2111 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2115 if (regnum
>= V32_REGNUM
)
2116 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2117 addr
= cache
->saved_regs
[regnum
];
2119 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2121 if (cache
->frameless
)
2123 struct value
*reg_val
;
2124 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
2126 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2127 with the same code above? */
2128 if (regnum
>= V32_REGNUM
)
2129 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2130 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2132 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
2134 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2136 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
2138 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
2140 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
2141 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2144 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2147 else /* All other registers. */
2151 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
2153 /* Fetch floating point register rename base from current
2154 frame marker for this frame. */
2155 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
2157 /* Adjust the floating point register number to account for
2158 register rotation. */
2159 regnum
= IA64_FR32_REGNUM
2160 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
2163 /* If we have stored a memory address, access the register. */
2164 addr
= cache
->saved_regs
[regnum
];
2166 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2167 /* Otherwise, punt and get the current value of the register. */
2169 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2173 static const struct frame_unwind ia64_frame_unwind
=
2176 default_frame_unwind_stop_reason
,
2177 &ia64_frame_this_id
,
2178 &ia64_frame_prev_register
,
2180 default_frame_sniffer
2183 /* Signal trampolines. */
2186 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
2187 struct ia64_frame_cache
*cache
)
2189 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2190 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2192 if (tdep
->sigcontext_register_address
)
2196 cache
->saved_regs
[IA64_VRAP_REGNUM
]
2197 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2199 cache
->saved_regs
[IA64_CFM_REGNUM
]
2200 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2202 cache
->saved_regs
[IA64_PSR_REGNUM
]
2203 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2205 cache
->saved_regs
[IA64_BSP_REGNUM
]
2206 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2208 cache
->saved_regs
[IA64_RNAT_REGNUM
]
2209 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2211 cache
->saved_regs
[IA64_CCV_REGNUM
]
2212 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2214 cache
->saved_regs
[IA64_UNAT_REGNUM
]
2215 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2217 cache
->saved_regs
[IA64_FPSR_REGNUM
]
2218 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2220 cache
->saved_regs
[IA64_PFS_REGNUM
]
2221 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2223 cache
->saved_regs
[IA64_LC_REGNUM
]
2224 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2227 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
2228 cache
->saved_regs
[regno
] =
2229 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2230 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
2231 cache
->saved_regs
[regno
] =
2232 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2233 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
2234 cache
->saved_regs
[regno
] =
2235 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2239 static struct ia64_frame_cache
*
2240 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2242 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2243 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2244 struct ia64_frame_cache
*cache
;
2252 cache
= ia64_alloc_frame_cache ();
2254 get_frame_register (this_frame
, sp_regnum
, buf
);
2255 /* Note that frame size is hard-coded below. We cannot calculate it
2256 via prologue examination. */
2257 cache
->base
= extract_unsigned_integer (buf
, 8, byte_order
) + 16;
2259 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2260 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2262 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2263 cache
->cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2264 cache
->sof
= cache
->cfm
& 0x7f;
2266 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
2268 *this_cache
= cache
;
2273 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2274 void **this_cache
, struct frame_id
*this_id
)
2276 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2277 struct ia64_frame_cache
*cache
=
2278 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2280 (*this_id
) = frame_id_build_special (cache
->base
,
2281 get_frame_pc (this_frame
),
2283 if (gdbarch_debug
>= 1)
2284 fprintf_unfiltered (gdb_stdlog
,
2285 "sigtramp frame id: code %s, stack %s, "
2286 "special %s, this_frame %s\n",
2287 paddress (gdbarch
, this_id
->code_addr
),
2288 paddress (gdbarch
, this_id
->stack_addr
),
2289 paddress (gdbarch
, cache
->bsp
),
2290 host_address_to_string (this_frame
));
2293 static struct value
*
2294 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2295 void **this_cache
, int regnum
)
2297 char buf
[MAX_REGISTER_SIZE
];
2299 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2300 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2301 struct ia64_frame_cache
*cache
=
2302 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2304 gdb_assert (regnum
>= 0);
2306 if (!target_has_registers
)
2307 error (_("No registers."));
2309 if (regnum
== IA64_IP_REGNUM
)
2312 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2316 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2317 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2320 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2323 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2324 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2328 if (regnum
>= V32_REGNUM
)
2329 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2330 addr
= cache
->saved_regs
[regnum
];
2332 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2334 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2337 else /* All other registers not listed above. */
2339 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2342 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2344 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2349 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2350 struct frame_info
*this_frame
,
2353 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2354 if (tdep
->pc_in_sigtramp
)
2356 CORE_ADDR pc
= get_frame_pc (this_frame
);
2358 if (tdep
->pc_in_sigtramp (pc
))
2365 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2368 default_frame_unwind_stop_reason
,
2369 ia64_sigtramp_frame_this_id
,
2370 ia64_sigtramp_frame_prev_register
,
2372 ia64_sigtramp_frame_sniffer
2378 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2380 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2385 static const struct frame_base ia64_frame_base
=
2388 ia64_frame_base_address
,
2389 ia64_frame_base_address
,
2390 ia64_frame_base_address
2393 #ifdef HAVE_LIBUNWIND_IA64_H
2395 struct ia64_unwind_table_entry
2397 unw_word_t start_offset
;
2398 unw_word_t end_offset
;
2399 unw_word_t info_offset
;
2402 static __inline__
uint64_t
2403 ia64_rse_slot_num (uint64_t addr
)
2405 return (addr
>> 3) & 0x3f;
2408 /* Skip over a designated number of registers in the backing
2409 store, remembering every 64th position is for NAT. */
2410 static __inline__
uint64_t
2411 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2413 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2417 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2420 /* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb
2421 register number to a libunwind register number. */
2423 ia64_gdb2uw_regnum (int regnum
)
2425 if (regnum
== sp_regnum
)
2427 else if (regnum
== IA64_BSP_REGNUM
)
2428 return UNW_IA64_BSP
;
2429 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2430 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2431 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2432 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2433 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2434 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2435 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2437 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2438 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2439 else if (regnum
== IA64_PR_REGNUM
)
2441 else if (regnum
== IA64_IP_REGNUM
)
2443 else if (regnum
== IA64_CFM_REGNUM
)
2444 return UNW_IA64_CFM
;
2445 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2446 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2447 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2448 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2453 /* Gdb ia64-libunwind-tdep callback function to convert from a libunwind
2454 register number to a ia64 gdb register number. */
2456 ia64_uw2gdb_regnum (int uw_regnum
)
2458 if (uw_regnum
== UNW_IA64_SP
)
2460 else if (uw_regnum
== UNW_IA64_BSP
)
2461 return IA64_BSP_REGNUM
;
2462 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2463 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2464 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2465 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2466 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2467 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2468 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2469 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2470 else if (uw_regnum
== UNW_IA64_PR
)
2471 return IA64_PR_REGNUM
;
2472 else if (uw_regnum
== UNW_REG_IP
)
2473 return IA64_IP_REGNUM
;
2474 else if (uw_regnum
== UNW_IA64_CFM
)
2475 return IA64_CFM_REGNUM
;
2476 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2477 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2478 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2479 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2484 /* Gdb ia64-libunwind-tdep callback function to reveal if register is
2485 a float register or not. */
2487 ia64_is_fpreg (int uw_regnum
)
2489 return unw_is_fpreg (uw_regnum
);
2492 /* Libunwind callback accessor function for general registers. */
2494 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2495 int write
, void *arg
)
2497 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2498 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2499 struct frame_info
*this_frame
= arg
;
2500 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2501 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2502 long new_sof
, old_sof
;
2503 char buf
[MAX_REGISTER_SIZE
];
2505 /* We never call any libunwind routines that need to write registers. */
2506 gdb_assert (!write
);
2511 /* Libunwind expects to see the pc value which means the slot number
2512 from the psr must be merged with the ip word address. */
2513 get_frame_register (this_frame
, IA64_IP_REGNUM
, buf
);
2514 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2515 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2516 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2517 *val
= ip
| ((psr
>> 41) & 0x3);
2520 case UNW_IA64_AR_BSP
:
2521 /* Libunwind expects to see the beginning of the current
2522 register frame so we must account for the fact that
2523 ptrace() will return a value for bsp that points *after*
2524 the current register frame. */
2525 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2526 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2527 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2528 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2529 sof
= gdbarch_tdep (gdbarch
)->size_of_register_frame (this_frame
, cfm
);
2530 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2533 case UNW_IA64_AR_BSPSTORE
:
2534 /* Libunwind wants bspstore to be after the current register frame.
2535 This is what ptrace() and gdb treats as the regular bsp value. */
2536 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2537 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2541 /* For all other registers, just unwind the value directly. */
2542 get_frame_register (this_frame
, regnum
, buf
);
2543 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2547 if (gdbarch_debug
>= 1)
2548 fprintf_unfiltered (gdb_stdlog
,
2549 " access_reg: from cache: %4s=%s\n",
2550 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2551 ? ia64_register_names
[regnum
] : "r??"),
2552 paddress (gdbarch
, *val
));
2556 /* Libunwind callback accessor function for floating-point registers. */
2558 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2559 unw_fpreg_t
*val
, int write
, void *arg
)
2561 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2562 struct frame_info
*this_frame
= arg
;
2564 /* We never call any libunwind routines that need to write registers. */
2565 gdb_assert (!write
);
2567 get_frame_register (this_frame
, regnum
, (char *) val
);
2572 /* Libunwind callback accessor function for top-level rse registers. */
2574 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2575 unw_word_t
*val
, int write
, void *arg
)
2577 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2578 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2579 struct regcache
*regcache
= arg
;
2580 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
2581 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2582 long new_sof
, old_sof
;
2583 char buf
[MAX_REGISTER_SIZE
];
2585 /* We never call any libunwind routines that need to write registers. */
2586 gdb_assert (!write
);
2591 /* Libunwind expects to see the pc value which means the slot number
2592 from the psr must be merged with the ip word address. */
2593 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2594 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2595 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2596 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2597 *val
= ip
| ((psr
>> 41) & 0x3);
2600 case UNW_IA64_AR_BSP
:
2601 /* Libunwind expects to see the beginning of the current
2602 register frame so we must account for the fact that
2603 ptrace() will return a value for bsp that points *after*
2604 the current register frame. */
2605 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2606 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2607 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2608 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2610 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2613 case UNW_IA64_AR_BSPSTORE
:
2614 /* Libunwind wants bspstore to be after the current register frame.
2615 This is what ptrace() and gdb treats as the regular bsp value. */
2616 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2617 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2621 /* For all other registers, just unwind the value directly. */
2622 regcache_cooked_read (regcache
, regnum
, buf
);
2623 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2627 if (gdbarch_debug
>= 1)
2628 fprintf_unfiltered (gdb_stdlog
,
2629 " access_rse_reg: from cache: %4s=%s\n",
2630 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2631 ? ia64_register_names
[regnum
] : "r??"),
2632 paddress (gdbarch
, *val
));
2637 /* Libunwind callback accessor function for top-level fp registers. */
2639 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2640 unw_fpreg_t
*val
, int write
, void *arg
)
2642 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2643 struct regcache
*regcache
= arg
;
2645 /* We never call any libunwind routines that need to write registers. */
2646 gdb_assert (!write
);
2648 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2653 /* Libunwind callback accessor function for accessing memory. */
2655 ia64_access_mem (unw_addr_space_t as
,
2656 unw_word_t addr
, unw_word_t
*val
,
2657 int write
, void *arg
)
2659 if (addr
- KERNEL_START
< ktab_size
)
2661 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2662 + (addr
- KERNEL_START
));
2671 /* XXX do we need to normalize byte-order here? */
2673 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2675 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2678 /* Call low-level function to access the kernel unwind table. */
2680 getunwind_table (gdb_byte
**buf_p
)
2684 /* FIXME drow/2005-09-10: This code used to call
2685 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2686 for the currently running ia64-linux kernel. That data should
2687 come from the core file and be accessed via the auxv vector; if
2688 we want to preserve fall back to the running kernel's table, then
2689 we should find a way to override the corefile layer's
2690 xfer_partial method. */
2692 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2698 /* Get the kernel unwind table. */
2700 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2702 static struct ia64_table_entry
*etab
;
2709 size
= getunwind_table (&ktab_buf
);
2711 return -UNW_ENOINFO
;
2713 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2716 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2717 etab
->info_offset
+= KERNEL_START
;
2720 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2721 return -UNW_ENOINFO
;
2723 di
->format
= UNW_INFO_FORMAT_TABLE
;
2725 di
->start_ip
= ktab
[0].start_offset
;
2726 di
->end_ip
= etab
[-1].end_offset
;
2727 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2728 di
->u
.ti
.segbase
= 0;
2729 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2730 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2732 if (gdbarch_debug
>= 1)
2733 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2734 "segbase=%s, length=%s, gp=%s\n",
2735 (char *) di
->u
.ti
.name_ptr
,
2736 hex_string (di
->u
.ti
.segbase
),
2737 pulongest (di
->u
.ti
.table_len
),
2738 hex_string (di
->gp
));
2742 /* Find the unwind table entry for a specified address. */
2744 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2745 unw_dyn_info_t
*dip
, void **buf
)
2747 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2748 Elf_Internal_Ehdr
*ehdr
;
2749 unw_word_t segbase
= 0;
2750 CORE_ADDR load_base
;
2754 bfd
= objfile
->obfd
;
2756 ehdr
= elf_tdata (bfd
)->elf_header
;
2757 phdr
= elf_tdata (bfd
)->phdr
;
2759 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2761 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2763 switch (phdr
[i
].p_type
)
2766 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2771 case PT_IA_64_UNWIND
:
2772 p_unwind
= phdr
+ i
;
2780 if (!p_text
|| !p_unwind
)
2781 return -UNW_ENOINFO
;
2783 /* Verify that the segment that contains the IP also contains
2784 the static unwind table. If not, we may be in the Linux kernel's
2785 DSO gate page in which case the unwind table is another segment.
2786 Otherwise, we are dealing with runtime-generated code, for which we
2787 have no info here. */
2788 segbase
= p_text
->p_vaddr
+ load_base
;
2790 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2793 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2795 if (phdr
[i
].p_type
== PT_LOAD
2796 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2799 /* Get the segbase from the section containing the
2801 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2805 return -UNW_ENOINFO
;
2808 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2809 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2810 dip
->gp
= ia64_find_global_pointer (get_objfile_arch (objfile
), ip
);
2811 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2812 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2813 dip
->u
.rti
.segbase
= segbase
;
2814 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2815 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2820 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2822 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2823 int need_unwind_info
, void *arg
)
2825 struct obj_section
*sec
= find_pc_section (ip
);
2832 /* XXX This only works if the host and the target architecture are
2833 both ia64 and if the have (more or less) the same kernel
2835 if (get_kernel_table (ip
, &di
) < 0)
2836 return -UNW_ENOINFO
;
2838 if (gdbarch_debug
>= 1)
2839 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2840 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2841 "length=%s,data=%s)\n",
2842 hex_string (ip
), (char *)di
.u
.ti
.name_ptr
,
2843 hex_string (di
.u
.ti
.segbase
),
2844 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2846 pulongest (di
.u
.ti
.table_len
),
2847 hex_string ((CORE_ADDR
)di
.u
.ti
.table_data
));
2851 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2855 if (gdbarch_debug
>= 1)
2856 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2857 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2858 "length=%s,data=%s)\n",
2859 hex_string (ip
), (char *)di
.u
.rti
.name_ptr
,
2860 hex_string (di
.u
.rti
.segbase
),
2861 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2863 pulongest (di
.u
.rti
.table_len
),
2864 hex_string (di
.u
.rti
.table_data
));
2867 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2870 /* We no longer need the dyn info storage so free it. */
2876 /* Libunwind callback accessor function for cleanup. */
2878 ia64_put_unwind_info (unw_addr_space_t as
,
2879 unw_proc_info_t
*pip
, void *arg
)
2881 /* Nothing required for now. */
2884 /* Libunwind callback accessor function to get head of the dynamic
2885 unwind-info registration list. */
2887 ia64_get_dyn_info_list (unw_addr_space_t as
,
2888 unw_word_t
*dilap
, void *arg
)
2890 struct obj_section
*text_sec
;
2891 struct objfile
*objfile
;
2892 unw_word_t ip
, addr
;
2896 if (!libunwind_is_initialized ())
2897 return -UNW_ENOINFO
;
2899 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2903 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2904 ip
= obj_section_addr (text_sec
);
2905 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2908 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2909 /* We no longer need the dyn info storage so free it. */
2914 if (gdbarch_debug
>= 1)
2915 fprintf_unfiltered (gdb_stdlog
,
2916 "dynamic unwind table in objfile %s "
2918 bfd_get_filename (objfile
->obfd
),
2919 hex_string (addr
), hex_string (di
.gp
));
2925 return -UNW_ENOINFO
;
2929 /* Frame interface functions for libunwind. */
2932 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2933 struct frame_id
*this_id
)
2935 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2936 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2937 struct frame_id id
= outer_frame_id
;
2941 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2942 if (frame_id_eq (id
, outer_frame_id
))
2944 (*this_id
) = outer_frame_id
;
2948 /* We must add the bsp as the special address for frame comparison
2950 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2951 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2953 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2955 if (gdbarch_debug
>= 1)
2956 fprintf_unfiltered (gdb_stdlog
,
2957 "libunwind frame id: code %s, stack %s, "
2958 "special %s, this_frame %s\n",
2959 paddress (gdbarch
, id
.code_addr
),
2960 paddress (gdbarch
, id
.stack_addr
),
2961 paddress (gdbarch
, bsp
),
2962 host_address_to_string (this_frame
));
2965 static struct value
*
2966 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2967 void **this_cache
, int regnum
)
2970 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2971 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2974 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2975 reg
= IA64_PR_REGNUM
;
2976 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2977 reg
= IA64_UNAT_REGNUM
;
2979 /* Let libunwind do most of the work. */
2980 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2982 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2986 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2990 unsigned char buf
[MAX_REGISTER_SIZE
];
2992 /* Fetch predicate register rename base from current frame
2993 marker for this frame. */
2994 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2995 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2996 rrb_pr
= (cfm
>> 32) & 0x3f;
2998 /* Adjust the register number to account for register rotation. */
2999 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
3001 prN_val
= extract_bit_field (value_contents_all (val
),
3002 regnum
- VP0_REGNUM
, 1);
3003 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
3006 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
3010 unatN_val
= extract_bit_field (value_contents_all (val
),
3011 regnum
- IA64_NAT0_REGNUM
, 1);
3012 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
3015 else if (regnum
== IA64_BSP_REGNUM
)
3017 struct value
*cfm_val
;
3018 CORE_ADDR prev_bsp
, prev_cfm
;
3020 /* We want to calculate the previous bsp as the end of the previous
3021 register stack frame. This corresponds to what the hardware bsp
3022 register will be if we pop the frame back which is why we might
3023 have been called. We know that libunwind will pass us back the
3024 beginning of the current frame so we should just add sof to it. */
3025 prev_bsp
= extract_unsigned_integer (value_contents_all (val
),
3027 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3029 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
),
3031 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
3033 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
3040 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
3041 struct frame_info
*this_frame
,
3044 if (libunwind_is_initialized ()
3045 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
3051 static const struct frame_unwind ia64_libunwind_frame_unwind
=
3054 default_frame_unwind_stop_reason
,
3055 ia64_libunwind_frame_this_id
,
3056 ia64_libunwind_frame_prev_register
,
3058 ia64_libunwind_frame_sniffer
,
3059 libunwind_frame_dealloc_cache
3063 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
3065 struct frame_id
*this_id
)
3067 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3068 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3071 struct frame_id id
= outer_frame_id
;
3074 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
3075 if (frame_id_eq (id
, outer_frame_id
))
3077 (*this_id
) = outer_frame_id
;
3081 /* We must add the bsp as the special address for frame comparison
3083 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3084 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3086 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
3087 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
3089 if (gdbarch_debug
>= 1)
3090 fprintf_unfiltered (gdb_stdlog
,
3091 "libunwind sigtramp frame id: code %s, "
3092 "stack %s, special %s, this_frame %s\n",
3093 paddress (gdbarch
, id
.code_addr
),
3094 paddress (gdbarch
, id
.stack_addr
),
3095 paddress (gdbarch
, bsp
),
3096 host_address_to_string (this_frame
));
3099 static struct value
*
3100 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
3101 void **this_cache
, int regnum
)
3103 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3104 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3105 struct value
*prev_ip_val
;
3108 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3109 method of getting previous registers. */
3110 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3112 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
),
3117 void *tmp_cache
= NULL
;
3118 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
3122 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
3126 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
3127 struct frame_info
*this_frame
,
3130 if (libunwind_is_initialized ())
3132 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
3137 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
3140 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
3143 default_frame_unwind_stop_reason
,
3144 ia64_libunwind_sigtramp_frame_this_id
,
3145 ia64_libunwind_sigtramp_frame_prev_register
,
3147 ia64_libunwind_sigtramp_frame_sniffer
3150 /* Set of libunwind callback acccessor functions. */
3151 unw_accessors_t ia64_unw_accessors
=
3153 ia64_find_proc_info_x
,
3154 ia64_put_unwind_info
,
3155 ia64_get_dyn_info_list
,
3163 /* Set of special libunwind callback acccessor functions specific for accessing
3164 the rse registers. At the top of the stack, we want libunwind to figure out
3165 how to read r32 - r127. Though usually they are found sequentially in
3166 memory starting from $bof, this is not always true. */
3167 unw_accessors_t ia64_unw_rse_accessors
=
3169 ia64_find_proc_info_x
,
3170 ia64_put_unwind_info
,
3171 ia64_get_dyn_info_list
,
3173 ia64_access_rse_reg
,
3174 ia64_access_rse_fpreg
,
3179 /* Set of ia64-libunwind-tdep gdb callbacks and data for generic
3180 ia64-libunwind-tdep code to use. */
3181 struct libunwind_descr ia64_libunwind_descr
=
3186 &ia64_unw_accessors
,
3187 &ia64_unw_rse_accessors
,
3190 #endif /* HAVE_LIBUNWIND_IA64_H */
3193 ia64_use_struct_convention (struct type
*type
)
3195 struct type
*float_elt_type
;
3197 /* Don't use the struct convention for anything but structure,
3198 union, or array types. */
3199 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
3200 || TYPE_CODE (type
) == TYPE_CODE_UNION
3201 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
3204 /* HFAs are structures (or arrays) consisting entirely of floating
3205 point values of the same length. Up to 8 of these are returned
3206 in registers. Don't use the struct convention when this is the
3208 float_elt_type
= is_float_or_hfa_type (type
);
3209 if (float_elt_type
!= NULL
3210 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3213 /* Other structs of length 32 or less are returned in r8-r11.
3214 Don't use the struct convention for those either. */
3215 return TYPE_LENGTH (type
) > 32;
3218 /* Return non-zero if TYPE is a structure or union type. */
3221 ia64_struct_type_p (const struct type
*type
)
3223 return (TYPE_CODE (type
) == TYPE_CODE_STRUCT
3224 || TYPE_CODE (type
) == TYPE_CODE_UNION
);
3228 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3231 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3232 struct type
*float_elt_type
;
3234 float_elt_type
= is_float_or_hfa_type (type
);
3235 if (float_elt_type
!= NULL
)
3237 char from
[MAX_REGISTER_SIZE
];
3239 int regnum
= IA64_FR8_REGNUM
;
3240 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3244 regcache_cooked_read (regcache
, regnum
, from
);
3245 convert_typed_floating (from
, ia64_ext_type (gdbarch
),
3246 (char *)valbuf
+ offset
, float_elt_type
);
3247 offset
+= TYPE_LENGTH (float_elt_type
);
3251 else if (!ia64_struct_type_p (type
) && TYPE_LENGTH (type
) < 8)
3253 /* This is an integral value, and its size is less than 8 bytes.
3254 These values are LSB-aligned, so extract the relevant bytes,
3255 and copy them into VALBUF. */
3256 /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
3257 so I suppose we should also add handling here for integral values
3258 whose size is greater than 8. But I wasn't able to create such
3259 a type, neither in C nor in Ada, so not worrying about these yet. */
3260 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3263 regcache_cooked_read_unsigned (regcache
, IA64_GR8_REGNUM
, &val
);
3264 store_unsigned_integer (valbuf
, TYPE_LENGTH (type
), byte_order
, val
);
3270 int regnum
= IA64_GR8_REGNUM
;
3271 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3272 int n
= TYPE_LENGTH (type
) / reglen
;
3273 int m
= TYPE_LENGTH (type
) % reglen
;
3278 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3279 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3286 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3287 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3293 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3294 const gdb_byte
*valbuf
)
3296 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3297 struct type
*float_elt_type
;
3299 float_elt_type
= is_float_or_hfa_type (type
);
3300 if (float_elt_type
!= NULL
)
3302 char to
[MAX_REGISTER_SIZE
];
3304 int regnum
= IA64_FR8_REGNUM
;
3305 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3309 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
3310 to
, ia64_ext_type (gdbarch
));
3311 regcache_cooked_write (regcache
, regnum
, to
);
3312 offset
+= TYPE_LENGTH (float_elt_type
);
3320 int regnum
= IA64_GR8_REGNUM
;
3321 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3322 int n
= TYPE_LENGTH (type
) / reglen
;
3323 int m
= TYPE_LENGTH (type
) % reglen
;
3328 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3329 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3336 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3337 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3342 static enum return_value_convention
3343 ia64_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
3344 struct type
*valtype
, struct regcache
*regcache
,
3345 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3347 int struct_return
= ia64_use_struct_convention (valtype
);
3349 if (writebuf
!= NULL
)
3351 gdb_assert (!struct_return
);
3352 ia64_store_return_value (valtype
, regcache
, writebuf
);
3355 if (readbuf
!= NULL
)
3357 gdb_assert (!struct_return
);
3358 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3362 return RETURN_VALUE_STRUCT_CONVENTION
;
3364 return RETURN_VALUE_REGISTER_CONVENTION
;
3368 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3370 switch (TYPE_CODE (t
))
3374 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3381 case TYPE_CODE_ARRAY
:
3383 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3386 case TYPE_CODE_STRUCT
:
3390 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3391 if (!is_float_or_hfa_type_recurse
3392 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3403 /* Determine if the given type is one of the floating point types or
3404 and HFA (which is a struct, array, or combination thereof whose
3405 bottom-most elements are all of the same floating point type). */
3407 static struct type
*
3408 is_float_or_hfa_type (struct type
*t
)
3410 struct type
*et
= 0;
3412 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3416 /* Return 1 if the alignment of T is such that the next even slot
3417 should be used. Return 0, if the next available slot should
3418 be used. (See section 8.5.1 of the IA-64 Software Conventions
3419 and Runtime manual). */
3422 slot_alignment_is_next_even (struct type
*t
)
3424 switch (TYPE_CODE (t
))
3428 if (TYPE_LENGTH (t
) > 8)
3432 case TYPE_CODE_ARRAY
:
3434 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3435 case TYPE_CODE_STRUCT
:
3439 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3440 if (slot_alignment_is_next_even
3441 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3450 /* Attempt to find (and return) the global pointer for the given
3453 This is a rather nasty bit of code searchs for the .dynamic section
3454 in the objfile corresponding to the pc of the function we're trying
3455 to call. Once it finds the addresses at which the .dynamic section
3456 lives in the child process, it scans the Elf64_Dyn entries for a
3457 DT_PLTGOT tag. If it finds one of these, the corresponding
3458 d_un.d_ptr value is the global pointer. */
3461 ia64_find_global_pointer_from_dynamic_section (struct gdbarch
*gdbarch
,
3464 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3465 struct obj_section
*faddr_sect
;
3467 faddr_sect
= find_pc_section (faddr
);
3468 if (faddr_sect
!= NULL
)
3470 struct obj_section
*osect
;
3472 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3474 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3478 if (osect
< faddr_sect
->objfile
->sections_end
)
3480 CORE_ADDR addr
, endaddr
;
3482 addr
= obj_section_addr (osect
);
3483 endaddr
= obj_section_endaddr (osect
);
3485 while (addr
< endaddr
)
3491 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3494 tag
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3496 if (tag
== DT_PLTGOT
)
3498 CORE_ADDR global_pointer
;
3500 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3503 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
),
3507 return global_pointer
;
3520 /* Attempt to find (and return) the global pointer for the given
3521 function. We first try the find_global_pointer_from_solib routine
3522 from the gdbarch tdep vector, if provided. And if that does not
3523 work, then we try ia64_find_global_pointer_from_dynamic_section. */
3526 ia64_find_global_pointer (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3528 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3531 if (tdep
->find_global_pointer_from_solib
)
3532 addr
= tdep
->find_global_pointer_from_solib (gdbarch
, faddr
);
3534 addr
= ia64_find_global_pointer_from_dynamic_section (gdbarch
, faddr
);
3538 /* Given a function's address, attempt to find (and return) the
3539 corresponding (canonical) function descriptor. Return 0 if
3542 find_extant_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3544 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3545 struct obj_section
*faddr_sect
;
3547 /* Return early if faddr is already a function descriptor. */
3548 faddr_sect
= find_pc_section (faddr
);
3549 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3552 if (faddr_sect
!= NULL
)
3554 struct obj_section
*osect
;
3555 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3557 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3561 if (osect
< faddr_sect
->objfile
->sections_end
)
3563 CORE_ADDR addr
, endaddr
;
3565 addr
= obj_section_addr (osect
);
3566 endaddr
= obj_section_endaddr (osect
);
3568 while (addr
< endaddr
)
3574 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3577 faddr2
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3579 if (faddr
== faddr2
)
3589 /* Attempt to find a function descriptor corresponding to the
3590 given address. If none is found, construct one on the
3591 stack using the address at fdaptr. */
3594 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3596 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3597 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3600 fdesc
= find_extant_func_descr (gdbarch
, faddr
);
3604 ULONGEST global_pointer
;
3610 global_pointer
= ia64_find_global_pointer (gdbarch
, faddr
);
3612 if (global_pointer
== 0)
3613 regcache_cooked_read_unsigned (regcache
,
3614 IA64_GR1_REGNUM
, &global_pointer
);
3616 store_unsigned_integer (buf
, 8, byte_order
, faddr
);
3617 store_unsigned_integer (buf
+ 8, 8, byte_order
, global_pointer
);
3619 write_memory (fdesc
, buf
, 16);
3625 /* Use the following routine when printing out function pointers
3626 so the user can see the function address rather than just the
3627 function descriptor. */
3629 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3630 struct target_ops
*targ
)
3632 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3633 struct obj_section
*s
;
3636 s
= find_pc_section (addr
);
3638 /* check if ADDR points to a function descriptor. */
3639 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3640 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3642 /* Normally, functions live inside a section that is executable.
3643 So, if ADDR points to a non-executable section, then treat it
3644 as a function descriptor and return the target address iff
3645 the target address itself points to a section that is executable.
3646 Check first the memory of the whole length of 8 bytes is readable. */
3647 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0
3648 && target_read_memory (addr
, buf
, 8) == 0)
3650 CORE_ADDR pc
= extract_unsigned_integer (buf
, 8, byte_order
);
3651 struct obj_section
*pc_section
= find_pc_section (pc
);
3653 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3657 /* There are also descriptors embedded in vtables. */
3660 struct minimal_symbol
*minsym
;
3662 minsym
= lookup_minimal_symbol_by_pc (addr
);
3664 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3665 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3672 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3677 /* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
3680 ia64_allocate_new_rse_frame (struct regcache
*regcache
, ULONGEST bsp
, int sof
)
3682 ULONGEST cfm
, pfs
, new_bsp
;
3684 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3686 new_bsp
= rse_address_add (bsp
, sof
);
3687 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3689 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3690 pfs
&= 0xc000000000000000LL
;
3691 pfs
|= (cfm
& 0xffffffffffffLL
);
3692 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3694 cfm
&= 0xc000000000000000LL
;
3696 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3699 /* The default "store_argument_in_slot" ia64_infcall_ops routine for
3703 ia64_store_argument_in_slot (struct regcache
*regcache
, CORE_ADDR bsp
,
3704 int slotnum
, gdb_byte
*buf
)
3706 write_memory (rse_address_add (bsp
, slotnum
), buf
, 8);
3709 /* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
3712 ia64_set_function_addr (struct regcache
*regcache
, CORE_ADDR func_addr
)
3714 /* Nothing needed. */
3718 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3719 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3720 int nargs
, struct value
**args
, CORE_ADDR sp
,
3721 int struct_return
, CORE_ADDR struct_addr
)
3723 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3724 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3729 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3732 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3733 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3737 /* Count the number of slots needed for the arguments. */
3738 for (argno
= 0; argno
< nargs
; argno
++)
3741 type
= check_typedef (value_type (arg
));
3742 len
= TYPE_LENGTH (type
);
3744 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3747 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3750 nslots
+= (len
+ 7) / 8;
3753 /* Divvy up the slots between the RSE and the memory stack. */
3754 rseslots
= (nslots
> 8) ? 8 : nslots
;
3755 memslots
= nslots
- rseslots
;
3757 /* Allocate a new RSE frame. */
3758 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3759 tdep
->infcall_ops
.allocate_new_rse_frame (regcache
, bsp
, rseslots
);
3761 /* We will attempt to find function descriptors in the .opd segment,
3762 but if we can't we'll construct them ourselves. That being the
3763 case, we'll need to reserve space on the stack for them. */
3764 funcdescaddr
= sp
- nfuncargs
* 16;
3765 funcdescaddr
&= ~0xfLL
;
3767 /* Adjust the stack pointer to it's new value. The calling conventions
3768 require us to have 16 bytes of scratch, plus whatever space is
3769 necessary for the memory slots and our function descriptors. */
3770 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3771 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3773 /* Place the arguments where they belong. The arguments will be
3774 either placed in the RSE backing store or on the memory stack.
3775 In addition, floating point arguments or HFAs are placed in
3776 floating point registers. */
3778 floatreg
= IA64_FR8_REGNUM
;
3779 for (argno
= 0; argno
< nargs
; argno
++)
3781 struct type
*float_elt_type
;
3784 type
= check_typedef (value_type (arg
));
3785 len
= TYPE_LENGTH (type
);
3787 /* Special handling for function parameters. */
3789 && TYPE_CODE (type
) == TYPE_CODE_PTR
3790 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3793 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
),
3795 store_unsigned_integer (val_buf
, 8, byte_order
,
3796 find_func_descr (regcache
, faddr
,
3798 if (slotnum
< rseslots
)
3799 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3802 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3809 /* Skip odd slot if necessary... */
3810 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3818 memset (val_buf
, 0, 8);
3819 if (!ia64_struct_type_p (type
) && len
< 8)
3821 /* Integral types are LSB-aligned, so we have to be careful
3822 to insert the argument on the correct side of the buffer.
3823 This is why we use store_unsigned_integer. */
3824 store_unsigned_integer
3825 (val_buf
, 8, byte_order
,
3826 extract_unsigned_integer (value_contents (arg
), len
,
3831 /* This is either an 8bit integral type, or an aggregate.
3832 For 8bit integral type, there is no problem, we just
3833 copy the value over.
3835 For aggregates, the only potentially tricky portion
3836 is to write the last one if it is less than 8 bytes.
3837 In this case, the data is Byte0-aligned. Happy news,
3838 this means that we don't need to differentiate the
3839 handling of 8byte blocks and less-than-8bytes blocks. */
3840 memcpy (val_buf
, value_contents (arg
) + argoffset
,
3841 (len
> 8) ? 8 : len
);
3844 if (slotnum
< rseslots
)
3845 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3848 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3855 /* Handle floating point types (including HFAs). */
3856 float_elt_type
= is_float_or_hfa_type (type
);
3857 if (float_elt_type
!= NULL
)
3860 len
= TYPE_LENGTH (type
);
3861 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3863 char to
[MAX_REGISTER_SIZE
];
3864 convert_typed_floating (value_contents (arg
) + argoffset
,
3866 ia64_ext_type (gdbarch
));
3867 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3869 argoffset
+= TYPE_LENGTH (float_elt_type
);
3870 len
-= TYPE_LENGTH (float_elt_type
);
3875 /* Store the struct return value in r8 if necessary. */
3878 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
,
3879 (ULONGEST
) struct_addr
);
3882 global_pointer
= ia64_find_global_pointer (gdbarch
, func_addr
);
3884 if (global_pointer
!= 0)
3885 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3887 /* The following is not necessary on HP-UX, because we're using
3888 a dummy code sequence pushed on the stack to make the call, and
3889 this sequence doesn't need b0 to be set in order for our dummy
3890 breakpoint to be hit. Nonetheless, this doesn't interfere, and
3891 it's needed for other OSes, so we do this unconditionaly. */
3892 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3894 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3896 tdep
->infcall_ops
.set_function_addr (regcache
, func_addr
);
3901 static const struct ia64_infcall_ops ia64_infcall_ops
=
3903 ia64_allocate_new_rse_frame
,
3904 ia64_store_argument_in_slot
,
3905 ia64_set_function_addr
3908 static struct frame_id
3909 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3911 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3915 get_frame_register (this_frame
, sp_regnum
, buf
);
3916 sp
= extract_unsigned_integer (buf
, 8, byte_order
);
3918 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3919 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3921 if (gdbarch_debug
>= 1)
3922 fprintf_unfiltered (gdb_stdlog
,
3923 "dummy frame id: code %s, stack %s, special %s\n",
3924 paddress (gdbarch
, get_frame_pc (this_frame
)),
3925 paddress (gdbarch
, sp
), paddress (gdbarch
, bsp
));
3927 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3931 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3933 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3935 CORE_ADDR ip
, psr
, pc
;
3937 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3938 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
3939 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3940 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
3942 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3947 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3949 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3950 return print_insn_ia64 (memaddr
, info
);
3953 /* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
3956 ia64_size_of_register_frame (struct frame_info
*this_frame
, ULONGEST cfm
)
3958 return (cfm
& 0x7f);
3961 static struct gdbarch
*
3962 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3964 struct gdbarch
*gdbarch
;
3965 struct gdbarch_tdep
*tdep
;
3967 /* If there is already a candidate, use it. */
3968 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3970 return arches
->gdbarch
;
3972 tdep
= xzalloc (sizeof (struct gdbarch_tdep
));
3973 gdbarch
= gdbarch_alloc (&info
, tdep
);
3975 tdep
->size_of_register_frame
= ia64_size_of_register_frame
;
3977 /* According to the ia64 specs, instructions that store long double
3978 floats in memory use a long-double format different than that
3979 used in the floating registers. The memory format matches the
3980 x86 extended float format which is 80 bits. An OS may choose to
3981 use this format (e.g. GNU/Linux) or choose to use a different
3982 format for storing long doubles (e.g. HPUX). In the latter case,
3983 the setting of the format may be moved/overridden in an
3984 OS-specific tdep file. */
3985 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3987 set_gdbarch_short_bit (gdbarch
, 16);
3988 set_gdbarch_int_bit (gdbarch
, 32);
3989 set_gdbarch_long_bit (gdbarch
, 64);
3990 set_gdbarch_long_long_bit (gdbarch
, 64);
3991 set_gdbarch_float_bit (gdbarch
, 32);
3992 set_gdbarch_double_bit (gdbarch
, 64);
3993 set_gdbarch_long_double_bit (gdbarch
, 128);
3994 set_gdbarch_ptr_bit (gdbarch
, 64);
3996 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3997 set_gdbarch_num_pseudo_regs (gdbarch
,
3998 LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3999 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
4000 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
4002 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
4003 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
4005 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
4006 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
4007 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
4008 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
4009 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
4010 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
4011 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
4013 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
4015 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
4017 set_gdbarch_memory_insert_breakpoint (gdbarch
,
4018 ia64_memory_insert_breakpoint
);
4019 set_gdbarch_memory_remove_breakpoint (gdbarch
,
4020 ia64_memory_remove_breakpoint
);
4021 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
4022 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
4023 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
4025 /* Settings for calling functions in the inferior. */
4026 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
4027 tdep
->infcall_ops
= ia64_infcall_ops
;
4028 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
4029 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
4031 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
4032 #ifdef HAVE_LIBUNWIND_IA64_H
4033 frame_unwind_append_unwinder (gdbarch
,
4034 &ia64_libunwind_sigtramp_frame_unwind
);
4035 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
4036 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4037 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
4039 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4041 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
4042 frame_base_set_default (gdbarch
, &ia64_frame_base
);
4044 /* Settings that should be unnecessary. */
4045 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4047 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
4048 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
4049 ia64_convert_from_func_ptr_addr
);
4051 /* The virtual table contains 16-byte descriptors, not pointers to
4053 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
4055 /* Hook in ABI-specific overrides, if they have been registered. */
4056 gdbarch_init_osabi (info
, gdbarch
);
4061 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
4064 _initialize_ia64_tdep (void)
4066 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);