1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "arch-utils.h"
27 #include "floatformat.h"
29 #include "reggroups.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
35 #include "gdb_assert.h"
37 #include "elf/common.h" /* for DT_PLTGOT value */
42 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
277 #define SIGCONTEXT_REGISTER_ADDRESS \
278 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
281 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
282 struct reggroup
*group
)
287 if (group
== all_reggroup
)
289 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
290 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
291 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
292 if (group
== float_reggroup
)
294 if (group
== vector_reggroup
)
296 if (group
== general_reggroup
)
297 return (!vector_p
&& !float_p
);
298 if (group
== save_reggroup
|| group
== restore_reggroup
)
304 ia64_register_name (int reg
)
306 return ia64_register_names
[reg
];
310 ia64_register_type (struct gdbarch
*arch
, int reg
)
312 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
313 return builtin_type_ia64_ext
;
315 return builtin_type_long
;
319 ia64_dwarf_reg_to_regnum (int reg
)
321 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
322 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
327 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
332 const struct floatformat floatformat_ia64_ext
=
334 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
335 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
339 /* Extract ``len'' bits from an instruction bundle starting at
343 extract_bit_field (char *bundle
, int from
, int len
)
345 long long result
= 0LL;
347 int from_byte
= from
/ 8;
348 int to_byte
= to
/ 8;
349 unsigned char *b
= (unsigned char *) bundle
;
355 if (from_byte
== to_byte
)
356 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
357 result
= c
>> (from
% 8);
358 lshift
= 8 - (from
% 8);
360 for (i
= from_byte
+1; i
< to_byte
; i
++)
362 result
|= ((long long) b
[i
]) << lshift
;
366 if (from_byte
< to_byte
&& (to
% 8 != 0))
369 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
370 result
|= ((long long) c
) << lshift
;
376 /* Replace the specified bits in an instruction bundle */
379 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
382 int from_byte
= from
/ 8;
383 int to_byte
= to
/ 8;
384 unsigned char *b
= (unsigned char *) bundle
;
387 if (from_byte
== to_byte
)
389 unsigned char left
, right
;
391 left
= (c
>> (to
% 8)) << (to
% 8);
392 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
393 c
= (unsigned char) (val
& 0xff);
394 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
402 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
403 c
= c
| (val
<< (from
% 8));
405 val
>>= 8 - from
% 8;
407 for (i
= from_byte
+1; i
< to_byte
; i
++)
416 unsigned char cv
= (unsigned char) val
;
418 c
= c
>> (to
% 8) << (to
% 8);
419 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
425 /* Return the contents of slot N (for N = 0, 1, or 2) in
426 and instruction bundle */
429 slotN_contents (char *bundle
, int slotnum
)
431 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
434 /* Store an instruction in an instruction bundle */
437 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
439 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
442 static enum instruction_type template_encoding_table
[32][3] =
444 { M
, I
, I
}, /* 00 */
445 { M
, I
, I
}, /* 01 */
446 { M
, I
, I
}, /* 02 */
447 { M
, I
, I
}, /* 03 */
448 { M
, L
, X
}, /* 04 */
449 { M
, L
, X
}, /* 05 */
450 { undefined
, undefined
, undefined
}, /* 06 */
451 { undefined
, undefined
, undefined
}, /* 07 */
452 { M
, M
, I
}, /* 08 */
453 { M
, M
, I
}, /* 09 */
454 { M
, M
, I
}, /* 0A */
455 { M
, M
, I
}, /* 0B */
456 { M
, F
, I
}, /* 0C */
457 { M
, F
, I
}, /* 0D */
458 { M
, M
, F
}, /* 0E */
459 { M
, M
, F
}, /* 0F */
460 { M
, I
, B
}, /* 10 */
461 { M
, I
, B
}, /* 11 */
462 { M
, B
, B
}, /* 12 */
463 { M
, B
, B
}, /* 13 */
464 { undefined
, undefined
, undefined
}, /* 14 */
465 { undefined
, undefined
, undefined
}, /* 15 */
466 { B
, B
, B
}, /* 16 */
467 { B
, B
, B
}, /* 17 */
468 { M
, M
, B
}, /* 18 */
469 { M
, M
, B
}, /* 19 */
470 { undefined
, undefined
, undefined
}, /* 1A */
471 { undefined
, undefined
, undefined
}, /* 1B */
472 { M
, F
, B
}, /* 1C */
473 { M
, F
, B
}, /* 1D */
474 { undefined
, undefined
, undefined
}, /* 1E */
475 { undefined
, undefined
, undefined
}, /* 1F */
478 /* Fetch and (partially) decode an instruction at ADDR and return the
479 address of the next instruction to fetch. */
482 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
484 char bundle
[BUNDLE_LEN
];
485 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
489 /* Warn about slot numbers greater than 2. We used to generate
490 an error here on the assumption that the user entered an invalid
491 address. But, sometimes GDB itself requests an invalid address.
492 This can (easily) happen when execution stops in a function for
493 which there are no symbols. The prologue scanner will attempt to
494 find the beginning of the function - if the nearest symbol
495 happens to not be aligned on a bundle boundary (16 bytes), the
496 resulting starting address will cause GDB to think that the slot
499 So we warn about it and set the slot number to zero. It is
500 not necessarily a fatal condition, particularly if debugging
501 at the assembly language level. */
504 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
505 "Using slot 0 instead"));
511 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
516 *instr
= slotN_contents (bundle
, slotnum
);
517 template = extract_bit_field (bundle
, 0, 5);
518 *it
= template_encoding_table
[(int)template][slotnum
];
520 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
523 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
528 /* There are 5 different break instructions (break.i, break.b,
529 break.m, break.f, and break.x), but they all have the same
530 encoding. (The five bit template in the low five bits of the
531 instruction bundle distinguishes one from another.)
533 The runtime architecture manual specifies that break instructions
534 used for debugging purposes must have the upper two bits of the 21
535 bit immediate set to a 0 and a 1 respectively. A breakpoint
536 instruction encodes the most significant bit of its 21 bit
537 immediate at bit 36 of the 41 bit instruction. The penultimate msb
538 is at bit 25 which leads to the pattern below.
540 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
541 it turns out that 0x80000 was used as the syscall break in the early
542 simulators. So I changed the pattern slightly to do "break.i 0x080001"
543 instead. But that didn't work either (I later found out that this
544 pattern was used by the simulator that I was using.) So I ended up
545 using the pattern seen below. */
548 #define IA64_BREAKPOINT 0x00002000040LL
550 #define IA64_BREAKPOINT 0x00003333300LL
553 ia64_memory_insert_breakpoint (CORE_ADDR addr
, bfd_byte
*contents_cache
)
555 char bundle
[BUNDLE_LEN
];
556 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
562 error (_("Can't insert breakpoint for slot numbers greater than 2."));
566 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
568 /* Check for L type instruction in 2nd slot, if present then
569 bump up the slot number to the 3rd slot */
570 template = extract_bit_field (bundle
, 0, 5);
571 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
576 instr
= slotN_contents (bundle
, slotnum
);
577 memcpy(contents_cache
, &instr
, sizeof(instr
));
578 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
580 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
586 ia64_memory_remove_breakpoint (CORE_ADDR addr
, bfd_byte
*contents_cache
)
588 char bundle
[BUNDLE_LEN
];
589 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
596 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
598 /* Check for L type instruction in 2nd slot, if present then
599 bump up the slot number to the 3rd slot */
600 template = extract_bit_field (bundle
, 0, 5);
601 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
606 memcpy (&instr
, contents_cache
, sizeof instr
);
607 replace_slotN_contents (bundle
, instr
, slotnum
);
609 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
614 /* We don't really want to use this, but remote.c needs to call it in order
615 to figure out if Z-packets are supported or not. Oh, well. */
616 const unsigned char *
617 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
619 static unsigned char breakpoint
[] =
620 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
621 *lenptr
= sizeof (breakpoint
);
629 ia64_read_pc (ptid_t ptid
)
631 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
632 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
633 int slot_num
= (psr_value
>> 41) & 3;
635 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
639 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
641 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
642 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
643 psr_value
&= ~(3LL << 41);
644 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
648 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
649 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
652 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
654 /* Returns the address of the slot that's NSLOTS slots away from
655 the address ADDR. NSLOTS may be positive or negative. */
657 rse_address_add(CORE_ADDR addr
, int nslots
)
660 int mandatory_nat_slots
= nslots
/ 63;
661 int direction
= nslots
< 0 ? -1 : 1;
663 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
665 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
666 new_addr
+= 8 * direction
;
668 if (IS_NaT_COLLECTION_ADDR(new_addr
))
669 new_addr
+= 8 * direction
;
675 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
676 int regnum
, gdb_byte
*buf
)
678 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
680 #ifdef HAVE_LIBUNWIND_IA64_H
681 /* First try and use the libunwind special reg accessor, otherwise fallback to
683 if (!libunwind_is_initialized ()
684 || libunwind_get_reg_special (gdbarch
, regnum
, buf
) != 0)
687 /* The fallback position is to assume that r32-r127 are found sequentially
688 in memory starting at $bof. This isn't always true, but without libunwind,
689 this is the best we can do. */
693 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
694 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
696 /* The bsp points at the end of the register frame so we
697 subtract the size of frame from it to get start of register frame. */
698 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
700 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
702 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
703 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
704 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
707 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
710 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
714 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
715 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
716 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
718 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
720 ULONGEST natN_val
= 0;
723 CORE_ADDR gr_addr
= 0;
724 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
725 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
727 /* The bsp points at the end of the register frame so we
728 subtract the size of frame from it to get start of register frame. */
729 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
731 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
732 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
736 /* Compute address of nat collection bits. */
737 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
738 CORE_ADDR nat_collection
;
740 /* If our nat collection address is bigger than bsp, we have to get
741 the nat collection from rnat. Otherwise, we fetch the nat
742 collection from the computed address. */
744 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
746 nat_collection
= read_memory_integer (nat_addr
, 8);
747 nat_bit
= (gr_addr
>> 3) & 0x3f;
748 natN_val
= (nat_collection
>> nat_bit
) & 1;
751 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
753 else if (regnum
== VBOF_REGNUM
)
755 /* A virtual register frame start is provided for user convenience.
756 It can be calculated as the bsp - sof (sizeof frame). */
760 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
761 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
763 /* The bsp points at the end of the register frame so we
764 subtract the size of frame from it to get beginning of frame. */
765 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
766 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
768 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
774 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
775 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
777 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
779 /* Fetch predicate register rename base from current frame
780 marker for this frame. */
781 int rrb_pr
= (cfm
>> 32) & 0x3f;
783 /* Adjust the register number to account for register rotation. */
785 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
787 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
788 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
791 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
795 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
796 int regnum
, const gdb_byte
*buf
)
798 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
803 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
804 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
806 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
808 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
810 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
811 write_memory (reg_addr
, (void *)buf
, 8);
814 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
816 ULONGEST unatN_val
, unat
, unatN_mask
;
817 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
818 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
819 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
822 else if (unatN_val
== 1)
824 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
826 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
831 CORE_ADDR gr_addr
= 0;
832 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
833 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
835 /* The bsp points at the end of the register frame so we
836 subtract the size of frame from it to get start of register frame. */
837 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
839 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
840 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
842 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
844 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
846 /* Compute address of nat collection bits. */
847 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
848 CORE_ADDR nat_collection
;
849 int natN_bit
= (gr_addr
>> 3) & 0x3f;
850 ULONGEST natN_mask
= (1LL << natN_bit
);
851 /* If our nat collection address is bigger than bsp, we have to get
852 the nat collection from rnat. Otherwise, we fetch the nat
853 collection from the computed address. */
856 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
858 nat_collection
|= natN_mask
;
860 nat_collection
&= ~natN_mask
;
861 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
866 nat_collection
= read_memory_integer (nat_addr
, 8);
868 nat_collection
|= natN_mask
;
870 nat_collection
&= ~natN_mask
;
871 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
872 write_memory (nat_addr
, nat_buf
, 8);
876 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
883 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
884 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
886 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
888 /* Fetch predicate register rename base from current frame
889 marker for this frame. */
890 int rrb_pr
= (cfm
>> 32) & 0x3f;
892 /* Adjust the register number to account for register rotation. */
894 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
896 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
897 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
900 else if (prN_val
== 1)
902 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
906 /* The ia64 needs to convert between various ieee floating-point formats
907 and the special ia64 floating point register format. */
910 ia64_convert_register_p (int regno
, struct type
*type
)
912 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
916 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
917 struct type
*valtype
, gdb_byte
*out
)
919 char in
[MAX_REGISTER_SIZE
];
920 frame_register_read (frame
, regnum
, in
);
921 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
925 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
926 struct type
*valtype
, const gdb_byte
*in
)
928 char out
[MAX_REGISTER_SIZE
];
929 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
930 put_frame_register (frame
, regnum
, out
);
934 /* Limit the number of skipped non-prologue instructions since examining
935 of the prologue is expensive. */
936 static int max_skip_non_prologue_insns
= 40;
938 /* Given PC representing the starting address of a function, and
939 LIM_PC which is the (sloppy) limit to which to scan when looking
940 for a prologue, attempt to further refine this limit by using
941 the line data in the symbol table. If successful, a better guess
942 on where the prologue ends is returned, otherwise the previous
943 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
944 which will be set to indicate whether the returned limit may be
945 used with no further scanning in the event that the function is
948 /* FIXME: cagney/2004-02-14: This function and logic have largely been
949 superseded by skip_prologue_using_sal. */
952 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
954 struct symtab_and_line prologue_sal
;
955 CORE_ADDR start_pc
= pc
;
957 /* Start off not trusting the limit. */
960 prologue_sal
= find_pc_line (pc
, 0);
961 if (prologue_sal
.line
!= 0)
964 CORE_ADDR addr
= prologue_sal
.end
;
966 /* Handle the case in which compiler's optimizer/scheduler
967 has moved instructions into the prologue. We scan ahead
968 in the function looking for address ranges whose corresponding
969 line number is less than or equal to the first one that we
970 found for the function. (It can be less than when the
971 scheduler puts a body instruction before the first prologue
973 for (i
= 2 * max_skip_non_prologue_insns
;
974 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
977 struct symtab_and_line sal
;
979 sal
= find_pc_line (addr
, 0);
982 if (sal
.line
<= prologue_sal
.line
983 && sal
.symtab
== prologue_sal
.symtab
)
990 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
992 lim_pc
= prologue_sal
.end
;
993 if (start_pc
== get_pc_function_start (lim_pc
))
1000 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1001 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1002 || (14 <= (_regnum_) && (_regnum_) <= 31))
1003 #define imm9(_instr_) \
1004 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1005 | (((_instr_) & 0x00008000000LL) >> 20) \
1006 | (((_instr_) & 0x00000001fc0LL) >> 6))
1008 /* Allocate and initialize a frame cache. */
1010 static struct ia64_frame_cache
*
1011 ia64_alloc_frame_cache (void)
1013 struct ia64_frame_cache
*cache
;
1016 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1022 cache
->prev_cfm
= 0;
1028 cache
->frameless
= 1;
1030 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1031 cache
->saved_regs
[i
] = 0;
1037 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1040 CORE_ADDR last_prologue_pc
= pc
;
1041 instruction_type it
;
1046 int unat_save_reg
= 0;
1047 int pr_save_reg
= 0;
1048 int mem_stack_frame_size
= 0;
1050 CORE_ADDR spill_addr
= 0;
1053 char reg_contents
[256];
1059 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1061 memset (instores
, 0, sizeof instores
);
1062 memset (infpstores
, 0, sizeof infpstores
);
1063 memset (reg_contents
, 0, sizeof reg_contents
);
1065 if (cache
->after_prologue
!= 0
1066 && cache
->after_prologue
<= lim_pc
)
1067 return cache
->after_prologue
;
1069 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1070 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1072 /* We want to check if we have a recognizable function start before we
1073 look ahead for a prologue. */
1074 if (pc
< lim_pc
&& next_pc
1075 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1077 /* alloc - start of a regular function. */
1078 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1079 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1080 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1081 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1083 /* Verify that the current cfm matches what we think is the
1084 function start. If we have somehow jumped within a function,
1085 we do not want to interpret the prologue and calculate the
1086 addresses of various registers such as the return address.
1087 We will instead treat the frame as frameless. */
1089 (sof
== (cache
->cfm
& 0x7f) &&
1090 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1094 last_prologue_pc
= next_pc
;
1099 /* Look for a leaf routine. */
1100 if (pc
< lim_pc
&& next_pc
1101 && (it
== I
|| it
== M
)
1102 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1104 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1105 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1106 | ((instr
& 0x001f8000000LL
) >> 20)
1107 | ((instr
& 0x000000fe000LL
) >> 13));
1108 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1109 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1110 int qp
= (int) (instr
& 0x0000000003fLL
);
1111 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1113 /* mov r2, r12 - beginning of leaf routine */
1115 last_prologue_pc
= next_pc
;
1119 /* If we don't recognize a regular function or leaf routine, we are
1125 last_prologue_pc
= lim_pc
;
1129 /* Loop, looking for prologue instructions, keeping track of
1130 where preserved registers were spilled. */
1133 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1137 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1139 /* Exit loop upon hitting a non-nop branch instruction. */
1144 else if (((instr
& 0x3fLL
) != 0LL) &&
1145 (frameless
|| ret_reg
!= 0))
1147 /* Exit loop upon hitting a predicated instruction if
1148 we already have the return register or if we are frameless. */
1153 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1156 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1157 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1158 int qp
= (int) (instr
& 0x0000000003f);
1160 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1163 last_prologue_pc
= next_pc
;
1166 else if ((it
== I
|| it
== M
)
1167 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1169 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1170 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1171 | ((instr
& 0x001f8000000LL
) >> 20)
1172 | ((instr
& 0x000000fe000LL
) >> 13));
1173 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1174 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1175 int qp
= (int) (instr
& 0x0000000003fLL
);
1177 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1181 last_prologue_pc
= next_pc
;
1183 else if (qp
== 0 && rN
== 12 && rM
== 12)
1185 /* adds r12, -mem_stack_frame_size, r12 */
1186 mem_stack_frame_size
-= imm
;
1187 last_prologue_pc
= next_pc
;
1189 else if (qp
== 0 && rN
== 2
1190 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1192 char buf
[MAX_REGISTER_SIZE
];
1193 CORE_ADDR saved_sp
= 0;
1194 /* adds r2, spilloffset, rFramePointer
1196 adds r2, spilloffset, r12
1198 Get ready for stf.spill or st8.spill instructions.
1199 The address to start spilling at is loaded into r2.
1200 FIXME: Why r2? That's what gcc currently uses; it
1201 could well be different for other compilers. */
1203 /* Hmm... whether or not this will work will depend on
1204 where the pc is. If it's still early in the prologue
1205 this'll be wrong. FIXME */
1208 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1209 saved_sp
= extract_unsigned_integer (buf
, 8);
1211 spill_addr
= saved_sp
1212 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1215 last_prologue_pc
= next_pc
;
1217 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1218 rN
< 256 && imm
== 0)
1220 /* mov rN, rM where rM is an input register */
1221 reg_contents
[rN
] = rM
;
1222 last_prologue_pc
= next_pc
;
1224 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1228 last_prologue_pc
= next_pc
;
1233 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1234 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1236 /* stf.spill [rN] = fM, imm9
1238 stf.spill [rN] = fM */
1240 int imm
= imm9(instr
);
1241 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1242 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1243 int qp
= (int) (instr
& 0x0000000003fLL
);
1244 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1245 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1247 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1249 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1252 spill_addr
= 0; /* last one; must be done */
1253 last_prologue_pc
= next_pc
;
1256 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1257 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1263 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1264 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1265 int qp
= (int) (instr
& 0x0000000003fLL
);
1266 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1268 /* We have something like "mov.m r3 = ar.unat". Remember the
1269 r3 (or whatever) and watch for a store of this register... */
1271 last_prologue_pc
= next_pc
;
1274 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1277 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1278 int qp
= (int) (instr
& 0x0000000003fLL
);
1279 if (qp
== 0 && isScratch (rN
))
1282 last_prologue_pc
= next_pc
;
1286 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1287 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1291 st8 [rN] = rM, imm9 */
1292 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1293 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1294 int qp
= (int) (instr
& 0x0000000003fLL
);
1295 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1296 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1297 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1299 /* We've found a spill of either the UNAT register or the PR
1300 register. (Well, not exactly; what we've actually found is
1301 a spill of the register that UNAT or PR was moved to).
1302 Record that fact and move on... */
1303 if (rM
== unat_save_reg
)
1305 /* Track UNAT register */
1306 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1311 /* Track PR register */
1312 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1315 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1316 /* st8 [rN] = rM, imm9 */
1317 spill_addr
+= imm9(instr
);
1319 spill_addr
= 0; /* must be done spilling */
1320 last_prologue_pc
= next_pc
;
1322 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1324 /* Allow up to one store of each input register. */
1325 instores
[rM
-32] = 1;
1326 last_prologue_pc
= next_pc
;
1328 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1329 !instores
[indirect
-32])
1331 /* Allow an indirect store of an input register. */
1332 instores
[indirect
-32] = 1;
1333 last_prologue_pc
= next_pc
;
1336 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1343 Note that the st8 case is handled in the clause above.
1345 Advance over stores of input registers. One store per input
1346 register is permitted. */
1347 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1348 int qp
= (int) (instr
& 0x0000000003fLL
);
1349 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1350 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1352 instores
[rM
-32] = 1;
1353 last_prologue_pc
= next_pc
;
1355 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1356 !instores
[indirect
-32])
1358 /* Allow an indirect store of an input register. */
1359 instores
[indirect
-32] = 1;
1360 last_prologue_pc
= next_pc
;
1363 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1370 Advance over stores of floating point input registers. Again
1371 one store per register is permitted */
1372 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1373 int qp
= (int) (instr
& 0x0000000003fLL
);
1374 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1376 infpstores
[fM
-8] = 1;
1377 last_prologue_pc
= next_pc
;
1381 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1382 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1384 /* st8.spill [rN] = rM
1386 st8.spill [rN] = rM, imm9 */
1387 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1388 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1389 int qp
= (int) (instr
& 0x0000000003fLL
);
1390 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1392 /* We've found a spill of one of the preserved general purpose
1393 regs. Record the spill address and advance the spill
1394 register if appropriate. */
1395 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1396 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1397 /* st8.spill [rN] = rM, imm9 */
1398 spill_addr
+= imm9(instr
);
1400 spill_addr
= 0; /* Done spilling */
1401 last_prologue_pc
= next_pc
;
1408 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1409 registers for the previous frame which will be needed later. */
1411 if (!frameless
&& next_frame
)
1413 /* Extract the size of the rotating portion of the stack
1414 frame and the register rename base from the current
1420 rrb_gr
= (cfm
>> 18) & 0x7f;
1422 /* Find the bof (beginning of frame). */
1423 bof
= rse_address_add (cache
->bsp
, -sof
);
1425 for (i
= 0, addr
= bof
;
1429 if (IS_NaT_COLLECTION_ADDR (addr
))
1433 if (i
+32 == cfm_reg
)
1434 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1435 if (i
+32 == ret_reg
)
1436 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1438 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1441 /* For the previous argument registers we require the previous bof.
1442 If we can't find the previous cfm, then we can do nothing. */
1444 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1446 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1448 else if (cfm_reg
!= 0)
1450 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1451 cfm
= extract_unsigned_integer (buf
, 8);
1453 cache
->prev_cfm
= cfm
;
1457 sor
= ((cfm
>> 14) & 0xf) * 8;
1459 sol
= (cfm
>> 7) & 0x7f;
1460 rrb_gr
= (cfm
>> 18) & 0x7f;
1462 /* The previous bof only requires subtraction of the sol (size of locals)
1463 due to the overlap between output and input of subsequent frames. */
1464 bof
= rse_address_add (bof
, -sol
);
1466 for (i
= 0, addr
= bof
;
1470 if (IS_NaT_COLLECTION_ADDR (addr
))
1475 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1478 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1484 /* Try and trust the lim_pc value whenever possible. */
1485 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1486 last_prologue_pc
= lim_pc
;
1488 cache
->frameless
= frameless
;
1489 cache
->after_prologue
= last_prologue_pc
;
1490 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1491 cache
->fp_reg
= fp_reg
;
1493 return last_prologue_pc
;
1497 ia64_skip_prologue (CORE_ADDR pc
)
1499 struct ia64_frame_cache cache
;
1501 cache
.after_prologue
= 0;
1505 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1506 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1510 /* Normal frames. */
1512 static struct ia64_frame_cache
*
1513 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1515 struct ia64_frame_cache
*cache
;
1517 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1523 cache
= ia64_alloc_frame_cache ();
1524 *this_cache
= cache
;
1526 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1527 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1529 /* We always want the bsp to point to the end of frame.
1530 This way, we can always get the beginning of frame (bof)
1531 by subtracting frame size. */
1532 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1533 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1535 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1536 psr
= extract_unsigned_integer (buf
, 8);
1538 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1539 cfm
= extract_unsigned_integer (buf
, 8);
1541 cache
->sof
= (cfm
& 0x7f);
1542 cache
->sol
= (cfm
>> 7) & 0x7f;
1543 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1547 cache
->pc
= frame_func_unwind (next_frame
);
1550 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1552 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1558 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1559 struct frame_id
*this_id
)
1561 struct ia64_frame_cache
*cache
=
1562 ia64_frame_cache (next_frame
, this_cache
);
1564 /* If outermost frame, mark with null frame id. */
1565 if (cache
->base
== 0)
1566 (*this_id
) = null_frame_id
;
1568 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1569 if (gdbarch_debug
>= 1)
1570 fprintf_unfiltered (gdb_stdlog
,
1571 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1572 paddr_nz (this_id
->code_addr
),
1573 paddr_nz (this_id
->stack_addr
),
1574 paddr_nz (cache
->bsp
), next_frame
);
1578 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1579 int regnum
, int *optimizedp
,
1580 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1581 int *realnump
, gdb_byte
*valuep
)
1583 struct ia64_frame_cache
*cache
=
1584 ia64_frame_cache (next_frame
, this_cache
);
1585 char dummy_valp
[MAX_REGISTER_SIZE
];
1588 gdb_assert (regnum
>= 0);
1590 if (!target_has_registers
)
1591 error (_("No registers."));
1598 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1599 when valuep is not supplied. */
1601 valuep
= dummy_valp
;
1603 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1605 if (regnum
== SP_REGNUM
)
1607 /* Handle SP values for all frames but the topmost. */
1608 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1611 else if (regnum
== IA64_BSP_REGNUM
)
1613 char cfm_valuep
[MAX_REGISTER_SIZE
];
1616 enum lval_type cfm_lval
;
1618 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1620 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1621 This corresponds to what the hardware bsp register will be if we pop the frame
1622 back which is why we might have been called. We know the beginning of the current
1623 frame is cache->bsp - cache->sof. This value in the previous frame points to
1624 the start of the output registers. We can calculate the end of that frame by adding
1625 the size of output (sof (size of frame) - sol (size of locals)). */
1626 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1627 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1628 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1630 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1631 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1633 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1636 else if (regnum
== IA64_CFM_REGNUM
)
1638 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1642 *lvalp
= lval_memory
;
1644 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1646 else if (cache
->prev_cfm
)
1647 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1648 else if (cache
->frameless
)
1651 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1654 else if (regnum
== IA64_VFP_REGNUM
)
1656 /* If the function in question uses an automatic register (r32-r127)
1657 for the frame pointer, it'll be found by ia64_find_saved_register()
1658 above. If the function lacks one of these frame pointers, we can
1659 still provide a value since we know the size of the frame. */
1660 CORE_ADDR vfp
= cache
->base
;
1661 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1663 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1665 char pr_valuep
[MAX_REGISTER_SIZE
];
1668 enum lval_type pr_lval
;
1671 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1672 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1673 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1675 /* Fetch predicate register rename base from current frame
1676 marker for this frame. */
1677 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1679 /* Adjust the register number to account for register rotation. */
1680 regnum
= VP16_REGNUM
1681 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1683 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1684 regnum
- VP0_REGNUM
, 1);
1685 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1687 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1689 char unat_valuep
[MAX_REGISTER_SIZE
];
1692 enum lval_type unat_lval
;
1693 CORE_ADDR unat_addr
;
1695 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1696 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1697 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1698 regnum
- IA64_NAT0_REGNUM
, 1);
1699 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1702 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1705 /* Find address of general register corresponding to nat bit we're
1709 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1713 /* Compute address of nat collection bits. */
1714 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1716 CORE_ADDR nat_collection
;
1718 /* If our nat collection address is bigger than bsp, we have to get
1719 the nat collection from rnat. Otherwise, we fetch the nat
1720 collection from the computed address. */
1721 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1722 bsp
= extract_unsigned_integer (buf
, 8);
1723 if (nat_addr
>= bsp
)
1725 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1726 nat_collection
= extract_unsigned_integer (buf
, 8);
1729 nat_collection
= read_memory_integer (nat_addr
, 8);
1730 nat_bit
= (gr_addr
>> 3) & 0x3f;
1731 natval
= (nat_collection
>> nat_bit
) & 1;
1734 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1736 else if (regnum
== IA64_IP_REGNUM
)
1739 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1743 *lvalp
= lval_memory
;
1745 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1746 pc
= extract_unsigned_integer (buf
, 8);
1748 else if (cache
->frameless
)
1750 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1751 pc
= extract_unsigned_integer (buf
, 8);
1754 store_unsigned_integer (valuep
, 8, pc
);
1756 else if (regnum
== IA64_PSR_REGNUM
)
1758 /* We don't know how to get the complete previous PSR, but we need it for
1759 the slot information when we unwind the pc (pc is formed of IP register
1760 plus slot information from PSR). To get the previous slot information,
1761 we mask it off the return address. */
1762 ULONGEST slot_num
= 0;
1765 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1767 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1768 psr
= extract_unsigned_integer (buf
, 8);
1772 *lvalp
= lval_memory
;
1774 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1775 pc
= extract_unsigned_integer (buf
, 8);
1777 else if (cache
->frameless
)
1780 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1781 pc
= extract_unsigned_integer (buf
, 8);
1783 psr
&= ~(3LL << 41);
1784 slot_num
= pc
& 0x3LL
;
1785 psr
|= (CORE_ADDR
)slot_num
<< 41;
1786 store_unsigned_integer (valuep
, 8, psr
);
1788 else if (regnum
== IA64_BR0_REGNUM
)
1791 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1794 *lvalp
= lval_memory
;
1796 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1797 br0
= extract_unsigned_integer (buf
, 8);
1799 store_unsigned_integer (valuep
, 8, br0
);
1801 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1802 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1805 if (regnum
>= V32_REGNUM
)
1806 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1807 addr
= cache
->saved_regs
[regnum
];
1810 *lvalp
= lval_memory
;
1812 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1814 else if (cache
->frameless
)
1816 char r_valuep
[MAX_REGISTER_SIZE
];
1819 enum lval_type r_lval
;
1821 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1823 if (regnum
>= V32_REGNUM
)
1824 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1825 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1826 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1827 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1828 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1829 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1830 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1831 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1833 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1834 *lvalp
= lval_memory
;
1836 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1842 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1844 /* Fetch floating point register rename base from current
1845 frame marker for this frame. */
1846 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1848 /* Adjust the floating point register number to account for
1849 register rotation. */
1850 regnum
= IA64_FR32_REGNUM
1851 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1854 /* If we have stored a memory address, access the register. */
1855 addr
= cache
->saved_regs
[regnum
];
1858 *lvalp
= lval_memory
;
1860 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1862 /* Otherwise, punt and get the current value of the register. */
1864 frame_unwind_register (next_frame
, regnum
, valuep
);
1867 if (gdbarch_debug
>= 1)
1868 fprintf_unfiltered (gdb_stdlog
,
1869 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1870 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1871 ? ia64_register_names
[regnum
] : "r??"),
1872 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1875 static const struct frame_unwind ia64_frame_unwind
=
1878 &ia64_frame_this_id
,
1879 &ia64_frame_prev_register
1882 static const struct frame_unwind
*
1883 ia64_frame_sniffer (struct frame_info
*next_frame
)
1885 return &ia64_frame_unwind
;
1888 /* Signal trampolines. */
1891 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1893 if (SIGCONTEXT_REGISTER_ADDRESS
)
1897 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1898 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1899 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1900 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1901 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1902 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1903 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1904 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1905 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1906 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1907 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1908 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1909 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1910 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1911 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1912 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1913 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1914 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1915 cache
->saved_regs
[IA64_LC_REGNUM
] =
1916 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1917 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1918 cache
->saved_regs
[regno
] =
1919 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1920 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1921 cache
->saved_regs
[regno
] =
1922 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1923 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1924 cache
->saved_regs
[regno
] =
1925 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1929 static struct ia64_frame_cache
*
1930 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1932 struct ia64_frame_cache
*cache
;
1940 cache
= ia64_alloc_frame_cache ();
1942 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1943 /* Note that frame size is hard-coded below. We cannot calculate it
1944 via prologue examination. */
1945 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1947 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1948 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1950 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1951 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1952 cache
->sof
= cache
->cfm
& 0x7f;
1954 ia64_sigtramp_frame_init_saved_regs (cache
);
1956 *this_cache
= cache
;
1961 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1962 void **this_cache
, struct frame_id
*this_id
)
1964 struct ia64_frame_cache
*cache
=
1965 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1967 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1968 if (gdbarch_debug
>= 1)
1969 fprintf_unfiltered (gdb_stdlog
,
1970 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1971 paddr_nz (this_id
->code_addr
),
1972 paddr_nz (this_id
->stack_addr
),
1973 paddr_nz (cache
->bsp
), next_frame
);
1977 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1979 int regnum
, int *optimizedp
,
1980 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1981 int *realnump
, gdb_byte
*valuep
)
1983 char dummy_valp
[MAX_REGISTER_SIZE
];
1984 char buf
[MAX_REGISTER_SIZE
];
1986 struct ia64_frame_cache
*cache
=
1987 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1989 gdb_assert (regnum
>= 0);
1991 if (!target_has_registers
)
1992 error (_("No registers."));
1999 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2000 when valuep is not supplied. */
2002 valuep
= dummy_valp
;
2004 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2006 if (regnum
== IA64_IP_REGNUM
)
2009 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2013 *lvalp
= lval_memory
;
2015 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2016 pc
= extract_unsigned_integer (buf
, 8);
2019 store_unsigned_integer (valuep
, 8, pc
);
2021 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2022 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2025 if (regnum
>= V32_REGNUM
)
2026 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2027 addr
= cache
->saved_regs
[regnum
];
2030 *lvalp
= lval_memory
;
2032 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2037 /* All other registers not listed above. */
2038 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2041 *lvalp
= lval_memory
;
2043 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2047 if (gdbarch_debug
>= 1)
2048 fprintf_unfiltered (gdb_stdlog
,
2049 "sigtramp prev register <%s> is 0x%s\n",
2050 (regnum
< IA64_GR32_REGNUM
2051 || (regnum
> IA64_GR127_REGNUM
2052 && regnum
< LAST_PSEUDO_REGNUM
))
2053 ? ia64_register_names
[regnum
]
2054 : (regnum
< LAST_PSEUDO_REGNUM
2055 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2057 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2060 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2063 ia64_sigtramp_frame_this_id
,
2064 ia64_sigtramp_frame_prev_register
2067 static const struct frame_unwind
*
2068 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2071 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2073 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2074 if (legacy_pc_in_sigtramp (pc
, name
))
2075 return &ia64_sigtramp_frame_unwind
;
2082 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2084 struct ia64_frame_cache
*cache
=
2085 ia64_frame_cache (next_frame
, this_cache
);
2090 static const struct frame_base ia64_frame_base
=
2093 ia64_frame_base_address
,
2094 ia64_frame_base_address
,
2095 ia64_frame_base_address
2098 #ifdef HAVE_LIBUNWIND_IA64_H
2100 struct ia64_unwind_table_entry
2102 unw_word_t start_offset
;
2103 unw_word_t end_offset
;
2104 unw_word_t info_offset
;
2107 static __inline__
uint64_t
2108 ia64_rse_slot_num (uint64_t addr
)
2110 return (addr
>> 3) & 0x3f;
2113 /* Skip over a designated number of registers in the backing
2114 store, remembering every 64th position is for NAT. */
2115 static __inline__
uint64_t
2116 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2118 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2122 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2125 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2126 number to a libunwind register number. */
2128 ia64_gdb2uw_regnum (int regnum
)
2130 if (regnum
== sp_regnum
)
2132 else if (regnum
== IA64_BSP_REGNUM
)
2133 return UNW_IA64_BSP
;
2134 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2135 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2136 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2137 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2138 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2139 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2140 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2142 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2143 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2144 else if (regnum
== IA64_PR_REGNUM
)
2146 else if (regnum
== IA64_IP_REGNUM
)
2148 else if (regnum
== IA64_CFM_REGNUM
)
2149 return UNW_IA64_CFM
;
2150 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2151 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2152 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2153 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2158 /* Gdb libunwind-frame callback function to convert from a libunwind register
2159 number to a ia64 gdb register number. */
2161 ia64_uw2gdb_regnum (int uw_regnum
)
2163 if (uw_regnum
== UNW_IA64_SP
)
2165 else if (uw_regnum
== UNW_IA64_BSP
)
2166 return IA64_BSP_REGNUM
;
2167 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2168 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2169 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2170 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2171 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2172 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2173 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2174 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2175 else if (uw_regnum
== UNW_IA64_PR
)
2176 return IA64_PR_REGNUM
;
2177 else if (uw_regnum
== UNW_REG_IP
)
2178 return IA64_IP_REGNUM
;
2179 else if (uw_regnum
== UNW_IA64_CFM
)
2180 return IA64_CFM_REGNUM
;
2181 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2182 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2183 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2184 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2189 /* Gdb libunwind-frame callback function to reveal if register is a float
2192 ia64_is_fpreg (int uw_regnum
)
2194 return unw_is_fpreg (uw_regnum
);
2197 /* Libunwind callback accessor function for general registers. */
2199 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2200 int write
, void *arg
)
2202 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2203 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2204 struct frame_info
*next_frame
= arg
;
2205 long new_sof
, old_sof
;
2206 char buf
[MAX_REGISTER_SIZE
];
2211 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2217 ia64_write_pc (*val
, inferior_ptid
);
2220 case UNW_IA64_AR_BSPSTORE
:
2221 write_register (IA64_BSP_REGNUM
, *val
);
2224 case UNW_IA64_AR_BSP
:
2226 /* Account for the fact that ptrace() expects bsp to point
2227 after the current register frame. */
2228 cfm
= read_register (IA64_CFM_REGNUM
);
2230 bsp
= ia64_rse_skip_regs (*val
, sof
);
2231 write_register (IA64_BSP_REGNUM
, bsp
);
2235 /* If we change CFM, we need to adjust ptrace's notion of
2236 bsp accordingly, so that the real bsp remains
2238 bsp
= read_register (IA64_BSP_REGNUM
);
2239 cfm
= read_register (IA64_CFM_REGNUM
);
2240 old_sof
= (cfm
& 0x7f);
2241 new_sof
= (*val
& 0x7f);
2242 if (old_sof
!= new_sof
)
2244 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2245 write_register (IA64_BSP_REGNUM
, bsp
);
2247 write_register (IA64_CFM_REGNUM
, *val
);
2251 write_register (regnum
, *val
);
2254 if (gdbarch_debug
>= 1)
2255 fprintf_unfiltered (gdb_stdlog
,
2256 " access_reg: to cache: %4s=0x%s\n",
2257 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2258 ? ia64_register_names
[regnum
] : "r??"),
2266 /* Libunwind expects to see the pc value which means the slot number
2267 from the psr must be merged with the ip word address. */
2268 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2269 ip
= extract_unsigned_integer (buf
, 8);
2270 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2271 psr
= extract_unsigned_integer (buf
, 8);
2272 *val
= ip
| ((psr
>> 41) & 0x3);
2275 case UNW_IA64_AR_BSP
:
2276 /* Libunwind expects to see the beginning of the current register
2277 frame so we must account for the fact that ptrace() will return a value
2278 for bsp that points *after* the current register frame. */
2279 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2280 bsp
= extract_unsigned_integer (buf
, 8);
2281 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2282 cfm
= extract_unsigned_integer (buf
, 8);
2284 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2287 case UNW_IA64_AR_BSPSTORE
:
2288 /* Libunwind wants bspstore to be after the current register frame.
2289 This is what ptrace() and gdb treats as the regular bsp value. */
2290 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2291 *val
= extract_unsigned_integer (buf
, 8);
2295 /* For all other registers, just unwind the value directly. */
2296 frame_unwind_register (next_frame
, regnum
, buf
);
2297 *val
= extract_unsigned_integer (buf
, 8);
2301 if (gdbarch_debug
>= 1)
2302 fprintf_unfiltered (gdb_stdlog
,
2303 " access_reg: from cache: %4s=0x%s\n",
2304 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2305 ? ia64_register_names
[regnum
] : "r??"),
2311 /* Libunwind callback accessor function for floating-point registers. */
2313 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2314 int write
, void *arg
)
2316 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2319 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2321 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2325 /* Libunwind callback accessor function for top-level rse registers. */
2327 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2328 int write
, void *arg
)
2330 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2331 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2332 long new_sof
, old_sof
;
2337 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2343 ia64_write_pc (*val
, inferior_ptid
);
2346 case UNW_IA64_AR_BSPSTORE
:
2347 write_register (IA64_BSP_REGNUM
, *val
);
2350 case UNW_IA64_AR_BSP
:
2352 /* Account for the fact that ptrace() expects bsp to point
2353 after the current register frame. */
2354 cfm
= read_register (IA64_CFM_REGNUM
);
2356 bsp
= ia64_rse_skip_regs (*val
, sof
);
2357 write_register (IA64_BSP_REGNUM
, bsp
);
2361 /* If we change CFM, we need to adjust ptrace's notion of
2362 bsp accordingly, so that the real bsp remains
2364 bsp
= read_register (IA64_BSP_REGNUM
);
2365 cfm
= read_register (IA64_CFM_REGNUM
);
2366 old_sof
= (cfm
& 0x7f);
2367 new_sof
= (*val
& 0x7f);
2368 if (old_sof
!= new_sof
)
2370 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2371 write_register (IA64_BSP_REGNUM
, bsp
);
2373 write_register (IA64_CFM_REGNUM
, *val
);
2377 write_register (regnum
, *val
);
2380 if (gdbarch_debug
>= 1)
2381 fprintf_unfiltered (gdb_stdlog
,
2382 " access_rse_reg: to cache: %4s=0x%s\n",
2383 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2384 ? ia64_register_names
[regnum
] : "r??"),
2392 /* Libunwind expects to see the pc value which means the slot number
2393 from the psr must be merged with the ip word address. */
2394 ip
= read_register (IA64_IP_REGNUM
);
2395 psr
= read_register (IA64_PSR_REGNUM
);
2396 *val
= ip
| ((psr
>> 41) & 0x3);
2399 case UNW_IA64_AR_BSP
:
2400 /* Libunwind expects to see the beginning of the current register
2401 frame so we must account for the fact that ptrace() will return a value
2402 for bsp that points *after* the current register frame. */
2403 bsp
= read_register (IA64_BSP_REGNUM
);
2404 cfm
= read_register (IA64_CFM_REGNUM
);
2406 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2409 case UNW_IA64_AR_BSPSTORE
:
2410 /* Libunwind wants bspstore to be after the current register frame.
2411 This is what ptrace() and gdb treats as the regular bsp value. */
2412 *val
= read_register (IA64_BSP_REGNUM
);
2416 /* For all other registers, just read the value directly. */
2417 *val
= read_register (regnum
);
2422 if (gdbarch_debug
>= 1)
2423 fprintf_unfiltered (gdb_stdlog
,
2424 " access_rse_reg: from cache: %4s=0x%s\n",
2425 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2426 ? ia64_register_names
[regnum
] : "r??"),
2432 /* Libunwind callback accessor function for accessing memory. */
2434 ia64_access_mem (unw_addr_space_t as
,
2435 unw_word_t addr
, unw_word_t
*val
,
2436 int write
, void *arg
)
2438 if (addr
- KERNEL_START
< ktab_size
)
2440 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2441 + (addr
- KERNEL_START
));
2450 /* XXX do we need to normalize byte-order here? */
2452 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2454 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2457 /* Call low-level function to access the kernel unwind table. */
2459 getunwind_table (void *buf
, size_t len
)
2463 /* FIXME drow/2005-09-10: This code used to call
2464 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2465 for the currently running ia64-linux kernel. That data should
2466 come from the core file and be accessed via the auxv vector; if
2467 we want to preserve fall back to the running kernel's table, then
2468 we should find a way to override the corefile layer's
2469 xfer_partial method. */
2470 x
= target_read_partial (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
, NULL
,
2476 /* Get the kernel unwind table. */
2478 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2480 static struct ia64_table_entry
*etab
;
2485 size
= getunwind_table (NULL
, 0);
2487 return -UNW_ENOINFO
;
2489 ktab
= xmalloc (ktab_size
);
2490 getunwind_table (ktab
, ktab_size
);
2492 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2493 etab
->info_offset
+= KERNEL_START
;
2496 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2497 return -UNW_ENOINFO
;
2499 di
->format
= UNW_INFO_FORMAT_TABLE
;
2501 di
->start_ip
= ktab
[0].start_offset
;
2502 di
->end_ip
= etab
[-1].end_offset
;
2503 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2504 di
->u
.ti
.segbase
= 0;
2505 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2506 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2508 if (gdbarch_debug
>= 1)
2509 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2510 "segbase=0x%s, length=%s, gp=0x%s\n",
2511 (char *) di
->u
.ti
.name_ptr
,
2512 paddr_nz (di
->u
.ti
.segbase
),
2513 paddr_u (di
->u
.ti
.table_len
),
2518 /* Find the unwind table entry for a specified address. */
2520 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2521 unw_dyn_info_t
*dip
, void **buf
)
2523 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2524 Elf_Internal_Ehdr
*ehdr
;
2525 unw_word_t segbase
= 0;
2526 CORE_ADDR load_base
;
2530 bfd
= objfile
->obfd
;
2532 ehdr
= elf_tdata (bfd
)->elf_header
;
2533 phdr
= elf_tdata (bfd
)->phdr
;
2535 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2537 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2539 switch (phdr
[i
].p_type
)
2542 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2547 case PT_IA_64_UNWIND
:
2548 p_unwind
= phdr
+ i
;
2556 if (!p_text
|| !p_unwind
)
2557 return -UNW_ENOINFO
;
2559 /* Verify that the segment that contains the IP also contains
2560 the static unwind table. If not, we may be in the Linux kernel's
2561 DSO gate page in which case the unwind table is another segment.
2562 Otherwise, we are dealing with runtime-generated code, for which we
2563 have no info here. */
2564 segbase
= p_text
->p_vaddr
+ load_base
;
2566 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2569 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2571 if (phdr
[i
].p_type
== PT_LOAD
2572 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2575 /* Get the segbase from the section containing the
2577 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2581 return -UNW_ENOINFO
;
2584 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2585 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2586 dip
->gp
= ia64_find_global_pointer (ip
);
2587 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2588 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2589 dip
->u
.rti
.segbase
= segbase
;
2590 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2591 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2596 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2598 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2599 int need_unwind_info
, void *arg
)
2601 struct obj_section
*sec
= find_pc_section (ip
);
2608 /* XXX This only works if the host and the target architecture are
2609 both ia64 and if the have (more or less) the same kernel
2611 if (get_kernel_table (ip
, &di
) < 0)
2612 return -UNW_ENOINFO
;
2614 if (gdbarch_debug
>= 1)
2615 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2616 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2617 "length=%s,data=0x%s)\n",
2618 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2619 paddr_nz (di
.u
.ti
.segbase
),
2620 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2622 paddr_u (di
.u
.ti
.table_len
),
2623 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2627 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2631 if (gdbarch_debug
>= 1)
2632 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2633 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2634 "length=%s,data=0x%s)\n",
2635 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2636 paddr_nz (di
.u
.rti
.segbase
),
2637 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2639 paddr_u (di
.u
.rti
.table_len
),
2640 paddr_nz (di
.u
.rti
.table_data
));
2643 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2646 /* We no longer need the dyn info storage so free it. */
2652 /* Libunwind callback accessor function for cleanup. */
2654 ia64_put_unwind_info (unw_addr_space_t as
,
2655 unw_proc_info_t
*pip
, void *arg
)
2657 /* Nothing required for now. */
2660 /* Libunwind callback accessor function to get head of the dynamic
2661 unwind-info registration list. */
2663 ia64_get_dyn_info_list (unw_addr_space_t as
,
2664 unw_word_t
*dilap
, void *arg
)
2666 struct obj_section
*text_sec
;
2667 struct objfile
*objfile
;
2668 unw_word_t ip
, addr
;
2672 if (!libunwind_is_initialized ())
2673 return -UNW_ENOINFO
;
2675 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2679 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2680 ip
= text_sec
->addr
;
2681 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2684 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2685 /* We no longer need the dyn info storage so free it. */
2690 if (gdbarch_debug
>= 1)
2691 fprintf_unfiltered (gdb_stdlog
,
2692 "dynamic unwind table in objfile %s "
2693 "at 0x%s (gp=0x%s)\n",
2694 bfd_get_filename (objfile
->obfd
),
2695 paddr_nz (addr
), paddr_nz (di
.gp
));
2701 return -UNW_ENOINFO
;
2705 /* Frame interface functions for libunwind. */
2708 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2709 struct frame_id
*this_id
)
2714 CORE_ADDR prev_ip
, addr
;
2715 int realnum
, optimized
;
2716 enum lval_type lval
;
2719 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2720 if (frame_id_eq (id
, null_frame_id
))
2722 (*this_id
) = null_frame_id
;
2726 /* We must add the bsp as the special address for frame comparison
2728 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2729 bsp
= extract_unsigned_integer (buf
, 8);
2731 /* If the previous frame pc value is 0, then we are at the end of the stack
2732 and don't want to unwind past this frame. We return a null frame_id to
2734 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2735 &optimized
, &lval
, &addr
, &realnum
, &prev_ip
);
2738 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2740 (*this_id
) = null_frame_id
;
2742 if (gdbarch_debug
>= 1)
2743 fprintf_unfiltered (gdb_stdlog
,
2744 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2745 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2746 paddr_nz (bsp
), next_frame
);
2750 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2752 int regnum
, int *optimizedp
,
2753 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2754 int *realnump
, gdb_byte
*valuep
)
2758 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2759 reg
= IA64_PR_REGNUM
;
2760 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2761 reg
= IA64_UNAT_REGNUM
;
2763 /* Let libunwind do most of the work. */
2764 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2765 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2767 /* No more to do if the value is not supposed to be supplied. */
2771 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2775 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2779 unsigned char buf
[MAX_REGISTER_SIZE
];
2781 /* Fetch predicate register rename base from current frame
2782 marker for this frame. */
2783 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2784 cfm
= extract_unsigned_integer (buf
, 8);
2785 rrb_pr
= (cfm
>> 32) & 0x3f;
2787 /* Adjust the register number to account for register rotation. */
2788 regnum
= VP16_REGNUM
2789 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2791 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2792 regnum
- VP0_REGNUM
, 1);
2793 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2795 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2799 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2800 regnum
- IA64_NAT0_REGNUM
, 1);
2801 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2804 else if (regnum
== IA64_BSP_REGNUM
)
2806 char cfm_valuep
[MAX_REGISTER_SIZE
];
2809 enum lval_type cfm_lval
;
2811 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2813 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2814 This corresponds to what the hardware bsp register will be if we pop the frame
2815 back which is why we might have been called. We know that libunwind will pass us back
2816 the beginning of the current frame so we should just add sof to it. */
2817 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2818 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2819 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2820 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2821 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2823 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2827 if (gdbarch_debug
>= 1)
2828 fprintf_unfiltered (gdb_stdlog
,
2829 "libunwind prev register <%s> is 0x%s\n",
2830 (regnum
< IA64_GR32_REGNUM
2831 || (regnum
> IA64_GR127_REGNUM
2832 && regnum
< LAST_PSEUDO_REGNUM
))
2833 ? ia64_register_names
[regnum
]
2834 : (regnum
< LAST_PSEUDO_REGNUM
2835 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2837 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2840 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2843 ia64_libunwind_frame_this_id
,
2844 ia64_libunwind_frame_prev_register
2847 static const struct frame_unwind
*
2848 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2850 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2851 return &ia64_libunwind_frame_unwind
;
2857 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2858 struct frame_id
*this_id
)
2865 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2866 if (frame_id_eq (id
, null_frame_id
))
2868 (*this_id
) = null_frame_id
;
2872 /* We must add the bsp as the special address for frame comparison
2874 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2875 bsp
= extract_unsigned_integer (buf
, 8);
2877 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2878 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2880 if (gdbarch_debug
>= 1)
2881 fprintf_unfiltered (gdb_stdlog
,
2882 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2883 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2884 paddr_nz (bsp
), next_frame
);
2888 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2890 int regnum
, int *optimizedp
,
2891 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2892 int *realnump
, gdb_byte
*valuep
)
2895 CORE_ADDR prev_ip
, addr
;
2896 int realnum
, optimized
;
2897 enum lval_type lval
;
2900 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2901 method of getting previous registers. */
2902 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2903 &optimized
, &lval
, &addr
, &realnum
, &prev_ip
);
2907 void *tmp_cache
= NULL
;
2908 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2909 addrp
, realnump
, valuep
);
2912 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2913 addrp
, realnump
, valuep
);
2916 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2919 ia64_libunwind_sigtramp_frame_this_id
,
2920 ia64_libunwind_sigtramp_frame_prev_register
2923 static const struct frame_unwind
*
2924 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2926 if (libunwind_is_initialized ())
2928 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2929 return &ia64_libunwind_sigtramp_frame_unwind
;
2933 return ia64_sigtramp_frame_sniffer (next_frame
);
2936 /* Set of libunwind callback acccessor functions. */
2937 static unw_accessors_t ia64_unw_accessors
=
2939 ia64_find_proc_info_x
,
2940 ia64_put_unwind_info
,
2941 ia64_get_dyn_info_list
,
2949 /* Set of special libunwind callback acccessor functions specific for accessing
2950 the rse registers. At the top of the stack, we want libunwind to figure out
2951 how to read r32 - r127. Though usually they are found sequentially in memory
2952 starting from $bof, this is not always true. */
2953 static unw_accessors_t ia64_unw_rse_accessors
=
2955 ia64_find_proc_info_x
,
2956 ia64_put_unwind_info
,
2957 ia64_get_dyn_info_list
,
2959 ia64_access_rse_reg
,
2965 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2966 static struct libunwind_descr ia64_libunwind_descr
=
2971 &ia64_unw_accessors
,
2972 &ia64_unw_rse_accessors
,
2975 #endif /* HAVE_LIBUNWIND_IA64_H */
2977 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2978 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2979 is the type (which is known to be struct, union or array). */
2981 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2983 struct type
*float_elt_type
;
2985 /* HFAs are structures (or arrays) consisting entirely of floating
2986 point values of the same length. Up to 8 of these are returned
2987 in registers. Don't use the struct convention when this is the
2989 float_elt_type
= is_float_or_hfa_type (type
);
2990 if (float_elt_type
!= NULL
2991 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2994 /* Other structs of length 32 or less are returned in r8-r11.
2995 Don't use the struct convention for those either. */
2996 return TYPE_LENGTH (type
) > 32;
3000 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3003 struct type
*float_elt_type
;
3005 float_elt_type
= is_float_or_hfa_type (type
);
3006 if (float_elt_type
!= NULL
)
3008 char from
[MAX_REGISTER_SIZE
];
3010 int regnum
= IA64_FR8_REGNUM
;
3011 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3015 regcache_cooked_read (regcache
, regnum
, from
);
3016 convert_typed_floating (from
, builtin_type_ia64_ext
,
3017 (char *)valbuf
+ offset
, float_elt_type
);
3018 offset
+= TYPE_LENGTH (float_elt_type
);
3026 int regnum
= IA64_GR8_REGNUM
;
3027 int reglen
= TYPE_LENGTH (ia64_register_type (NULL
, IA64_GR8_REGNUM
));
3028 int n
= TYPE_LENGTH (type
) / reglen
;
3029 int m
= TYPE_LENGTH (type
) % reglen
;
3034 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3035 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3042 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3043 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3049 ia64_extract_struct_value_address (struct regcache
*regcache
)
3051 error (_("ia64_extract_struct_value_address called and cannot get struct value address"));
3057 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3059 switch (TYPE_CODE (t
))
3063 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3070 case TYPE_CODE_ARRAY
:
3072 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3075 case TYPE_CODE_STRUCT
:
3079 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3080 if (!is_float_or_hfa_type_recurse
3081 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3092 /* Determine if the given type is one of the floating point types or
3093 and HFA (which is a struct, array, or combination thereof whose
3094 bottom-most elements are all of the same floating point type). */
3096 static struct type
*
3097 is_float_or_hfa_type (struct type
*t
)
3099 struct type
*et
= 0;
3101 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3105 /* Return 1 if the alignment of T is such that the next even slot
3106 should be used. Return 0, if the next available slot should
3107 be used. (See section 8.5.1 of the IA-64 Software Conventions
3108 and Runtime manual). */
3111 slot_alignment_is_next_even (struct type
*t
)
3113 switch (TYPE_CODE (t
))
3117 if (TYPE_LENGTH (t
) > 8)
3121 case TYPE_CODE_ARRAY
:
3123 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3124 case TYPE_CODE_STRUCT
:
3128 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3129 if (slot_alignment_is_next_even
3130 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3139 /* Attempt to find (and return) the global pointer for the given
3142 This is a rather nasty bit of code searchs for the .dynamic section
3143 in the objfile corresponding to the pc of the function we're trying
3144 to call. Once it finds the addresses at which the .dynamic section
3145 lives in the child process, it scans the Elf64_Dyn entries for a
3146 DT_PLTGOT tag. If it finds one of these, the corresponding
3147 d_un.d_ptr value is the global pointer. */
3150 ia64_find_global_pointer (CORE_ADDR faddr
)
3152 struct obj_section
*faddr_sect
;
3154 faddr_sect
= find_pc_section (faddr
);
3155 if (faddr_sect
!= NULL
)
3157 struct obj_section
*osect
;
3159 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3161 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3165 if (osect
< faddr_sect
->objfile
->sections_end
)
3170 while (addr
< osect
->endaddr
)
3176 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3179 tag
= extract_signed_integer (buf
, sizeof (buf
));
3181 if (tag
== DT_PLTGOT
)
3183 CORE_ADDR global_pointer
;
3185 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3188 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3191 return global_pointer
;
3204 /* Given a function's address, attempt to find (and return) the
3205 corresponding (canonical) function descriptor. Return 0 if
3208 find_extant_func_descr (CORE_ADDR faddr
)
3210 struct obj_section
*faddr_sect
;
3212 /* Return early if faddr is already a function descriptor. */
3213 faddr_sect
= find_pc_section (faddr
);
3214 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3217 if (faddr_sect
!= NULL
)
3219 struct obj_section
*osect
;
3220 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3222 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3226 if (osect
< faddr_sect
->objfile
->sections_end
)
3231 while (addr
< osect
->endaddr
)
3237 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3240 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3242 if (faddr
== faddr2
)
3252 /* Attempt to find a function descriptor corresponding to the
3253 given address. If none is found, construct one on the
3254 stack using the address at fdaptr. */
3257 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3261 fdesc
= find_extant_func_descr (faddr
);
3265 CORE_ADDR global_pointer
;
3271 global_pointer
= ia64_find_global_pointer (faddr
);
3273 if (global_pointer
== 0)
3274 global_pointer
= read_register (IA64_GR1_REGNUM
);
3276 store_unsigned_integer (buf
, 8, faddr
);
3277 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3279 write_memory (fdesc
, buf
, 16);
3285 /* Use the following routine when printing out function pointers
3286 so the user can see the function address rather than just the
3287 function descriptor. */
3289 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3290 struct target_ops
*targ
)
3292 struct obj_section
*s
;
3294 s
= find_pc_section (addr
);
3296 /* check if ADDR points to a function descriptor. */
3297 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3298 return read_memory_unsigned_integer (addr
, 8);
3304 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3310 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3311 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3312 int nargs
, struct value
**args
, CORE_ADDR sp
,
3313 int struct_return
, CORE_ADDR struct_addr
)
3319 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3321 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3322 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3326 /* Count the number of slots needed for the arguments. */
3327 for (argno
= 0; argno
< nargs
; argno
++)
3330 type
= check_typedef (value_type (arg
));
3331 len
= TYPE_LENGTH (type
);
3333 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3336 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3339 nslots
+= (len
+ 7) / 8;
3342 /* Divvy up the slots between the RSE and the memory stack. */
3343 rseslots
= (nslots
> 8) ? 8 : nslots
;
3344 memslots
= nslots
- rseslots
;
3346 /* Allocate a new RSE frame. */
3347 cfm
= read_register (IA64_CFM_REGNUM
);
3349 bsp
= read_register (IA64_BSP_REGNUM
);
3350 new_bsp
= rse_address_add (bsp
, rseslots
);
3351 write_register (IA64_BSP_REGNUM
, new_bsp
);
3353 pfs
= read_register (IA64_PFS_REGNUM
);
3354 pfs
&= 0xc000000000000000LL
;
3355 pfs
|= (cfm
& 0xffffffffffffLL
);
3356 write_register (IA64_PFS_REGNUM
, pfs
);
3358 cfm
&= 0xc000000000000000LL
;
3360 write_register (IA64_CFM_REGNUM
, cfm
);
3362 /* We will attempt to find function descriptors in the .opd segment,
3363 but if we can't we'll construct them ourselves. That being the
3364 case, we'll need to reserve space on the stack for them. */
3365 funcdescaddr
= sp
- nfuncargs
* 16;
3366 funcdescaddr
&= ~0xfLL
;
3368 /* Adjust the stack pointer to it's new value. The calling conventions
3369 require us to have 16 bytes of scratch, plus whatever space is
3370 necessary for the memory slots and our function descriptors. */
3371 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3372 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3374 /* Place the arguments where they belong. The arguments will be
3375 either placed in the RSE backing store or on the memory stack.
3376 In addition, floating point arguments or HFAs are placed in
3377 floating point registers. */
3379 floatreg
= IA64_FR8_REGNUM
;
3380 for (argno
= 0; argno
< nargs
; argno
++)
3382 struct type
*float_elt_type
;
3385 type
= check_typedef (value_type (arg
));
3386 len
= TYPE_LENGTH (type
);
3388 /* Special handling for function parameters. */
3390 && TYPE_CODE (type
) == TYPE_CODE_PTR
3391 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3395 store_unsigned_integer (val_buf
, 8,
3396 find_func_descr (extract_unsigned_integer (value_contents (arg
), 8),
3398 if (slotnum
< rseslots
)
3399 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3401 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3408 /* Skip odd slot if necessary... */
3409 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3417 memset (val_buf
, 0, 8);
3418 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3420 if (slotnum
< rseslots
)
3421 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3423 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3430 /* Handle floating point types (including HFAs). */
3431 float_elt_type
= is_float_or_hfa_type (type
);
3432 if (float_elt_type
!= NULL
)
3435 len
= TYPE_LENGTH (type
);
3436 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3438 char to
[MAX_REGISTER_SIZE
];
3439 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3440 to
, builtin_type_ia64_ext
);
3441 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3443 argoffset
+= TYPE_LENGTH (float_elt_type
);
3444 len
-= TYPE_LENGTH (float_elt_type
);
3449 /* Store the struct return value in r8 if necessary. */
3452 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3455 global_pointer
= ia64_find_global_pointer (func_addr
);
3457 if (global_pointer
!= 0)
3458 write_register (IA64_GR1_REGNUM
, global_pointer
);
3460 write_register (IA64_BR0_REGNUM
, bp_addr
);
3462 write_register (sp_regnum
, sp
);
3467 static struct frame_id
3468 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3473 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3474 sp
= extract_unsigned_integer (buf
, 8);
3476 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3477 bsp
= extract_unsigned_integer (buf
, 8);
3479 if (gdbarch_debug
>= 1)
3480 fprintf_unfiltered (gdb_stdlog
,
3481 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3482 paddr_nz (frame_pc_unwind (next_frame
)),
3483 paddr_nz (sp
), paddr_nz (bsp
));
3485 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3489 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3492 CORE_ADDR ip
, psr
, pc
;
3494 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3495 ip
= extract_unsigned_integer (buf
, 8);
3496 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3497 psr
= extract_unsigned_integer (buf
, 8);
3499 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3504 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3505 const gdb_byte
*valbuf
)
3507 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3509 char to
[MAX_REGISTER_SIZE
];
3510 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3511 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3512 target_store_registers (IA64_FR8_REGNUM
);
3515 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3519 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3520 struct regcache
*regcache
,
3521 CORE_ADDR memaddr
, int nr_bytes
,
3522 CORE_ADDR
*targ_addr
, int *targ_len
)
3524 *targ_addr
= memaddr
;
3525 *targ_len
= nr_bytes
;
3529 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3531 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3532 return print_insn_ia64 (memaddr
, info
);
3535 static struct gdbarch
*
3536 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3538 struct gdbarch
*gdbarch
;
3539 struct gdbarch_tdep
*tdep
;
3541 /* If there is already a candidate, use it. */
3542 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3544 return arches
->gdbarch
;
3546 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3547 gdbarch
= gdbarch_alloc (&info
, tdep
);
3549 tdep
->sigcontext_register_address
= 0;
3551 /* Define the ia64 floating-point format to gdb. */
3552 builtin_type_ia64_ext
=
3553 init_type (TYPE_CODE_FLT
, 128 / 8,
3554 0, "builtin_type_ia64_ext", NULL
);
3555 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = &floatformat_ia64_ext
;
3557 /* According to the ia64 specs, instructions that store long double
3558 floats in memory use a long-double format different than that
3559 used in the floating registers. The memory format matches the
3560 x86 extended float format which is 80 bits. An OS may choose to
3561 use this format (e.g. GNU/Linux) or choose to use a different
3562 format for storing long doubles (e.g. HPUX). In the latter case,
3563 the setting of the format may be moved/overridden in an
3564 OS-specific tdep file. */
3565 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
3567 set_gdbarch_short_bit (gdbarch
, 16);
3568 set_gdbarch_int_bit (gdbarch
, 32);
3569 set_gdbarch_long_bit (gdbarch
, 64);
3570 set_gdbarch_long_long_bit (gdbarch
, 64);
3571 set_gdbarch_float_bit (gdbarch
, 32);
3572 set_gdbarch_double_bit (gdbarch
, 64);
3573 set_gdbarch_long_double_bit (gdbarch
, 128);
3574 set_gdbarch_ptr_bit (gdbarch
, 64);
3576 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3577 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3578 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3579 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3581 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3582 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3583 gets a number of extra failures. */
3584 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3585 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3587 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3588 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3589 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3590 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3591 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3592 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3593 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3595 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3597 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3598 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3600 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3601 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3603 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3604 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3605 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3606 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3607 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3609 /* Settings for calling functions in the inferior. */
3610 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3611 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3612 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3614 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3615 #ifdef HAVE_LIBUNWIND_IA64_H
3616 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3617 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3618 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3620 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3622 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3623 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3625 /* Settings that should be unnecessary. */
3626 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3628 set_gdbarch_remote_translate_xfer_address (
3629 gdbarch
, ia64_remote_translate_xfer_address
);
3631 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3632 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3634 /* Hook in ABI-specific overrides, if they have been registered. */
3635 gdbarch_init_osabi (info
, gdbarch
);
3640 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3643 _initialize_ia64_tdep (void)
3645 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);