1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
24 #include "floatformat.h"
27 #include "reggroups.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
34 #include "elf/common.h" /* for DT_PLTGOT value */
39 #include "ia64-tdep.h"
42 #ifdef HAVE_LIBUNWIND_IA64_H
43 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
44 #include "ia64-libunwind-tdep.h"
46 /* Note: KERNEL_START is supposed to be an address which is not going
47 to ever contain any valid unwind info. For ia64 linux, the choice
48 of 0xc000000000000000 is fairly safe since that's uncached space.
50 We use KERNEL_START as follows: after obtaining the kernel's
51 unwind table via getunwind(), we project its unwind data into
52 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
53 when ia64_access_mem() sees a memory access to this
54 address-range, we redirect it to ktab instead.
56 None of this hackery is needed with a modern kernel/libcs
57 which uses the kernel virtual DSO to provide access to the
58 kernel's unwind info. In that case, ktab_size remains 0 and
59 hence the value of KERNEL_START doesn't matter. */
61 #define KERNEL_START 0xc000000000000000ULL
63 static size_t ktab_size
= 0;
64 struct ia64_table_entry
66 uint64_t start_offset
;
71 static struct ia64_table_entry
*ktab
= NULL
;
75 /* An enumeration of the different IA-64 instruction types. */
77 typedef enum instruction_type
79 A
, /* Integer ALU ; I-unit or M-unit */
80 I
, /* Non-ALU integer; I-unit */
81 M
, /* Memory ; M-unit */
82 F
, /* Floating-point ; F-unit */
83 B
, /* Branch ; B-unit */
84 L
, /* Extended (L+X) ; I-unit */
85 X
, /* Extended (L+X) ; I-unit */
86 undefined
/* undefined or reserved */
89 /* We represent IA-64 PC addresses as the value of the instruction
90 pointer or'd with some bit combination in the low nibble which
91 represents the slot number in the bundle addressed by the
92 instruction pointer. The problem is that the Linux kernel
93 multiplies its slot numbers (for exceptions) by one while the
94 disassembler multiplies its slot numbers by 6. In addition, I've
95 heard it said that the simulator uses 1 as the multiplier.
97 I've fixed the disassembler so that the bytes_per_line field will
98 be the slot multiplier. If bytes_per_line comes in as zero, it
99 is set to six (which is how it was set up initially). -- objdump
100 displays pretty disassembly dumps with this value. For our purposes,
101 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
102 never want to also display the raw bytes the way objdump does. */
104 #define SLOT_MULTIPLIER 1
106 /* Length in bytes of an instruction bundle. */
108 #define BUNDLE_LEN 16
110 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
112 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
113 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
116 static gdbarch_init_ftype ia64_gdbarch_init
;
118 static gdbarch_register_name_ftype ia64_register_name
;
119 static gdbarch_register_type_ftype ia64_register_type
;
120 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
121 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
122 static struct type
*is_float_or_hfa_type (struct type
*t
);
123 static CORE_ADDR
ia64_find_global_pointer (struct gdbarch
*gdbarch
,
126 #define NUM_IA64_RAW_REGS 462
128 static int sp_regnum
= IA64_GR12_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as
131 pseudo-registers because they may not be accessible via the ptrace
132 register get/set interfaces. */
134 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
,
135 VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
136 V127_REGNUM
= V32_REGNUM
+ 95,
137 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16,
138 VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
140 /* Array of register names; There should be ia64_num_regs strings in
143 static char *ia64_register_names
[] =
144 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
145 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
146 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
147 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
161 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
162 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
163 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
164 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
165 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
166 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
167 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
168 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
169 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
170 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
171 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
172 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
173 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
174 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
175 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
176 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
187 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
191 "pr", "ip", "psr", "cfm",
193 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
194 "", "", "", "", "", "", "", "",
195 "rsc", "bsp", "bspstore", "rnat",
197 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
198 "ccv", "", "", "", "unat", "", "", "",
199 "fpsr", "", "", "", "itc",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "", "",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
210 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
211 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
212 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
213 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
214 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
215 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
216 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
217 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
218 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
219 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
220 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
221 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
222 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
223 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
224 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
225 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
229 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
230 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
231 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
232 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
233 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
234 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
235 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
236 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
237 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
238 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
239 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
240 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
242 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
243 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
244 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
245 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
246 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
247 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
248 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
249 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
252 struct ia64_frame_cache
254 CORE_ADDR base
; /* frame pointer base for frame */
255 CORE_ADDR pc
; /* function start pc for frame */
256 CORE_ADDR saved_sp
; /* stack pointer for frame */
257 CORE_ADDR bsp
; /* points at r32 for the current frame */
258 CORE_ADDR cfm
; /* cfm value for current frame */
259 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
261 int sof
; /* Size of frame (decoded from cfm value). */
262 int sol
; /* Size of locals (decoded from cfm value). */
263 int sor
; /* Number of rotating registers (decoded from
265 CORE_ADDR after_prologue
;
266 /* Address of first instruction after the last
267 prologue instruction; Note that there may
268 be instructions from the function's body
269 intermingled with the prologue. */
270 int mem_stack_frame_size
;
271 /* Size of the memory stack frame (may be zero),
272 or -1 if it has not been determined yet. */
273 int fp_reg
; /* Register number (if any) used a frame pointer
274 for this frame. 0 if no register is being used
275 as the frame pointer. */
277 /* Saved registers. */
278 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
283 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
288 static const struct floatformat floatformat_ia64_ext_little
=
290 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
291 floatformat_intbit_yes
, "floatformat_ia64_ext_little", floatformat_valid
, NULL
294 static const struct floatformat floatformat_ia64_ext_big
=
296 floatformat_big
, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
297 floatformat_intbit_yes
, "floatformat_ia64_ext_big", floatformat_valid
300 static const struct floatformat
*floatformats_ia64_ext
[2] =
302 &floatformat_ia64_ext_big
,
303 &floatformat_ia64_ext_little
307 ia64_ext_type (struct gdbarch
*gdbarch
)
309 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
311 if (!tdep
->ia64_ext_type
)
313 = arch_float_type (gdbarch
, 128, "builtin_type_ia64_ext",
314 floatformats_ia64_ext
);
316 return tdep
->ia64_ext_type
;
320 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
321 struct reggroup
*group
)
326 if (group
== all_reggroup
)
328 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
329 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
330 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
331 if (group
== float_reggroup
)
333 if (group
== vector_reggroup
)
335 if (group
== general_reggroup
)
336 return (!vector_p
&& !float_p
);
337 if (group
== save_reggroup
|| group
== restore_reggroup
)
343 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
345 return ia64_register_names
[reg
];
349 ia64_register_type (struct gdbarch
*arch
, int reg
)
351 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
352 return ia64_ext_type (arch
);
354 return builtin_type (arch
)->builtin_long
;
358 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
360 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
361 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
366 /* Extract ``len'' bits from an instruction bundle starting at
370 extract_bit_field (const gdb_byte
*bundle
, int from
, int len
)
372 long long result
= 0LL;
374 int from_byte
= from
/ 8;
375 int to_byte
= to
/ 8;
376 unsigned char *b
= (unsigned char *) bundle
;
382 if (from_byte
== to_byte
)
383 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
384 result
= c
>> (from
% 8);
385 lshift
= 8 - (from
% 8);
387 for (i
= from_byte
+1; i
< to_byte
; i
++)
389 result
|= ((long long) b
[i
]) << lshift
;
393 if (from_byte
< to_byte
&& (to
% 8 != 0))
396 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
397 result
|= ((long long) c
) << lshift
;
403 /* Replace the specified bits in an instruction bundle. */
406 replace_bit_field (gdb_byte
*bundle
, long long val
, int from
, int len
)
409 int from_byte
= from
/ 8;
410 int to_byte
= to
/ 8;
411 unsigned char *b
= (unsigned char *) bundle
;
414 if (from_byte
== to_byte
)
416 unsigned char left
, right
;
418 left
= (c
>> (to
% 8)) << (to
% 8);
419 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
420 c
= (unsigned char) (val
& 0xff);
421 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
429 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
430 c
= c
| (val
<< (from
% 8));
432 val
>>= 8 - from
% 8;
434 for (i
= from_byte
+1; i
< to_byte
; i
++)
443 unsigned char cv
= (unsigned char) val
;
445 c
= c
>> (to
% 8) << (to
% 8);
446 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
452 /* Return the contents of slot N (for N = 0, 1, or 2) in
453 and instruction bundle. */
456 slotN_contents (gdb_byte
*bundle
, int slotnum
)
458 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
461 /* Store an instruction in an instruction bundle. */
464 replace_slotN_contents (gdb_byte
*bundle
, long long instr
, int slotnum
)
466 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
469 static const enum instruction_type template_encoding_table
[32][3] =
471 { M
, I
, I
}, /* 00 */
472 { M
, I
, I
}, /* 01 */
473 { M
, I
, I
}, /* 02 */
474 { M
, I
, I
}, /* 03 */
475 { M
, L
, X
}, /* 04 */
476 { M
, L
, X
}, /* 05 */
477 { undefined
, undefined
, undefined
}, /* 06 */
478 { undefined
, undefined
, undefined
}, /* 07 */
479 { M
, M
, I
}, /* 08 */
480 { M
, M
, I
}, /* 09 */
481 { M
, M
, I
}, /* 0A */
482 { M
, M
, I
}, /* 0B */
483 { M
, F
, I
}, /* 0C */
484 { M
, F
, I
}, /* 0D */
485 { M
, M
, F
}, /* 0E */
486 { M
, M
, F
}, /* 0F */
487 { M
, I
, B
}, /* 10 */
488 { M
, I
, B
}, /* 11 */
489 { M
, B
, B
}, /* 12 */
490 { M
, B
, B
}, /* 13 */
491 { undefined
, undefined
, undefined
}, /* 14 */
492 { undefined
, undefined
, undefined
}, /* 15 */
493 { B
, B
, B
}, /* 16 */
494 { B
, B
, B
}, /* 17 */
495 { M
, M
, B
}, /* 18 */
496 { M
, M
, B
}, /* 19 */
497 { undefined
, undefined
, undefined
}, /* 1A */
498 { undefined
, undefined
, undefined
}, /* 1B */
499 { M
, F
, B
}, /* 1C */
500 { M
, F
, B
}, /* 1D */
501 { undefined
, undefined
, undefined
}, /* 1E */
502 { undefined
, undefined
, undefined
}, /* 1F */
505 /* Fetch and (partially) decode an instruction at ADDR and return the
506 address of the next instruction to fetch. */
509 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
511 gdb_byte bundle
[BUNDLE_LEN
];
512 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
516 /* Warn about slot numbers greater than 2. We used to generate
517 an error here on the assumption that the user entered an invalid
518 address. But, sometimes GDB itself requests an invalid address.
519 This can (easily) happen when execution stops in a function for
520 which there are no symbols. The prologue scanner will attempt to
521 find the beginning of the function - if the nearest symbol
522 happens to not be aligned on a bundle boundary (16 bytes), the
523 resulting starting address will cause GDB to think that the slot
526 So we warn about it and set the slot number to zero. It is
527 not necessarily a fatal condition, particularly if debugging
528 at the assembly language level. */
531 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
532 "Using slot 0 instead"));
538 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
543 *instr
= slotN_contents (bundle
, slotnum
);
544 templ
= extract_bit_field (bundle
, 0, 5);
545 *it
= template_encoding_table
[(int)templ
][slotnum
];
547 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
550 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
555 /* There are 5 different break instructions (break.i, break.b,
556 break.m, break.f, and break.x), but they all have the same
557 encoding. (The five bit template in the low five bits of the
558 instruction bundle distinguishes one from another.)
560 The runtime architecture manual specifies that break instructions
561 used for debugging purposes must have the upper two bits of the 21
562 bit immediate set to a 0 and a 1 respectively. A breakpoint
563 instruction encodes the most significant bit of its 21 bit
564 immediate at bit 36 of the 41 bit instruction. The penultimate msb
565 is at bit 25 which leads to the pattern below.
567 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
568 it turns out that 0x80000 was used as the syscall break in the early
569 simulators. So I changed the pattern slightly to do "break.i 0x080001"
570 instead. But that didn't work either (I later found out that this
571 pattern was used by the simulator that I was using.) So I ended up
572 using the pattern seen below.
574 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
575 while we need bit-based addressing as the instructions length is 41 bits and
576 we must not modify/corrupt the adjacent slots in the same bundle.
577 Fortunately we may store larger memory incl. the adjacent bits with the
578 original memory content (not the possibly already stored breakpoints there).
579 We need to be careful in ia64_memory_remove_breakpoint to always restore
580 only the specific bits of this instruction ignoring any adjacent stored
583 We use the original addressing with the low nibble in the range <0..2> which
584 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
585 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
586 bytes just without these two possibly skipped bytes to not to exceed to the
589 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
590 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
591 In such case there is no other place where to store
592 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
593 SLOTNUM in ia64_memory_remove_breakpoint.
595 There is one special case where we need to be extra careful:
596 L-X instructions, which are instructions that occupy 2 slots
597 (The L part is always in slot 1, and the X part is always in
598 slot 2). We must refuse to insert breakpoints for an address
599 that points at slot 2 of a bundle where an L-X instruction is
600 present, since there is logically no instruction at that address.
601 However, to make things more interesting, the opcode of L-X
602 instructions is located in slot 2. This means that, to insert
603 a breakpoint at an address that points to slot 1, we actually
604 need to write the breakpoint in slot 2! Slot 1 is actually
605 the extended operand, so writing the breakpoint there would not
606 have the desired effect. Another side-effect of this issue
607 is that we need to make sure that the shadow contents buffer
608 does save byte 15 of our instruction bundle (this is the tail
609 end of slot 2, which wouldn't be saved if we were to insert
610 the breakpoint in slot 1).
612 ia64 16-byte bundle layout:
613 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
615 The current addressing used by the code below:
616 original PC placed_address placed_size required covered
617 == bp_tgt->shadow_len reqd \subset covered
618 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
619 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
620 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
622 L-X instructions are treated a little specially, as explained above:
623 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
625 `objdump -d' and some other tools show a bit unjustified offsets:
626 original PC byte where starts the instruction objdump offset
627 0xABCDE0 0xABCDE0 0xABCDE0
628 0xABCDE1 0xABCDE5 0xABCDE6
629 0xABCDE2 0xABCDEA 0xABCDEC
632 #define IA64_BREAKPOINT 0x00003333300LL
635 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
636 struct bp_target_info
*bp_tgt
)
638 CORE_ADDR addr
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
639 gdb_byte bundle
[BUNDLE_LEN
];
640 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
641 long long instr_breakpoint
;
644 struct cleanup
*cleanup
;
647 error (_("Can't insert breakpoint for slot numbers greater than 2."));
651 /* Enable the automatic memory restoration from breakpoints while
652 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
653 Otherwise, we could possibly store into the shadow parts of the adjacent
654 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
655 breakpoint instruction bits region. */
656 cleanup
= make_show_memory_breakpoints_cleanup (0);
657 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
660 do_cleanups (cleanup
);
664 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
665 for addressing the SHADOW_CONTENTS placement. */
666 shadow_slotnum
= slotnum
;
668 /* Always cover the last byte of the bundle in case we are inserting
669 a breakpoint on an L-X instruction. */
670 bp_tgt
->shadow_len
= BUNDLE_LEN
- shadow_slotnum
;
672 templ
= extract_bit_field (bundle
, 0, 5);
673 if (template_encoding_table
[templ
][slotnum
] == X
)
675 /* X unit types can only be used in slot 2, and are actually
676 part of a 2-slot L-X instruction. We cannot break at this
677 address, as this is the second half of an instruction that
678 lives in slot 1 of that bundle. */
679 gdb_assert (slotnum
== 2);
680 error (_("Can't insert breakpoint for non-existing slot X"));
682 if (template_encoding_table
[templ
][slotnum
] == L
)
684 /* L unit types can only be used in slot 1. But the associated
685 opcode for that instruction is in slot 2, so bump the slot number
687 gdb_assert (slotnum
== 1);
691 /* Store the whole bundle, except for the initial skipped bytes by the slot
692 number interpreted as bytes offset in PLACED_ADDRESS. */
693 memcpy (bp_tgt
->shadow_contents
, bundle
+ shadow_slotnum
,
696 /* Re-read the same bundle as above except that, this time, read it in order
697 to compute the new bundle inside which we will be inserting the
698 breakpoint. Therefore, disable the automatic memory restoration from
699 breakpoints while we read our instruction bundle. Otherwise, the general
700 restoration mechanism kicks in and we would possibly remove parts of the
701 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
702 the real breakpoint instruction bits region. */
703 make_show_memory_breakpoints_cleanup (1);
704 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
707 do_cleanups (cleanup
);
711 /* Breakpoints already present in the code will get deteacted and not get
712 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
713 location cannot induce the internal error as they are optimized into
714 a single instance by update_global_location_list. */
715 instr_breakpoint
= slotN_contents (bundle
, slotnum
);
716 if (instr_breakpoint
== IA64_BREAKPOINT
)
717 internal_error (__FILE__
, __LINE__
,
718 _("Address %s already contains a breakpoint."),
719 paddress (gdbarch
, bp_tgt
->placed_address
));
720 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
722 bp_tgt
->placed_size
= bp_tgt
->shadow_len
;
724 val
= target_write_memory (addr
+ shadow_slotnum
, bundle
+ shadow_slotnum
,
727 do_cleanups (cleanup
);
732 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
733 struct bp_target_info
*bp_tgt
)
735 CORE_ADDR addr
= bp_tgt
->placed_address
;
736 gdb_byte bundle_mem
[BUNDLE_LEN
], bundle_saved
[BUNDLE_LEN
];
737 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
738 long long instr_breakpoint
, instr_saved
;
741 struct cleanup
*cleanup
;
745 /* Disable the automatic memory restoration from breakpoints while
746 we read our instruction bundle. Otherwise, the general restoration
747 mechanism kicks in and we would possibly remove parts of the adjacent
748 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
749 breakpoint instruction bits region. */
750 cleanup
= make_show_memory_breakpoints_cleanup (1);
751 val
= target_read_memory (addr
, bundle_mem
, BUNDLE_LEN
);
754 do_cleanups (cleanup
);
758 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
759 for addressing the SHADOW_CONTENTS placement. */
760 shadow_slotnum
= slotnum
;
762 templ
= extract_bit_field (bundle_mem
, 0, 5);
763 if (template_encoding_table
[templ
][slotnum
] == X
)
765 /* X unit types can only be used in slot 2, and are actually
766 part of a 2-slot L-X instruction. We refuse to insert
767 breakpoints at this address, so there should be no reason
768 for us attempting to remove one there, except if the program's
769 code somehow got modified in memory. */
770 gdb_assert (slotnum
== 2);
771 warning (_("Cannot remove breakpoint at address %s from non-existing "
772 "X-type slot, memory has changed underneath"),
773 paddress (gdbarch
, bp_tgt
->placed_address
));
774 do_cleanups (cleanup
);
777 if (template_encoding_table
[templ
][slotnum
] == L
)
779 /* L unit types can only be used in slot 1. But the breakpoint
780 was actually saved using slot 2, so update the slot number
782 gdb_assert (slotnum
== 1);
786 gdb_assert (bp_tgt
->placed_size
== BUNDLE_LEN
- shadow_slotnum
);
787 gdb_assert (bp_tgt
->placed_size
== bp_tgt
->shadow_len
);
789 instr_breakpoint
= slotN_contents (bundle_mem
, slotnum
);
790 if (instr_breakpoint
!= IA64_BREAKPOINT
)
792 warning (_("Cannot remove breakpoint at address %s, "
793 "no break instruction at such address."),
794 paddress (gdbarch
, bp_tgt
->placed_address
));
795 do_cleanups (cleanup
);
799 /* Extract the original saved instruction from SLOTNUM normalizing its
800 bit-shift for INSTR_SAVED. */
801 memcpy (bundle_saved
, bundle_mem
, BUNDLE_LEN
);
802 memcpy (bundle_saved
+ shadow_slotnum
, bp_tgt
->shadow_contents
,
804 instr_saved
= slotN_contents (bundle_saved
, slotnum
);
806 /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
807 and not any of the other ones that are stored in SHADOW_CONTENTS. */
808 replace_slotN_contents (bundle_mem
, instr_saved
, slotnum
);
809 val
= target_write_raw_memory (addr
, bundle_mem
, BUNDLE_LEN
);
811 do_cleanups (cleanup
);
815 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
816 instruction slots ranges are bit-granular (41 bits) we have to provide an
817 extended range as described for ia64_memory_insert_breakpoint. We also take
818 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
819 make a match for permanent breakpoints. */
821 static const gdb_byte
*
822 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
,
823 CORE_ADDR
*pcptr
, int *lenptr
)
825 CORE_ADDR addr
= *pcptr
;
826 static gdb_byte bundle
[BUNDLE_LEN
];
827 int slotnum
= (int) (*pcptr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
828 long long instr_fetched
;
831 struct cleanup
*cleanup
;
834 error (_("Can't insert breakpoint for slot numbers greater than 2."));
838 /* Enable the automatic memory restoration from breakpoints while
839 we read our instruction bundle to match bp_loc_is_permanent. */
840 cleanup
= make_show_memory_breakpoints_cleanup (0);
841 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
842 do_cleanups (cleanup
);
844 /* The memory might be unreachable. This can happen, for instance,
845 when the user inserts a breakpoint at an invalid address. */
849 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
850 for addressing the SHADOW_CONTENTS placement. */
851 shadow_slotnum
= slotnum
;
853 /* Cover always the last byte of the bundle for the L-X slot case. */
854 *lenptr
= BUNDLE_LEN
- shadow_slotnum
;
856 /* Check for L type instruction in slot 1, if present then bump up the slot
857 number to the slot 2. */
858 templ
= extract_bit_field (bundle
, 0, 5);
859 if (template_encoding_table
[templ
][slotnum
] == X
)
861 gdb_assert (slotnum
== 2);
862 error (_("Can't insert breakpoint for non-existing slot X"));
864 if (template_encoding_table
[templ
][slotnum
] == L
)
866 gdb_assert (slotnum
== 1);
870 /* A break instruction has its all its opcode bits cleared except for
871 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
872 we should not touch the L slot - the upper 41 bits of the parameter. */
873 instr_fetched
= slotN_contents (bundle
, slotnum
);
874 instr_fetched
&= 0x1003ffffc0LL
;
875 replace_slotN_contents (bundle
, instr_fetched
, slotnum
);
877 return bundle
+ shadow_slotnum
;
881 ia64_read_pc (struct regcache
*regcache
)
883 ULONGEST psr_value
, pc_value
;
886 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
887 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
888 slot_num
= (psr_value
>> 41) & 3;
890 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
894 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
896 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
899 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
900 psr_value
&= ~(3LL << 41);
901 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
905 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
906 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
909 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
911 /* Returns the address of the slot that's NSLOTS slots away from
912 the address ADDR. NSLOTS may be positive or negative. */
914 rse_address_add(CORE_ADDR addr
, int nslots
)
917 int mandatory_nat_slots
= nslots
/ 63;
918 int direction
= nslots
< 0 ? -1 : 1;
920 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
922 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
923 new_addr
+= 8 * direction
;
925 if (IS_NaT_COLLECTION_ADDR(new_addr
))
926 new_addr
+= 8 * direction
;
931 static enum register_status
932 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
933 int regnum
, gdb_byte
*buf
)
935 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
936 enum register_status status
;
938 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
940 #ifdef HAVE_LIBUNWIND_IA64_H
941 /* First try and use the libunwind special reg accessor,
942 otherwise fallback to standard logic. */
943 if (!libunwind_is_initialized ()
944 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
947 /* The fallback position is to assume that r32-r127 are
948 found sequentially in memory starting at $bof. This
949 isn't always true, but without libunwind, this is the
951 enum register_status status
;
956 status
= regcache_cooked_read_unsigned (regcache
,
957 IA64_BSP_REGNUM
, &bsp
);
958 if (status
!= REG_VALID
)
961 status
= regcache_cooked_read_unsigned (regcache
,
962 IA64_CFM_REGNUM
, &cfm
);
963 if (status
!= REG_VALID
)
966 /* The bsp points at the end of the register frame so we
967 subtract the size of frame from it to get start of
969 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
971 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
973 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
974 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8, byte_order
);
975 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
979 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
983 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
987 status
= regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
988 if (status
!= REG_VALID
)
990 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
991 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
992 byte_order
, unatN_val
);
994 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
996 ULONGEST natN_val
= 0;
999 CORE_ADDR gr_addr
= 0;
1000 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1001 if (status
!= REG_VALID
)
1003 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1004 if (status
!= REG_VALID
)
1007 /* The bsp points at the end of the register frame so we
1008 subtract the size of frame from it to get start of register frame. */
1009 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1011 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1012 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1016 /* Compute address of nat collection bits. */
1017 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1018 CORE_ADDR nat_collection
;
1020 /* If our nat collection address is bigger than bsp, we have to get
1021 the nat collection from rnat. Otherwise, we fetch the nat
1022 collection from the computed address. */
1023 if (nat_addr
>= bsp
)
1024 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
,
1027 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1028 nat_bit
= (gr_addr
>> 3) & 0x3f;
1029 natN_val
= (nat_collection
>> nat_bit
) & 1;
1032 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1033 byte_order
, natN_val
);
1035 else if (regnum
== VBOF_REGNUM
)
1037 /* A virtual register frame start is provided for user convenience.
1038 It can be calculated as the bsp - sof (sizeof frame). */
1041 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1042 if (status
!= REG_VALID
)
1044 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1045 if (status
!= REG_VALID
)
1048 /* The bsp points at the end of the register frame so we
1049 subtract the size of frame from it to get beginning of frame. */
1050 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1051 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1054 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1059 status
= regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1060 if (status
!= REG_VALID
)
1062 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1063 if (status
!= REG_VALID
)
1066 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1068 /* Fetch predicate register rename base from current frame
1069 marker for this frame. */
1070 int rrb_pr
= (cfm
>> 32) & 0x3f;
1072 /* Adjust the register number to account for register rotation. */
1073 regnum
= VP16_REGNUM
1074 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1076 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
1077 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1078 byte_order
, prN_val
);
1081 memset (buf
, 0, register_size (gdbarch
, regnum
));
1087 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1088 int regnum
, const gdb_byte
*buf
)
1090 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1092 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
1096 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1097 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1099 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1101 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1103 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1104 write_memory (reg_addr
, buf
, 8);
1107 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1109 ULONGEST unatN_val
, unat
, unatN_mask
;
1110 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
1111 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1114 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
1116 unat
&= ~unatN_mask
;
1117 else if (unatN_val
== 1)
1119 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
1121 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1126 CORE_ADDR gr_addr
= 0;
1127 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1128 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1130 /* The bsp points at the end of the register frame so we
1131 subtract the size of frame from it to get start of register frame. */
1132 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1134 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1135 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1137 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1141 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
1143 /* Compute address of nat collection bits. */
1144 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1145 CORE_ADDR nat_collection
;
1146 int natN_bit
= (gr_addr
>> 3) & 0x3f;
1147 ULONGEST natN_mask
= (1LL << natN_bit
);
1148 /* If our nat collection address is bigger than bsp, we have to get
1149 the nat collection from rnat. Otherwise, we fetch the nat
1150 collection from the computed address. */
1151 if (nat_addr
>= bsp
)
1153 regcache_cooked_read_unsigned (regcache
,
1157 nat_collection
|= natN_mask
;
1159 nat_collection
&= ~natN_mask
;
1160 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
,
1165 gdb_byte nat_buf
[8];
1166 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1168 nat_collection
|= natN_mask
;
1170 nat_collection
&= ~natN_mask
;
1171 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
),
1172 byte_order
, nat_collection
);
1173 write_memory (nat_addr
, nat_buf
, 8);
1177 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1184 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1185 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1187 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1189 /* Fetch predicate register rename base from current frame
1190 marker for this frame. */
1191 int rrb_pr
= (cfm
>> 32) & 0x3f;
1193 /* Adjust the register number to account for register rotation. */
1194 regnum
= VP16_REGNUM
1195 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1197 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1199 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
1202 else if (prN_val
== 1)
1204 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
1208 /* The ia64 needs to convert between various ieee floating-point formats
1209 and the special ia64 floating point register format. */
1212 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
1214 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
1215 && type
!= ia64_ext_type (gdbarch
));
1219 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
1220 struct type
*valtype
, gdb_byte
*out
,
1221 int *optimizedp
, int *unavailablep
)
1223 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1224 gdb_byte in
[MAX_REGISTER_SIZE
];
1226 /* Convert to TYPE. */
1227 if (!get_frame_register_bytes (frame
, regnum
, 0,
1228 register_size (gdbarch
, regnum
),
1229 in
, optimizedp
, unavailablep
))
1232 convert_typed_floating (in
, ia64_ext_type (gdbarch
), out
, valtype
);
1233 *optimizedp
= *unavailablep
= 0;
1238 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
1239 struct type
*valtype
, const gdb_byte
*in
)
1241 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1242 gdb_byte out
[MAX_REGISTER_SIZE
];
1243 convert_typed_floating (in
, valtype
, out
, ia64_ext_type (gdbarch
));
1244 put_frame_register (frame
, regnum
, out
);
1248 /* Limit the number of skipped non-prologue instructions since examining
1249 of the prologue is expensive. */
1250 static int max_skip_non_prologue_insns
= 40;
1252 /* Given PC representing the starting address of a function, and
1253 LIM_PC which is the (sloppy) limit to which to scan when looking
1254 for a prologue, attempt to further refine this limit by using
1255 the line data in the symbol table. If successful, a better guess
1256 on where the prologue ends is returned, otherwise the previous
1257 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1258 which will be set to indicate whether the returned limit may be
1259 used with no further scanning in the event that the function is
1262 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1263 superseded by skip_prologue_using_sal. */
1266 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
1268 struct symtab_and_line prologue_sal
;
1269 CORE_ADDR start_pc
= pc
;
1272 /* The prologue can not possibly go past the function end itself,
1273 so we can already adjust LIM_PC accordingly. */
1274 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
1277 /* Start off not trusting the limit. */
1280 prologue_sal
= find_pc_line (pc
, 0);
1281 if (prologue_sal
.line
!= 0)
1284 CORE_ADDR addr
= prologue_sal
.end
;
1286 /* Handle the case in which compiler's optimizer/scheduler
1287 has moved instructions into the prologue. We scan ahead
1288 in the function looking for address ranges whose corresponding
1289 line number is less than or equal to the first one that we
1290 found for the function. (It can be less than when the
1291 scheduler puts a body instruction before the first prologue
1293 for (i
= 2 * max_skip_non_prologue_insns
;
1294 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1297 struct symtab_and_line sal
;
1299 sal
= find_pc_line (addr
, 0);
1302 if (sal
.line
<= prologue_sal
.line
1303 && sal
.symtab
== prologue_sal
.symtab
)
1310 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1312 lim_pc
= prologue_sal
.end
;
1313 if (start_pc
== get_pc_function_start (lim_pc
))
1320 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1321 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1322 || (14 <= (_regnum_) && (_regnum_) <= 31))
1323 #define imm9(_instr_) \
1324 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1325 | (((_instr_) & 0x00008000000LL) >> 20) \
1326 | (((_instr_) & 0x00000001fc0LL) >> 6))
1328 /* Allocate and initialize a frame cache. */
1330 static struct ia64_frame_cache
*
1331 ia64_alloc_frame_cache (void)
1333 struct ia64_frame_cache
*cache
;
1336 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1342 cache
->prev_cfm
= 0;
1348 cache
->frameless
= 1;
1350 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1351 cache
->saved_regs
[i
] = 0;
1357 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1358 struct frame_info
*this_frame
,
1359 struct ia64_frame_cache
*cache
)
1362 CORE_ADDR last_prologue_pc
= pc
;
1363 instruction_type it
;
1368 int unat_save_reg
= 0;
1369 int pr_save_reg
= 0;
1370 int mem_stack_frame_size
= 0;
1372 CORE_ADDR spill_addr
= 0;
1375 char reg_contents
[256];
1381 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1383 memset (instores
, 0, sizeof instores
);
1384 memset (infpstores
, 0, sizeof infpstores
);
1385 memset (reg_contents
, 0, sizeof reg_contents
);
1387 if (cache
->after_prologue
!= 0
1388 && cache
->after_prologue
<= lim_pc
)
1389 return cache
->after_prologue
;
1391 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1392 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1394 /* We want to check if we have a recognizable function start before we
1395 look ahead for a prologue. */
1396 if (pc
< lim_pc
&& next_pc
1397 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1399 /* alloc - start of a regular function. */
1400 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1401 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1402 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1404 /* Verify that the current cfm matches what we think is the
1405 function start. If we have somehow jumped within a function,
1406 we do not want to interpret the prologue and calculate the
1407 addresses of various registers such as the return address.
1408 We will instead treat the frame as frameless. */
1410 (sof
== (cache
->cfm
& 0x7f) &&
1411 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1415 last_prologue_pc
= next_pc
;
1420 /* Look for a leaf routine. */
1421 if (pc
< lim_pc
&& next_pc
1422 && (it
== I
|| it
== M
)
1423 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1425 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1426 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1427 | ((instr
& 0x001f8000000LL
) >> 20)
1428 | ((instr
& 0x000000fe000LL
) >> 13));
1429 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1430 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1431 int qp
= (int) (instr
& 0x0000000003fLL
);
1432 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1434 /* mov r2, r12 - beginning of leaf routine. */
1436 last_prologue_pc
= next_pc
;
1440 /* If we don't recognize a regular function or leaf routine, we are
1446 last_prologue_pc
= lim_pc
;
1450 /* Loop, looking for prologue instructions, keeping track of
1451 where preserved registers were spilled. */
1454 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1458 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1460 /* Exit loop upon hitting a non-nop branch instruction. */
1465 else if (((instr
& 0x3fLL
) != 0LL) &&
1466 (frameless
|| ret_reg
!= 0))
1468 /* Exit loop upon hitting a predicated instruction if
1469 we already have the return register or if we are frameless. */
1474 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1477 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1478 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1479 int qp
= (int) (instr
& 0x0000000003f);
1481 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1484 last_prologue_pc
= next_pc
;
1487 else if ((it
== I
|| it
== M
)
1488 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1490 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1491 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1492 | ((instr
& 0x001f8000000LL
) >> 20)
1493 | ((instr
& 0x000000fe000LL
) >> 13));
1494 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1495 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1496 int qp
= (int) (instr
& 0x0000000003fLL
);
1498 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1502 last_prologue_pc
= next_pc
;
1504 else if (qp
== 0 && rN
== 12 && rM
== 12)
1506 /* adds r12, -mem_stack_frame_size, r12 */
1507 mem_stack_frame_size
-= imm
;
1508 last_prologue_pc
= next_pc
;
1510 else if (qp
== 0 && rN
== 2
1511 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1513 gdb_byte buf
[MAX_REGISTER_SIZE
];
1514 CORE_ADDR saved_sp
= 0;
1515 /* adds r2, spilloffset, rFramePointer
1517 adds r2, spilloffset, r12
1519 Get ready for stf.spill or st8.spill instructions.
1520 The address to start spilling at is loaded into r2.
1521 FIXME: Why r2? That's what gcc currently uses; it
1522 could well be different for other compilers. */
1524 /* Hmm... whether or not this will work will depend on
1525 where the pc is. If it's still early in the prologue
1526 this'll be wrong. FIXME */
1529 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1530 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1531 get_frame_register (this_frame
, sp_regnum
, buf
);
1532 saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1534 spill_addr
= saved_sp
1535 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1538 last_prologue_pc
= next_pc
;
1540 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1541 rN
< 256 && imm
== 0)
1543 /* mov rN, rM where rM is an input register. */
1544 reg_contents
[rN
] = rM
;
1545 last_prologue_pc
= next_pc
;
1547 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1551 last_prologue_pc
= next_pc
;
1556 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1557 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1559 /* stf.spill [rN] = fM, imm9
1561 stf.spill [rN] = fM */
1563 int imm
= imm9(instr
);
1564 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1565 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1566 int qp
= (int) (instr
& 0x0000000003fLL
);
1567 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1568 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1570 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1572 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1575 spill_addr
= 0; /* last one; must be done. */
1576 last_prologue_pc
= next_pc
;
1579 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1580 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1586 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1587 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1588 int qp
= (int) (instr
& 0x0000000003fLL
);
1589 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1591 /* We have something like "mov.m r3 = ar.unat". Remember the
1592 r3 (or whatever) and watch for a store of this register... */
1594 last_prologue_pc
= next_pc
;
1597 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1600 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1601 int qp
= (int) (instr
& 0x0000000003fLL
);
1602 if (qp
== 0 && isScratch (rN
))
1605 last_prologue_pc
= next_pc
;
1609 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1610 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1614 st8 [rN] = rM, imm9 */
1615 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1616 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1617 int qp
= (int) (instr
& 0x0000000003fLL
);
1618 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1619 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1620 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1622 /* We've found a spill of either the UNAT register or the PR
1623 register. (Well, not exactly; what we've actually found is
1624 a spill of the register that UNAT or PR was moved to).
1625 Record that fact and move on... */
1626 if (rM
== unat_save_reg
)
1628 /* Track UNAT register. */
1629 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1634 /* Track PR register. */
1635 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1638 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1639 /* st8 [rN] = rM, imm9 */
1640 spill_addr
+= imm9(instr
);
1642 spill_addr
= 0; /* Must be done spilling. */
1643 last_prologue_pc
= next_pc
;
1645 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1647 /* Allow up to one store of each input register. */
1648 instores
[rM
-32] = 1;
1649 last_prologue_pc
= next_pc
;
1651 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1652 !instores
[indirect
-32])
1654 /* Allow an indirect store of an input register. */
1655 instores
[indirect
-32] = 1;
1656 last_prologue_pc
= next_pc
;
1659 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1666 Note that the st8 case is handled in the clause above.
1668 Advance over stores of input registers. One store per input
1669 register is permitted. */
1670 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1671 int qp
= (int) (instr
& 0x0000000003fLL
);
1672 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1673 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1675 instores
[rM
-32] = 1;
1676 last_prologue_pc
= next_pc
;
1678 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1679 !instores
[indirect
-32])
1681 /* Allow an indirect store of an input register. */
1682 instores
[indirect
-32] = 1;
1683 last_prologue_pc
= next_pc
;
1686 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1693 Advance over stores of floating point input registers. Again
1694 one store per register is permitted. */
1695 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1696 int qp
= (int) (instr
& 0x0000000003fLL
);
1697 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1699 infpstores
[fM
-8] = 1;
1700 last_prologue_pc
= next_pc
;
1704 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1705 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1707 /* st8.spill [rN] = rM
1709 st8.spill [rN] = rM, imm9 */
1710 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1711 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1712 int qp
= (int) (instr
& 0x0000000003fLL
);
1713 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1715 /* We've found a spill of one of the preserved general purpose
1716 regs. Record the spill address and advance the spill
1717 register if appropriate. */
1718 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1719 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1720 /* st8.spill [rN] = rM, imm9 */
1721 spill_addr
+= imm9(instr
);
1723 spill_addr
= 0; /* Done spilling. */
1724 last_prologue_pc
= next_pc
;
1731 /* If not frameless and we aren't called by skip_prologue, then we need
1732 to calculate registers for the previous frame which will be needed
1735 if (!frameless
&& this_frame
)
1737 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1738 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1740 /* Extract the size of the rotating portion of the stack
1741 frame and the register rename base from the current
1747 rrb_gr
= (cfm
>> 18) & 0x7f;
1749 /* Find the bof (beginning of frame). */
1750 bof
= rse_address_add (cache
->bsp
, -sof
);
1752 for (i
= 0, addr
= bof
;
1756 if (IS_NaT_COLLECTION_ADDR (addr
))
1760 if (i
+32 == cfm_reg
)
1761 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1762 if (i
+32 == ret_reg
)
1763 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1765 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1768 /* For the previous argument registers we require the previous bof.
1769 If we can't find the previous cfm, then we can do nothing. */
1771 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1773 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
],
1776 else if (cfm_reg
!= 0)
1778 get_frame_register (this_frame
, cfm_reg
, buf
);
1779 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1781 cache
->prev_cfm
= cfm
;
1785 sor
= ((cfm
>> 14) & 0xf) * 8;
1787 sol
= (cfm
>> 7) & 0x7f;
1788 rrb_gr
= (cfm
>> 18) & 0x7f;
1790 /* The previous bof only requires subtraction of the sol (size of
1791 locals) due to the overlap between output and input of
1792 subsequent frames. */
1793 bof
= rse_address_add (bof
, -sol
);
1795 for (i
= 0, addr
= bof
;
1799 if (IS_NaT_COLLECTION_ADDR (addr
))
1804 cache
->saved_regs
[IA64_GR32_REGNUM
1805 + ((i
+ (sor
- rrb_gr
)) % sor
)]
1808 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1814 /* Try and trust the lim_pc value whenever possible. */
1815 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1816 last_prologue_pc
= lim_pc
;
1818 cache
->frameless
= frameless
;
1819 cache
->after_prologue
= last_prologue_pc
;
1820 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1821 cache
->fp_reg
= fp_reg
;
1823 return last_prologue_pc
;
1827 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1829 struct ia64_frame_cache cache
;
1831 cache
.after_prologue
= 0;
1835 /* Call examine_prologue with - as third argument since we don't
1836 have a next frame pointer to send. */
1837 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1841 /* Normal frames. */
1843 static struct ia64_frame_cache
*
1844 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1846 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1847 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1848 struct ia64_frame_cache
*cache
;
1853 return (struct ia64_frame_cache
*) *this_cache
;
1855 cache
= ia64_alloc_frame_cache ();
1856 *this_cache
= cache
;
1858 get_frame_register (this_frame
, sp_regnum
, buf
);
1859 cache
->saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1861 /* We always want the bsp to point to the end of frame.
1862 This way, we can always get the beginning of frame (bof)
1863 by subtracting frame size. */
1864 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1865 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1867 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1869 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1870 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1872 cache
->sof
= (cfm
& 0x7f);
1873 cache
->sol
= (cfm
>> 7) & 0x7f;
1874 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1878 cache
->pc
= get_frame_func (this_frame
);
1881 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1883 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1889 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1890 struct frame_id
*this_id
)
1892 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1893 struct ia64_frame_cache
*cache
=
1894 ia64_frame_cache (this_frame
, this_cache
);
1896 /* If outermost frame, mark with null frame id. */
1897 if (cache
->base
!= 0)
1898 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1899 if (gdbarch_debug
>= 1)
1900 fprintf_unfiltered (gdb_stdlog
,
1901 "regular frame id: code %s, stack %s, "
1902 "special %s, this_frame %s\n",
1903 paddress (gdbarch
, this_id
->code_addr
),
1904 paddress (gdbarch
, this_id
->stack_addr
),
1905 paddress (gdbarch
, cache
->bsp
),
1906 host_address_to_string (this_frame
));
1909 static struct value
*
1910 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1913 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1914 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1915 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1918 gdb_assert (regnum
>= 0);
1920 if (!target_has_registers
)
1921 error (_("No registers."));
1923 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1924 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1926 else if (regnum
== IA64_BSP_REGNUM
)
1929 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1931 /* We want to calculate the previous bsp as the end of the previous
1932 register stack frame. This corresponds to what the hardware bsp
1933 register will be if we pop the frame back which is why we might
1934 have been called. We know the beginning of the current frame is
1935 cache->bsp - cache->sof. This value in the previous frame points
1936 to the start of the output registers. We can calculate the end of
1937 that frame by adding the size of output:
1938 (sof (size of frame) - sol (size of locals)). */
1939 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1940 prev_cfm
= extract_unsigned_integer (value_contents_all (val
),
1942 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1944 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1946 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1949 else if (regnum
== IA64_CFM_REGNUM
)
1951 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1954 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1956 if (cache
->prev_cfm
)
1957 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1959 if (cache
->frameless
)
1960 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1962 return frame_unwind_got_register (this_frame
, regnum
, 0);
1965 else if (regnum
== IA64_VFP_REGNUM
)
1967 /* If the function in question uses an automatic register (r32-r127)
1968 for the frame pointer, it'll be found by ia64_find_saved_register()
1969 above. If the function lacks one of these frame pointers, we can
1970 still provide a value since we know the size of the frame. */
1971 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1974 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1976 struct value
*pr_val
;
1979 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1981 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1983 /* Fetch predicate register rename base from current frame
1984 marker for this frame. */
1985 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1987 /* Adjust the register number to account for register rotation. */
1988 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1990 prN
= extract_bit_field (value_contents_all (pr_val
),
1991 regnum
- VP0_REGNUM
, 1);
1992 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
1995 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1997 struct value
*unat_val
;
1999 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2001 unatN
= extract_bit_field (value_contents_all (unat_val
),
2002 regnum
- IA64_NAT0_REGNUM
, 1);
2003 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
2006 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2009 /* Find address of general register corresponding to nat bit we're
2013 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
2017 /* Compute address of nat collection bits. */
2018 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
2020 CORE_ADDR nat_collection
;
2023 /* If our nat collection address is bigger than bsp, we have to get
2024 the nat collection from rnat. Otherwise, we fetch the nat
2025 collection from the computed address. */
2026 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2027 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2028 if (nat_addr
>= bsp
)
2030 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
2031 nat_collection
= extract_unsigned_integer (buf
, 8, byte_order
);
2034 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
2035 nat_bit
= (gr_addr
>> 3) & 0x3f;
2036 natval
= (nat_collection
>> nat_bit
) & 1;
2039 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
2042 else if (regnum
== IA64_IP_REGNUM
)
2045 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2049 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2050 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2052 else if (cache
->frameless
)
2054 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2055 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2058 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2061 else if (regnum
== IA64_PSR_REGNUM
)
2063 /* We don't know how to get the complete previous PSR, but we need it
2064 for the slot information when we unwind the pc (pc is formed of IP
2065 register plus slot information from PSR). To get the previous
2066 slot information, we mask it off the return address. */
2067 ULONGEST slot_num
= 0;
2070 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2072 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2073 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2077 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2078 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2080 else if (cache
->frameless
)
2082 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2083 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2085 psr
&= ~(3LL << 41);
2086 slot_num
= pc
& 0x3LL
;
2087 psr
|= (CORE_ADDR
)slot_num
<< 41;
2088 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
2091 else if (regnum
== IA64_BR0_REGNUM
)
2093 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
2096 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2098 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2101 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2102 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2106 if (regnum
>= V32_REGNUM
)
2107 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2108 addr
= cache
->saved_regs
[regnum
];
2110 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2112 if (cache
->frameless
)
2114 struct value
*reg_val
;
2115 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
2117 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2118 with the same code above? */
2119 if (regnum
>= V32_REGNUM
)
2120 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2121 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2123 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
2125 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2127 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
2129 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
2131 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
2132 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2135 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2138 else /* All other registers. */
2142 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
2144 /* Fetch floating point register rename base from current
2145 frame marker for this frame. */
2146 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
2148 /* Adjust the floating point register number to account for
2149 register rotation. */
2150 regnum
= IA64_FR32_REGNUM
2151 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
2154 /* If we have stored a memory address, access the register. */
2155 addr
= cache
->saved_regs
[regnum
];
2157 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2158 /* Otherwise, punt and get the current value of the register. */
2160 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2164 static const struct frame_unwind ia64_frame_unwind
=
2167 default_frame_unwind_stop_reason
,
2168 &ia64_frame_this_id
,
2169 &ia64_frame_prev_register
,
2171 default_frame_sniffer
2174 /* Signal trampolines. */
2177 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
2178 struct ia64_frame_cache
*cache
)
2180 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2181 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2183 if (tdep
->sigcontext_register_address
)
2187 cache
->saved_regs
[IA64_VRAP_REGNUM
]
2188 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2190 cache
->saved_regs
[IA64_CFM_REGNUM
]
2191 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2193 cache
->saved_regs
[IA64_PSR_REGNUM
]
2194 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2196 cache
->saved_regs
[IA64_BSP_REGNUM
]
2197 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2199 cache
->saved_regs
[IA64_RNAT_REGNUM
]
2200 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2202 cache
->saved_regs
[IA64_CCV_REGNUM
]
2203 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2205 cache
->saved_regs
[IA64_UNAT_REGNUM
]
2206 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2208 cache
->saved_regs
[IA64_FPSR_REGNUM
]
2209 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2211 cache
->saved_regs
[IA64_PFS_REGNUM
]
2212 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2214 cache
->saved_regs
[IA64_LC_REGNUM
]
2215 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2218 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
2219 cache
->saved_regs
[regno
] =
2220 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2221 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
2222 cache
->saved_regs
[regno
] =
2223 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2224 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
2225 cache
->saved_regs
[regno
] =
2226 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2230 static struct ia64_frame_cache
*
2231 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2233 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2234 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2235 struct ia64_frame_cache
*cache
;
2239 return (struct ia64_frame_cache
*) *this_cache
;
2241 cache
= ia64_alloc_frame_cache ();
2243 get_frame_register (this_frame
, sp_regnum
, buf
);
2244 /* Note that frame size is hard-coded below. We cannot calculate it
2245 via prologue examination. */
2246 cache
->base
= extract_unsigned_integer (buf
, 8, byte_order
) + 16;
2248 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2249 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2251 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2252 cache
->cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2253 cache
->sof
= cache
->cfm
& 0x7f;
2255 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
2257 *this_cache
= cache
;
2262 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2263 void **this_cache
, struct frame_id
*this_id
)
2265 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2266 struct ia64_frame_cache
*cache
=
2267 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2269 (*this_id
) = frame_id_build_special (cache
->base
,
2270 get_frame_pc (this_frame
),
2272 if (gdbarch_debug
>= 1)
2273 fprintf_unfiltered (gdb_stdlog
,
2274 "sigtramp frame id: code %s, stack %s, "
2275 "special %s, this_frame %s\n",
2276 paddress (gdbarch
, this_id
->code_addr
),
2277 paddress (gdbarch
, this_id
->stack_addr
),
2278 paddress (gdbarch
, cache
->bsp
),
2279 host_address_to_string (this_frame
));
2282 static struct value
*
2283 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2284 void **this_cache
, int regnum
)
2286 gdb_byte buf
[MAX_REGISTER_SIZE
];
2288 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2289 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2290 struct ia64_frame_cache
*cache
=
2291 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2293 gdb_assert (regnum
>= 0);
2295 if (!target_has_registers
)
2296 error (_("No registers."));
2298 if (regnum
== IA64_IP_REGNUM
)
2301 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2305 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2306 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2309 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2312 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2313 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2317 if (regnum
>= V32_REGNUM
)
2318 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2319 addr
= cache
->saved_regs
[regnum
];
2321 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2323 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2326 else /* All other registers not listed above. */
2328 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2331 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2333 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2338 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2339 struct frame_info
*this_frame
,
2342 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2343 if (tdep
->pc_in_sigtramp
)
2345 CORE_ADDR pc
= get_frame_pc (this_frame
);
2347 if (tdep
->pc_in_sigtramp (pc
))
2354 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2357 default_frame_unwind_stop_reason
,
2358 ia64_sigtramp_frame_this_id
,
2359 ia64_sigtramp_frame_prev_register
,
2361 ia64_sigtramp_frame_sniffer
2367 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2369 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2374 static const struct frame_base ia64_frame_base
=
2377 ia64_frame_base_address
,
2378 ia64_frame_base_address
,
2379 ia64_frame_base_address
2382 #ifdef HAVE_LIBUNWIND_IA64_H
2384 struct ia64_unwind_table_entry
2386 unw_word_t start_offset
;
2387 unw_word_t end_offset
;
2388 unw_word_t info_offset
;
2391 static __inline__
uint64_t
2392 ia64_rse_slot_num (uint64_t addr
)
2394 return (addr
>> 3) & 0x3f;
2397 /* Skip over a designated number of registers in the backing
2398 store, remembering every 64th position is for NAT. */
2399 static __inline__
uint64_t
2400 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2402 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2406 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2409 /* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb
2410 register number to a libunwind register number. */
2412 ia64_gdb2uw_regnum (int regnum
)
2414 if (regnum
== sp_regnum
)
2416 else if (regnum
== IA64_BSP_REGNUM
)
2417 return UNW_IA64_BSP
;
2418 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2419 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2420 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2421 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2422 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2423 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2424 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2426 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2427 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2428 else if (regnum
== IA64_PR_REGNUM
)
2430 else if (regnum
== IA64_IP_REGNUM
)
2432 else if (regnum
== IA64_CFM_REGNUM
)
2433 return UNW_IA64_CFM
;
2434 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2435 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2436 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2437 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2442 /* Gdb ia64-libunwind-tdep callback function to convert from a libunwind
2443 register number to a ia64 gdb register number. */
2445 ia64_uw2gdb_regnum (int uw_regnum
)
2447 if (uw_regnum
== UNW_IA64_SP
)
2449 else if (uw_regnum
== UNW_IA64_BSP
)
2450 return IA64_BSP_REGNUM
;
2451 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2452 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2453 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2454 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2455 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2456 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2457 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2458 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2459 else if (uw_regnum
== UNW_IA64_PR
)
2460 return IA64_PR_REGNUM
;
2461 else if (uw_regnum
== UNW_REG_IP
)
2462 return IA64_IP_REGNUM
;
2463 else if (uw_regnum
== UNW_IA64_CFM
)
2464 return IA64_CFM_REGNUM
;
2465 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2466 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2467 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2468 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2473 /* Gdb ia64-libunwind-tdep callback function to reveal if register is
2474 a float register or not. */
2476 ia64_is_fpreg (int uw_regnum
)
2478 return unw_is_fpreg (uw_regnum
);
2481 /* Libunwind callback accessor function for general registers. */
2483 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2484 int write
, void *arg
)
2486 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2487 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2488 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2489 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2490 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2491 long new_sof
, old_sof
;
2492 gdb_byte buf
[MAX_REGISTER_SIZE
];
2494 /* We never call any libunwind routines that need to write registers. */
2495 gdb_assert (!write
);
2500 /* Libunwind expects to see the pc value which means the slot number
2501 from the psr must be merged with the ip word address. */
2502 get_frame_register (this_frame
, IA64_IP_REGNUM
, buf
);
2503 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2504 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2505 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2506 *val
= ip
| ((psr
>> 41) & 0x3);
2509 case UNW_IA64_AR_BSP
:
2510 /* Libunwind expects to see the beginning of the current
2511 register frame so we must account for the fact that
2512 ptrace() will return a value for bsp that points *after*
2513 the current register frame. */
2514 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2515 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2516 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2517 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2518 sof
= gdbarch_tdep (gdbarch
)->size_of_register_frame (this_frame
, cfm
);
2519 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2522 case UNW_IA64_AR_BSPSTORE
:
2523 /* Libunwind wants bspstore to be after the current register frame.
2524 This is what ptrace() and gdb treats as the regular bsp value. */
2525 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2526 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2530 /* For all other registers, just unwind the value directly. */
2531 get_frame_register (this_frame
, regnum
, buf
);
2532 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2536 if (gdbarch_debug
>= 1)
2537 fprintf_unfiltered (gdb_stdlog
,
2538 " access_reg: from cache: %4s=%s\n",
2539 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2540 ? ia64_register_names
[regnum
] : "r??"),
2541 paddress (gdbarch
, *val
));
2545 /* Libunwind callback accessor function for floating-point registers. */
2547 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2548 unw_fpreg_t
*val
, int write
, void *arg
)
2550 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2551 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2553 /* We never call any libunwind routines that need to write registers. */
2554 gdb_assert (!write
);
2556 get_frame_register (this_frame
, regnum
, (gdb_byte
*) val
);
2561 /* Libunwind callback accessor function for top-level rse registers. */
2563 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2564 unw_word_t
*val
, int write
, void *arg
)
2566 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2567 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2568 struct regcache
*regcache
= (struct regcache
*) arg
;
2569 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
2570 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2571 long new_sof
, old_sof
;
2572 gdb_byte buf
[MAX_REGISTER_SIZE
];
2574 /* We never call any libunwind routines that need to write registers. */
2575 gdb_assert (!write
);
2580 /* Libunwind expects to see the pc value which means the slot number
2581 from the psr must be merged with the ip word address. */
2582 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2583 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2584 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2585 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2586 *val
= ip
| ((psr
>> 41) & 0x3);
2589 case UNW_IA64_AR_BSP
:
2590 /* Libunwind expects to see the beginning of the current
2591 register frame so we must account for the fact that
2592 ptrace() will return a value for bsp that points *after*
2593 the current register frame. */
2594 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2595 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2596 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2597 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2599 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2602 case UNW_IA64_AR_BSPSTORE
:
2603 /* Libunwind wants bspstore to be after the current register frame.
2604 This is what ptrace() and gdb treats as the regular bsp value. */
2605 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2606 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2610 /* For all other registers, just unwind the value directly. */
2611 regcache_cooked_read (regcache
, regnum
, buf
);
2612 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2616 if (gdbarch_debug
>= 1)
2617 fprintf_unfiltered (gdb_stdlog
,
2618 " access_rse_reg: from cache: %4s=%s\n",
2619 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2620 ? ia64_register_names
[regnum
] : "r??"),
2621 paddress (gdbarch
, *val
));
2626 /* Libunwind callback accessor function for top-level fp registers. */
2628 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2629 unw_fpreg_t
*val
, int write
, void *arg
)
2631 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2632 struct regcache
*regcache
= (struct regcache
*) arg
;
2634 /* We never call any libunwind routines that need to write registers. */
2635 gdb_assert (!write
);
2637 regcache_cooked_read (regcache
, regnum
, (gdb_byte
*) val
);
2642 /* Libunwind callback accessor function for accessing memory. */
2644 ia64_access_mem (unw_addr_space_t as
,
2645 unw_word_t addr
, unw_word_t
*val
,
2646 int write
, void *arg
)
2648 if (addr
- KERNEL_START
< ktab_size
)
2650 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2651 + (addr
- KERNEL_START
));
2660 /* XXX do we need to normalize byte-order here? */
2662 return target_write_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2664 return target_read_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2667 /* Call low-level function to access the kernel unwind table. */
2669 getunwind_table (gdb_byte
**buf_p
)
2673 /* FIXME drow/2005-09-10: This code used to call
2674 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2675 for the currently running ia64-linux kernel. That data should
2676 come from the core file and be accessed via the auxv vector; if
2677 we want to preserve fall back to the running kernel's table, then
2678 we should find a way to override the corefile layer's
2679 xfer_partial method. */
2681 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2687 /* Get the kernel unwind table. */
2689 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2691 static struct ia64_table_entry
*etab
;
2698 size
= getunwind_table (&ktab_buf
);
2700 return -UNW_ENOINFO
;
2702 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2705 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2706 etab
->info_offset
+= KERNEL_START
;
2709 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2710 return -UNW_ENOINFO
;
2712 di
->format
= UNW_INFO_FORMAT_TABLE
;
2714 di
->start_ip
= ktab
[0].start_offset
;
2715 di
->end_ip
= etab
[-1].end_offset
;
2716 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2717 di
->u
.ti
.segbase
= 0;
2718 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2719 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2721 if (gdbarch_debug
>= 1)
2722 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2723 "segbase=%s, length=%s, gp=%s\n",
2724 (char *) di
->u
.ti
.name_ptr
,
2725 hex_string (di
->u
.ti
.segbase
),
2726 pulongest (di
->u
.ti
.table_len
),
2727 hex_string (di
->gp
));
2731 /* Find the unwind table entry for a specified address. */
2733 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2734 unw_dyn_info_t
*dip
, void **buf
)
2736 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2737 Elf_Internal_Ehdr
*ehdr
;
2738 unw_word_t segbase
= 0;
2739 CORE_ADDR load_base
;
2743 bfd
= objfile
->obfd
;
2745 ehdr
= elf_tdata (bfd
)->elf_header
;
2746 phdr
= elf_tdata (bfd
)->phdr
;
2748 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2750 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2752 switch (phdr
[i
].p_type
)
2755 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2760 case PT_IA_64_UNWIND
:
2761 p_unwind
= phdr
+ i
;
2769 if (!p_text
|| !p_unwind
)
2770 return -UNW_ENOINFO
;
2772 /* Verify that the segment that contains the IP also contains
2773 the static unwind table. If not, we may be in the Linux kernel's
2774 DSO gate page in which case the unwind table is another segment.
2775 Otherwise, we are dealing with runtime-generated code, for which we
2776 have no info here. */
2777 segbase
= p_text
->p_vaddr
+ load_base
;
2779 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2782 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2784 if (phdr
[i
].p_type
== PT_LOAD
2785 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2788 /* Get the segbase from the section containing the
2790 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2794 return -UNW_ENOINFO
;
2797 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2798 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2799 dip
->gp
= ia64_find_global_pointer (get_objfile_arch (objfile
), ip
);
2800 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2801 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2802 dip
->u
.rti
.segbase
= segbase
;
2803 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2804 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2809 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2811 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2812 int need_unwind_info
, void *arg
)
2814 struct obj_section
*sec
= find_pc_section (ip
);
2821 /* XXX This only works if the host and the target architecture are
2822 both ia64 and if the have (more or less) the same kernel
2824 if (get_kernel_table (ip
, &di
) < 0)
2825 return -UNW_ENOINFO
;
2827 if (gdbarch_debug
>= 1)
2828 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2829 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2830 "length=%s,data=%s)\n",
2831 hex_string (ip
), (char *)di
.u
.ti
.name_ptr
,
2832 hex_string (di
.u
.ti
.segbase
),
2833 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2835 pulongest (di
.u
.ti
.table_len
),
2836 hex_string ((CORE_ADDR
)di
.u
.ti
.table_data
));
2840 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2844 if (gdbarch_debug
>= 1)
2845 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2846 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2847 "length=%s,data=%s)\n",
2848 hex_string (ip
), (char *)di
.u
.rti
.name_ptr
,
2849 hex_string (di
.u
.rti
.segbase
),
2850 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2852 pulongest (di
.u
.rti
.table_len
),
2853 hex_string (di
.u
.rti
.table_data
));
2856 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2859 /* We no longer need the dyn info storage so free it. */
2865 /* Libunwind callback accessor function for cleanup. */
2867 ia64_put_unwind_info (unw_addr_space_t as
,
2868 unw_proc_info_t
*pip
, void *arg
)
2870 /* Nothing required for now. */
2873 /* Libunwind callback accessor function to get head of the dynamic
2874 unwind-info registration list. */
2876 ia64_get_dyn_info_list (unw_addr_space_t as
,
2877 unw_word_t
*dilap
, void *arg
)
2879 struct obj_section
*text_sec
;
2880 struct objfile
*objfile
;
2881 unw_word_t ip
, addr
;
2885 if (!libunwind_is_initialized ())
2886 return -UNW_ENOINFO
;
2888 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2892 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2893 ip
= obj_section_addr (text_sec
);
2894 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2897 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2898 /* We no longer need the dyn info storage so free it. */
2903 if (gdbarch_debug
>= 1)
2904 fprintf_unfiltered (gdb_stdlog
,
2905 "dynamic unwind table in objfile %s "
2907 bfd_get_filename (objfile
->obfd
),
2908 hex_string (addr
), hex_string (di
.gp
));
2914 return -UNW_ENOINFO
;
2918 /* Frame interface functions for libunwind. */
2921 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2922 struct frame_id
*this_id
)
2924 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2925 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2926 struct frame_id id
= outer_frame_id
;
2930 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2931 if (frame_id_eq (id
, outer_frame_id
))
2933 (*this_id
) = outer_frame_id
;
2937 /* We must add the bsp as the special address for frame comparison
2939 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2940 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2942 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2944 if (gdbarch_debug
>= 1)
2945 fprintf_unfiltered (gdb_stdlog
,
2946 "libunwind frame id: code %s, stack %s, "
2947 "special %s, this_frame %s\n",
2948 paddress (gdbarch
, id
.code_addr
),
2949 paddress (gdbarch
, id
.stack_addr
),
2950 paddress (gdbarch
, bsp
),
2951 host_address_to_string (this_frame
));
2954 static struct value
*
2955 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2956 void **this_cache
, int regnum
)
2959 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2960 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2963 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2964 reg
= IA64_PR_REGNUM
;
2965 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2966 reg
= IA64_UNAT_REGNUM
;
2968 /* Let libunwind do most of the work. */
2969 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2971 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2975 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2979 gdb_byte buf
[MAX_REGISTER_SIZE
];
2981 /* Fetch predicate register rename base from current frame
2982 marker for this frame. */
2983 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2984 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2985 rrb_pr
= (cfm
>> 32) & 0x3f;
2987 /* Adjust the register number to account for register rotation. */
2988 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2990 prN_val
= extract_bit_field (value_contents_all (val
),
2991 regnum
- VP0_REGNUM
, 1);
2992 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
2995 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2999 unatN_val
= extract_bit_field (value_contents_all (val
),
3000 regnum
- IA64_NAT0_REGNUM
, 1);
3001 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
3004 else if (regnum
== IA64_BSP_REGNUM
)
3006 struct value
*cfm_val
;
3007 CORE_ADDR prev_bsp
, prev_cfm
;
3009 /* We want to calculate the previous bsp as the end of the previous
3010 register stack frame. This corresponds to what the hardware bsp
3011 register will be if we pop the frame back which is why we might
3012 have been called. We know that libunwind will pass us back the
3013 beginning of the current frame so we should just add sof to it. */
3014 prev_bsp
= extract_unsigned_integer (value_contents_all (val
),
3016 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3018 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
),
3020 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
3022 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
3029 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
3030 struct frame_info
*this_frame
,
3033 if (libunwind_is_initialized ()
3034 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
3040 static const struct frame_unwind ia64_libunwind_frame_unwind
=
3043 default_frame_unwind_stop_reason
,
3044 ia64_libunwind_frame_this_id
,
3045 ia64_libunwind_frame_prev_register
,
3047 ia64_libunwind_frame_sniffer
,
3048 libunwind_frame_dealloc_cache
3052 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
3054 struct frame_id
*this_id
)
3056 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3057 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3060 struct frame_id id
= outer_frame_id
;
3063 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
3064 if (frame_id_eq (id
, outer_frame_id
))
3066 (*this_id
) = outer_frame_id
;
3070 /* We must add the bsp as the special address for frame comparison
3072 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3073 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3075 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
3076 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
3078 if (gdbarch_debug
>= 1)
3079 fprintf_unfiltered (gdb_stdlog
,
3080 "libunwind sigtramp frame id: code %s, "
3081 "stack %s, special %s, this_frame %s\n",
3082 paddress (gdbarch
, id
.code_addr
),
3083 paddress (gdbarch
, id
.stack_addr
),
3084 paddress (gdbarch
, bsp
),
3085 host_address_to_string (this_frame
));
3088 static struct value
*
3089 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
3090 void **this_cache
, int regnum
)
3092 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3093 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3094 struct value
*prev_ip_val
;
3097 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3098 method of getting previous registers. */
3099 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3101 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
),
3106 void *tmp_cache
= NULL
;
3107 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
3111 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
3115 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
3116 struct frame_info
*this_frame
,
3119 if (libunwind_is_initialized ())
3121 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
3126 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
3129 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
3132 default_frame_unwind_stop_reason
,
3133 ia64_libunwind_sigtramp_frame_this_id
,
3134 ia64_libunwind_sigtramp_frame_prev_register
,
3136 ia64_libunwind_sigtramp_frame_sniffer
3139 /* Set of libunwind callback acccessor functions. */
3140 unw_accessors_t ia64_unw_accessors
=
3142 ia64_find_proc_info_x
,
3143 ia64_put_unwind_info
,
3144 ia64_get_dyn_info_list
,
3152 /* Set of special libunwind callback acccessor functions specific for accessing
3153 the rse registers. At the top of the stack, we want libunwind to figure out
3154 how to read r32 - r127. Though usually they are found sequentially in
3155 memory starting from $bof, this is not always true. */
3156 unw_accessors_t ia64_unw_rse_accessors
=
3158 ia64_find_proc_info_x
,
3159 ia64_put_unwind_info
,
3160 ia64_get_dyn_info_list
,
3162 ia64_access_rse_reg
,
3163 ia64_access_rse_fpreg
,
3168 /* Set of ia64-libunwind-tdep gdb callbacks and data for generic
3169 ia64-libunwind-tdep code to use. */
3170 struct libunwind_descr ia64_libunwind_descr
=
3175 &ia64_unw_accessors
,
3176 &ia64_unw_rse_accessors
,
3179 #endif /* HAVE_LIBUNWIND_IA64_H */
3182 ia64_use_struct_convention (struct type
*type
)
3184 struct type
*float_elt_type
;
3186 /* Don't use the struct convention for anything but structure,
3187 union, or array types. */
3188 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
3189 || TYPE_CODE (type
) == TYPE_CODE_UNION
3190 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
3193 /* HFAs are structures (or arrays) consisting entirely of floating
3194 point values of the same length. Up to 8 of these are returned
3195 in registers. Don't use the struct convention when this is the
3197 float_elt_type
= is_float_or_hfa_type (type
);
3198 if (float_elt_type
!= NULL
3199 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3202 /* Other structs of length 32 or less are returned in r8-r11.
3203 Don't use the struct convention for those either. */
3204 return TYPE_LENGTH (type
) > 32;
3207 /* Return non-zero if TYPE is a structure or union type. */
3210 ia64_struct_type_p (const struct type
*type
)
3212 return (TYPE_CODE (type
) == TYPE_CODE_STRUCT
3213 || TYPE_CODE (type
) == TYPE_CODE_UNION
);
3217 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3220 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3221 struct type
*float_elt_type
;
3223 float_elt_type
= is_float_or_hfa_type (type
);
3224 if (float_elt_type
!= NULL
)
3226 gdb_byte from
[MAX_REGISTER_SIZE
];
3228 int regnum
= IA64_FR8_REGNUM
;
3229 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3233 regcache_cooked_read (regcache
, regnum
, from
);
3234 convert_typed_floating (from
, ia64_ext_type (gdbarch
),
3235 (char *)valbuf
+ offset
, float_elt_type
);
3236 offset
+= TYPE_LENGTH (float_elt_type
);
3240 else if (!ia64_struct_type_p (type
) && TYPE_LENGTH (type
) < 8)
3242 /* This is an integral value, and its size is less than 8 bytes.
3243 These values are LSB-aligned, so extract the relevant bytes,
3244 and copy them into VALBUF. */
3245 /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
3246 so I suppose we should also add handling here for integral values
3247 whose size is greater than 8. But I wasn't able to create such
3248 a type, neither in C nor in Ada, so not worrying about these yet. */
3249 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3252 regcache_cooked_read_unsigned (regcache
, IA64_GR8_REGNUM
, &val
);
3253 store_unsigned_integer (valbuf
, TYPE_LENGTH (type
), byte_order
, val
);
3259 int regnum
= IA64_GR8_REGNUM
;
3260 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3261 int n
= TYPE_LENGTH (type
) / reglen
;
3262 int m
= TYPE_LENGTH (type
) % reglen
;
3267 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3268 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3275 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3276 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3282 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3283 const gdb_byte
*valbuf
)
3285 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3286 struct type
*float_elt_type
;
3288 float_elt_type
= is_float_or_hfa_type (type
);
3289 if (float_elt_type
!= NULL
)
3291 gdb_byte to
[MAX_REGISTER_SIZE
];
3293 int regnum
= IA64_FR8_REGNUM
;
3294 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3298 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
3299 to
, ia64_ext_type (gdbarch
));
3300 regcache_cooked_write (regcache
, regnum
, to
);
3301 offset
+= TYPE_LENGTH (float_elt_type
);
3309 int regnum
= IA64_GR8_REGNUM
;
3310 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3311 int n
= TYPE_LENGTH (type
) / reglen
;
3312 int m
= TYPE_LENGTH (type
) % reglen
;
3317 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3318 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3325 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3326 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3331 static enum return_value_convention
3332 ia64_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
3333 struct type
*valtype
, struct regcache
*regcache
,
3334 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3336 int struct_return
= ia64_use_struct_convention (valtype
);
3338 if (writebuf
!= NULL
)
3340 gdb_assert (!struct_return
);
3341 ia64_store_return_value (valtype
, regcache
, writebuf
);
3344 if (readbuf
!= NULL
)
3346 gdb_assert (!struct_return
);
3347 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3351 return RETURN_VALUE_STRUCT_CONVENTION
;
3353 return RETURN_VALUE_REGISTER_CONVENTION
;
3357 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3359 switch (TYPE_CODE (t
))
3363 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3370 case TYPE_CODE_ARRAY
:
3372 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3375 case TYPE_CODE_STRUCT
:
3379 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3380 if (!is_float_or_hfa_type_recurse
3381 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3392 /* Determine if the given type is one of the floating point types or
3393 and HFA (which is a struct, array, or combination thereof whose
3394 bottom-most elements are all of the same floating point type). */
3396 static struct type
*
3397 is_float_or_hfa_type (struct type
*t
)
3399 struct type
*et
= 0;
3401 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3405 /* Return 1 if the alignment of T is such that the next even slot
3406 should be used. Return 0, if the next available slot should
3407 be used. (See section 8.5.1 of the IA-64 Software Conventions
3408 and Runtime manual). */
3411 slot_alignment_is_next_even (struct type
*t
)
3413 switch (TYPE_CODE (t
))
3417 if (TYPE_LENGTH (t
) > 8)
3421 case TYPE_CODE_ARRAY
:
3423 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3424 case TYPE_CODE_STRUCT
:
3428 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3429 if (slot_alignment_is_next_even
3430 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3439 /* Attempt to find (and return) the global pointer for the given
3442 This is a rather nasty bit of code searchs for the .dynamic section
3443 in the objfile corresponding to the pc of the function we're trying
3444 to call. Once it finds the addresses at which the .dynamic section
3445 lives in the child process, it scans the Elf64_Dyn entries for a
3446 DT_PLTGOT tag. If it finds one of these, the corresponding
3447 d_un.d_ptr value is the global pointer. */
3450 ia64_find_global_pointer_from_dynamic_section (struct gdbarch
*gdbarch
,
3453 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3454 struct obj_section
*faddr_sect
;
3456 faddr_sect
= find_pc_section (faddr
);
3457 if (faddr_sect
!= NULL
)
3459 struct obj_section
*osect
;
3461 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3463 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3467 if (osect
< faddr_sect
->objfile
->sections_end
)
3469 CORE_ADDR addr
, endaddr
;
3471 addr
= obj_section_addr (osect
);
3472 endaddr
= obj_section_endaddr (osect
);
3474 while (addr
< endaddr
)
3480 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3483 tag
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3485 if (tag
== DT_PLTGOT
)
3487 CORE_ADDR global_pointer
;
3489 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3492 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
),
3496 return global_pointer
;
3509 /* Attempt to find (and return) the global pointer for the given
3510 function. We first try the find_global_pointer_from_solib routine
3511 from the gdbarch tdep vector, if provided. And if that does not
3512 work, then we try ia64_find_global_pointer_from_dynamic_section. */
3515 ia64_find_global_pointer (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3517 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3520 if (tdep
->find_global_pointer_from_solib
)
3521 addr
= tdep
->find_global_pointer_from_solib (gdbarch
, faddr
);
3523 addr
= ia64_find_global_pointer_from_dynamic_section (gdbarch
, faddr
);
3527 /* Given a function's address, attempt to find (and return) the
3528 corresponding (canonical) function descriptor. Return 0 if
3531 find_extant_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3533 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3534 struct obj_section
*faddr_sect
;
3536 /* Return early if faddr is already a function descriptor. */
3537 faddr_sect
= find_pc_section (faddr
);
3538 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3541 if (faddr_sect
!= NULL
)
3543 struct obj_section
*osect
;
3544 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3546 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3550 if (osect
< faddr_sect
->objfile
->sections_end
)
3552 CORE_ADDR addr
, endaddr
;
3554 addr
= obj_section_addr (osect
);
3555 endaddr
= obj_section_endaddr (osect
);
3557 while (addr
< endaddr
)
3563 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3566 faddr2
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3568 if (faddr
== faddr2
)
3578 /* Attempt to find a function descriptor corresponding to the
3579 given address. If none is found, construct one on the
3580 stack using the address at fdaptr. */
3583 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3585 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3586 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3589 fdesc
= find_extant_func_descr (gdbarch
, faddr
);
3593 ULONGEST global_pointer
;
3599 global_pointer
= ia64_find_global_pointer (gdbarch
, faddr
);
3601 if (global_pointer
== 0)
3602 regcache_cooked_read_unsigned (regcache
,
3603 IA64_GR1_REGNUM
, &global_pointer
);
3605 store_unsigned_integer (buf
, 8, byte_order
, faddr
);
3606 store_unsigned_integer (buf
+ 8, 8, byte_order
, global_pointer
);
3608 write_memory (fdesc
, buf
, 16);
3614 /* Use the following routine when printing out function pointers
3615 so the user can see the function address rather than just the
3616 function descriptor. */
3618 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3619 struct target_ops
*targ
)
3621 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3622 struct obj_section
*s
;
3625 s
= find_pc_section (addr
);
3627 /* check if ADDR points to a function descriptor. */
3628 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3629 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3631 /* Normally, functions live inside a section that is executable.
3632 So, if ADDR points to a non-executable section, then treat it
3633 as a function descriptor and return the target address iff
3634 the target address itself points to a section that is executable.
3635 Check first the memory of the whole length of 8 bytes is readable. */
3636 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0
3637 && target_read_memory (addr
, buf
, 8) == 0)
3639 CORE_ADDR pc
= extract_unsigned_integer (buf
, 8, byte_order
);
3640 struct obj_section
*pc_section
= find_pc_section (pc
);
3642 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3646 /* There are also descriptors embedded in vtables. */
3649 struct bound_minimal_symbol minsym
;
3651 minsym
= lookup_minimal_symbol_by_pc (addr
);
3654 && is_vtable_name (MSYMBOL_LINKAGE_NAME (minsym
.minsym
)))
3655 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3662 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3667 /* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
3670 ia64_allocate_new_rse_frame (struct regcache
*regcache
, ULONGEST bsp
, int sof
)
3672 ULONGEST cfm
, pfs
, new_bsp
;
3674 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3676 new_bsp
= rse_address_add (bsp
, sof
);
3677 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3679 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3680 pfs
&= 0xc000000000000000LL
;
3681 pfs
|= (cfm
& 0xffffffffffffLL
);
3682 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3684 cfm
&= 0xc000000000000000LL
;
3686 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3689 /* The default "store_argument_in_slot" ia64_infcall_ops routine for
3693 ia64_store_argument_in_slot (struct regcache
*regcache
, CORE_ADDR bsp
,
3694 int slotnum
, gdb_byte
*buf
)
3696 write_memory (rse_address_add (bsp
, slotnum
), buf
, 8);
3699 /* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
3702 ia64_set_function_addr (struct regcache
*regcache
, CORE_ADDR func_addr
)
3704 /* Nothing needed. */
3708 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3709 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3710 int nargs
, struct value
**args
, CORE_ADDR sp
,
3711 int struct_return
, CORE_ADDR struct_addr
)
3713 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3714 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3719 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3722 CORE_ADDR funcdescaddr
, global_pointer
;
3723 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3727 /* Count the number of slots needed for the arguments. */
3728 for (argno
= 0; argno
< nargs
; argno
++)
3731 type
= check_typedef (value_type (arg
));
3732 len
= TYPE_LENGTH (type
);
3734 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3737 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3740 nslots
+= (len
+ 7) / 8;
3743 /* Divvy up the slots between the RSE and the memory stack. */
3744 rseslots
= (nslots
> 8) ? 8 : nslots
;
3745 memslots
= nslots
- rseslots
;
3747 /* Allocate a new RSE frame. */
3748 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3749 tdep
->infcall_ops
.allocate_new_rse_frame (regcache
, bsp
, rseslots
);
3751 /* We will attempt to find function descriptors in the .opd segment,
3752 but if we can't we'll construct them ourselves. That being the
3753 case, we'll need to reserve space on the stack for them. */
3754 funcdescaddr
= sp
- nfuncargs
* 16;
3755 funcdescaddr
&= ~0xfLL
;
3757 /* Adjust the stack pointer to it's new value. The calling conventions
3758 require us to have 16 bytes of scratch, plus whatever space is
3759 necessary for the memory slots and our function descriptors. */
3760 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3761 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3763 /* Place the arguments where they belong. The arguments will be
3764 either placed in the RSE backing store or on the memory stack.
3765 In addition, floating point arguments or HFAs are placed in
3766 floating point registers. */
3768 floatreg
= IA64_FR8_REGNUM
;
3769 for (argno
= 0; argno
< nargs
; argno
++)
3771 struct type
*float_elt_type
;
3774 type
= check_typedef (value_type (arg
));
3775 len
= TYPE_LENGTH (type
);
3777 /* Special handling for function parameters. */
3779 && TYPE_CODE (type
) == TYPE_CODE_PTR
3780 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3782 gdb_byte val_buf
[8];
3783 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
),
3785 store_unsigned_integer (val_buf
, 8, byte_order
,
3786 find_func_descr (regcache
, faddr
,
3788 if (slotnum
< rseslots
)
3789 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3792 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3799 /* Skip odd slot if necessary... */
3800 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3806 gdb_byte val_buf
[8];
3808 memset (val_buf
, 0, 8);
3809 if (!ia64_struct_type_p (type
) && len
< 8)
3811 /* Integral types are LSB-aligned, so we have to be careful
3812 to insert the argument on the correct side of the buffer.
3813 This is why we use store_unsigned_integer. */
3814 store_unsigned_integer
3815 (val_buf
, 8, byte_order
,
3816 extract_unsigned_integer (value_contents (arg
), len
,
3821 /* This is either an 8bit integral type, or an aggregate.
3822 For 8bit integral type, there is no problem, we just
3823 copy the value over.
3825 For aggregates, the only potentially tricky portion
3826 is to write the last one if it is less than 8 bytes.
3827 In this case, the data is Byte0-aligned. Happy news,
3828 this means that we don't need to differentiate the
3829 handling of 8byte blocks and less-than-8bytes blocks. */
3830 memcpy (val_buf
, value_contents (arg
) + argoffset
,
3831 (len
> 8) ? 8 : len
);
3834 if (slotnum
< rseslots
)
3835 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3838 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3845 /* Handle floating point types (including HFAs). */
3846 float_elt_type
= is_float_or_hfa_type (type
);
3847 if (float_elt_type
!= NULL
)
3850 len
= TYPE_LENGTH (type
);
3851 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3853 gdb_byte to
[MAX_REGISTER_SIZE
];
3854 convert_typed_floating (value_contents (arg
) + argoffset
,
3856 ia64_ext_type (gdbarch
));
3857 regcache_cooked_write (regcache
, floatreg
, to
);
3859 argoffset
+= TYPE_LENGTH (float_elt_type
);
3860 len
-= TYPE_LENGTH (float_elt_type
);
3865 /* Store the struct return value in r8 if necessary. */
3868 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
,
3869 (ULONGEST
) struct_addr
);
3872 global_pointer
= ia64_find_global_pointer (gdbarch
, func_addr
);
3874 if (global_pointer
!= 0)
3875 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3877 /* The following is not necessary on HP-UX, because we're using
3878 a dummy code sequence pushed on the stack to make the call, and
3879 this sequence doesn't need b0 to be set in order for our dummy
3880 breakpoint to be hit. Nonetheless, this doesn't interfere, and
3881 it's needed for other OSes, so we do this unconditionaly. */
3882 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3884 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3886 tdep
->infcall_ops
.set_function_addr (regcache
, func_addr
);
3891 static const struct ia64_infcall_ops ia64_infcall_ops
=
3893 ia64_allocate_new_rse_frame
,
3894 ia64_store_argument_in_slot
,
3895 ia64_set_function_addr
3898 static struct frame_id
3899 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3901 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3905 get_frame_register (this_frame
, sp_regnum
, buf
);
3906 sp
= extract_unsigned_integer (buf
, 8, byte_order
);
3908 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3909 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3911 if (gdbarch_debug
>= 1)
3912 fprintf_unfiltered (gdb_stdlog
,
3913 "dummy frame id: code %s, stack %s, special %s\n",
3914 paddress (gdbarch
, get_frame_pc (this_frame
)),
3915 paddress (gdbarch
, sp
), paddress (gdbarch
, bsp
));
3917 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3921 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3923 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3925 CORE_ADDR ip
, psr
, pc
;
3927 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3928 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
3929 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3930 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
3932 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3937 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3939 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3940 return print_insn_ia64 (memaddr
, info
);
3943 /* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
3946 ia64_size_of_register_frame (struct frame_info
*this_frame
, ULONGEST cfm
)
3948 return (cfm
& 0x7f);
3951 static struct gdbarch
*
3952 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3954 struct gdbarch
*gdbarch
;
3955 struct gdbarch_tdep
*tdep
;
3957 /* If there is already a candidate, use it. */
3958 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3960 return arches
->gdbarch
;
3962 tdep
= XCNEW (struct gdbarch_tdep
);
3963 gdbarch
= gdbarch_alloc (&info
, tdep
);
3965 tdep
->size_of_register_frame
= ia64_size_of_register_frame
;
3967 /* According to the ia64 specs, instructions that store long double
3968 floats in memory use a long-double format different than that
3969 used in the floating registers. The memory format matches the
3970 x86 extended float format which is 80 bits. An OS may choose to
3971 use this format (e.g. GNU/Linux) or choose to use a different
3972 format for storing long doubles (e.g. HPUX). In the latter case,
3973 the setting of the format may be moved/overridden in an
3974 OS-specific tdep file. */
3975 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3977 set_gdbarch_short_bit (gdbarch
, 16);
3978 set_gdbarch_int_bit (gdbarch
, 32);
3979 set_gdbarch_long_bit (gdbarch
, 64);
3980 set_gdbarch_long_long_bit (gdbarch
, 64);
3981 set_gdbarch_float_bit (gdbarch
, 32);
3982 set_gdbarch_double_bit (gdbarch
, 64);
3983 set_gdbarch_long_double_bit (gdbarch
, 128);
3984 set_gdbarch_ptr_bit (gdbarch
, 64);
3986 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3987 set_gdbarch_num_pseudo_regs (gdbarch
,
3988 LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3989 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3990 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3992 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3993 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3995 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3996 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3997 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3998 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3999 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
4000 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
4001 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
4003 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
4005 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
4007 set_gdbarch_memory_insert_breakpoint (gdbarch
,
4008 ia64_memory_insert_breakpoint
);
4009 set_gdbarch_memory_remove_breakpoint (gdbarch
,
4010 ia64_memory_remove_breakpoint
);
4011 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
4012 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
4013 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
4015 /* Settings for calling functions in the inferior. */
4016 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
4017 tdep
->infcall_ops
= ia64_infcall_ops
;
4018 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
4019 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
4021 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
4022 #ifdef HAVE_LIBUNWIND_IA64_H
4023 frame_unwind_append_unwinder (gdbarch
,
4024 &ia64_libunwind_sigtramp_frame_unwind
);
4025 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
4026 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4027 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
4029 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4031 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
4032 frame_base_set_default (gdbarch
, &ia64_frame_base
);
4034 /* Settings that should be unnecessary. */
4035 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4037 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
4038 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
4039 ia64_convert_from_func_ptr_addr
);
4041 /* The virtual table contains 16-byte descriptors, not pointers to
4043 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
4045 /* Hook in ABI-specific overrides, if they have been registered. */
4046 gdbarch_init_osabi (info
, gdbarch
);
4051 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
4054 _initialize_ia64_tdep (void)
4056 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);